Saritha Mini

PANTRY SYSTEM IN THEATERS
CHAPTER 1
INTRODUCTION
1.1 Introduction to project:

In this paper the designing of hardware simulation model of
Automated Pantry Order System using RF is mainly focused. This system
provides an automated wireless pantry order system using RF module.
System is providing each bogie/compartment with a microcontroller based
order placement unit. The unit is having a keypad to browse through the
menu. The menu items will be displayed on the LCD connected to
microcontroller. User can navigate through menu using keypad provided.
The order placed will be transmitted to the central computer (PC) which
will also have a RF module connected to it for data reception. In this way
the order will be placed and immediately it will be served to the passenger
by service provider. And the simulation model of above system is mention
For designing the hardware of our proposed automated pantry order
system, the simulation model of it is prepared. For that purpose the above
mentioned softwares as Atmel Studio is required for compiling the code as
compiler software. In this software the code required for the hardware is
compiled and executed. After the successful execution of code, the
respective hex file will be generated. That generated hex file will be given
to the controller in the simulation model. The complete simulation model
will be working on the same hex file which is generated by Atmel Studio.
This is the significance of Atmel Studio. Also the supporting softwares are
mentioned above without which Atmel Studio can not work. These are the
mandatory requirements of Atmel Studio to be installed with it. After that
Proteus 7 or Proteus 8 can be used for the designing of simulation model.
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In this software one can make the hardware design. Generally these
simulation designs are made to test the proposed model with results before
the actual implementation on hardware. This software is having its own
various tools (inbuilt) in it. So by using these tools simulation model for
Automated Pantry Order System is designed.
1.2 Basic concepts:
1.2.1 Embedded systems:
An embedded system can be defined as a computing device that

does a specific focused job. Appliances such as the air-conditioner, VCD
player, DVD player, printer, fax machine, mobile phone etc. are examples of
embedded systems. Each of these appliances will have a processor and special
hardware to meet the specific requirement of the application along with the
embedded software that is executed by the processor for meeting that specific
requirement.
The embedded software is also called firm ware. The desktop/laptop
computer is a general purpose computer. You can use it for a variety of
applications such as playing games, word processing, accounting, software
development and soon.
In contrast, the software in the embedded systems is always fixed listed below:
Embedded systems do a very specific task, they cannot be programmed
to do different things. Embedded systems have very limited resources,
particularly the memory. Generally, they do not have secondary storage
devices such as the CDROM or the floppy disk. Embedded systems have to
work against some deadlines. A specific job has to be completed within a
specific time. In some embedded systems, called real-time systems, the
deadlines are stringent. Missing a deadline may cause a catastrophe-loss of life
or damage to property. Embedded systems are constrained for power. As many
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embedded systems operate through a battery, the power consumption has to be

very low. Some embedded systems have to operate in extreme environmental
conditions such as very high temperatures and humidity.
Following are the advantages of Embedded Systems:
1. They are designed to do a specific task and have real time
performance constraints which must be met.
2. They allow the system hardware to be simplified so costs are
reduced.
They are usually in the form of small computerized parts in larger

devices which serve a general purpose
1.2.2 MICRO CONTROLLER:
1.2.2.1 DEFINITION OF MICROCONTROLLER:

Microcontroller, as the name suggests, are small controllers. They are
like single chip computers that are often embedded into other systems to
function as processing/controlling unit. For example, the remote control you
are using probably has microcontrollers inside that do decoding and other
controlling functions. They are also used in automobiles, washing machines,
microwave ovens, toys ... etc., where automation is needed.
The key features of microcontrollers include:
High Integration of Functionality

Microcontrollers sometimes are called single-chip computers because
they have on-chip memory and I/O circuitry and other circuitries that
enable them to function as small standalone computers without other
supporting circuitry.
Field Programmability, Flexibility
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Microcontrollers often use EEPROM or EPROM as their storage

device to allow field programmability so they are flexible to use. Once
the program is tested to be correct then large quantities of
microcontrollers can be programmed to be used in embedded systems.
Easy to Use
Assembly language is often used in microcontrollers and since they
usually follow RISC architecture, the instruction set is small. The
development package of microcontrollers often includes an assembler,
a simulator, a programmer to "burn" the chip and a demonstration
board. Some packages include a high level language compiler such as a
C compiler and more sophisticated libraries.
Most microcontrollers will also combine other devices such as:
A Timer module to allow the microcontroller to perform tasks for

certain time periods.
A serial I/O port to allow data to flow between the microcontroller and
other devices such as a PC or another microcontroller.
An ADC to allow the microcontroller to accept analogue input data for
processing.
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FIG 1.2.1: A TYPICAL MICROCONTROLLER DEVICE AND ITS

DIFFERENCE OF SUB UNITS
The heart of the microcontroller is the CPU core. In the past this has
traditionally been based on an 8-bit microprocessor unit. Figure above Shows a
typical microcontroller device and its different subunits
CHAPTER 2
LITERATURE SURVEY
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Discussing about the Indian railways pantry order systems, which

is totally and totally manual system.Suppose a customer wants to order any
food or breakfast, he cant access it immediately. Instead of that he will have to
wait for waiter or service provider.
Unless and until waiter comes to take order, your order cant be
posted. And after posting the order the passenger or customer will have to wait
for delivery and billing purpose.But, these problems can be solved by using the
AUTOMATED PANTRY ORDER SYSTEMS. This will provide the total
automation technology. So that
customer can order at any moment of time. And the problems because of the
fast delivery and billing can be solved.
2.1 Approximate use of travelling sources in India

The following pie chart in the figure 1 is representing the approximate use
of travelling sources which are used by the passengers normally in India. Out
of these probably one to two percent of people are using seaways, four to five
percent people are making
their journey by the airways, twenty-three to twenty eight percent people are
travelling by the bus.
Fig. 2.1: Approximate use of travelling sources in India
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And finally the most wide area of the pie chart is showing the
population of India or the people using the train as the source of travelling. So,
conclusion is that the train is the most important source of travelling used by
the people, for long as well as short journey trains. So, it is most probable that
our proposed Automated Pantry Order System can be implemented in the long
destinations trains or non suburban trains.
2.2 Proposed Design:
2.2.1 Transmitter Section:

START
Please enter your seat number
Select the menu with quantity
Total price will be displayed
Finalize the order
To Receiver
2.2.2 Receiver section:
From Transmitter
Data received from transmitter
Decoding of data and printing

the receipt
Order will get served to the

customer with printed receipt
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STOP
CHAPTER 3
DESIGN AND IMPLEMENTATION
HARDWARE IMPLEMENTATION:
Hardware implementation deals in drawing the schematic on

the plane paper according to the application, testing the schematic design over
the breadboard using the various ICs to find if the design meets the objective,
carrying out the PCB layout of the schematic tested on breadboard, finally
preparing the board and testing the -designed hardware.
BLOCK DIAGRAM:
Fig 3.0.1: ORDER

SECTION
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LCD
POWER SUPPLY
ATMEGA8
Micro controller
Encoder
Key pad
RF
Tx
First we apply power supply to kit and then the

user can order the wanted snack item through keypad .After that the user
selected item can display on the LCD screen.After that selected data is
transmitted using encoder and RF transmitter through wirelessly.This whole
order section is fixed to every seat in theater.But keypad is setted to seat
hand.LCD is setted on back of the seat.transmitting section is arranged below
the seat.
Fig 3.0.2: RECEIVING

SECTION:
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LCD
POWER SUPPLY
ATMEGA8
Decoder
Micro controller
Buzzer
RF
Rx
PC
In this the data is received is using RF receiver

and with
the help of decoder.and then the user seat number and his selected items are
displayed on
LCD screen or PC.the order reached to this system or screen at that time
buzzer will
ring.power supply must be given to this section during working hours of

theater is
necessary.this section is implemented in a room.
3.2 ATMEGA8:
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The Atmel AVR core combines a rich instruction

set with 32 general purpose working registers. All the 32 registers are directly
connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock
cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega8 provides the following features: 8 Kbytes of In-System
Programmable Flash with Read-While-Write capabilities, 512 bytes of
EEPROM, 1 Kbyte of SRAM, 23 general purpose I/O lines, 32 general
purpose working registers, three flexible Timer/Counters with compare
modes, internal and external interrupts, a serial programmable USART, a
byte oriented Two- wire Serial Interface, a 6-channel ADC (eight channels in
TQFP and QFN/MLF packages) with 10-bit accuracy, a programmable
Watchdog Timer with Internal Oscillator, an SPI serial port, and five
software selectable power saving modes. The Idle mode stops the CPU while
allowing the SRAM, Timer/Counters, SPI port, and interrupt system to
continue functioning. The Power- down mode saves the register contents but
freezes the Oscillator, disabling all other chip functions until the next
Interrupt or Hardware Reset. In Power-save mode, the asynchronous timer
continues to run, allowing the user to maintain a timer base while the rest of
the device is sleeping. The ADC Noise Reduction mode stops the CPU and all
I/O modules except asynchronous timer and ADC, to minimize switching
noise during ADC conversions. In Standby mode, the crystal/resonator
Oscillator is running while the rest of the device is sleeping. This allows very
fast start-up combined with low-power consumption. The device is
manufactured using Atmels high density non-volatile memory technology.
The Flash Program memory can be reprogrammed In-System through an SPI
serial interface, by a conventional non-volatile memory programmer, or by an
On-chip boot program running on the AVR core. The boot program can use
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any interface to download the application program in the Application Flash

memory. Software in the Boot Flash Section will continue to run while the
Application Flash Section is updated, providing true Read-While-Write
operation. By combining an 8-bit RISC CPU with In-System Self-
Programmable Flash on a monolithic chip, the Atmel ATmega8 is a powerful
microcontroller that provides a highly-flexible and cost-effective solution to
many embedded control applications. The ATmega8 is supported with a full
suite of program and system development tools, including C compilers, macro
assemblers, program debugger/simulators, In-Circuit Emulators, and
evaluation kits. The high-performance Atmel AVR ALU operates in direct

connection with all the 32 general purpose working registers. Within a single
clock cycle, arithmetic operations between general purpose registers or
between a register and an immediate are executed. The ALU operations are
divided into three main categories arithmetic, logical, and bit-functions.
Some implementations of the architecture also provide a powerful
multiplier supporting both signed/unsigned multiplication and fractional
format. For a detailed description,
3.2.1 Key features:
High-performance, Low-power Atmel AVR 8-bit Microcontroller.
Power Consumption at 4Mhz, 3V, 25C

Advanced RISC Architecture

130 Powerful Instructions Most Single-clock Cycle Execution
32 8 General Purpose Working Registers
Fully Static Operation Up to 16MIPS Throughput at 16MHz On-chip
2-cycle Multiplier
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High Endurance Non-volatile Memory segments.

8Kbytes of In-System Self-programmable Flash program memory
512Bytes EEPROM, 1Kbyte Internal SRAM
Write/Erase Cycles: 10,000 Flash/100,000 EEPROM.
Data retention: 20 years at 85C/100 years at 25C.
Optional Boot Code Section with Independent Lock Bits.
In-System Programming by On-chip Boot Program True Read-While-

Write Operation
Programming Lock for Software Security
Peripheral Features, Two 8-bit Timer/Counters with Separate Presale,

one Compare Mode
One 16-bit Timer/Counter with Separate Pre scalar, Compare Mode,
and Capture Mode
Real Time Counter with Separate Oscillator

Three PWM Channels
8-channel ADC in TQFP and QFN/MLF package Eight Channels 10-
bit Accuracy.
6-channel ADC in PDIP package Six Channels 10-bit Accuracy
Byte-oriented Two-wire Serial Interface.

Programmable Serial USART.
Master/Slave SPI Serial Interface.
Programmable Watchdog Timer with Separate On-chip Oscillator.
On-chip Analog Comparator
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated RC Oscillator
External and Internal Interrupt Sources
Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-
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down, and Standby
23 Programmable I/O Lines, 28-lead PDIP, 32-lead TQFP, and 32-pad

QFN/MLF.
2.7V - 5.5V (ATmega8L),4.5V - 5.5V (ATmega8)
Fig 3.2.1
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Fig: 3.2.2 Block diagram
The high-performance Atmel AVR ALU operates in direct

connection with all the 32 general purpose working registers. Within a single
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clock cycle, arithmetic operations between general purpose registers or

between a register and an immediate are executed. The ALU operations are
divided into three main categories arithmetic, logical, and bit-functions.
Some implementations of the architecture also provide a powerful
multiplier supporting both signed/unsigned multiplication and fractional
format. For a detailed description,
The Status Register contains information about the result of the most recently
executed arithmetic instruction. This information can be used for altering
program flow in order to perform conditional operations. Note that the
Status Register is updated after all ALU operations,
Status Register:
The Status Register is not automatically stored when entering an interrupt
routine and restored when returning from an interrupt. This must be handled
by software
Fig 3.2.3
Global Interrupt Enable:
The Global Interrupt Enable bit must be set for the interrupts to be
enabled. The individual interrupt enable control is then performed in separate
control registers. If the Global Interrupt Enable Register is cleared, none of
the interrupts are enabled independent of the individual interrupt enable
settings. The I-bit is cleared by hardware after an interrupt has occurred, and
is set by the RETI instruction to enable subsequent interrupts. The I-bit can
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also be set and cleared by the application with the SEI and CLI instructions,
as described in the Instruction Set Reference.
Bit Copy Storage:

The Bit Copy instructions BLD (Bit Load) and BST (Bit Store) use
the T-bit as source or destination for the operated bit. A bit from a register in
the Register File can be copied into T by the BST instruction, and a bit in T
can be copied into a bit in a register in the Register File by the BLD
instruction.
Half Carry Flag:

The Half Carry Flag H indicates a Half Carry in some arithmetic
operations. Half Carry is useful in BCD arithmetic. See the Instruction Set
Description for detailed information
Twos Complement Overflow Flag:

The Twos Complement Overflow Flag V supports twos
complement arithmetic. See the
Instruction Set Description for detailed information
Negative Flag:
The Negative Flag N indicates a negative result in an arithmetic or logic
operation. See the Instruction Set Description for detailed information
Zero Flag:
The Zero Flag Z indicates a zero result in an arithmetic or logic operation.
See the Instruction Set Description for detailed information.
Carry Flag:
The Carry Flag C indicates a Carry in an arithmetic or logic
operation. See the Instruction Set Description for detailed information
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General Purpose Register File:
The Register File is optimized for the AVR Enhanced RISC

instruction set. In order to achieve the required performance and flexibility,
the following input/output schemes are supported by the Register File:
One 8-bit output operand and one
8-bit result input
Two 8-bit output operands and one

8-bit result input
Two 8-bit output operands and one

16-bit result input
One 16-bit output operand and one

16-bit result input
Fig 3.2.4 AVR CPU General Purpose Working Register
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Most of the instructions operating on the Register File have direct

access to all
registers, and most of them are single cycle instructions As shown in Figure ,
each
register is also assigned a Data memory address, mapping them directly into
the first 32
locations of the user Data Space. Although not being physically implemented
as SRAM
locations, this memory organization provides great flexibility in access of the

registers,
as the X-pointer, Y-pointer, and Z-pointer Registers can be set to index any
register in the file
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MEMORY:
This section describes the different memories in the Atmel AVR
ATmega8. The AVR architecture has two main memory spaces, the Data
memory and the Program Memory space. In addition, the ATmega8 features
an EEPROM Memory for data storage. All three memory spaces are linear and
regular.
Most of the instructions operating on the Register File have direct access to
all registers, and most of them are single cycle instructions As shown in
Figure, each register is also assigned a Data memory address, mapping them
directly into the first 32 locations of the user Data Space. Although not being
physically implemented as SRAM locations, this memory organization
provides great flexibility in access of the registers, as the X-pointer, Y-pointer,
and Z-pointer Registers can be set to index any register in the file.
In-System Reprogrammable Flash memory:
The ATmega8 contains 8Kbytes On-chip In-System

Reprogrammable Flash memory for program storage. Since all AVR
instructions are 16-bits or 32-bits wide, the Flash is organized as 4K 16
bits. For software security, the Flash Program memory space is divided into
two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase

cycles. The ATmega8 Pro- gram Counter (PC) is 12 bits wide, thus
addressing the 4K Program memory locations. The operation of Boot
Program section and associated Boot Lock Bits for software protection are
described in detail in Boot Loader Support Read-While-Write Self-
Programming
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SRAM DATA
MEMORY:
The lower 1120 Data memory locations address the Register File,
the I/O Memory, and the internal data SRAM. The first 96 locations address
the Register File and I/O Memory, and the next 1024 locations address the
internal data SRAM.
The five different addressing modes for the Data memory cover:
Direct, Indirect with Displacement, Indirect, Indirect with Pre-decrement,
and Indirect with Post-increment. In the Register File, registers R26 to R31
feature the indirect addressing pointer registers.
The direct addressing reaches the
entire data space.
The Indirect with Displacement mode reaches 63 address locations
from the base address given by the Y-register or Z-register.
When using registers indirect addressing modes with automatic pre-
decrement and post-increment, the address registers X, Y and Z are
decremented or incremented.
ANALOG TO DIGITAL CONVERTER:
Features
10-bit Resolution
0.5 LSB Integral Non- Linearity.
2 LSB
Absolute
Accuracy
13s -
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260s
Conversio
n
Up to 15 kSPS at
Maximum
Resolution
6 Multiplexed Single
Ended Input Channels
Additional Multiplexed Single Ended Input Channels (TQFP
and QFN/MLF Package only)
Optional Left Adjustment
for ADC Result Readout
0 - VCC ADC Input
Voltage Range
Selectable 2.56V
ADC Reference
Voltage
Free Running or
Single Conversion
Mode
Interrupt on ADC
Conversion
Complete
Sleep
Mode
Noise
Canceler
The ATmega8 features a 10-bit successive approximation ADC. The

ADC is connected to an 8- channel Analog Multiplexer which allows eight
single-ended voltage inputs constructed from the pins of Port C. The single-
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ended voltage inputs refer to 0V (GND).The ADC contains a Sample and

Hold circuit which ensures that the input voltage to the ADC is held at a
constant level during conversion. A block diagram of the ADC is shown in
fig. The ADC has a separate analog supply voltage pin, AVCC. AVCC must
not differ more than 0.3V from VCC. See the paragraph ADC Noise
Canceller how to connect this pin. Internal reference voltages of nominally
2.56V or AVCC are provided On-chip. The voltage reference may be
externally decoupled at the AREF pin by a capacitor for better noise

performance.
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Fig 3.2.5
The ADC converts an analog input voltage to a 10-bit digital value
through successive approximation. The minimum value represents GND and
the maximum value represents the voltage on the AREF pin minus 1 LSB.
Optionally, AVCC or an internal 2.56V reference voltage may be connected
to the AREF pin by writing to the REFSn bits in the ADMUX Register.
The internal voltage reference may thus be decoupled by an external
capacitor at the AREF pin to improve noise immunity.
The analog input channel is selected by writing to the MUX bits in

ADMUX. Any of the ADC input pins, as well as GND and a fixed bandgap
voltage reference, can be selected as single ended inputs to the ADC. The
ADC is enabled by setting the ADC Enable bit, ADEN in ADCSRA. Volt-
age reference and input channel selections will not go into effect until
ADEN is set. The ADC does not consume power when ADEN is cleared,
so it is recommended to switch off the ADC before entering power saving
sleep modes.
The ADC generates a 10-bit result which is presented in the ADC

Data Registers, ADCH and ADCL. By default, the result is presented right
adjusted, but can optionally be presented left adjusted by setting the
ADLAR bit in ADMUX.
If the result is left adjusted and no more than 8-bit precision is

required, it is sufficient to read ADCH. Otherwise, ADCL must be read first,
then ADCH, to ensure that the content of the Data Registers belongs to the
same conversion. Once ADCL is read, ADC access to Data Registers is
blocked. This means that if ADCL has been read, and a conversion completes
before ADCH is read, neither register is updated and the result from the
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conversion is lost. When ADCH is read, ADC access to the ADCH and
ADCL Registers is re-enabled.
The ADC has its own interrupt which can be triggered when a conversion
completes. When ADC access to the Data Registers is prohibited between
reading of ADCH and ADCL, the interrupt will trigger even if the result is
lost.
A single conversion is started by writing a logical one to the ADC

Start Conversion bit, ADSC. This bit stays high as long as the conversion is
in progress and will be cleared by hardware when the conversion is
completed. If a different data channel is selected while a conversion is in
progress, the ADC will finish the current conversion before performing the
channel change.
In Free Running mode, the ADC is constantly sampling and updating the
ADC Data Register.
Free Running mode is selected by writing the ADFR bit in ADCSRA to

one. The first conversion must be started by writing a logical one to the
ADSC bit in ADCSRA. In this mode the ADC will perform successive
conversions independently of whether the ADC Interrupt Flag, ADIF is
cleared or not.
Fig 3.2.6
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By default, the successive approximation circuitry requires an input

clock frequency between 50kHz and 200kHz to get maximum resolution. If
a lower resolution than 10 bits is needed, the input clock frequency to the
ADC can be higher than 200kHz to get a higher sample rate.
The ADC module contains a prescaler, which generates an acceptable

ADC clock frequency from any CPU frequency above 100kHz. The
prescaling is set by the ADPS bits in ADCSRA. The prescaler starts
counting from the moment the ADC is switched on by setting the ADEN bit
in ADCSRA. The prescaler keeps running for as long as the ADEN bit is set,
and is continuously reset when ADEN is low.
When initiating a single ended conversion by setting the ADSC bit in

ADCSRA, the conversion starts at the following rising edge of the ADC
clock cycle. A normal conversion takes 13 ADC clock cycles. The first
conversion after the ADC is switched on (ADEN in ADCSRA is set) takes 25
ADC clock cycles in order to initialize the analog circuitry.
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The actual sample-and-hold takes place 1.5 ADC clock cycles after
the start of a normal conversion and 13.5 ADC clock cycles after the start
of a first conversion. When a conversion is complete, the result is written
to the ADC Data Registers, and ADIF is set. In single conversion mode,
ADSC is cleared simultaneously. The software may then set ADSC again,
and a new conversion will be initiated on the first rising ADC clock edge.
In Free Running mode, a new conversion will be started immediately

after the conversion completes, while ADSC remains high. For a summary of
conversion times
ADC Multiplexer Selection Register - ADMUX
B i t 7:6 REFS1:0: Reference

Selection
Fig 3.2.7
These bits select the voltage reference for the ADC, as shown in Table
74. If these bits are changed during a conversion, the change will not go in
effect until this conversion is complete (ADIF in ADCSRA is set). The
internal voltage reference options may not be used if an external reference
voltage is being applied to the AREF pin.
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REFS Voltage Reference Selection

0 0 AREF, Internal Vref turned off
0 1 AVCC with external capacitor at AREF pin
1 0 Reserved
1 1 Internal 2.56V Voltage Reference with external capacitor at
Bit 5 ADLAR: ADC

Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in
the ADC Data Register. Write one to ADLAR to left adjust the result.
Otherwise, the result is right adjusted. Changing the ADLAR bit will affect
the ADC Data Register immediately, regardless of any ongoing
conversions. For a complete description of this bit, see The ADC Data
Register ADCL and ADCH on page 201.
Bits 3:0 MUX3:0: Analog
Channel Selection Bits
The value of these bits selects which analog inputs are connected to the
ADC. See Table 75 for details. If these bits are changed during a conversion,
the change will not go in effect until this conversion is complete (ADIF in
ADCSRA is set).
MUX3..0 Single Ended Input

0000 ADC0
0001 ADC1
0010 ADC2
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0011 ADC3
0100 ADC4
0101 ADC5
MUX3.0 Single Ended Input

0110 ADC6
0111 ADC7
1000
1001
1010
1011
1100
1101
1110 1.30V (VBG)
1111 0V (GND)
ADC CONTROL AND STATUS REGISTER (ACSRA)
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Fig 3.2.8
Bit 7 ADEN:
ADC Enable
Writing this bit to one enables the ADC. By writing it to zero, the
ADC is turned off. Turning the ADC off while a conversion is in progress,
will terminate this conversion.
Bit 6 ADSC: ADC Start

Conversion
In Single Conversion mode, write this bit to one to start each

conversion. In Free Running mode, write this bit to one to start the first
conversion. The first conversion after ADSC has been written after the ADC
has been enabled, or if ADSC is written at the same time as the ADC is
enabled, will take 25 ADC clock cycles instead of the normal 13. This first
conversion performs initialization of the ADC.
ADSC will read as one as long as a conversion is in progress. When the
conversion is complete, it returns to zero. Writing zero to this bit has no
effect.
Bit 5 ADFR: ADC Free

Running Select
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When this bit is set (one) the ADC operates in Free Running mode. In
this mode, the ADC samples and updates the Data Registers continuously.
Clearing this bit (zero) will terminate Free Running mode.
Bit 4 ADIF: ADC

Interrupt Flag
This bit is set when an ADC conversion completes and the Data
Registers are updated. The ADC Conversion Complete Interrupt is
executed if the ADIE bit and the I-bit in SREG are set. ADIF is cleared by
hardware when executing the corresponding interrupt Handling Vector.
Alter- natively, ADIF is cleared by writing a logical one to the flag. Beware
that if doing a Read-Modify- Write on ADCSRA, a pending interrupt can be
disabled. This also applies if the SBI and CBI instructions are used.
Bit 3 ADIE: ADC

Interrupt Enable
When this bit is written to one and the I-bit in SREG is set, the ADC
Conversion Complete Interrupt is activated.
Bits 2:0 ADPS2:0: ADC Prescaler Select Bits
These bits determine the division factor between the XTAL frequency
and the input clock to the adc.
ADC prescalar bits
ADPS2 ADPS1 ADPS0 Division Factor

0 0 0 2
0 0 1 2
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0 1 0 4
0 1 1 8
1 0 0 16
1 0 1 32
1 1 0 64
1 1 1 128
ADC DATA REGISTER ADCL & ADCH
Fig 3.2.9
When an ADC conversion is complete, the result is

found in these two registers.
When ADCL is read, the ADC Data Register is not updated until
ADCH is read. Consequently, if the result is left adjusted and no more than
8-bit precision is required, it is sufficient to read ADCH. Otherwise, ADCL
must be read first, then ADCH.
The ADLAR bit in ADMUX and the MUXn bits in ADMUX affect
the way the result is read from the registers. If ADLAR is set, the result is
left adjusted. If ADLAR is cleared (default), the result is right adjusted.
3.3 POWER SUPPLY:
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The input to the circuit is applied from the regulated power supply. The
ac input i.e., 230V from the mains supply is step down by the transformer to
12V and is fed to a rectifier. The output obtained from the rectifier is a
pulsating dc voltage. So in order to get a pure dc voltage, the output voltage
from the rectifier is fed to a filter to remove any ac components present even
after rectification. Now, this voltage is given to a voltage regulator to obtain a
pure constant dc voltage. The block diagram of regulated power supply is
shown in the figure 3.2
Fig 3.3.1 components of power supply

Transformer:
Usually, DC voltages are required to operate various electronic

equipment and these voltages are 5V, 9V or 12V. But these voltages cannot be
obtained directly. Thus the a.c input available at the mains supply i.e., 230V is
to be brought down to the required voltage level. This is done by a transformer.
Thus, a step down transformer is employed to decrease the voltage to a
required level.
Rectifier:
The output from the transformer is fed to the rectifier. It converts A.C.
into pulsating D.C. The rectifier may be a half wave or a full wave rectifier. In
this project, a bridge rectifier is used because of its merits like good stability
and full wave rectification.
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Filter:
Capacitive filter is used in this project. It removes the ripples from the
output of rectifier and smoothens the D.C. Output received from this filter is
constant until the mains voltage and load is maintained constant. However, if
either of the two is varied, D.C. voltage received at this point changes.
Therefore a regulator is applied at the output stage.
Voltage regulator:
As the name itself implies, it regulates the input applied to it. A voltage
regulator is an electrical regulator designed to automatically maintain a
constant voltage level. In this project, power supply of 5V and 12V are
required. In order to obtain these voltage levels, 7805 and 7812 voltage
regulators are to be used. The first number 78 represents positive supply and
the numbers 05, 12 represent the required output voltage levels.
3.4 LCD DISPLAY:
LCD (Liquid Crystal Display) screen is an electronic display module

and find a wide Range of applications. A 16x2 LCD display is very basic
module and is very commonly used in various devices and circuits. These
modules are preferred over seven segments and other multi segment LEDs.
The reasons being: LCDs are economical; easily programmable; have no
limitation of displaying special & even custom characters
(unlike in seven segments), animations and so on.
A 16x2 LCD means it can display 16 characters per line and there are 2
such lines. In this LCD each character is displayed in 5x7 pixel matrix. This
LCD has two registers, namely, Command and Data. The command register
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stores the command instructions given to the LCD. A command is an
instruction given to LCD to do a predefined task like initializing it, clearing its
screen, setting the cursor position, controlling display etc. The data register
stores the data to be displayed on the LCD. The data is the ASCII value of the
character to be displayed on the LCD.
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Fig 3.4.1
Pin Function Name
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No
1 Ground (0V) Ground
2 Supply voltage; 5V (4.7V 5.3V) Vcc
3 Contrast adjustment; through a variable resistor VEE
4 Selects command register when low; and data Register

register when high Select
5 Low to write to the register; High to read from Read/write
the register
6 Sends data to data pins when a high to low Enable
pulse is given
7 DB0
8 DB1
9 DB2
10 DB3
8-bit data pins
11 DB4
12 DB5
13 DB6
14 DB7
15 Backlight VCC (5V) Led+
16 Backlight Ground (0V) Led-
3.5 KEYPAD INTERFACE:

Keypad is a widely used input device with lots of
application
in our everyday life. From a simple telephone to keyboard of a computer,

ATM,
electronic lock, etc., keypad is used to take input from the user for further
processing. In
this article we are interfacing keypad with the MCU AT89C51 and displaying
the
corresponding number on LCD. This module can be further used in a number

of systems
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to interfaced keypad with microcontroller and other processors to get desired

output. The
program to interface keypad with controller is written in C language which is

very easy to
understand.
Fig 3.5.1 keypad
Keypad is organized as a matrix of switches in rows and

column. The article uses a 4X3 matrix keypad and a 16x2 LCD for displaying
the output of keypad.
The circuit diagram shows the connection of keypad with the
controller. Port P2 of the microcontroller is used to send the data for displaying
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on the LCD. P1^1, P1^2, P1^3 pins of microcontroller is connected to RS, RW,
EN pins of LCD respectively. Port P0 is used to scan input from the keypad
(refer circuit diagram for connection).
The concept of interfacing keypad with the MCU is simple. Every number is
assigned two unique parameters, i.e., row and column number (n(R, C) for
example 6 (2, 3)). Hence every time a key is pressed the number is identified
by detecting the row and column number of the key pressed.
Initially all the rows are set to zero by the controller and the columns
are scanned to check if any key is pressed. In case no key is pressed the output
of all the columns will be high.
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Whenever a key is pressed the row and column corresponding to the key
will get short, resulting in the output of the corresponding column goes to go
low (since we have
made all the rows zero). This gives the column number of the pressed key.
3.6 RF MODULE:
The RF module, as the name suggests, operates at Radio
Frequency. The corresponding frequency range varies between 30 kHz & 300
GHz. In this RF system, the digital data is represented as variations in the
amplitude of carrier wave. This kind of modulation is known as Amplitude
Shift Keying (ASK).
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Transmission through RF is better than IR (infrared) because of many

reasons. Firstly, signals through RF can travel through larger distances making
it suitable for long range applications. Also, while IR mostly operates in line-
of-sight mode, RF signals can travel even when there is an obstruction between
transmitter & receiver. Next, RF transmission is more strong and reliable than
IR transmission. RF communication uses a specific frequency unlike IR
signals which are affected by other IR emitting sources.
This RF module comprises of an RF Transmitter and an RF

Receiver. The transmitter/receiver (Tx/Rx) pair operates at a frequency of 434
MHz. An RF transmitter receives serial data and transmits it wirelessly
through RF through its antenna connected at pin4. The transmission occurs at
the rate of 1Kbps - 10Kbps.The transmitted data is received by an RF receiver
operating at the same frequency as that of the transmitter.
The RF module is often used along with a pair of encoder/decoder.

The encoder is used for encoding parallel data for transmission feed while
reception is decoded by a decoder. HT12E-HT12D, HT640-HT648, etc. are
some commonly used encoder/decoder pair ICs.
Pin Diagram:
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Fig 3.6.1
Pin Description:
RF Transmitter
Pin
Function Name
No
2 Serial data input pin Data
3 Supply voltage; 5V Vcc
4 Antenna output pin ANT
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RF Receiver
Pin
Function Name
No
2 Serial data output pin Data
3 Linear output pin; not connected NC
8 Antenna input pin ANT
3.7 BUZZER:
Fig 3.7.1 Buzzer
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An IR LED, also known as IR transmitter, is a special

purpose LED that transmits infrared rays in the range of 760 nm wavelength.
Such LEDs are usually made of gallium arsenide or aluminium gallium
arsenide. They, along with IR receivers, are commonly used as sensors.
The appearance is same as a common LED. Since the human eye

cannot see the infrared radiations, it is not possible for a person to identify
whether the IR LED is working or not, unlike a common LED. To overcome
this problem, the camera on a cell phone can be used. The camera can show us
the IR rays being emanated from the IR LED in a circuit.
Fig 3.7.2
The
piezo
buzzer
produces
sound
based on
reverse of
the
piezoelectric effect. The generation of pressure variation or strain by the
application of electric potential across a piezoelectric material is the
underlying principle. These buzzers can be used alert a user of an event
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corresponding to a switching action, counter signal or sensor input. They are
also used in alarm circuits.
Fig 3.7.3
The buzzer
produces a same
noisy sound
irrespective of the
voltage variation applied to it. It consists of piezo crystals between two
conductors. When a potential is applied across these crystals, they
push on one conductor and pull on the other. This, push and pull action,
results in a sound wave. Most buzzers produce sound in the range of 2
to 4 kHz.
The Red lead is connected to the Input and the Black lead
is connected to Ground.
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Pin diagram:
Fig 3.7.4 Pin diagram of Buzzer
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CHAPTER 4
FIRMWARE IMPLEMENTATION
The firmware part deals in programming the microcontroller so that it

can control the operation of the ICs used in the implementation. In the present
work, we have used the KiCad design software for PCB circuit design, the
AVR STUDIO software development tool to write and compile the source
code, which has been written in the C language. The PROGISP programmer
has been used to write this compile code into the microcontroller. The
firmware implementation is explained in the next chapter.
The project design and principle are explained in this chapter using the block
diagram and circuit diagram. The block diagram discusses about the required
components of the design and working condition is explained using circuit
diagram and system wiring diagram.
4.1 AVR STUDIO OVERVIEW:

AVR Studio, the popular Software, combines Project Management,
Source Code
Editing, Program Debugging, and Flash Programming in a single, powerful

environment.
Project Management, Device Setup, and Tool Configuration.
Editor facilities for Creating, Modifying, and Correcting Programs
Target Debugging or CPU & Peripheral Simulation.
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Open the AVR Studio from the start menu.
Creating a new Project
Click on the New Project button.
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Selecting the compiler and creating the project name and click on the next
button
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Choose AVR simulator from the left list and controller from the right list and
press finish.
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Fig 4.1.1
Writing the source code
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Fig 4.1.2
Save the program by pressing ctrl + S or choosing save from the file menu
Fig 4.1.3
ASSEMBLING:
To convert your program to machine language press F7 or select Build from

the Build menu or click the build icon in the toolbar.
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Fig 4.1.4
See the Build window. The window shows if your program has syntax
error or not. By looking at the window, you can see the amount of memory
which is used by your program.
4.2 PROGISP:
4.2.1 Flash Programming
PROGISP is a way for, in system programming of micro controllers in

controlled way.
Its development credit goes to Chi Feng Technology Co., Ltd, which
engages in the design of embedded systems products, sharing and free
software developing.
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PROGISP ver1.68 supports for nearly 110 CPUs with on board by default fuse
bits selection for every controller. Friendly user interface with required
graphics.
Step 1:
Open the tool
Step 2:
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Selecting the fuse bits and click on write button.
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Step 3:
Click on Erase
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Step 4:
Click on load flash
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Step 5:
Clink on write flash and verify flash in command mode
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CHAPTER 5
SOURCE CODE
FOR TRANSMITTER SECTION:
#include <avr/io.h>
#define F_CPU 8000000ul
#include "lcd.h"
#include <avr/interrupt.h>
#include <util/delay.h>
//char s1[20],card1[]="3E006855F0F3",s2[50];
//int i=0,m1=0,fuel=100,f1=0;
void Init_USART()
{
UBRRL= 0x33; // Initializing the Baud Rate
UCSRB = (1<<RXEN)|(1<<TXEN); // Enabling transmitting and
Receiving bits
UCSRC = (3<<UCSZ0)|(1<<URSEL); // 8-bit data, unlocking UCSRC
register using URSEL
}
unsigned char UART_receive(void )
{
while ( !(UCSRA & (1<<RXC)) ); // set the rx flag
UCSRA=(0<<RXC); // CLEAR THE rx flag
return UDR; // Get and return received data from buffer
}
int keypad()
{
while(1)
{
LCDWriteStringXY(0,0,"1.c.drink 2.samosa ");
_delay_ms(100);
LCDWriteStringXY(0,1,"3.pop carn 4.cake ");
_delay_ms(100);
PORTB=0x7f; //selecting first column and first row
_delay_ms(100);
if((PINB & (0x01))==0x00)
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{
LCDWriteStringXY(0,0," 2.samosa ");
_delay_ms(100);
PORTD|=(1<<PD0);
while((PINB & (0x01))==0x00);
PORTD&=~(1<<PD0);
}
if((PINB & (0x02))==0x00)
{
LCDWriteStringXY(0,0,"1.c.drink ");
_delay_ms(100);
PORTD|=(1<<PD1);
while((PINB & (0x02))==0x00);
PORTD&=~(1<<PD1);
}
PORTB=0xbf; //selecting second column and second row
_delay_ms(100); //delay in milliseconds
if((PINB & (0x01))==0x00)

{
LCDWriteStringXY(0,1," 4.cake ");
_delay_ms(100);
PORTD|=(1<<PD2);
while((PINB & (0x01))==0x00);
PORTD&=~(1<<PD2);
}
if((PINB & (0x02))==0x00)
{
LCDWriteStringXY(0,1,"3.pop carn ");
_delay_ms(100);
PORTD|=(1<<PD3);
while((PINB & (0x02))==0x00);
PORTD&=~(1<<PD3);
}
}
}
int main(void)
{
DDRB=0xf0;
DDRC=0xff;
DDRD=0xff;
InitLCD(0);
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_delay_ms(100);
LCDWriteStringXY(0,0,"Initiliazing........ ");
_delay_ms(5000);
_delay_ms(100);
LCDClear();
LCDWriteStringXY(0,0,"Welcome to ");
_delay_ms(100);
LCDWriteStringXY(0,1,"PANTRY SYSTEM ");
_delay_ms(100);
LCDClear();
PORTD&=~(1<<PD0);
PORTD&=~(1<<PD1);
PORTD&=~(1<<PD2);
PORTD&=~(1<<PD3);
LCDClear();
while(1)
{
keypad();
}
}
FOR RECEIVER SECTION:
#include <avr/io.h>
#define F_CPU 8000000ul
#include <avr/interrupt.h>
#include <util/delay.h>
void Init_USART()
{
UBRRL=0x33;
UCSRB=(1<<TXEN)|(1<<RXEN)|(1<<RXCIE);
UCSRC=(1<<URSEL)|(0<<UMSEL)|(0<<UPM1)|(0<<UPM0)|
(0<<USBS)|(3<<UCSZ0);
}
unsigned char tx(unsigned char ch)

{
UDR=ch;
while(!(UCSRA&(1<<TXC)));
UCSRA=(1<<TXC);
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_delay_ms(50);
return(0);
}
void tx_string(unsigned char *str)

{
while ((*str)!='\0')
{
tx(*str);
str++;
}
}
#define buzzer_on PORTC=0xff;
#define buzzer_of PORTC=0x00;
int main(void)
{
DDRC=0xff;
DDRB=0x00;
Init_USART();
_delay_ms(100);
tx_string("Please Find the ordered list: \r");
while(1)
{
if((PINB&0x01)==0x01)
{
tx_string("seat no 1: c.drink\r");
buzzer_on;
_delay_ms(5000);
buzzer_of;
}
if((PINB&0x02)==0x02)
{
tx_string("seat no 1: samosa\r");
buzzer_on;
_delay_ms(5000);
buzzer_of;
}
if((PINB&0x04)==0x04)
{
tx_string("seat no 1: pop carn\r");
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buzzer_on;
_delay_ms(5000);
buzzer_of;
}
if((PINB&0x08)==0x08)
{
tx_string("seat no 1: cake\r");
buzzer_on;
_delay_ms(5000);
buzzer_of;
}
}}
CONCLUSION AND FUTURE SCOPE
CONCLUSION:
By implementing this project we can overcome the problem of heavy

crowdedness in theaters and also we can easily serve what he ordered. The
current scenario of conventional food ordering system is done. Modified model
of Pantry Order
System is discussed to make it more convenient and efficient. Hardware
description and software description is also given with the focus on RF
communication protocol.
FUTURE SCOPE:
We can implement this project using Android App
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Instead of using keypad we can use touch screen display.
For illiteracy people we can use graphical LCD to insert images.
We can insert order cancel option on the screen to cancel the order.
ADVANTAGES AND APPLICATIONS
ADVANTAGES:
By implementing this project we can overcome the problem of heavy

crowdedness in theaters and also we can easily serve what he ordered.
Reduce man power.
Increase in income
Less expenditure
Low labour cost
More customer oriented service
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Easy to handle
Easy to manage
Secure transactions all the way
Customer Satisfaction-key factor
APPLICATIONS:
In cinema theatres
In restaurants
In college canteens
In company canteens
In aeroplanes
In seaways like boats
REFERENCES
1. The 8051Microcontroller by Kenneth J. Ayala
2. The 8051 Microcontroller and Embedded Systems by Muhammad Ali Mazidi
.3.Principles and Applications of PANTRY SYSTEM IN THEATERS
4. www.ijert.org
5. www.edaboard.com
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6. www.electrotech.com
7. www.developershome.com
8. www.scribd.com
9. www.wikipedia.com
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PANTRY SYSTEM IN THEATERS

1.1 Introduction to project:

1.2 Basic concepts:

1.2.1 Embedded systems:

An embedded system can be defined as a computing device that

embedded systems operate through a battery, the power consumption has to be

They are usually in the form of small computerized parts in larger

1.2.2 MICRO CONTROLLER:

1.2.2.1 DEFINITION OF MICROCONTROLLER:

The key features of microcontrollers include:

High Integration of Functionality

Microcontrollers often use EEPROM or EPROM as their storage

Most microcontrollers will also combine other devices such as:

A Timer module to allow the microcontroller to perform tasks for

FIG 1.2.1: A TYPICAL MICROCONTROLLER DEVICE AND ITS

Discussing about the Indian railways pantry order systems, which

2.1 Approximate use of travelling sources in India

2.2 Proposed Design:

2.2.1 Transmitter Section:

Please enter your seat number

Select the menu with quantity

Total price will be displayed

Finalize the order

Data received from transmitter

Decoding of data and printing

Order will get served to the

DESIGN AND IMPLEMENTATION

Hardware implementation deals in drawing the schematic on

Fig 3.0.1: ORDER

First we apply power supply to kit and then the

Fig 3.0.2: RECEIVING

In this the data is received is using RF receiver

ring.power supply must be given to this section during working hours of

necessary.this section is implemented in a room.

The Atmel AVR core combines a rich instruction

any interface to download the application program in the Application Flash

evaluation kits. The high-performance Atmel AVR ALU operates in direct

3.2.1 Key features:

High-performance, Low-power Atmel AVR 8-bit Microcontroller.

Power Consumption at 4Mhz, 3V, 25C

Advanced RISC Architecture

High Endurance Non-volatile Memory segments.

In-System Programming by On-chip Boot Program True Read-While-

Programming Lock for Software Security

Peripheral Features, Two 8-bit Timer/Counters with Separate Presale,

Real Time Counter with Separate Oscillator

6-channel ADC in PDIP package Six Channels 10-bit Accuracy

Byte-oriented Two-wire Serial Interface.

down, and Standby

23 Programmable I/O Lines, 28-lead PDIP, 32-lead TQFP, and 32-pad

2.7V - 5.5V (ATmega8L),4.5V - 5.5V (ATmega8)

Fig: 3.2.2 Block diagram

The high-performance Atmel AVR ALU operates in direct

clock cycle, arithmetic operations between general purpose registers or

Bit Copy Storage:

Half Carry Flag:

Twos Complement Overflow Flag:

General Purpose Register File:

The Register File is optimized for the AVR Enhanced RISC

Two 8-bit output operands and one

Two 8-bit output operands and one

One 16-bit output operand and one

Most of the instructions operating on the Register File have direct