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Pankaj Gramopadhye, 2Krishnakant Mandloi
Department of Electronics and Communication Engineering
Manipal Institute of Technology, Manipal-Karnataka

In this paper, HDL implementation of generating a parity bit at the receiving
orthogonal code convolution is presented end.
by employing Xilinx and Modelism
softwares. In digital communication 1. INTRODUCTION
system, convolution coding is preferred Information and communication technology
for the channel coding as it facilitates a has brought enormous changes to our life
better error correction as comparison to and turned out to be one of the basic
block coding which does not require building blocks of modern society. Day by
memory. Among other techniques such as day, there is an increasing demand of
Cyclic Redundancy and Solomon Codes; network capacity due to the use of internet
orthogonal coding is one of the codes and real time transmission of voice and
which can detect errors and correct picture. To fulfill these requirements data
corrupted data in an efficient way. When transmission at high bit rates is essential for
data is stored, compressed, or various aspects such as video, highquality
communicated through a media such as audio and mobile integrated service digital
cable or air, sources of noise and other network (ISDN).However, the data
parameters such as EMI, crosstalk, and transmitted at high bit rates over mobile
distance can considerably affect the radio channels, leads to inter symbol
reliability of these data. Error detection interference (ISI). The significant factors
and correction techniques are therefore which cause there liability of digital data
required. Orthogonal Code is one of the communication are the transmission medium
codes that can detect errors and correct i.e. cable or air, sources of noise and some
corrupted data. An nbit orthogonal code others like electromagnetic interface,
has n/2 1s and n/2 0s. In a previous work crosstalk and distance. To overcome this
these properties have been exploited to problem, error correction coding is a
detect and correct errors. The results solution for the best possible
show that the proposed technique communication. The main advantage of
improves the detection capabilities of the using coding is the efficiency of the
orthogonal code by approximately 50%, channels use becomes higher as comparison
resulting in 99.9% error detection, and to the case when code is not used. Therefore,
corrects as predicted up to (n/41) bits of error detection and correction techniques are
error in the received impaired code with needed which can detect errors such as the
bandwidth efficiency. The transmitter Cyclic Redundancy Check and others which
does not have to send the parity bit since can detect as well as correct errors such as
the parity bit is known to be always zero. Solomon Codes [13]. Our objective in this
Therefore, if there is a transmission error, paper is to enhance the error control
the receiver will be able to detect it by
capabilities of orthogonal codes by means of send the parity bit since the parity bit is
Field Programmable Gate Array (FPGA) known to be always zero.
implementation. The CRC generation has
many advantages over simple sum 2. ORTHOGONAL CODES
techniques or parity check. This coding is Orthogonal codes are consists of equal
binary valued and with equal number of 1s number of 1s and 0s e.g. nbit orthogonal
and 0s. All orthogonal codes can generate code consist n/2 1s and n/2 0. Meaning,
zero parity bits as nbit orthogonal code has there are n/2 positions where 1s and 0s
n/2 1s and n/2 0s. In simple there are n/2 differ. In this way, all orthogonal codes
positions where 1s and 0s differ and generate zero parity bits. An illustration of
hence, each antipodal code can also generate 16bit orthogonal code is shown in figure 1.
a zero parity bit [5]. It is noted that with this Zero parity bits. The concept is illustrated by
method, the transmitter does not have to means of an 8 bit orthogonal code as shown
in Fig.1.

Figure 1: A 16bit orthogonal code has 16 orthogonal codes and 16antipodal codes for a total of 32 biorthogonal

It has 8orthogonal codes and 8antipodal receiver can detect by generating a parity bit
codes for a total of 16 bit orthogonal codes. at the receiving end. In orthogonal coding, a
Antipodal codes are just the inverse of k bit data set is mapped into a unique n bit
orthogonal codes; they are also orthogonal before transmission. Here, we have
among themselves. It is comprised of 16 considered a 5bit data set which is can be
orthogonal codes and 16 antipodal codes represented by a unique 16bit orthogonal
(just the inverse of orthogonal codes) for a code and transmitted without the parity bit.
total of 32 biorthogonal codes.The After receiving the data, it is decoded based
advantage with this approach is that on code correlation by setting a threshold
transmitter does not need to send the parity midway between two orthogonal codes. The
bit as parity bit is known to be always zero. threshold midway is represented as dth= n/4
In this way, if error exists during, the Where n is the code length and dth is the
threshold midway between two orthogonal components such as a transmitter and a
codes. According to above equation, for 16 receiver. The first component (transmitter)
bit orthogonal coding, threshold midway is 4 consists of two blocks such as encoder and
between two orthogonal codes. This shift register which is shown in figure.
approach offers a decision process, where
the incoming impaired orthogonal code is 3.1 DESIGN METHODOLOGY
examined for correlation with the Since there is an equal number of 1sand 0s,
neighboring codes for a possible match. It is each orthogonal code will generate a zero
noted that the acceptance criterion for a parity bit. If the data has been corrupted
valid code is that an nbit comparison must during the transmission the receiver can
yield a good autocorrelation value; detect errors by generating the parity bit for
otherwise, a false detection will occur. the received code and if it is not zero then
Where R(x, y) is the auto correlation the data is corrupted. However the parity bit
function, n is the code length, dth is the doesnt change for an even number of errors,
threshold defined in (1). Since the threshold hence the receiver can only detect errors 2 /
(dth) is in between two valid codes, an 2 combinations of the received code.
additional 1bit offset is added to (2) for Therefore detection percentage is 50%. Our
reliable detection. The average number of approach is not to use the parity generation
reliable detection. The average number of method to detect the errors, but a simple
errors that can be corrected by means of this technique based on the comparison between
process can be estimated by combining (1) the received code and all the orthogonal
and (2), yielding,(3). In (3), t is the number code combinations stored in a look up table.
of errors that can be corrected by means of The technique which involves a transmitter
an nbit orthogonal code. For example, a and receiver is described below.
single errorcorrecting orthogonal code can
be constructed by means of an 8bit 3.2 TRANSMITTER
orthogonal code (n = 8). Similarly, a three The transmitter includes two blocks: an
error correcting orthogonal code can be encoder and a shift register. The encoder
constructed by means of a 16bit orthogonal encodes a kbit data set to n=2^k1 bits of
code (n = 16), and so on. the orthogonal code and the shift register
transforms this code to a serial data in order
Table1 below shows a few orthogonal to be transmitted as shown in Fig.2. For
codes and the corresponding error correcting example, 5bit data is encoded to 16bit
capabilities: orthogonal code according to the lookup
table shown in Fig.2. The generated
orthogonal code is then transmitted serially
using a shift register with the rising edge of


Our design approach is based on the

comparison between the received code and
all the orthogonal code combinations stored
in a look up table; which has two major Figure 2 : Block diagram of Transmitter