Machin T-

Instructio Op- Byte e- state

n code Operand s cycles s Detail

ACI Add immediat

Instructio Accumulator
n ACI 8 bit data 2 2 7 Carry

Add register t
Reg., accumulator w
ADC ADC Mem. 1,1 1,2 4,7 carry

Reg., Add register t

ADD ADD Mem. 1,1 1,2 4,7 Accumulator

8-bit, Add immediat

ADI ADI data 2 2 7 accumulator

Reg., Logical AND w

ANA ANA mem. 1,1 1,2 4,7 Accumulator

8-bit, AND immedia

ANI ANI data 2 2 7 accumulator

16-bit Unconditiona
CALL CALL address 3 5 18 Subroutine ca

Complement
CMA CMA None 1 1 4 Accumulator

CMC CMC None 1 1 4 Complement

Reg., Compare with

CMP CMP Mem. 1,1 1,2 4,7 accumulator
 Compare Imm
CPI CPI 8-bit 2 2 7 with accumula

Decimal Adjus
DAA DAA None 1 1 4 Accumulator

Add register p
DAD DAD Reg.Pair 1 3 10 and L register

Reg., Decrement so
DCR DCR Mem. 1,1 1,3 4,10 1

Decrement re
DCX DCX Reg. Pair 1 1 6 pair by 1

DI DI None 1 1 4 Disable Interr

EI EI None 1 1 4 Enable Interru

2 or 5 or Halt and enter

HLT HLT None 1 more more state

Input data to
accumulator f
8-bit port port with 8-bit
IN IN address 2 3 10 address

Increment con
Reg.,Me of register/Me
INR INR m. 1,1 1,3 4,10 by 1

Increment reg
INX INX Reg. Pair 1 1 6 pair by 1

JMP JMP 16 bit 3 3 10 Jump

 unconditional

16 bit Load accumu

LDA LDA address 3 4 13 direct

B/D reg. Load accumu

LDAX LDAX Pair 1 2 7 indirect

16 bit Load H and L

LHLD LHLD address 3 5 16 registers dire

Reg. Pair,
16 bit Load Register
LXI LXI data 3 3 10 Immediate

MOV Rd,Rs
MOV M,Rs 1 4 Move-copy fro
MOV MOV Rd,M 1 2 7 source to des

Reg.,
Data
Mem., 2 2 7
MVI MVI Data 2 3 10 Move immedi

NOP NOP None 1 1 4 No Operation

Reg., Logically OR
ORA ORA Mem. 1,1 1,2 4,7 Accumulator

Logically OR
ORI ORI 8 bit data 2 2 7 Immediate

OUT OUT 8-bit port 2 3 10 Output Data fr

address Accumulator
port with 8 bit
 address

Load program
counter with H
PCHL PCHL None 1 1 6 contents

POP OFF Stac

POP POP Reg. pair 1 3 10 register pair

Push register
PUSH PUSH Reg. pair 1 3 12 into stack

Rotate accum
RAL RAL None 1 1 4 left through c

Rotate accum
RAR RAR None 1 1 4 right through

Rotate Accum
RLC RLC None 1 1 4 Left

Rotate Accum
RRC RRC None 1 1 4 Right

Return from
subroutine
RET RET None 1 3 10 unconditional

RIM RIM None 1 1 4 Read Interrup

Substract sou
Reg., borrow from
SBB SBB Mem. 1,1 1,2 4,7 accumulator

SBI SBI 8 bit data 2 2 7 Aubstract imm

 with borrow

16 bit Store H and L

SHLD SHLD address 3 5 16 registers dire

SIM SIM None 1 1 4 Set Interrupt M

6 (in
8085)
, Copy H and L
5(in registers to th
SPHL SPHL None 1 1 8080) pointer(SP)

Store Accumu
STA STA 16 bit 3 4 13 Direct

B/D reg. Store Accumu

STAX STAX pair 1 2 7 Indirect

STC STC None 1 1 4 Set Carry

Substract reg
Reg. , memory from
SUB SUB Mem. 1,1 1,2 4,7 Accumulator

Substract imm
SUI SUI 8 bit data 2 2 7 from accumul

Exchange H a
XCHG XCHG None 1 1 4 with D and E

Reg., Exclusive OR
XRA XRA Mem. 1,1 1,2 4,7 accumulator

XRI XRI 8 bit data 2 2 7 Exclusive OR

 immediate wit
accumulator

Exchange H a
XTHL XTHL None 1 5 16 with top of sta