OPA
627
OPA637
OPA
627
Precision High-Speed
Difet OPERATIONAL AMPLIFIERS
FEATURES APPLICATIONS
VERY LOW NOISE: 4.5nV/Hz at 10kHz PRECISION INSTRUMENTATION
FAST SETTLING TIME: FAST DATA ACQUISITION
OPA627550ns to 0.01% DAC OUTPUT AMPLIFIER
OPA637450ns to 0.01%
OPTOELECTRONICS
LOW VOS: 100V max
SONAR, ULTRASOUND
LOW DRIFT: 0.8V/C max
HIGH-IMPEDANCE SENSOR AMPS
LOW IB: 5pA max
HIGH-PERFORMANCE AUDIO CIRCUITRY
OPA627: Unity-Gain Stable
ACTIVE FILTERS
OPA637: Stable in Gain 5
7
Trim +VS
Trim
1 5
Output
6
+In In
3 2
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111
Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
SBOS165
SPECIFICATIONS
ELECTRICAL
At TA = +25C, and VS = 15V, unless otherwise noted.
OPA627, 637 2
PIN CONFIGURATIONS ABSOLUTE MAXIMUM RATINGS(1)
Top View DIP/SOIC Supply Voltage .................................................................................. 18V
Input Voltage Range .............................................. +VS + 2V to VS 2V
Differential Input Range ....................................................... Total VS + 4V
Offset Trim Power Dissipation ........................................................................ 1000mW
1 8 No Internal Connection
Operating Temperature
In 2 7 +VS M Package .................................................................. 55C to +125C
P, U Package ............................................................. 40C to +125C
+In 3 6 Output Storage Temperature
M Package .................................................................. 65C to +150C
VS 4 5 Offset Trim P, U Package ............................................................. 40C to +125C
Junction Temperature
M Package .................................................................................. +175C
P, U Package ............................................................................. +150C
Lead Temperature (soldering, 10s) ............................................... +300C
SOlC (soldering, 3s) ................................................................... +260C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Top View TO-99
No Internal Connection
PACKAGE/ORDERING INFORMATION
8 +VS
Offset Trim PACKAGE DRAWING TEMPERATURE
1 7
PRODUCT PACKAGE NUMBER(1) RANGE
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
3 OPA627, 637
TYPICAL PERFORMANCE CURVES
At TA = +25C, and VS = 15V, unless otherwise noted.
INPUT VOLTAGE NOISE SPECTRAL DENSITY TOTAL INPUT VOLTAGE NOISE vs BANDWIDTH
1k 100
p-p
Noise Bandwidth:
Voltage Noise (nV/ Hz)
10
0.1
RMS
1 0.01
1 10 100 1k 10k 100k 1M 10M 1 10 100 1k 10k 100k 1M 10M
Frequency (Hz) Bandwidth (Hz)
100 OPA637
Voltage Gain (dB)
RS
100
80
60
Comparison with
OPA627 + Resistor
OPA27 Bipolar Op 40
10 OPA627
Amp + Resistor
20
Spot Noise
Resistor Noise Only at 10kHz 0
1 20
100 1k 10k 100k 1M 10M 100M 1 10 100 1k 10k 100k 1M 10M 100M
Source Resistance ( ) Frequency (Hz)
20 120 20 120
Phase (Degrees)
Phase (Degrees)
Gain (dB)
Gain (dB)
Phase Phase
75 Phase
Margin Gain
10 150 10 150
Gain
0 180 0 180
10 210 10 210
1 10 100 1 10 100
Frequency (MHz) Frequency (MHz)
OPA627, 637 4
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25C, and VS = 15V, unless otherwise noted.
80
Output Resistance ()
120
Voltage Gain (dB)
60
115
40
110
20
105 0
75 50 25 0 25 50 75 100 125 2 20 200 2k 20k 200k 2M 20M
Temperature (C) Frequency (Hz)
COMMON-MODE REJECTION vs
COMMON-MODE REJECTION vs FREQUENCY INPUT COMMON MODE VOLTAGE
140 130
Common-Mode Rejection Ratio (dB)
60 100
40
90
20
0 80
1 10 100 1k 10k 100k 1M 10M 15 10 5 0 5 10 15
Frequency (Hz) Common-Mode Voltage (V)
120
Power-Supply Rejection (dB)
PSR
120
CMR and PSR (dB)
100
VS PSRR 627
80 and 637 CMR
115
60
+VS PSRR 627
40 637 110
20
0 105
1 10 100 1k 10k 100k 1M 10M 75 50 25 0 25 50 75 100 125
Frequency (Hz) Temperature (C)
5 OPA627, 637
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25C, and VS = 15V, unless otherwise noted.
+IL at VO = 0V
80
7.5
Supply Current (mA)
6 0
75 50 25 0 25 50 75 100 125 75 50 25 0 25 50 75 100 125
Temperature (C) Temperature (C)
OPA627 GAIN-BANDWIDTH AND SLEW RATE OPA637 GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE vs TEMPERATURE
24 60 120 160
Slew Rate
Gain-Bandwidth (MHz)
Gain-Bandwidth (MHz)
20 100 140
Slew Rate
16 55 80 120
GBW
GBW
12 60 100
8 50 40 80
75 50 25 0 25 50 75 100 125 75 50 25 0 25 50 75 100 125
Temperature (C) Temperature (C)
OPA627 TOTAL HARMONIC DISTORTION + NOISE OPA637 TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY vs FREQUENCY
0.1 G = +1 G = +10 1
G = +10 G = +50
VI + VO = 10V VI + VO = 10V
VI + VO = 10V VI + VO = 10V
600 600
100pF 5k 100pF 600 600
0.01 0.1 5k 100pF 5k 100pF
549
549 102
THD+N (%)
THD+N (%)
0.0001 0.001
G = +1
G = +10
0.00001 0.0001
20 100 1k 10k 20k 20 100 1k 10k 20k
Frequency (Hz) Frequency (Hz)
OPA627, 637 6
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25C, and VS = 15V, unless otherwise noted.
TO-99
100
IB
10 Plastic
10 IOS DIP, SOIC
5
1
INPUT BIAS CURRENT vs COMMON-MODE VOLTAGE INPUT OFFSET VOLTAGE WARM-UP vs TIME
1.2 50
Common-Mode Range
1.1 25
1 0
0.9 25
Beyond Linear
Common-Mode Range
0.8 50
15 10 5 0 5 10 15 0 1 2 3 4 5 6
Common-Mode Voltage (V) Time From Power Turn-On (Min)
20 10
OPA627
OPA637
10 1 OPA637
OPA627
0 0.1
100k 1M 10M 100M 1 10 100 1000
Frequency (Hz) Closed-Loop Gain (V/V)
7 OPA627, 637
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25C, and VS = 15V, unless otherwise noted.
OPA627 OPA627
500 1 G = 1
G = 1
OPA637
G = 4
0 0
0.001 0.01 0.1 1 10 0 150 200 300 400 500
Error Band (%) Load Capacitance (pF)
OPA627, 637 8
OFFSET VOLTAGE ADJUSTMENT amp contributes little additional noise. Below 1k, op amp
The OPA627/637 is laser-trimmed for low offset voltage noise dominates over the resistor noise, but compares
and drift, so many circuits will not require external adjust- favorably with precision bipolar op amps.
ment. Figure 3 shows the optional connection of an external
potentiometer to adjust offset voltage. This adjustment should
CIRCUIT LAYOUT
not be used to compensate for offsets created elsewhere in a
As with any high speed, wide bandwidth circuit, careful
system (such as in later amplification stages or in an A/D
layout will ensure best performance. Make short, direct
converter) because this could introduce excessive tempera-
interconnections and avoid stray wiring capacitanceespe-
ture drift. Generally, the offset drift will change by approxi-
cially at the input pins and feedback circuitry.
mately 4V/C for 1mV of change in the offset voltage due
to an offset adjustment (as shown on Figure 3). The case (TO-99 metal package only) is internally connected
to the negative power supply as it is with most common op
amps. Pin 8 of the plastic DIP, SOIC, and TO-99 packages
C2 has no internal connection.
Power supply connections should be bypassed with good
high frequency capacitors positioned close to the op amp
C1 R2 pins. In most cases 0.1F ceramic capacitors are adequate.
The OPA627/637 is capable of high output current (in
+
OPA637
excess of 45mA). Applications with low impedance loads or
capacitive loads with fast transient signals demand large
R1 C1 = CIN + CSTRAY currents from the power supplies. Larger bypass capacitors
R1 C1 such as 1F solid tantalum capacitors may improve dynamic
C2 = performance in these applications.
R2
100k
NOISE PERFORMANCE 7 10k to 1M
Some bipolar op amps may provide lower voltage noise 1 Potentiometer
2
performance, but both voltage noise and bias current noise 5 (100k preferred)
contribute to the total noise of a system. The OPA627/637 3 6
is unique in providing very low voltage noise and very low +
OPA627/637
current noise. This provides optimum noise performance 4
over a wide range of sources, including reactive source 10mV Typical
Trim Range
impedances. This can be seen in the performance curve VS
showing the noise of a source resistor combined with the
noise of an OPA627. Above a 2k source resistance, the op FIGURE 3. Optional Offset Voltage Trim Circuit.
Non-inverting Buffer
2 2
6 6
Out Out
3 In 3
In + +
OPA627 OPA627
OPA627 3 4
2
5
6
Out
3
+ 2 6
Board Layout for Input Guarding:
Guard top and bottom of board. 7
Alternateuse Teflon standoff for sen- 1
sitive input pins. 8 No Internal Connection
9 OPA627, 637
INPUT BIAS CURRENT takes approximately 500ns. When the output is driven into
Difet fabrication of the OPA627/637 provides very low the positive limit, recovery takes approximately 6s. Output
input bias current. Since the gate current of a FET doubles recovery of the OPA627 can be improved using the output
approximately every 10C, to achieve lowest input bias clamp circuit shown in Figure 5. Diodes at the inverting
current, the die temperature should be kept as low as pos- input prevent degradation of input bias current.
sible. The high speed and therefore higher quiescent current
of the OPA627/637 can lead to higher chip temperature. A
simple press-on heat sink such as the Burr-Brown model +VS
807HS (TO-99 metal package) can reduce chip temperature
by approximately 15C, lowering the IB to one-third its
5k
warmed-up value. The 807HS heat sink can also reduce low- (2)
frequency voltage noise caused by air currents and thermo- HP 5082-2811
electric effects. See the data sheet on the 807HS for details.
ZD1 Diode Bridge
Temperature rise in the plastic DIP and SOIC packages can BB: PWS740-3
be minimized by soldering the device to the circuit board. 1k
Wide copper traces will also help dissipate heat.
5k ZD1 : 10V IN961
The OPA627/637 may also be operated at reduced power
supply voltage to minimize power dissipation and tempera- RF
ture rise. Using 5V power supplies reduces power dissipa- VI VS
tion to one-third of that at 15V. This reduces the IB of TO- RI
+
VO
OPA627, 637 10
INPUT PROTECTION Sometimes input protection is required on I/V converters of
The inputs of the OPA627/637 are protected for voltages inverting amplifiers (Figure 7b). Although in normal opera-
between +VS + 2V and VS 2V. If the input voltage can tion, the voltage at the summing junction will be near zero
exceed these limits, the amplifier should be protected. The (equal to the offset voltage of the amplifier), large input
diode clamps shown in Figure 7a will prevent the input transients may cause this node to exceed 2V beyond the
voltage from exceeding one forward diode voltage drop power supplies. In this case, the summing junction should
beyond the power supplieswell within the safe limits. If be protected with diode clamps connected to ground. Even
the input source can deliver current in excess of the maxi- with the low voltage present at the summing junction,
mum forward current of the protection diodes, use a series common signal diodes may have excessive leakage current.
resistor, RS, to limit the current. Be aware that adding Since the reverse voltage on these diodes is clamped, a
resistance to the input will increase noise. The 4nV/Hz diode-connected signal transistor can be used as an inexpen-
theoretical thermal noise of a 1k resistor will add to the sive low leakage diode (Figure 7b).
4.5nV/Hz noise of the OPA627/637 (by the square-root of
the sum of the squares), producing a total noise of 6nV/Hz.
Resistors below 100 add negligible noise. +VS
NC
(A) (B)
FPO
When used as a unity-gain buffer, large common-mode input voltage steps G=1
produce transient variations in input-stage currents. This causes the rising
edge to be slower and falling edges to be faster than nominal slew rates +
observed in higher-gain circuits. OPA627
11 OPA627, 637
LARGE SIGNAL RESPONSE
+10 +10
VOUT (V)
VOUT (V)
0 (C) 0 (D)
10 10
6pF(1)
NOTE: (1) Optimum value will
When driven with a very fast input step (left), common-mode
depend on circuit board lay-
transients cause a slight variation in input stage currents which
out and stray capacitance at
will reduce output slew rate. If the input step slew rate is reduced
the inverting input. 2k
(right), output slew rate will increase slightly.
G = 1
2k
+ VOUT
OPA627
OPA637 OPA637
LARGE SIGNAL RESPONSE SMALL SIGNAL RESPONSE
+10 +100
VOUT (mV)
VOUT (V)
0 (E) 0 (F)
FPO
10 100
4pF(1)
2k
G=5
+ VOUT
OPA637
500
NOTE: (1) Optimum value will depend on circuit
board layout and capacitance at inverting input.
OPA627, 637 12
Error Out
/
RI 2k
OPA627 OPA637
CF
RI , R 1 2k 500
HP- CF 6pF 4pF
5082- 2k Error Band 0.5mV 0.2mV
2835 (0.01%)
+15V
RI
High Quality
5V NOTE: CF is selected for best settling time performance
Pulse Generator
depending on test fixture layout. Once optimum value is
51 Out
+ determined, a fixed capacitor may be used.
15V
Gain = 100
OPA637 CMRR 116dB
In +
Bandwidth 1MHz
RF
5k 2 25k 25k 5
Input Common-Mode
Range = 5V INA105
RG
3pF Differential
101 Output
Amplifier 6
3
+
RF 25k
5k 25k
+In + 1
OPA637
Differential Voltage Gain = 1 + 2RF /RG
Gain = 1000
OPA637 CMRR 116dB
In +
Bandwidth 400kHz
RF
5k 10k 100k 5
2
Input Common-Mode
Range = 10V INA106
RG
3pF Differential
101 Output
Amplifier 6
3
+
RF 10k
5k 100k
+In + 1
OPA637
13 OPA627, 637
PACKAGE OPTION ADDENDUM
www.ti.com 19-Dec-2007
PACKAGING INFORMATION
Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
OPA627AM NRND TO-99 LMC 8 20 Green (RoHS & AU N / A for Pkg Type
no Sb/Br)
OPA627AP ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA627APG4 ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA627AU ACTIVE SOIC D 8 100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA627AU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA627AU/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA627AUE4 ACTIVE SOIC D 8 100 Pb-Free CU NIPDAU Level-3-260C-168 HR
(RoHS)
OPA627AUG4 ACTIVE SOIC D 8 100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA627BM NRND TO-99 LMC 8 20 Green (RoHS & AU N / A for Pkg Type
no Sb/Br)
OPA627BP ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA627BPG4 ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA627SM NRND TO-99 LMC 8 20 Green (RoHS & AU N / A for Pkg Type
no Sb/Br)
OPA637AM NRND TO-99 LMC 8 20 Green (RoHS & AU N / A for Pkg Type
no Sb/Br)
OPA637AM2 OBSOLETE TO-99 LMC 8 TBD Call TI Call TI
OPA637AP ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA637APG4 ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA637AU ACTIVE SOIC D 8 100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA637AU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA637AU/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA637AUE4 ACTIVE SOIC D 8 100 TBD Call TI Call TI
OPA637AUG4 ACTIVE SOIC D 8 100 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
OPA637BM NRND TO-99 LMC 8 20 Green (RoHS & AU N / A for Pkg Type
no Sb/Br)
OPA637BM1 OBSOLETE TO-99 LMC 8 TBD Call TI Call TI
OPA637BP ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA637BPG4 ACTIVE PDIP P 8 50 Green (RoHS & CU NIPDAU N / A for Pkg Type
no Sb/Br)
OPA637SM NRND TO-99 LMC 8 20 Green (RoHS & AU N / A for Pkg Type
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 19-Dec-2007
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
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