CPP1 CPP2
CPP Load2
Load1
DG DG1 Load1 DG2 Load1 ... Loadn ... DGn DG1 Load1 DG2 Load1 ... Loadn ... DGn
Conditioned
Lf Lg electric power
Unconditioned Vdc Vci vc
Vbi
electric power Vai
Cf
from prime source Vag Vbg Vcg
Filter + Switchgear
Prime Vdc
Source Filter Grid
Prime Vdc
Source Filter Grid
Prime Vdc
Source Filter Grid
Prime Vdc
Source Filter Grid
Prime Vdc
Source Filter Grid
N
Load
Load
Grid Grid
Vg3
Vg3
i1 i2 i3
PWM
Pulses PWM Pulses
Grid Grid
Shunt type Series type
Grid
Side
L
i
ig / iload
Feedback
Current
Vdc
i
Modulation m Current Sensed Grid
Reference Current Voltages
Strategy Controller i*
Calculation
Cos
Unit Vector
Sin Generation
Vp
Cdcp Sap
Prime
Source io
Vmp
Vdc Va 240 2
sin(2 50t)
San
Cdcn
Vn
ref
Vn
ref
0
Tsw t
B
S
A
N
d
vs =
dt vs = vaej0 + vbej120 + vcej240
Representation of 3 phase voltage as space vector
3 phase grid voltage as an equivalent machine
Combination of switch positions in 3 phase converter
equivalent to machine voltage space vector
Mar 2009 PEG IISc Bangalore 17
Space Vector PWM
sin(60-
T1 = Vref Tsw
sin(60)
sin(
T2 = Vref Tsw sin(60)
Tz = Tsw - T1 - T2
Vdc
dc
Grid
Side
L
i
ig / iload
Feedback
Current
Vdc
i
Modulation m Current Sensed Grid
Reference Current Voltages
Strategy Controller i*
Calculation
Cos
Unit Vector
Sin Generation
Grid monitoring
1. Information on frequency, phase and voltage magnitude.
2. Synchronization between two sources
-- e.g. A power converter to grid
3. Information on negative sequence and unbalance
Mar 2009 PEG IISc Bangalore 24
Unit Vector Generation Techniques
Zero crossing detection
Look up table
Input signal
Sampling Interval
Ts
Reset by ZCD
Zero crossing detection
Limitation
1. Frequency variation
2. Multiple zero crossing
V = Vm cos(t) Sin
Va 3 phase to Magnitude Vm
Vb 2 phase extraction
Vc Transformation
V = Vm sin(t)
Cos
Limitation
1. Unbalance phase voltage
2. Voltage sag or swell
3. Frequency variation
Sivaprasad J.S., T. Bhavasar, R. Ghosh and G. Narayanan, Vector control of three-phase AC/DC
front-end converter, Indian Academy of Science, Sadhana Vol. 33, Part 5, October 2008, pp.
591613.
Synchronized
Input signal Phase Loop output
VCO
Comparator Filter
Xd = X Cos(e) + X Sin(e)
X = Xa (Xb + Xc)/2
Xq = X Cos(e) X Sin(e)
X = 3 (Xb Xc)/2
X + jX = (Xd + jXq)ej e
Va = Vm Cos(t)
Vb = Vm Cos(t - 2/3)
Vc = Vm Cos(t + 2/3)
= t /2
Requirement :
Phase tracking of positive sequence fundamental voltage under
abnormal grid conditions
No. of samples = 10
Sampling frequency = 1kHz
The first order filter for comparison has corner frequency at 10Hz
A notch filter having a notch frequency at 100Hz can also be used
-- Compared to a notch filter, a MAF provides higher
attenuation at harmonic frequencies
3 ' '
+- - Vm Vd Filter -+ ++
2
3 1 1 s 1
GH Vm Kp
2 1 sTf s s
1
kp =
2 ko
J.W. Umland and M.Safiuddin, Magnitude and symmetric optimum criterion for the design of linear
control systems: What is it and how does it compare with others? in IEEE Transactions on Industry
Applications, Volume 26, Issue 3, Jan.-Feb. 1990 Page(s):489 497.
Mar 2009 PEG IISc Bangalore 37
Controller Parameters Selection
Loop gain of the system is
3 1 1 s 1
GH Vm Kp
2 1 sTf s s
1. V. Kaura and V. Blasko, Operation of a phase locked loop system under distorted utility
conditions, in IEEE Transactions on Industry Applications, Volume 33, Issue 1, Jan.-Feb. 1997
Page(s):58 - 63
2. Se-Kyo Chung, A phase tracking system for three phase utility interface inverters, in IEEE
Transactions on Power Electronics Volume 15, Issue 3, May 2000 Page(s):431 - 438
3. J.W. Umland and M.Safiuddin, Magnitude and symmetric optimum criterion for the design of
linear control systems: What is it and how does it compare with others? in IEEE Transactions
on Industry Applications, Volume 26, Issue 3, Jan.-Feb. 1990 Page(s):489 497.
Load
Grid
Vg3
i1 i2 i3
i1* +
-
i1
i2* +
-
i2
i3* +
-
i3 Cos
Vg1
Sin
PLL Vg2
Vg
Vg3
Disadvantages
1. Variable switching frequency
2. Higher stress on devices
3. Difficulty in input filter design
4. Interaction between phases
5. Difficulty in digital implementation
D. M. Brod and D. W. Novotny, Current control of VSI-PWM inverters, IEEE Trans. Industry
Applications, vol. IA-21, pp. 562570, July/Aug.1985.
Mar 2009 PEG IISc Bangalore 48
Hysteresis Current Control
Improvements
Variable hysteresis band to make switching frequency
constant
Compensation of interaction between phases
Reduction in switching frequency by introducing zero
voltage vector states
Concerns
Possible inter-harmonics
Delay in digital detection of band crossing
Load
Grid
Vg3
i1 i2 i3
i1* +
-
Controller
i1 PWM
Modulator
Pulses
i2* +
- Controller
i2
i3* +
- Controller
i3 Cos
Vg1
Sin
PLL Vg2
Vg
Vg3
Disadvantages
1. Steady state error in phase and amplitude would be present if
PI controller is used
Improvements
1. Steady state error can be made almost zero by
Predictive controller
Proportional-Resonant (PR) controller
Vi Vg
di
Inverter Vi Ri L Vg Grid
Side dt Side
Load
Grid
Vg3
R
i1 i2 i3
R L
i V
- L +
i* + + ++ PWM
Modulator
T
Pulses
L abc
i* + + +
- T + +
i V
R
Vg1 i1 Cos
V i Vg1
Sin
V Vg2 i i2 PLL Vg2
abc abc Vg
Vg3 i3 Vg3
Disadvantages
Steady state error correction is needed
Parameter variation may affect controller performance
Improvements
Improved prediction algorithm
Online estimation of parameters
Including zero sequence current controller for a three phase four
wire systems
Marian P.Kazmierkowski, Current control techniques for Three phase voltage source PWM
converters: A survey, IEEE Trans. Industrial Electronics Vol.45, no.5 PP.691-703, Oct. 1998.
Mar 2009 PEG IISc Bangalore 54
Control in Synchronous Co-ordinate
Vg1
Vg2
Load
Grid
Vg3
i1 i2 i3
id Liq
- -
id* + + PWM
Modulator
Pulses
Vg dq
abc
+
iq* +
-
+
+
Cos
i i1 Vg1
id Sin
dq PLL Vg2
i2
iq abc Vg
i i3 Vg3
Cos Sin
C.D. Schauder and R. Caddy, Current Control of Voltage-Source Inverters for Fast Four-Quadrant
Drive Performance IEEE Trans. Industry Applications, vol. IA-18, No. 2, pp. 163171, Mar./Apr.1982.
Mar 2009 PEG IISc Bangalore 55
Control in Synchronous Co-ordinate
Synchronous reference frame (SRF) control
Advantages
1. Zero steady state fundamental error
(Under balanced condition)
2. Constant switching frequency
Disadvantages
1. Slower response compared to hysteresis
2. Poor harmonic response
3. Not compatible with 4 wire distribution systems
Experimental result with mains voltage (125V/div) and line current (50A/div)
and 25kVA reactive power
Sivaprasad J.S., T. Bhavasar, R. Ghosh and G. Narayanan, Vector control of three-phase AC/DC
front-end converter, Indian Academy of Science, Sadhana Vol. 33, Part 5, October 2008, pp. 591
613.
s
Hr(s) 2 2
s
10
0 |Hpi|
Kp=0.1 -20
Ki =10
-30
=314 rad/sec
-40
-50
1 10 100 1000 10000
Frequency (Hz)
K s
i5
+
s 2 (5) 2 +
K s
i7
s 2 (7) 2
7th harmonic current controller
Zmood, D.N.; Holmes, D.G.; Bode, G.H. Frequency-domain analysis of three-phase linear current
regulators, IEEE Transactions on Industry Applications, Volume 37, Issue 2, March-April 2001
Page(s):601-610
Disadvantages
Less well understood compared to PI controller
Complexity with increasing number of harmonics for
be compensation
Complexity in implementing control limits
2. D. M. Brod and D. W. Novotny, Current control of VSI-PWM inverters, IEEE Trans. Industry
Applications, vol. IA-21, pp. 562570, July/Aug.1985.
3. Zmood, D.N.; Holmes, D.G.; Bode, G.H. Frequency-domain analysis of three-phase linear
current regulators, IndustryApplications, IEEE Transactions on Volume 37, Issue 2, March-
April 2001Page(s):601-610
4. Marian P.Kazmierkowski, Current control techniques for Three phase voltage source PWM
converters: A survey, IEEE Trans. Indust Electrons Vol.45, no.5 PP.691-703, OCTOBER 1998.
Grid
Side
L
i
ig / iload
Feedback
Current
Vdc
i
Modulation m Current Sensed Grid
Reference Current Voltages
Strategy Controller i*
Calculation
Cos
Unit Vector
Sin Generation
Power
Power
Conditioning
Conditioning
Electrical
Loads Electrical
Grid Loads
Load
Grid
Vg3
i1 i2 i3
id Liq
- -
id* + + PWM
Modulator
Pulses
Vg dq
abc
+
iq* +
-
+
+
Cos
i i1 Vg1
id Sin
dq PLL Vg2
i2
iq abc Vg
i i3 Vg3
Cos Sin
Vdc iq
Grid interactive DC bus control
Primary source injects DC bus current proportional to operating
power level
Real current command linked to error in DC bus voltage
Unbalance ac side cause ripple in DC bus voltage
Filtering of 100Hz Vdc can reduce distortion of the iq*
Stand alone control of the converter
Dispatchable prime sources or energy storage element
maintains the DC bus voltage
X
Load2
Load1
A ... ... B
CPPn
Loadn
X
DG
Distribution / Consumption / DG
Load
PCC
SM
Load
PWM
Pulses
Load
PCC
SM
Load
PWM
Pulses
Load
PCC
SM
Load
BKR Opens
PWM
Pulses
V
T1 = Tsw V
3
Determination of sector location
Sign of the line to line voltage T2 = Tsw V
2
Vs voltage vector 3