neg.No.[] 111] www.universityquestions.in Question Paper Code : 63075 M.E. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2015. Second Semester Applied Electronics AP 7202 — ASIC AND FPGA DESIGN (Common to M.E. Communication Systems M.E. Communication and Networking, MLE. Electronics and Communication Engineering, and M.E. VLSI Design) (Regulation 2013) Time : Three hours WWW. UNiversityquestions.inMeximum ; 100 marks Anewor ALL questions. PART A— (10 x 2= 20 marks) 1. State the different types of ASIC. 2. Compare PAL and PLA. 3. State the need for DRC. 4, How is partitioning carried out in ASIC? 5. Mention the need for fault simulation. 6 Compare the logic synthesis done by VHDL and Verilog. 7. State the merits of FPGA. 8 Define routing in FPGA. 9. What is configurable SOC? 10. What is USB? State its merits. PART B— (5 * 16 = 80 marks) 11. (@) Enumerate the various CAD tools employed in ASIC design. ae Or () Explain the following programming technologies. () EPROM @) EEPROM (iii) ROM (jv) PLDs. ae www.univewww.unive! juestions.in 12. (a) With a neat sketch explain any two partitioning mothods in an AISC design. a6) Or (b) List the types of routing and explain any two in detail ae) 13. (a) Deseribe the boundary scan test procedure. ao oF () Explain in detail automating test pattern generation. (16) 14. (a) With a neat diagram, explain the routing architecture of FPGA. (16) Or (&) Explain the features and speed performance of ACTEL’s ACT2 and ACTS logic modules. (16) 15. (a) Discuss the implementation of hardware software co-design in a digital camera. a6) Or (b) Explain the techniques for SOC testing 6) Ger More Anna university Question Papers Visit www.universityquestions.in 2 63075