Current gain
Voltage gain
Signal power gain
Transistor contains three adjoining alternatively doped semiconductor regions:
Emitter (E), Base (B), and Collector (C).
The Bipolar junction transistor is an active device that works as a voltage controlled
current source and whose basic action is control of current at one terminal by controlling
voltage applied at other two terminals.
Both electrons and holes participate in the conduction process for bipolar devices.
It consists of two PN junctions constructed in a special way and connected in series, back
to back.
Base: The charge carriers emitted by the emitter should reach the collector passing
through the base. Hence base should be very thin and to avoid recombination, and
to provide more collector current base is lightly doped.
Collector: collector has to collect the most charge carriers emitted by the emitter. Hence the
area of cross section of collector is more compared to emitter and it is moderately
doped.
The p-n-p transistor with base to emitter junction is forward biased and collector to base
junction reverse biased is as show in figure. The base to emitter junction is forward biased the
majority carriers emitted by the p-type emitter i.e., holes have a tendency to flow towards the
base which constitutes the emitter current IE.
As the base is n-type there is a chance of recombination of holes emitted by the emitter
with the electrons in the n-type base. But as the base us very thin and lightly doped only few
electrons less than 5% combine with the holes emitted by the p-type emitter, the remaining 95%
charge carriers cross over into the collector region to constitute the collector current.
IE = IB + IC
The figure below shows the various current components which flow across the forward-biased
emitter junction and reverse-biased collector junction in a P-N-P transistor.
1) Hole current IpE constituted by holes (holes crossing from emitter into base).
2) Electron current InE constituted by electrons (electrons crossing from base into the
emitter).
The base width is very small and hence most of the holes cross the collector base junction JC and
very few recombine, constituting the base current (IpE IpC).
When the emitter is open-circuited, IE = 0, and hence IpC = 0. Under this condition, the base and
collector together current IC equals the reverse saturation current ICO, which consists of the
following two parts: IPCO caused by holes moving across IC from N-region to P-region.
InCO caused by electrons moving across IC from P-region to N-region. ICO = InCO + IpCO
In general, IC = ICO + IpC Thus for a P-N-P transistor, IE = IB + IC
In this configuration we use base as common terminal for both input and output signals. The
input is applied between the base and emitter terminals and the corresponding output signal is
taken between the base and collector terminals with the base terminal grounded. The input
parameters are VEB and IE and the output parameters are VCB and IC. The input current flowing
into the emitter terminal must be higher than the base current and collector current to operate the
transistor, therefore the output collector current is less than the input emitter current. This
transistor configuration has high output impedance and low input impedance. The voltage gain
for this configuration of circuit is given by. = . Current gain in common base
Input characteristics are obtained between input current and input voltage with constant output
voltage. The below figure show the input characteristics of common base configuration. As the
collector voltage VCB is made to increase the reverse bias, the space charge width between
collector and base tends to increase, with the result that the effective width of the base decreases.
This dependency of base-width on collector-to-emitter voltage is known as Early effect (or)
Base-Width modulation. As base width reduces the emitter current IE increases for small emitter
to base voltage.
When no signal is applied, then the ratio of the collector current to the emitter current is called dc
alpha (a dc) of a transistor.
dc = (Negative sign signifies that IE flows into transistor while IC flows out of it).
When signal is applied, the ratio of change in collector current to the change in emitter current at
constant collector-base voltage is defined as current amplification factor for all practical
purposes, dc = ac = and practical values in commercial transistors range from 0.9 to 0.99.
In this configuration we use emitter as common terminal for both input and output. Here the
input is applied between base-emitter region and the output is taken between collector and
emitter terminals. In this configuration the input parameters are VBE and IB and the output
parameters are VCE and IC.
This type of configuration is mostly used in the applications of transistor based amplifiers. In this
configuration the emitter current is equal to the sum of small base current and the large collector
current. i.e. IE = IC + IB. The ratio between collector current and base current gives the current
gain beta in common emitter configuration.
This configuration is mostly used one among all the three configurations. It has medium input
and output impedance values. It also has the medium current and voltage gains. Collector current
IC = IE = IB
Input Characteristics
The input characteristics of common emitter configuration are obtained between input
current IB and input voltage VBE with constant output voltage VCE. When VCE=0, the emitter-base
junction is forward biased and he junction behaves as a forward biased diode. When VCE is
increased, the width of the depletion region at the reverse biased collector-base junction will
increase. Hence the effective width of the base will decrease. This effect causes a decrease in the
Output Characteristics
The output characteristics of common emitter configuration are obtained between the
output current IC and output voltage VCE with constant input current IB. To determine the output
characteristics, the base current IB is kept constant at a suitable value by adjusting base-emitter
voltage, VBE. The magnitude of collector-emitter voltage VCE is increased in suitable equal steps
from zero and the collector current IC is noted for each setting of VCE. Now the curves of IC
versus VCE are plotted for different constant values of IB. The output characteristics thus obtained
are shown in figure below.
When no signal is applied, then the ratio of collector current to the base current is called dc beta
current to the change in base current is defined as base current amplification factor.
IC = [ ] IB + [ ] ICBO
= (or) =
It can also be seen that (1-) =
In this configuration we use collector terminal as common for both input and output signals. This
configuration is also known as emitter follower configuration because the emitter voltage follows
the base voltage. This configuration is mostly used as a buffer. These configurations are widely
used in impedance matching applications because of their high input impedance.
This common collector configuration is a non inverting amplifier circuit. The voltage gain for
this circuit is less than unity but it has large current gain because the load resistor in this circuit
receives both the collector and base currents.
Output Characteristics
The output characteristics of a common collector circuit are obtained between the output voltage
VEC and output current IE at constant input current IB. In the operation of common collector
circuit if the base current is zero then the emitter current also becomes zero. As a result no
current flows through the transistor If the base current increases then the transistor operates in
active region and finally reaches to saturation region.
When no signal is applied, then the ratio of emitter current to the base current is called as dc
This configuration provides the same current gain as common emitter circuit as IE IC but the
voltage gain is always less than one.
IE = IB + ( IE + ICBO)
IE (1-) = IB + ICBO
IE = +
IE = (1-) =
= and = and =
IE = IB + IC or IB = IE - IC
= = =
= = since (1-) =
Property CB CE CC
The photodiode resistance will change as the light falling on the base changes, causing the base
current to change as well.
Ebers Moll model for pn-p transistor. It involves two ideal diodes placed back to back with
saturation current -IEo and Ico and two dependent current controlled current sources shunting
the ideal diodes.
IE + IC = I or IC = I IE or IC = - IE + I;
=- - IC0 ( -1)
Here, subscript N to indicates that we are using in normal manner. When we interchange the
role of emitter and collector we operate transistor in inverted function. In such case current and
junction voltage relationship for transistor is given by
IE + IC = I or IE = I IC or IE = - IC + I
=- + ( -1)
Note: I0 = IE0; Where, I0 is the magnitude of reverse saturation current.
=- IE0 ( -1)
Here, subscript I to indicates that we are using transistor in a inverted manner, is the
inverted common base current Gain.
The above equations are derived based on the assumption of low level minority carrier injection
(the hole concentration injected into the base is very much less compared to the intrinsic electron
concentration in base), in such a case emitter or collector current is mainly dominated by
diffusion currents, drift current is negligible compared to drift currents.
Consider two diodes connected back to back in the configuration shown below
Field Effect Transistors can be used to replace normal Bipolar Junction Transistors in electronic
circuits and a simple comparison between FETs and Transistors stating both their advantages
and their disadvantages is given below.
8 Some require an input to turn it OFF Requires zero input to turn it OFF
The conventional bipolar transistor has two types of current carriers of both polarities (majority
and minority) and FET has only one type of current carriers, p or n (holes or electrons)
The BJT is current controlled and FET is voltage controlled current between two other terminals
JFET junction is reverse-biased, the gate current is practically zero, and a very high impedance at
input whereas the base current of the BJT is always some value greater than zero, for example, in
As
FET Definition
In addition to the channel, a JFET contains two ohmic contacts: the source and the drain. The
JFET will conduct current equally well in either direction and the source and drain leads are
usually interchangeable
JFET consists of a piece of high-resistivity semiconductor material (usually Si) which constitutes
a channel for the majority carrier flow and a gate. Conducting semiconductor channel exists
between two ohmic contacts Source & Drain. The magnitude of this current is controlled by a
voltage applied to a gate, which is a reverse-biased.
(Ohmic contacts means following Ohms law [I V current proportional to V under constant
physical condition.)
The nonconductive depletion region becomes thicker with increased reverse bias. With no
external Gate voltage (VGS = 0), and a small voltage (VDS) applied between the Drain and the Source,
maximum saturation current ( IDSS ) will flow through the channel from the Drain to the Source restricted
only by the small depletion region around the junctions.
At the pinch-off point, for any further increase in VGS does not produce any increase in ID.
VGS at pinch-off is denoted as Vp. ID is at saturation or maximum. It is referred to as IDSS.
The ohmic value of the channel is at maximum.
VP V GS
1 -
VP
Important Terms
1. Shorted-gate drain current (IDSS): It is the drain current with source short-circuited to gate (i.e.
VGS= 0) and drain voltage (VDS) equal to pinch off voltage. It is sometimes called zero-bias
2. Pinch off voltage (VP): It is the minimum drain-source voltage at which the drain current
essentially becomes constant.
Parameters of JFET
It is the ratio of change in drain-source voltage (VDS) to the change in drain current (ID) at
constant gate-source voltage i.e.
= at constant
The control that the gate voltage has over the drain current is measured by transconductance gm
of the tube. It is the ratio of change in drain current (ID) to the change in gate-source voltage
(VGS) at constant drain-source voltage i.e.
at constant
at constant
Amplification factor of a JFET indicates how much more control the gate voltage has over drain
current than has the drain voltage. For instance, if the amplification factor of a JFET is 50, it
means that gate voltage is 50 times as effective as the drain voltage in controlling the drain
current.
MOSFETs have characteristics similar to JFETs and additional characteristics that make then
very useful
It consists of a highly doped P-type substrate into which two blocks of heavily doped N-type
material are diffused forming the source and drain. An N-channel is formed by diffusion between
the source and drain. Now a thin layer of SiO2 dielectric is grown over the entire surface and
holes are cut through the SiO2 (silicon-dioxide) layer to make contact with the N-type blocks
(Source and Drain). Metal is deposited through the holes to provide drain and source terminals,
and on the surface area between drain and source, a metal plate is deposited. This layer
constitutes the gate. Si02 layer results in an extremely high input impedance of the order of 1010
to 1015 Q for this area.
Operation of DEMOSFET.
DE-MOSFET can be operated with either a positive or a negative gate. When gate is positive
with respect to the source it operates in the enhancementor E-mode and when the gate is
negative with respect to the source, as illustrated in figure, it operates in depletion-mode.
When the drain is made positive with respect to source, a drain current will flow, even with zero
gate potential and the MOSFET is said to be operating in E-mode. In this mode of operation gate
attracts the negative charge carriers from the P-substrate to the N-channel and thus reduces the
channel resistance and increases the drain-current. The more positive the gate is made, the more
drain current flows.
The upper curves are for positive VGS and the lower curves are for negative VGS. The bottom
drain curve is for VGS = V GS(OFF). For a specified drain-source voltage VDS, VGS (OFF) is the
gate-source voltage at which drain current reduces to a certain specified negligibly small value.
This voltage corresponds to the pinch-off voltage Vp of JFET. For VGS between VGS (0FF) and
zero, the device operates in depletion-mode while for VGS exceeding zero the device operates in
enhancement mode.
The main difference between the construction of DE-MOSFET and that of E-MOSFET, E-
MOSFET substrate extends all the way to the silicon dioxide (SiO2) and no channels are doped
between the source and the drain. Channels are electrically induced in these MOSFETs, when a
positive gate-source voltage VGS is applied to it.
Operation of an EMOSFET
When drain is applied with positive voltage with respect to source and no potential is applied to
the gate, a very small drain current that is, reverse leakage current flows. When the gate is made
positive with respect to the source and the substrate, negative (i.e. minority) charge carriers
When this occurs, a channel is induced by forming what is termed an inversion layer (N-type).
The strength of the drain current depends upon the channel resistance which, in turn, depends
upon the number of charge carriers attracted to the positive gate. Thus drain current is controlled
by the gate potential.
Since the conductivity of the channel is enhanced by the positive bias on the gate so this device
is also called the enhancement MOSFET or E- MOSFET. The minimum value of gate-to-source
voltage VGS that is required to form the inversion layer (N-type) is termed the gate-to-source
threshold voltage VGST. For VGS below VGST, the drain current ID = 0. But for VGS exceeding
VGST an N-type inversion layer connects the source to drain and the drain current ID is large.
Depending upon the device being used, VGST may vary from less than 1 V to more than 5 V.
Characteristics of an EMOSFET.
The current IDSS at VGS <=0 is very small, being of the order of a few nano-amperes. When the
VGS is made positive, the drain current ID increases slowly at first, and then much more rapidly
with an increase in VGS.