This has been diagnosed an issue with the reference design board where
Sampling Spurs which occur within ± 100kHz of a frequency
RF coupling occurs back to the XTAL. Boards should be designed to
7 which is a multiple of 10MHz. For example, 900MHz± 100kHz,
isolate the XTAL from the VDD and the RF. Until a new reference design
910MHz± 100kHz, etc.
is provided avoid using these frequencies.
This issue is currently screened during test as such customer will not
On a small percentage of die, the synthesizer does not lock at
8 receive these parts. The issue has also been resolved and will be fixed in
some specific frequencies
the next silicon revision
This issue has been diagnosed as a result of using the the ADC encoder
10M/30M Desense. When on a channel with a multiple of 5M,
with the IF supply and by placing the VR_IF pin such that it is adjacent to
9 10M, or 30M sensitivity, selectivity is degraded by as much as
the RX input. This will be resolved in the next silicon revision. In the
20dB.
interim avoid using these channels.
The temp sensor ADC needs the 32kHz RC or XTAL which is by default
Digital readout of the Temp Sensor (TS) does not work as not enabled. Enable the wake-up-timer (enwt) so that the 32kHz RC is
11
specified in datasheet. enabled and temp sensor will operate correctly. This is a simple
controller bug which will be fixed for next tapeout.
RX bit clock pulse is very narrow and syncronized with the data
12 on the same edge. This makes it very difficult to to use the RX Use external RX bit clock to sample data for BER.
data clock for BER measurements.
Timing bug creates a poor ramp. This will be resolved in the next silicon
16 Spectral splatter on OOK modulation when PA enabled
release