Specification
16-bit Voice Controller
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
Contents
1 INTRODUCTION ...................................................................................................................................................... 3
3 MEMORY................................................................................................................................................................ 10
4 FUNCTIONAL DESCRIPTION............................................................................................................................... 11
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 1
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
VERSION HISTORY
Version Date Description
V1.0 2017/03/01 First Version
1. Modify the figure of IHRC shift versus Voltage figure
V1.1 2017/04/18
2. Modify LVD/LVR information
1. Modify Operating Voltage
V1.2 2017/06/02
2. Modify LVD information
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 2
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
1 Introduction
The SNC7648S is a 16 bit CMOS single chip DSP with 12-bit SAR ADC, 14-bit Push-Pull DAC,
built-in LDO regulator and SPI flash controller. Target applications include high quality audio
compression algorithms, long duration record/playback, real-time voice changing effects, as well as
SONiXs tone detection technology support for both transmitter and receiver.
Features
Operating Voltage: 2.8V ~ 5.5V Slow mode (high-speed clock disable,
Clock Source slow-speed clock enable CPU clock is
32768Hz crystal or 12.288MHz IHRC for programmable : 12.288MHz, 6.144MHz,
high system clock 3.072MHz, 1.536Mhz)
32768Hz crystal pad share GPIO(P1.6, Watch mode (chip enters power-down
P1.7) mode and wake-up setting time by RTC
System Clock: 49.152 MHz(Max) automatically)
I/O Ports: Power-down mode (both high-speed and
48 I/O pins (P0.0~P0.15, P1.0~P1.15, low-speed clock disable)
P2.0~P2.15) 16 channel comparator for cap sensing
P0.15 with IR carrier signal applications. (share P0.0~P0.15)
Total 40KW Program RAM Built in Direct Drive 14-bit Push-Pull DAC
Total 12KW Internal RAM memory 300mA drive/sink @ 3V
configuration for Program and working 64-level volume control
RAM Built in 12-bit SAR-ADC and 1-ch
3 Timers, 1 RTC, 1 WDT microphone pre-amp input
Three 16-bit timers with auto-reload 4-channel 12 bit ADC, select one of four
function(T0,T1,T2) analog AIN[0:3] or one channel
RTC with setting Time Microphone pre-amp input.
Watchdog Timer 4-ch DC-IN channel AIN0 ~ AIN3 share
9 Interrupt Sources GPIO (P0.12 ~ P0.15)
4 for Internal Timers (T0, T1, T2 and MIC pre-amplifier for 0~40dB (0dB,
RTC) 10dB, 20dB, 40dB)
3 for External (P0.0~P0.2) PGA for -12~46.5dB, step =1.5dB
2 for comparator Internal LDO regulator provides 3.3V
PWM Output(share GPIO P0.3~P0.7 & (0.1V) for SPI Flash, Driver Current(max)
P2.0~P2.15) = 50mA
Provide 21 output pins with 256 levels Internal LDO regulator provides 1.5V for
PWM pulse-width control. Core power, Driver Current(max) = 40mA
Operation Modes: Low Voltage Reset (LVR) : 2.5V +/-0.1V
Normal mode (high-speed clock enable, Low Voltage Detector (LVD) :
49.152M / 24.576M / 12.288M / 6.144M / 3.0V +/- 0.1V
3.072M Hz)) UART Tx/Rx
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 3
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
I2C Master/Slave mode Communication SPI interface
SPI Flash Controller Master / Slave (1 bit mode)
Support 1/2/4 bit access mode Master mode:
Support 3/4 bytes address mode. Support clock frequency (Max) = system
4 bytes address mode can support 2GB clock/2
SPI Flash (Max) Slave mode:
Clock frequency (Max) = Support clock frequency (Max) = system
system clock(/1 /2 /4 /8) clock/4
8080 interface (8/16 bit) mode
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 4
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
Pin Assignments
Item Symbol Mode Pin Count Descriptions
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 5
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
33 ICE_MISO O 1 ICE Master In Slave Out pin
34 VDDIO_ICE P(I) 1 3.3V Power for ICE
35 VSSIO_ICE P 1 GND for ICE
36 PVDD P 2 GND for normal operating.
Total 93
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 6
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
1.1 Multi GPIO
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 7
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
P2.2 PWMIO#7 8080_D2
P2.3 PWMIO#8 8080_D3
P2.4 PWMIO#9 8080_D4
P2.5 PWMIO#10 8080_D5
P2.6 PWMIO#11 8080_D6
P2.7 PWMIO#12 8080_D7
P2.8 PWMIO#13 8080_D8
P2.9 PWMIO#14 8080_D9
P2.10 PWMIO#15 8080_D10
P2.11 PWMIO#16 8080_D11
P2.12 PWMIO#17 8080_D12
P2.13 PWMIO#18 8080_D13
P2.14 PWMIO#19 8080_D14
P2.15 PWMIO#20 8080_D15
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 8
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
2 Block Diagram
8080 1 2 - b it S A R 1 4 - b it P P
S P I F la s h
in t e r f a c e ADC DAC
A r b it e r DMA
IC E
IR DMA1
E X T _ IN T
2KW R AM
T im e r
RTC
W DT 40KW 2KW R AM
P W M IO PRAM
SPI
In te rfa c e 2KW R AM
DSP
S9KE2
Cap 2KW R AM
C o re
S e n s in g
2KW R AM
UART
2KW R AM
I2 C
32768 1 2 .2 8 8 M LVD L D O fo r L D O fo r L D O fo r
PLL
X ta l IH R C LVR 3 .3 V 1 .5 V ADC
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 9
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
3 Memory
Internal Program Memory & Internal Working Ram/Ext Program Ram
Case 1:
Internal Program Memory
Address Range Usage
Size (Words)
0x000000 ~ 0x009FFF 40K Program RAM
Case 2:
Internal Program Memory
Address Range Usage
Size (Words)
0x000000 ~ 0x00BFFF 48K Program RAM
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 10
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4 Functional Description
4.1 System Clock
SNC7648 is a dual clock system that provides high-speed clock (32768Hz up to 24.576MHz) and low-speed
clock (12.288MHz or 32768Hz) providing specific clock sources for various application requirements.
32768H z 32768 Hz
XTAL XTAL
M ux PLL CPU
4 9 .1 5 2 M H z
1 2 .2 8 8 M H z 32768 Hz
IH R C IH R C
/3 7 5
C LK_SEL PLL_SEL
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 11
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
The clock structure when using a 32768Hz crystal utilizes an internal PLL to generate high speed
clock rates. The frequency accuracy is according to the 32768Hz crystal. The frequency is not
affected by voltage or temperature. Applications requiring a high degree of accuracy should use
this clock source that is software selectable.
IHRC frequency (internal resistor oscillator) is affected by voltage and temperature of the system
where the following illustrates the relationship.
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 12
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.2 I/O Port
SNC7648S provides a total of 48 I/O pins (P0.0~P0.15, P1.0~P1.15, P2.0~P2.15). Input pull-high
resistors and the direction of each pin can be individually programmed by port pull-high and
direction registers. Port P0.0~P0.15 and P1.0~P1.15 can wake the chip from standby mode.
A few of these 48 programmable I/O pins are shared with peripheral interfaces such as SPI and
ADC interfaces. The internal structure of the I/O pins is shown in Figure-1.
Pull-Up
Resister
In/Out
Pull-Up Control
Select
I/O
PAD
Data Gate
to internal
bus
In/Out
Control
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 13
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.3 Timer/Counter
SNC7648S provides three 16-bit timer/event counters (T0/T1/T2). Each timer is 16-bit binary
up-count timer with pre-scalar and auto-reload function.
/2 (16-bit)
TnC Time Out
/4
16-bit
system clock /2 /8 MUX Up-Counter
comparator
/512
clear
Enable
Pre-scalar
Auto-reload
Figure-2
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 14
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.4 Interrupt
At the moment the SNC7648S enters the interrupt service routine, the GIE bit (in INTEN) will be
cleared to "0 to block other interrupts. Enabled interrupt sources still issue requests, which are
then queued in INTRQ. The GIE will be restored to 1 when exiting ISR where any pending
interrupt requests are granted and served immediately.
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 15
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.5 SPI Flash Controller
SNC7648S has a built-in SPI Flash controller interface to support 1/ 2/ 4 bit read/write modes and
6.144/ 12.288/ 24.576/ 49.152 MHz clock frequencies. It is used for Write/Read of SPI Flash
content or can run a program from SPI Flash.
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 16
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.6 ADC
The SNC7648S contains a single high performance SAR Analog-to-Digital Converter for
microphone and analog input applications. Input to the single ADC from the microphone or any of
the 4 analog inputs is selected by control register setting. With typical SNR at 60db for the
microphone input, the pre-amp also supports a built-in PGA (-12dB ~ +46.5dB) and BOOST (0 ~
+40dB). The 4 analog inputs do not go through the Boost or PGA amp and share GPIO (AIN0~AIN3
match P0.12~P0.15). The ADC supports 4/ 6/ 8/ 12/ 16/ 24/ 32/ 48 KHz sample rates.
Analog Digital
AIN[0:3] 12 bit
MUX S/H
ADC
Sample Hold Registers
Devices and
Control
Logic
MIC_P
Pre
AMP PGA
MIC_N
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 17
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.6.1 Microphone Application Circuit
The value of 5.1K is based on the microphone of the SONiX Development Board.
The microphone bias voltage is between 1.5V and 2.0V.
The SAR ADC internal circuit is an RC type and therefore the external resistor will affect the ADCs
accuracy. The maximum resistor value is 1M ohm (R1+R2). Because the R1+R2 resistor value is
1M ohm, the DC path will result in power consumption. Therefore, the ADC internal circuit has
power switch function (BATSW).
In DC detect stage (setting BATSW=1), the ADC power path is on. In the power down mode (setting
BATSW=0), GPIO must be set to float status before entering power down mode. There are gating
designed into the AIN2/AIN3 IO circuit so the path results in minimal power consumption when the
batterys voltage is smaller than VDDIO_0.
The IO gating signal will be set when the DC channel is selected. The ADCSET bit12~bit8 (MIC and
AIN3~AIN0) selects the ADC channel input.
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 18
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
VDD5_REG
R1
AIN2(P0.14)
R2
Detect Voltage
AIN3(P0.15)
VREF
BATSW
VDD_AD
0.1uF 4.7uF 0.1uF
VSS_AD
EX: P0.14 (AIN2) is detect voltage channel. Set bit-10 (AIN2) high, and at the same time, the gating
signal is enabled (BATSW=1). Bit-10 (AIN2) must be kept high when the IC enters power down
mode. The gating signal is then disabled (BATSW=0) and GPIO set to float (P0.14, P0.15).
The ADC Power is 3V level, if the detect voltage is bigger than 3V, such as the detect voltage is
bigger 3.3V. It will result in the leakage current in power down mode, the detect voltage detect
application dont use the above circuit. We use the transistor to turn off the power DC path.
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 19
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.6.2.2 Application Circuit for Detect Voltage > VDDIO_0
Condition:
Detect Voltage > VDDIO_0 ( VDDIO_0=V33_REGOUT(3.3V) or VDD_BAT(5V))
*Detect Stage: AIN2 (P0.14) is detected channel, set the P0.15=High, Turn on DC Path
*Power Down Stage: set P0.15 = Low, Turn off DC Path
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 20
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
14
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 21
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.8 Comparator
The analog comparator compares negative input voltage, and then output the result to comparator
output terminal. The comparator has multi-input selection for various applications. The comparator
negative input terminal is up to 16-channel controlled by CM_CH_SEL[5:0].
-Comparator unit with programmable output de-bounce.
-Comparator output function.
-Comparator channel selection.
-Programmable internal reference voltage source.
-Auto-oscillating control block.
-Cap Sensing compensation.
The following illustrates the Cap Sensing Charge/Discharge path and output waveform.
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 22
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 23
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
4.9 Regulator
The SNC7648S contains two regulators, one is for core power. The output voltage is 1.5V with
0.05V accuracy and can be powered down by software. Driver Current (max) = 40mA
The other one is for SPI Flash. The output voltage is 3.3V with 0.1V accuracy and also can be
powered down by software. Driver Current (max) = 50mA
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 24
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
The SNC7648S has a Low Voltage Detector (LVD) for power management. This feature is
favorable to product battery life requirements and can be an effective management of system
power. The device provides 4 software programmable voltage levels to detect low voltage events
3.0V ( 0.1V). The LVD function compares the power supply voltage VDD, with a pre-specified
voltage level stored in the control setting register. When the power supply voltage VDD falls below
this pre-determined value, the LVDOUT bit will be set high by HW, indicating a low power supply
voltage condition. When the device is powered down the low voltage detector will remain active if
the LVDEN bit is high.
VDD
VLVDR
VLVDT
LVDEN
LVDOUT
LVD Operation
Note the LVD detect has a voltage window of about 0.1V~0.2V. When LVD level = 3.0V, and VDD
supply falls lower than 3.0V, the LVD will trigger LVD (VLVDT). When VDD supply rises higher than
3.1V~3.2V, LVD (VLVDR) will be released, and LVDOUT bit will be set low by HW. The LVD function
does not operate in sleep or idle modes and is recommended to turn off the LVD function in these
modes to reduce power consumption.
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 25
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
The SNC7648S power-on reset occurs through an external RC reset circuit and onto the RESET
input. The power-on reset circuit holds the device in Reset until VDD has reached an acceptable
level for minimum operation voltage.
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 26
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 27
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
6 Electrical Characteristics
VDD/VDD_IO = 3.0V, CVDD = 1.5V, TA=25
Items Sym. Min. Typ. Max. Unit Condition
Operating Voltage VDD VDD 2.7 - 5.0 V
Operating Voltage CVDD CVDD 1.35 1.5 1.65 V
Standby Current ISBY - 25 60 uA no load
Operating Current IOPR - 20 - mA no load
Pull-Up Resistor of P0, P1, P2 RPU - 200 - K VDD=3V, no load
Drive Current of P0.0~P0.15,
IOD - 6 - mA VDD=3V
P1.6~ P1.15, P2.0~P2.15
Drive Current of P0.0~P0.15,
IOD - 9 - mA VDD=5V
P1.6~ P1.15, P2.0~P2.15
Sink Current of P0.0~P0.15,
IOS - 6 - mA VDD=3V
P1.6~P1.15, P2.0~P2.15
Sink Current of P0.0~P0.15,
IOS - 9 - mA VDD=5V
P1.6~P1.15, P2.0~P2.15
Drive Current of P1.0~P1.5 IOD - 12/16 - mA VDD=3V
Sink Current of P1.0~P1.5 IOS - 12/16 - mA VDD=3V
Drive Current of DAON IOD 300 - mA VDD=3V, DAON = 1.5V
Sink Current of DAON IOS 300 - mA VDD=3V, DAON = 1.5V
Drive Current of DAOP IOD 300 - mA VDD=3V, DAOP = 1.5V
Sink Current of DAOP IOS 300 - mA VDD =3V, DAOP = 1.5V
Maximum Current Output
ILDO1 50 mA VDD5_REG = 5V
Of Built-In 3.3V Regulator
Maximum Current Output
ILDO2 40 mA VDD5_REG = 5V
Of Built-In 1.5V Regulator
Oscillation Freq. (Crystal) FOSC - 32768 - Hz VDD = 3V
49.152 MHz for VDD = 3V, Temp. = 25,
FOSC 47.677 49.152 50.626 MHz
High System Clock (IHRC) Max : +3%, Min : -3%
Low Voltage Reset(LVR) VRST 2.4 2.5 2.6 V
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disclosed in whole or no in part without prior written permission of SONIX.
V1.2 28
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
7 Bonding Information
VSSIO0
VDDIO0
P0.10
P2.15
P2.14
P2.13
P2.12
P2.11
P2.10
P0.9
P0.8
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
P2.9
P2.8
P2.7
P2.6
P2.5
P2.4
P2.3
93
80
92
91
90
89
88
87
86
85
84
83
82
81
79
78
77
76
75
74
73
72
71
70
69
68
67 P2.2
66 VSSIO2
65 VDDIO2
64 P2.1
P0.11 1 63 P2.0
2 62 PVDD
P0.12
61 PVDD
P0.13 3
60 VSSIO_ICE
P0.14 4
59 VDDIO_ICE
P0.15 5 58 ICE_MISO
CVDD 6 57 ICE_MOSI
VSS 7 56 ICE_CS
RESET 8 55 ICE_SCK
(0.00,0.00) 54 ICE_MS
P1.12 9
P1.13 10
P1.14 11
53 VDD5A_PPDAC
P1.15 12
52 VSS5A_PPDAC
MIC_N 13
51 VSSIO_PPDAC
MIC_P 14
50
VSSIO_PPDAC
REFH 15
VMIC 16 49 DAON
48 DAON
VSS_ADC 17
VDD_ADC 18
47 VDDIO_PPDAC
46 VDDIO_PPDAC
P1.11 19
P1.10 20 45 DAOP
P1.9 21 44 DAOP
P1.8 22
43 VSSIO_PPDAC
42 VSSIO_PPDAC
25
27
26
28
29
30
31
32
33
34
35
36
37
38
39
40
41
23
24
VCOIN
P.17
VSSA
V15_REGOUT
CVDD
P1.6
VSS5_REG
V33_REGOUT
VDD5_REG
VSS
VSSIO1
VDDIO1
P1.1
VDDA
P1.0
P1.2
P1.5
P1.4
P1.3
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 29
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
8 Application Circuit
C1 0.1uF
2 1
Battery_In
SNC7649 IC
VDDIO0
P0.10
P2.15
P2.14
P2.13
P2.12
P2.11
P2.10
P0.9
P0.8
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
P2.9
P2.8
P2.7
P2.6
P2.5
P2.4
P2.3
VSS
ICE_5V
VDD5REG
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
3x BATTERY_4.5V
P0.9
P0.8
P0.7
P0.6
P0.5
P0.4
P0.3
P0.2
P0.1
P0.0
P2.9
P2.8
P2.7
P2.6
P2.5
P2.4
P2.3
P0.10
P2.15
P2.14
P2.13
P2.12
P2.11
P2.10
JP1 VDDA_DAC
VSSIO0
VDDIO0
2
1
HEADER 2
2
P0.11 1 67 P2.2 C2 VSS
P0.11 P2.2 VSS
2 66
P0.12 VSSIO2 VDDIO2
3 65
1
P0.13 VDDIO2 P2.1
4 64 0.1uF
P0.14 P2.1 P2.0
5 63
VDD1P5V P0.15 P2.0 VSS
6 62
1
2
VSS VDD PVDD VSS
C3 7 61 C4
RESET 8
VSS
RESET
PVDD
VSS_ICE
60 VSS LDO Power( 5V Input , 3.3V/1.5V Ouput)
0.1uF P1.12 9 59 VDD3P3V
2
1
P1.13 P1.12 VDD_ICE ICE_MISO
10 58 0.1uF
P1.13 ICE_MISO VDD3P3V
P1.14 11 57 ICE_MOSI V33_REGOUT
P1.15 P1.14 ICE_MOSI ICE_CSB
12 56
MIC_N P1.15 ICE_CSB ICE_SCK
13 55
MIC_N ICE_SCK VDD1P5V
MIC_P 14 54 ICE_MS V15_REGOUT
REFH MIC_P ICE_MS VDDA_DAC
15 53
VMIC REHF VDD5A_PPDAC VSS
16 52
SNC7649 COB
VSS_ADC
VDD_ADC
17
18
VMIC
VSS_ADC SNC7648S COB VSS5A_PPDAC
VSSIO_PPDAC
51
50
VSS
VSS
VDD5REG
VDD5V
1
P1.11 DAON DAON
20 48 C5 C6 C7 C8 C9 C10
P1.10 DAON VDDA_DAC
21 47
P1.9 VDDIO_PPDAC VDDA_DAC
22 46 0.1uF 4.7uF 0.1uF 4.7uF 0.1uF 4.7uF
2
P1.8 VDDIO_PPDAC DAOP VSS
45
DAOP DAOP
44
DAOP VSS
43
VSSIO_PPDAC VSS
42
VSSIO_PPDAC
REFH R1 0
VDD_ADC
JP2
V33_REGOUT
V15_REGOUT
1 VDD3P3V
VDD5_REG
VSS5_REG
1
2 VDDIO_0 C11 C12
VDDIO1
VSSIO1
VCOIN
3 VDD5V
VDDA
VSSA
VDD
P1.6
P1.7
P1.0
P1.2
P1.5
P1.4
P1.1
P1.3
VSS
4.7uF 0.1uF
2
VSS_ADC
U1 HEADER 3
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
JP3
1 VDD
2 VDDIO_2
V33_REGOUT
V15_REGOUT
3 VDD5V
VDD3P3V
VDD1P5V
VDD3P3V
VCONIN
VDD5V
P1.6
P1.7
P1.0
P1.2
P1.5
P1.4
P1.1
P1.3
HEADER 3
VSS
VSS
VSS
VSS
C13
1 2 2 1
C14 0.1uF
0.1uF
VDD3P3V
HW REST
ICE IF Note:
32K XTAL
1
VDDIO J1 C16
Short 2-3: P1_6, P1_7 used IO Mode
C15 0.1uF
2
RESET
P1_7_XLOUT
CS1 ( )
1
C17 S1 J2
Y1
RESET P1_5 P1_2
0.1uF 1 2
2
R4 5.1k
HEADER 2 VMIC S2 S4 S5 S6 S3 S7 S8 S9
SW SW SW SW
1
J3 R5 C20 SW SW SW SW
2.2K
1 2 C21 10uF TR1 TR2 TR3 TR4
2
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 30
SONiX TECHNOLOGY CO., LTD.
SNC7648S Specification
DISCLAIMER
The information appearing in SONiX web pages (this publication) is believed to be accurate.
However, this publication could contain technical inaccuracies or typographical errors.
The reader should not assume that this publication is error-free or that it will be suitable for any
particular purpose. SONiX makes no warranty, express, statutory implied or by description in this
publication or other documents which are referenced by or linked to this publication. In no event
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profits, whether or not advised of the possibility of damage, and on any theory of liability, arising out
of or in connection with the use or performance of this publication or other documents which are
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This publication was developed for products offered in Taiwan. SONiX may not offer the products
discussed in this document in other countries. Information is subject to change without notice.
Please contact SONiX or its local representative for information on offerings available. Integrated
circuits sold by SONiX are covered by the warranty and patent indemnification provisions stipulated
in the terms of sale only.
The application circuits illustrated in this document are for reference purposes only. SONIX
DISCLAIMS ALL WARRANTIES, INCLUDING THE WARRANTY OF MERCHANTABILITY OR
FITNESS FOR ANY PURPOSE. SONIX reserves the right to halt production or alter the
specifications and prices, and discontinue marketing the Products listed at any time without notice.
Accordingly, the reader is cautioned to verify that the data sheets and other information in this
publication are current before placing orders.
Products described herein are intended for use in normal commercial applications.
Applications involving unusual environmental or reliability requirements, e.g. military equipment or
medical life support equipment, are specifically not recommended without additional processing by
SONIX for such application.
The information contained herein is the exclusive property of SONIX and shall not be distributed, reproduced or
disclosed in whole or no in part without prior written permission of SONIX.
V1.2 31