CISH-4030 Structured Computer Architecture 1/5/04

CISH-4030
Structured Computer Architecture

Lecture 11 ( 11/17/03 )
Instruction Sets
Addressing Modes

• Roger Brown
• rhb@rh.edu
• www.rh.edu/~rhb
• 860-548-2462

Addressing Modes

n Immediate
n Direct
n Indirect
n Register
n Register Indirect
n Displacement (Indexed)
n Stack

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Immediate Addressing

n Operand is part of instruction

n Operand = address field
n e.g. ADD 5
n Add 5 to contents of accumulator

n 5 is operand

n No memory reference to fetch data

n Fast
n Limited range

Immediate Addressing Diagram

Instruction
Opcode Operand

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Direct Addressing

n Address field contains address of operand

n Effective address (EA) = address field (A)
n e.g. ADD A
n Add contents of cell A to accumulator

n Look in memory at address A for operand

n Single memory reference to access data

n No additional calculations to work out effective
address
n Limited address space

Direct Addressing Diagram

Instruction
Opcode Address A
Memory

Operand

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Indirect Addressing (1)

n Memory cell pointed to by address field contains

the address of (pointer to) the operand
n EA = (A)
n Look in A, find address (A) and look there for
operand
n e.g. ADD (A)
n Add contents of cell pointed to by contents of A to
accumulator

Indirect Addressing (2)

n Large address space

n 2n where n = word length
n May be nested, multilevel, cascaded
n e.g. EA = (((A)))

• Draw the diagram yourself

n Multiple memory accesses to find operand
n Hence slower

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Indirect Addressing Diagram

Instruction
Opcode Address A
Memory

Pointer to operand

Operand

Register Addressing (1)

n Operand is held in register named in address filed

n EA = R
n Limited number of registers
n Very small address field needed
n Shorter instructions

n Faster instruction fetch

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Register Addressing (2)

n No memory access
n Very fast execution
n Very limited address space
n Multiple registers helps performance
n Requires good assembly programming or compiler
writing
n N.B. C programming

• register int a;
n c.f. Direct addressing

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Register Addressing Diagram

Instruction
Opcode Register Address R
Registers

Operand

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Register Indirect Addressing

n C.f. indirect addressing

n EA = (R)
n Operand is in memory cell pointed to by contents of
register R
n Large address space (2n)
n One fewer memory access than indirect addressing

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Register Indirect Addressing Diagram

Instruction
Opcode Register Address R
Memory

Registers

Pointer to Operand Operand

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Displacement Addressing

n EA = A + (R)
n Address field hold two values
n A = base value

n R = register that holds displacement

n or vice versa

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Displacement Addressing Diagram

Instruction
Opcode Register R Address A
Memory

Registers

Pointer to Operand + Operand

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Relative Addressing

n A version of displacement addressing

n R = Program counter, PC
n EA = A + (PC)
n i.e. get operand from A cells from current location
pointed to by PC
n c.f locality of reference & cache usage

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Base-Register Addressing

n A holds displacement
n R holds pointer to base address
n R may be explicit or implicit
n e.g. segment registers in 80x86

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Indexed Addressing

n A = base
n R = displacement
n EA = A + R
n Good for accessing arrays
n EA = A + R

n R++

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Combinations

n Postindex
n EA = (A) + (R)

n Preindex
n EA = (A+(R))

n (Draw the diagrams)

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Stack Addressing

n Operand is (implicitly) on top of stack

n e.g.
n ADD Pop top two items from stack
and add

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Pentium Addressing Modes

n Virtual or effective address is offset into segment

n Starting address plus offset gives linear address
n This goes through page translation if paging enabled
n 12 addressing modes available
n Immediate
n Register operand
n Displacement
n Base
n Base with displacement
n Scaled index with displacement
n Base with index and displacement
n Base scaled index with displacement
n Relative

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Pentium Addressing Mode Calculation

PowerPC Addressing Modes

n Load/store architecture
n Indirect
• Instruction includes 16 bit displacement to be added to base
register (may be GP register)
• Can replace base register content with new address
n Indirect indexed
• Instruction references base register and index register (both may
be GP)
• EA is sum of contents
n Branch address
n Absolute
n Relative
n Indirect
n Arithmetic
n Operands in registers or part of instruction
n Floating point is register only

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PowerPC Memory Operand

Addressing Modes

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Instruction Formats

n Layout of bits in an instruction

n Includes opcode
n Includes (implicit or explicit) operand(s)
n Usually more than one instruction format in an
instruction set

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Instruction Length

n Affected by and affects:

n Memory size

n Memory organization

n Bus structure

n CPU complexity

n CPU speed

n Trade off between powerful instruction repertoire

and saving space

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Allocation of Bits

n Number of addressing modes

n Number of operands
n Register versus memory
n Number of register sets
n Address range
n Address granularity

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PDP-8 Instruction Format

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PDP-10 Instruction Format

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PDP-11 Instruction
Format

VAX
Instruction
Examples

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Pentium Instruction Format

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PowerPC Instruction Formats (1)

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PowerPC
Instruction
Formats (2)

Foreground Reading

n Stallings chapter 11
n Intel and PowerPC Web sites

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