IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 18, NO.

6, NOVEMBER 2003 1397

A New Topology for Unipolar Brushless DC Motor

Drive With High Power Factor
Tilak Gopalarathnam, Member, IEEE, and Hamid A. Toliyat, Senior Member, IEEE

AbstractA new converter topology is proposed for driving a

permanent magnet brushless dc (BLDC) motor with unipolar cur-
rents. It is based on a front-end single-ended primary inductance
converter (SEPIC) and a switch in series with each phase. All the
switches are ground-referenced, which simplifies their gate drives.
The available input voltage can be boosted for better current reg-
ulation, which is an advantage for low voltage applications. For
operation with an ac supply, the SEPIC converter is designed to
operate in the discontinuous conduction mode. In this operation
mode, it approximates a voltage follower and the line current fol-
lows the line voltage waveform to a certain extent. The reduction
in low-order harmonics and improved power factor is achieved
without the use of any voltage or current sensors. The simplicity
and reduced parts count of the proposed topology make it an at- Fig. 1. Conventional six-switch inverter used for BLDC motor drive.
tractive low-cost choice for many variable speed drive applications.
Index TermsAC supply, BLDC, DC motor drive, line current,
low-order harmonics, SEPIC converter, topology.

I. INTRODUCTION

C OST MINIMIZATION is the key to the large volume man-

ufacture and application of brushless dc (BLDC) motors
in variable speed drives. BLDC motors are conventionally ex-
cited with bipolar currents which requires a six-switch inverter
as shown in Fig. 1. The unipolar motor needs fewer electronic
parts and uses a simpler circuit than the bipolar motor. For these
Fig. 2. Simple unipolar converter for three-phase BLDC motor.
reasons, unipolar-driven motors are widely used in low-cost in-
struments [1]. The savings in converter cost opens up a lot of ap-
plications for variable speed drives (VSD) such as HVAC, fans,
pumps, and appliances which have been dominated by constant
speed drives.
The simplest unipolar drive consists of a single switch in se-
ries with each winding and a zener diode or dump resistor in the
freewheeling path as shown in Fig. 2 [2]. This drive is inefficient
because the stored energy in the phases is dissipated. Better per-
formance can be obtained by using topologies that have previ-
ously been used for driving switched reluctance motors (SRM). Fig. 3. C-dump converter for unipolar BLDC motor drive.
An example is the C-dump converter shown in Fig. 3 [3], which
offers full regenerative control. However, it has the disadvan- dump capacitors than what is applied to the motor phases during
tage of requiring a complicated control for the dump capacitor turn-on. While this is a requirement for the SRM motor in order
voltage, the failure of which could be catastrophic. A buck con- to achieve a fast turn-off of the phase current to avoid negative
verter-based drive for the unipolar BLDC motor was proposed torque spikes, it is not so for the BLDC motor. In fact, by al-
in [4]. Both these topologies require a higher voltage on the lowing the phase currents to overlap during the commutation
intervals, the commutation torque pulsations can be reduced.
The topology proposed in this paper takes advantage of this fact
Manuscript received December 18, 2001; revised June 3, 2003. Recom-
mended by Associate Editor G. K. Dubey.
to use a smaller voltage on the dump capacitor. A three-switch
T. Gopalarathnam is with Powell Power Electronics, Watsonville, CA 95076 converter for the unipolar BLDC motor for ac supply operation
USA (e-mail: tgopalar@ppeco.com). was investigated in [5], but it requires a modification in the ma-
H. A. Toliyat is with the Department of Electrical Engineering, Texas A&M
University, College Station, TX 77843 USA (e-mail: toliyat@ee.tamu.edu). chine windings and a split-capacitor voltage balancing control
Digital Object Identifier 10.1109/TPEL.2003.818873 scheme.
0885-8993/03$17.00 2003 IEEE
1398
Fig. 4. AC motor drive with active power factor correction stage.
Fig. 5. AC motor drive with integrated PFC stage and inverter.
For applications requiring operation from the utility supply,
it is important to design the equipment to satisfy harmonics
standards such as the IEC 1000-3-2, which limit the magni-
tude of current harmonics that can be injected into the utility.
These standards are typically not satisfied by the conventional
method of ac/dc conversion using a bridge rectifier followed by
a large dc bus capacitor. Passive power factor correction (PFC)
circuits based on the use of reactive elements are impractical
in 5060 Hz single-phase lines because of size, weight and cost
[6]. Active PFC methods are becoming increasingly popular be-
cause of the availability of low-cost switches. They consist of a
dcdc converter between the diode bridge and the bulk capac-
itor which is controlled such that the input current is shaped to
follow the input voltage. The frequency spectrum of the input
current would then consist of the fundamental plus easily fil-
tered higher order harmonics. The typical configuration of an
ac motor drive with a power factor correction stage is shown in
Fig. 4. For low power levels, the extra cost and complexity of
the additional PFC stage is not justified by the improvement in
power factor. These applications need to take advantage of in-
herent features of the topology to improve the power factor. A
method of input current shaping utilizing inverter current con-
trol has been discussed in [7].
This paper makes use of the desirable properties of the single-
ended primary inductance converter (SEPIC) [8] operating in
the discontinuous conduction mode (DCM). At constant duty
cycle, the average input current automatically tracks to some
extent the sinusoidal shape of the input voltage [9]. This is real-
ized without the need of sensing and controlling the input cur-
rent, thus simplifying the control circuit. Such a feature can be
used to integrate the PFC stage with the output voltage regula-
tion or inverter stage, which can lead to considerable cost re-
duction. The schematic of an ac motor drive with the PFC stage
integrated with the inverter is shown in Fig. 5.
This paper is organized as follows. The unipolar excitation
scheme of BLDC motors is discussed in Section II. The pro-
posed topology is introduced and its operation with a dc supply
is discussed in Section III. The operation with an ac supply to
improve the utility interface is discussed in Section IV. A design
example is discussed in Section V, simulation and experimental
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 18, NO. 6, NOVEMBER 2003
Fig. 6. Back-emf, phase current and output torque waveforms with: (a) bipolar
excitation and (b) unipolar excitation.
results are presented in Section VI, and Section VII gives con-
cluding remarks.
II. UNIPOLAR EXCITATION OF BLDC MOTORS
The motor under investigation is of the surface-mount
permanent magnet variety with concentrated stator windings
such that the induced back-emfs with respect to rotor position
are trapezoidal with a flat-top width that is as wide as pos-
sible. Smooth torque production requires forcing a constant
current through each phase winding when its back-emf is at
its peak value and turning off the current when the back-emf
is changing. For bipolar excitation, positive current is injected
when the back-emf is positive, and negative current when the
back-emf is negative, with each conduction period lasting 120 .
This results in two phases conducting current and producing
torque at any instant of time as shown in the waveforms of
Fig. 6(a). Unipolar current conduction limits the phases to only
one direction of current as shown in Fig. 6(b). Constant torque
production is still possible because one phase is conducting
current at any instant. It is of course possible to have an overlap
in the phase conduction to have a smoother torque production
[10]. In any case, the motor windings are poorly utilized com-
pared to the bipolar case. This is reflected in the lower output
torque of the unipolar motor for the same peak phase currents.
The primary motivation for choosing unipolar excitation is that
in practice, the inverter typically costs more than the motor and
there is a great potential for reducing its cost and hence the
overall cost of the drive. In addition to cost reduction, unipolar
excitation offers the following advantages:
There is only one device in series with each phase,
minimizing conduction losses.
The risk of shoot-through faults is eliminated.
Switching of devices connected to the supply rails,
which generally requires some isolation circuitry, can
be avoided.
Another factor that has to be considered before choosing
unipolar excitation is that the motor neutral has to be available
because the phase currents are no longer balanced.
GOPALARATHNAM AND TOLIYAT: NEW TOPOLOGY FOR UNIPOLAR BRUSHLESS DC MOTOR DRIVE
Fig. 7. Schematic of SEPIC converter based BLDC motor drive.
III. PROPOSED CONVERTER TOPOLOGY
The proposed converter with four controlled switches and
diodes is shown in Fig. 7. The front-end consists of a SEPIC
dc/dc converter comprised of inductors and , switch ,
intermediate capacitor , diode and output capacitor . where
The modification from the usual SEPIC configuration is that
the diode is placed in the return path instead of in the posi-
tive rail. This is to block the flow of current through the phases
during the periods of negative back-emf. A, B, and C are the
three machine windings, and the currents through them are con-
trolled by turn-on and turn-off of the switches , and ,
respectively. Since there is only one switch per phase, the cur-
rents through them are unidirectional. The diodes , and
serve to freewheel the winding currents when the switches
are turned off during current regulation and phase commuta-
tion.The output of the converter is used to energize the three
phases of the motor, and the voltage of capacitor is used to
demagnetize the phases during turn-off and for current control.
Each phase is energized by turning on the corresponding
switch in series with it. The equivalent circuit of phase A when
switch is turned on is shown in Fig. 8(a). To regulate the
current, is turned off, which forces the turn-on of diode , feature makes the proposed topology particularly suitable for
and the flow of current through as shown in the equivalent
circuit of Fig. 8(b). This applies a voltage of across the
machine winding, enabling a fast decay of the phase current.
For proper demagnetization of the phase after each conduction
interval and to prevent conduction during periods of negative
back-emf, the instantaneous value of should be greater
than the peak value of the back-emf E, or
(1)
By applying Kirchoffs voltage law to the SEPIC front-end,
we obtain
Since the average voltages in the two inductors are zero, we
get
(2)
From (1) and (2), we obtain the peak back-emf at the max-
imum speed of the motor, which is given by ,
assuming that the ripple in the intermediate capacitor voltage
1399
Fig. 8. Equivalent circuits of each machine phase when (a) the switch is on
and (b) when the diode is conducting.
is negligible. The maximum operating speed is then given by
is the phase back-emf constant of
the motor.
If the motor is operated beyond this speed, it would result in
negative torque spikes because of conduction during periods of
negative back-emf.
The minimum voltage required is
where and are the phase resistance and in-
ductance, and I is the phase current. At low speeds, when the
back-emf is low, the switching frequency of the phase switches
increases in order to regulate the phase current. The switching
frequency and hence the losses at low speeds can be minimized
by bucking the input voltage to lower levels at the output .
At higher speeds, the current regulator loses its ability to force
current into the phases especially during turn-on because of the
high back-emf voltage. The ability of the SEPIC front-end to
boost the available input voltage makes it possible to maintain
current-regulated operation of the drive at higher speeds. This
low voltage dc applications such as automotive circuits. The
key operating waveforms at low speeds and at
high speeds are illustrated in Fig. 9(a) and (b),
respectively.
The front-end SEPIC converter can be designed for operation
either in the continuous conduction mode (CCM) or in the dis-
continuous conduction mode (DCM). In CCM, its voltage con-
version ratio is given by
where D is the duty cycle of the switch .
In DCM, its voltage conversion ratio is given by [11]
where , R being the equivalent load
resistance and T the time period of switch .The boundary
value of K between continuous and discontinuous conduction
modes, can be calculated as [11]
1400 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 18, NO. 6, NOVEMBER 2003

Fig. 10. Schematic of the proposed converter operating from an ac supply.

[9]: The converter works as a voltage follower, meaning that

the input current naturally follows the input voltage profile (No
current loop is needed), and the theoretical power factor is unity.
For ideal voltage follower operation, the intermediate capac-
itor voltage should follow the half-sinusoidal input voltage, and
(a) goes to zero in each half-cycle. This is illustrated for the case of a
resistive load in Fig. 11. However, with a unipolar BLDC motor
load, the intermediate capacitor voltage has to be greater than
the phase back-emf for proper demagnetization of the phases.
This causes a distortion of the input current waveform around
the zero-crossings of the input voltage. This is acceptable be-
cause the input current shaping is achieved at no cost to the
drive, and as will be seen, the resulting power factor is better
than with the conventional circuit configuration.
There is a practical limit to the power level up to which dc/dc
converters can be operated in DCM. This limit is reached around
300 W. The use of unipolar excitation for BLDC motors beyond
this power rating is also not recommended, as bipolar excita-
tion would better utilize the machine windings. So the proposed
topology is well-suited to low-power, low-performance applica-
tions where cost is a major consideration.

V. DESIGN EXAMPLE
(b)
A commercially available fractional horsepower BLDC
Fig. 9. Phase A current (Trace 1), dc bus voltage (Trace 2) and intermediate
capacitor voltage (Trace 3): at (a) low speed and (b) high speed. motor with a phase back-emf constant of 12 V/Krpm is used in
the design example. Because of the low back-emf constant, the
input voltage is chosen to be 50 V peak. A drive with a power
rating of 100 W is designed.
The converter operates in CCM when and in DCM The following equations are used for the design [9].
when . In both modes of operation, can be reg- Input voltage .
ulated at a value higher (Boost operation) or lower (Buck oper- DC bus voltage .
ation) than the input voltage . From the controls viewpoint, Switching frequency of , .
it is advantageous to have the converter operating in the same Voltage conversion ratio .
mode under all load conditions. In addition, the size of the in- Critical conduction parameter
ductors and hence the overall converter can be reduced if it is .
operated in DCM [12]. Hence it is proposed that the converter is chosen to ensure DCM operation.
be designed for operation in the critical conduction mode at Duty cycle of , .
maximum load, so that it operates in DCM at rated load and Equivalent inductance .
all values less than rated load. Input current ripple .
.
IV. AC SUPPLY OPERATION .
For applications requiring operation from an ac supply, it is .
desired to obtain improved power factor by using the proposed The actual value of should be higher to minimize the voltage
topology as shown in Fig. 10. By operating the SEPIC front-end ripple caused by the freewheeling phase currents and is deter-
in DCM, the following desirable characteristics are obtained mined by simulation to be 10 .
GOPALARATHNAM AND TOLIYAT: NEW TOPOLOGY FOR UNIPOLAR BRUSHLESS DC MOTOR DRIVE 1401

Fig. 11. Operation with resistive load: (a) input voltage and current and (b) input, intermediate capacitor, and output voltages.

Fig. 12. Block diagram of the drive system.

Fig. 14. Speed response to step change in load torque at 0.3 s.

VI. SIMULATION AND EXPERIMENTAL RESULTS

The operation of the proposed topology has been verified both
by simulations and experiments. A block diagram of the drive
system implementation is shown in Fig. 12. The rotor position is
sensed by means of three hall sensors, and the position informa-
tion is used to determine the phase winding to be excited. The
motor speed is derived from the position inputs and is compared
with the speed reference to generate the current references. Hys-
teresis control is used to regulate the phase currents to the ref-
erence current waveforms of Fig. 6(b). The dc bus voltage is
regulated by PWM control of the switch .
The motor shaft is coupled to a hysteresis brake acting as a
Fig. 13. Speed reference and speed (rpm). load. The controller is implemented using a TMS320C240 DSP
1402
Fig. 15. (a) Input voltage and current waveforms, (b) input, output, and intermediate capacitor voltages, and (c) phase currents.
evaluation module board from Texas Instruments. It has two
built-in analog to digital converters (ADCs) with eight multi-
plexed channels each that are used for converting the analog sig-
nals from the current and voltage sensors into the digital values
required by the DSP. Hall-effect based current transducers are
used for the phase current sensing, and an isolation amplifier is
used to sense the output voltage. The inbuilt PWM outputs of
the DSP are used to derive the gate signals for the MOSFETs
used in the power converter. Opto-isolators are used to interface
the PWM outputs with the MOSFET gates. The commutation
sequence, current, voltage and speed control loops are imple-
mented in DSP software.
A PI controller ( and ) is used to com-
pare the reference and actual speed and generate the current ref-
erence. The resulting speed response is shown in Fig. 13, and
the speed response to a step change in load torque in Fig. 14.
The input current plotted in Fig. 15(a) is seen to follow the input
voltage waveform. Fig. 15(b) shows the intermediate capacitor
voltage waveform. In an ideal PFP, this would go to zero in
each half-cycle of the input voltage, but in this case, its min-
imum value is limited to the peak phase back-emf. This results
in some distortion of the input current around the zero-crossing
of the input voltage. The phase currents at 500 rpm are shown
in Fig. 15(c).
The experimentally obtained waveforms are shown in
Fig. 16. The unipolar operation of the motor is shown by the
current waveform of Fig. 16(a), which also shows the output
voltage. The intermediate capacitor voltage waveform is shown
in Fig. 16(b). As seen from Fig. 16(c), the input current follows
the input voltage waveform except around the zero-crossings.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 18, NO. 6, NOVEMBER 2003
The experimentally measured harmonics of the input current
are given in Table I. They are expressed as a percentage of
the fundamental current so that the data is independent of the
line voltage magnitude. The corresponding total harmonic dis-
tortion (THD) and power factor data are tabulated in Table II.
The performance improvement achieved by using the proposed
topology is evident. A high power factor is also achieved over
the entire speed range.
VII. CONCLUSION
A new converter topology based on a SEPIC converter op-
erating in DCM has been proposed for unipolar excitation of
brushless dc motors. The proposed scheme has the following
advantages.
1) The proposed converter uses only four controlled
switches, all of which are referenced to ground. This
considerably simplifies their gate drive circuitry and
results in low cost and compact packaging.
2) It is capable of bucking or boosting the available input
dc voltage to maximize the current-regulated operation of
the drive.
3) The input current naturally follows the input voltage to
a certain extent, reducing the amount of low-order har-
monics and resulting in a high power factor.
4) Eliminates the possibility of shoot-through faults which
could occur in bipolar converters.
5) Lower conduction and switching losses because of the
presence of only one switch and diode per phase as op-
posed to two in the bipolar case.
GOPALARATHNAM AND TOLIYAT: NEW TOPOLOGY FOR UNIPOLAR BRUSHLESS DC MOTOR DRIVE 1403

(a) (b)

(c)
Fig. 16. (a) Phase current (Trace 1) and output voltage (Trace 2), (b) input voltage (Trace 2) and Intermediate capacitor voltage (Trace 3), and (c) input voltage
(Trace 2) and input current (Trace 1).

TABLE I TABLE II
COMPARISON OF INPUT CURRENT HARMONICS AS A COMPARISON OF THD AND POWER FACTOR
PERCENTAGE OF THE FUNDAMENTAL

Simulation and experimental results have been reported to

verify the operation of the drive.
REFERENCES
[1] T. Kenjo and S. Nagamori, Permanent-Magnet and Brushless DC Mo-
tors. Oxford, U.K.: Clarendon Press, 1985.
[2] J. R. Hendershot Jr. and T. J. E. Miller, Design of Brushless Permanent
Magnet Motors. Hillsboro, OR: Magna Physics Publishing, 1994.
[3] R. Krishnan and S. Lee, PM Brushless dc motor drive with a new power
converter topology, in Proc. IEEE IAS Annu. Meeting, Oct. 1995, pp.
380387.
[4] R. Krishnan and P. Vijayraghavan, A new power converter topology for
PM Brushless dc motor drives, in Proc. IEEE IECON98 Conf., vol. 2,
1998, pp. 709714.
[5] R. Krishnan, A novel single switch per phase converter topology for
four-quadrant PM Brushless dc motor drive, in Proc. IEEE IAS Annu.
Meeting, vol. 1, Oct. 1996, pp. 311318.
1404
[6] J. Sebastin, M. Jaureguizar, and J. Uceda, An overview of power factor
correction in single-phase off-line power supply systems, in Proc. IEEE
IECON94 Conf., vol. 3, 1994, pp. 16881693.
[7] J. Skinner and T. A. Lipo, Input current shaping in Brushless dc motor
drives utilizing inverter current control, in Proc. 5th Intl. Conf. Elect.
Mach. Drives, 1991, pp. 121125.
[8] R. P. Massey and E. C. Snyder, High voltage single-ended dc-dc con-
verter, in Proc. IEEE PESC77 Conf., 1977, pp. 156159.
[9] D. S. L. Simonetti, J. Sebastin, and J. Uceda, The discontinuous con-
duction mode SEPIC and Cuk power factor preregulators: analysis and
design, IEEE Trans. Ind. Electron., vol. 44, pp. 630637, Oct. 1997.
[10] T. Gopalarathnam, S. Waikar, H. A. Toliyat, M. S. Arefeen, and J. C.
Moreira, Development of low-cost multi-phase Brushless dc (BLDC)
motors with unipolar current excitations, in Proc. IEEE IAS Annu.
Meeting, Oct. 1999, pp. 173179.
[11] J. Sebastin, J. Uceda, J. A. Cobos, J. Arau, and F. Aldana, Improving
power factor correction in distributed power supply systems using PWM
and ZCS-QR SEPIC topologies, in Proc. IEEE PESC91 Conf., 1991,
pp. 780791.
[12] F. S. Dos Reis, F. Antunes, J. Sebastin, and J. Uceda, Influence of the
control method in the PFP converter size, in Proc. ISIE97 Conf., 1997,
pp. 365370.
Tilak Gopalarathnam (M02) received the B.Tech.
degree in electronics and communications engi-
neering from the Indian Institute of Technology,
Madras, in 1996, the M.Tech. degree in electronics
design and technology from the Indian Institute of
Science, in 1998, and the Ph.D. degree in electrical
engineering from Texas A&M University, College
Station, in 2002.
He was an Intern with Delphi Automotive Systems
during the summer of 2000, and with ABB Industrie
AG during Summer 2001. He is currently with Powell
Power Electronics Co., Inc. His research interests include permanent magnet
motor drives, traction power systems, and power electronic applications in re-
newable energy systems.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 18, NO. 6, NOVEMBER 2003
Hamid A. Toliyat (S87M91SM96) received the
B.S, degree from Sharif University of Technology,
Tehran, Iran, in 1982, the M.S. degree from West Vir-
ginia University, Morgantown, in 1986, and the Ph.D.
degree from the University of Wisconsin, Madison, in
1991, all in electrical engineering.
Following receipt of the Ph.D. degree, he joined
the Faculty of Ferdowsi University of Mashhad,
Mashhad, Iran, as an Assistant Professor of elec-
trical engineering. In March 1994, he joined the
Department of Electrical Engineering, Texas A&M
University, where he is currently a Professor. His main research interests
and experience include multi-phase variable speed drives for traction and
propulsion applications, fault diagnosis of electric machinery, analysis and
design of electrical machines, and sensorless variable speed drives. He has
published over 190 technical papers in these fields.
Dr. Toliyat received the Texas A&M Select Young Investigator Award in
1999, the Eugene Webb Faculty Fellow Award in 2000, the Space Act Award
from NASA in 1999, the Schlumberger Foundation Technical Awards, in 2000
and 2001, and the 1996 IEEE Power Engineering Society Prize Paper Award. He
is a member of Sigma Xi and an Editor of the IEEE TRANSACTIONS ON ENERGY
CONVERSION. He is a member of the Editorial Board of the Electric Machines
and Power Systems Journal. He is also Vice-Chairman of IEEE-IAS Electric
Machines Committee.