Scripta - Mechatronical Project

UNIVERSITY OF PRISHTINA
FACULTY OF ELECTRICAL AND COMPUTER ENGINEERING
I I PR
TE T
SI IS
H
VE
TI
NS
UN I
SI S
UNIV
I EN
E RS
T IN
I
AS
T
IS H
ST U
DIO RUM PR
Mr.sc. Lavdim KURTAJ
Mechatronical Project
The development of the course in the frame of Master Studies Development Program,
is financed by the Austrian Development Cooperation through WUS-Austria, and co-
financed by the University of Prishtina
EXEMPLARS GRATIS
Implemented by
Zhvillimi i ksaj lnde msimore n kuadr t Programit pr Zhvillim t Studimeve

Master, sht financuar nga Bashkpunimi Austriak pr Zhvillim prmes WUS
Austria dhe ko-financuar nga Universiteti i Prishtins
EKZEMPLART FALAS
PRISHTINA
2011
2 Master Studies on Mechatronics - Course: Mechatronical Project
Master Studies on Mechatronics - Course: Mechatronical Project 3
________
Contents
________
Preface
Acknowledgments
Session 1: Microcomputer systems and interfacing

Week 1:
Course Introduction 8
Mechatronic System Examples 13
Week 2:
Electronic Control Unit (ECU) 26
Microcomputer Systems 28
8051 Microcontroller Development Board 30
Software Development and IDE 31
Hello World 32
Week 3:
8051 Hardware Summary 35
Instruction Types 45
Addressing Modes 49
MIDE Integrated Development Environment (IDE) 50
Editor 51
Assembler 52
Simulator 55
SDCC compiler 56
Week 4:
Internal hardware resources of 8051 microcontroller 58
Timer Operation 63
Serial Port Operation 71
Interrupts 75
Session 2: State-diagrams and programming of microcomputer system

Week 5:
Program structure and design 78
Sequential programming 80
Multiprogramming 81
Operating-Systems 82
Process concept 85
Scheduling 87
Interprocess communications 89
Process coordination 90
Events, states and state-diagrams. 91
Session 3: Input/Output programming and interfacing to physical signals

Week 6:
Interfacing to logical (on/off) sensors and actuators 95
Programmable Logic Controller 97
8051-based PLC 98
Input/Output Interface 102
Scan-Cycle 104
Ladder-diagram programming for PLC 105
DC-motor with limit switches. 106
Week 7:
Position/speed proportionality control with logical outputs 108
Interfacing to Step-Motors 109
Unipolar Drivers 110
Bipolar Drivers 111
Full- and Half-Step Drive 113
Interfacing Scanner Step-Motor and its Slotted Opto-Coupler 117
Week 8:
Analog Inputs and Analog Outputs 120
Analog/Digital and Digital/Analog Converters 122
Voltage references 126
Communication Waveforms and Bit-Banging I/O Bits and/or Ports 127
Analog Position and Speed Sensor Interfacing 128
Command Signal Generation 131
Week 9:
Unipolar and Bipolar Analog Signals 134
Number Representation 134
Introduction to QET (Quanser Engineer Training) Control Plant 135
Interfacing Parallel D/A of QET to 8051 Board 137
Linear Power Amplifiers and DC-Motor Drive 140
Week 10:
Interfacing Absolute and Incremental Encoders 142
Software Processing of Incremental Encoder Pulses 143
Special Dedicated Integrated Circuits for Counting Incremental
Encoder Pulses 150
Week 11:
Accepting/presenting Data from/to User 151
Human-Machine-Interface 153
Keyboard Interfacing and Programming 155
7-Segment Display Interfacing and Programming 156
LCD Interfacing and Programming 157
Control Performance of QET and PC Interface 158
Session 4: Real-time control

Week 12:
Closing the loop 159
Minimal real-time kernel for control applications 159
Simple first-order RC plant 160
Nonlinear Relay Controller 161
Proportional controller 161
Steady-State Errors 162
Analog vs. Digital Control 162
Week 13:
More Advanced Control Algorithms 164
Mathematical Calculations on Microcontroller Systems 164
Proportional-Integral (PI) Controllers 165
Proportional-Derivative (PD) Controllers 165
PID Controllers 166
Digital Controllers and Digital Filtering 166
Real-time Control with PC 166
Real-Time-Operating System (RTOS) 167
Hardware-in-the-Loop (HIL) 167
Rapid Prototyping 167
MATLAB/Simulink/WinCon System 167
Week 14:
Pulse Drives (Switch-Mode) 168
Pulse-Width-Modulation (PWM) 168
Thyristors, Triacs and Phase-Control Drives 169
Inverters and AC Motor Drives 171

Switch-Mode Drive for Step-Motors 172
Micro-Step Driving of Step-Motors 174
Levels of Interfacing Drives to Microcontroller Systems 176
Session 4: Networking, inter-unit communication and protocols

Week 15:
Distributed systems 177
Networks and Topologies 178
OSI layers 179
Smart Sensors, Smart Actuators, Sensor-Actuator-Networks 180
Protocols and Communication between Units 180
Industrial protocols 181
Master-Slave Network with MODBUS over Serial-Line Protocol 182
Appendices
A1: Ink-jet printer internals with part description 186
A2: PLC Example 187
A3: Closed-Loop A/D - K=2 - D/A with analog reference
(from on-board potentiometer or external input) 188
A4: MODBUS Slave for 8051 197
. 209
Session 1: Microcomputer Systems and Interfacing

Week 01
01.1 Course Introduction
MECHAnics + elecTRONICS
Definitions:
Yasakawa (1969):
The word, mechatronics, is compsed of mecha from mechanics and
the tronics from electronics. In other words, technologies and
developed products will be incorporating electronics more and more into
mechanisms, intimately and organically, and making it impossible to tell
where one ends and the other begins.
Harashima, Tomizuka, and Fukada (1996):

The synergistic integration of mechanical engineering, with electronics
and intelligent computer control in the design and manufacturing of
industrial products and processes.
Auslander and Kempf (1996):

Mechatronics is the application of complex decision making to the
operation of physical systems.
Shetty and Kolk (1997):

Mechatronics is a methodology used for the optimal design of
electromechanical products.
Bolton (1999):
A mechatronic system is not just a marriage of electrical and mechanical
systems and is more than just a control system; it is a complete
integration of all of them.
Some, of many, pictorial presentations:

Historical Development of Mechanical, Electrical, and Electronic

Systems:
The evolution of mechatronics:
Properties of Conventional and Mechatronic Design Systems:

MECHATRONICS is an interdisciplinary field:
- mechanical systems
- mechanical elements
- machines
- precision mechanics
- electronic systems
- microelectronics
- power electronics
- sensor and actuator technology
- information technology
- systems theory
- automation
- software engineering
- artificial intelligence
01.2 Mechatronic System Examples
Practically all mechanical devices that include electronic components and

some types of computer monitoring and control
Virtually every newly designed engineering product is a mechatronic system
Honda Robot - Asimo Industial Robot - Kuka KR-1000
Medical - Brilliance CT Military - BigDog

Rescue - Robot Education - Lego NXT
Research: Medical - Heartbeat Compensation Robot

Research - Wall Walking Robot
Military - UAV
Machines - CNC
Service - Robot-VacuumCleaner
Entertainment - Sony Aibo Education - SRV-1 Mobile Robot
Research, Education - Quad-Cam 3

Examples around us:
Xerox
Camera, Film-Scanner Ink-Jet Printer

And some with their internal parts that you can use to experiment
with:
HardDiskDrive-Exploded-Cutaway
Floppy-Disk-Drives
CD-ROM Drive
Floppy-Disk-Dive Internal Functional Components
Basic Laser Printer Components and Paper Path

InkJet Printers - DC-Motor Drive with Incremental Encoders
InkJet Printers - Stepper-Motor Drive

Flatbad Scanner
Laboratory Plants:
Examination:
Homework 10 points
Assignments
Lab work 10 points

On-class participation during lab project experiments development
Project idea 10 points

Team Project Proposal 10 points
Project Execution 40 points
Team Project Presentation 10 points
Project Web Site 10 points
Group class project
Literature:
1. Clarence W. de Silva, Mechatronics: A Foundation Course, CRC Press/ Taylor &

Francis Group, Boca Raton 2010.
2. Clarence W. de Silva, Sensors and Actuators: Control System Instrumentation,

CRC Press/ Taylor & Francis Group, Boca Raton, 2007.
3. I. Scott MacKenzie, Raphael C.-W. Phan, The 8051 Microcontroller (Fourth

Edition), Pearson Education, Inc., New Jersey, 2007.
4. Abraham Silberschatz, Peter B. Galvin, Greg Gagne, Operating System Concepts

(Eighth Edition), John Wiley & Sons (Asia) Pte Ltd, 2010
Datasheets and User Manuals will be used.

Assignment 1:
During two weeks students are expected to explore for different mechatronic
projects, and each student will submit one project idea individually that must
include following issues
- Sensing
- Actuating
- Real-time control
- Mechanical design
Working groups to be formed
Due: Week 3

Week 02
02.1 Electronic Control Unit (ECU)
Mechanical process and information processing develop towards mechatronic

systems.
Electronic Control Unit (ECU):

- Receives Inputs from system to be controlled (Analog, Digital)
- Processing of inputs and current state
- Generates Outputs as e result of Processing (Analog, Digital)
One example of ECU:
Processing inside ECU can be:

- Hardware only
- Analog Circuits (PID with Operation Amplifiers, etc.)
- Digital Interated Circuits (State/Stateless Applicatios)
- Combinations of Discrete Analog and Digital IC
- Programmable Logic Devices (PLD) (for simple applications)
- Complex Programmable Logic Devices (CPLD)
- Field Programmable Generic Array (FPGA)
- Hardware/Software
- Microprocessors
- Microcontrollers
- Digital Signal Processors (DSP)
ECU Implementation
- Dedicated Solution
- Single Board Computer
- PC Based
- PLC
02.2 Microcomputer Systems
General Blok-Diagram of Microcomputer System
Main Parts of a Microcomputer System:

- Microprocessor
- Program Memory (Usually some NV type: ROM, EPROM, etc.)
- Data Memory (RAM)
- Interface Circuitry for Input/Output (Digital, Analog, Networked)
- Data-Bus
- Address-Bus
- Control-Lines
- Additional Peripherals
Microcomputer Architecture
Microcomputer Development Board - Based on 8085-Microprocessor

02.3 8051 Microcontroller Development Board
Easy8051A Development Board
Development Board that will be used (mostly) during the Course:

- 8051-microcontroller Based
- On-Board USB Programmer (In-Circuit)
- LED-s on all Ports (4 x 8 LED)
- Push-Button Switches on all Ports (4 x 8 Switches)
- RS-232 Level Translators (MAX 232)
- 4 x 7-Segment LED Display
- LCD 2x16 (with 4-bit or 8-bit interface)
- Graphic LCD 128x64 pixels
- 4-Channel 12-bit A/D Converter
- 1-Channel 12-bit D/A Converter
- Voltage Reference 4.096V
- Access to all 4 Ports
02.4 Software Development and IDE
Product development cycle
Detailed steps in the development cycle

02.5 "Hello World"
Purpose of "Hello World" example is to show all development steps, from

system setup to program development, and basic, minimal, program structure.
For embedded microprocessor, or microcontroller, systems it is, usually, some
program for blinking an LED or showing some on/off combinations on LEDs.
Easy8051A development board will be used. It is based on Atmel
AT89S8253 microcontroller, member of 8051 family of microcontrollers. For
program development MIDE-51 IDE will be used. It's free and comes with
Assembler (ASEM-51), Simulator (JSIM-51), and SDCC Compiler (C
Compiler). Integrated environment is limited in code length, but components
can be installed and configured separately, and used without this limit.
Step 1:
Download interated environment MIDE from http://www.opcube.com/
and install. MIDE-51 icon will be created.
Step 2:
Installing Driver for USB programmer (CD of Easy8051A with
Drivers). 8051FLASH icon will be created.
Step 3:
Open 8051FLASH and under "Device" select AT89S8253, under
"Device Frequency [MHz]" select 8.0.
Step 4:
Connect Easy8051A board to USB port. Actions normal to connecting
new device to USB will happen and device should be recognised. When first
plugged green LED (POWER) should go on, after drivers are loaded yellow
LED (USB LINK) should go on too, signalling that communication has been
established.
Step 5:
Open MIDE-51 and start New document. Write following lines of
code:
Lines of code will be black. They will get colored after you save file with
known extension, *.a51.
Step 6:
Assemble code with Build->Build (or other equivalent methods). If
there are no errors, *.hex and *.lst files will be created.
Step 7:
Load *.hex on 8051FLASH, button "Load" under "FLASH".
Step 8:
Board programming is done with "Write" button of 8051FLASH. After
programmin board automatically goes in Run mode and program is executed.
Program writes binary value 10101010, or AA in hex, to Port 0. Result
should be seen on 8 LEDs of Port 0, with LED on if value of corresponding bit
is 0 and with LED off if value is 1:
P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0

off on off on off on off on
Step 9:
Experimenting with different vales (#00000000B - #11111111B) and
different ports (P0 - P3).
Note:
DIP switches 1-4 of SW2 must be ON (PORTx LEDs On, x=0, 1, 2, 3).

Week 03
03.1 8051 Hardware Summary
Features of generic 8051
- 4K bytes internal ROM

- 128 bytes internal RAM
- Four 8-bit I/O ports (P0 - P3).
- Two 16-bit timers/counters
- One serial interface
- On chip oscillator (external crystal)

- 6 interrupt sources (2 external, 3 internal, Reset)
- 64K external code (program) memory (only read) PSEN
- 64K external data memory (can be read and write) by RD,
WR
- Code memory is selectable by EA (internal or external)
- We may have External memory as data and code
- Boolean processor (operates on single bits)
- 4s multiply/divide
How it looks like.

Some members of 8051 Family

and Atmel AT89S8253 from Development Board
Compatible with MCS51 Products
12K Bytes of In-System Programmable (ISP) Flash Program Memory

SPI Serial Interface for Program Downloading
Endurance: 10,000 Write/Erase Cycles
2K Bytes EEPROM Data Memory

Endurance: 100,000 Write/Erase Cycles
64-byte User Signature Array

2.7V to 5.5V Operating Range
Fully Static Operation: 0 Hz to 24 MHz (in x1 and x2 Modes)
Three-level Program Memory Lock
256 x 8-bit Internal RAM
32 Programmable I/O Lines
Three 16-bit Timer/Counters
Nine Interrupt Sources
Enhanced UART Serial Port with Framing Error Detection and

Automatic Address Recognition
Enhanced SPI (Double Write/Read Buffered) Serial Interface
Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down Mode
Programmable Watchdog Timer
Dual Data Pointer
Power-off Flag
Flexible ISP Programming (Byte and Page Modes)

Page Mode: 64 Bytes/Page for Code Memory, 32 Bytes/Page for
Data Memory
Four-level Enhanced Interrupt Controller
Programmable and Fuseable x2 Clock Option

Internal Power-on Reset
Original 8051/8052 diagram
AT89S8253 Block Diagram

8051 Pin Configurations
Circuitry for I/O ports

8051 Memory Structure
Program Memory
- 64 K byte space
- Read Only
- Accessed with PSEN_ - when External
- EA_=1 uses available internal Program Memory
- EA_=0 uses external Program Memory
Internal Data Memory
- 128 bytes on 8051
- 128 bytes of Special Function Registers space
- some of them non-existent
- may be used by 8051 derivatives
- additional 128 bytes on 8052 compatibles
External Data Memory
- 64 K byte space
- Read or Write
- Accessed with RD_ (Read) and WR_ (Write) signals
Summary of the 8051 on-chip Data Memory
Note: - Numbers on small squares are Bit-addresses for Bit-

addressable locations.
- Empty locations on SFR space can be noticed.
An 8051 single-board computer - the SBC-51
- Oscillator components
- Reset circuit
- Latch for demultiplexing A7-A0 and D7-D0
- Serial RS232 level-translators
- Address decoding is done with B3 (74HC138 - 3/8 decoder) - active-low

- Two Program Memory 8Kbyte blocks - accessed with PSEN_
- One 8Kbyte block of RAM used as Program- or Data-Memory
- Overlapping of Program and Data spaces is done with B1
- Notice that two port (P0 and P2) are used for Address and Data Bus
- Additional I/O capabilities

- Mapped on Data-Memory space
- Power Supply filtering

03.2 Instruction Types
Data Transfer Instructions

- Internal RAM
- External RAM
- Program Memory
Arithmetic Instructions
Logical Instructions
Boolean Instructions
Jump Instructions
- Unconditional Instructions
- Conditional Instructions
03.3 Addressing Modes

03.4 MIDE Integrated Development Environment (IDE)
Feature on MIDE-51
Syntax highlighter on ASEM-51 reserved word & addition register on
selected device (devices listed on ASEM51/MCU folder)
Syntax highlighter on SDCC reserved word & MCS-51 standard
register
Support multi document workspace
Support standard editor feature and shortcut key such as Cut , Copy,
Paste, Find, Replace and Windows tile & cascade
Editor font style and size selectable
Save recent file(s) opened in list
Shortcut to ASEM-51 html manual
Shortcut to SDCC html & PDF manual (search file on SDCC/DOC)
Report assembler & compiler message
Support drag and drop file from explorer.
Automatic save last windows position.
Support wheel mouse
Bookmark code position upto 10
Show/Hide line number on editor
03.4.1 Editor
Step 1:
Start MIDE-51 by clicking MIDE-51 icon
Step 2:
Create New document from FileNew , or
from Toolbar group .
Step 3:
Save file with *.a51 (or *.asm), and lines of code will be colored when
syntax is recognized. Different color for each field of Assembly language
program.
03.4.2 Assembler
General format for each Assembly language program line is:
[label:] mnemonic [operand] [,operand] [.. .] [;comment]
Label Field
- label: - represents an address, ends with colon (:)
- symbol - may be addresses, data constants, etc.
- must begin with letter, question mark (?), or undersore (_)
- must follow by letter, number, question mark (?), or undersore (_)
- reserved words (mnemonics, operators, etc.) may not be used
In example below, PAR is a symbol and START is a label.
Mnemonic Field
- assembler directive - e.g., ORG, EQU, DB, etc.
- instruction mnemonic - e.g., MOV, ADD, DIV, INC, etc.
Operand Field
- follows the mnemonic field
- must begin on same line as the mnemonic field
- some operations have no operand (e.g., the RET instruction)
- multiple operands are separated by coma
Comment Field
- begins with semicolon (;)
- Remarks to clarify the program
Example below shows some correct lines.
8051 microcontroller starts executing instructions from address

0000H, and first instruction is usually procedded with
Assembler directive ORG. End of program lines is marked
with Assembler directive END, and no mnemonics are allowed
after this line.
ORG 0000H
*
*
*
program lines
*
*
*
END
Written program can be Assembled with BuildBuild
, or from Toolbar group .
If there are no errors, the message "no errors" is printed at Output message
window. It also prints that corresponding *.hex file is generated.
This file will be used for programming the microcontroller. Additional file
generated is the one with extension lst, *.lst.
*.hex file
*.lst file
03.4.3 Simulator
During development phase, programs can be run and tested, even without
hardware, on simulator. Simulator is very practical, since it is possible to see
all internal data and how they change. Programs can be executed instruction-
by-instruction (Single-Step) and check program flow.
Simulator can be started from MIDE with BuildBuild and Sim
, or from Toolbar group .
Simulator Screen
Areas shown by separate window are:

- Disassembled Code
- Registers
- SF Registers
- Internal RAM
- External RAM
03.4.4 SDCC Compiler
MIDE Pack comes with integrated C compiler:
SDCC : Small Device C Compiler
When Edited file is saved with *.C extension, coloring is done ccording to C
syntax. Building procedure is same as was with assembler.
MIDE with C source, and Output message that *.hex had been generated after
program Build.
One can always check assembler source generated after compilation, *.asm,
and corresponding *.lst file.
Using *.hex file for microcontroller programming and simulating is same

as with assembler source.
Presentation of project ideas (Assignment 1)

- short discussions
Lists of Working Groups
Assignment 2:
Discussion among group and selection of course group project.
Due: Week 5
Downloading and installing MIDE-51.

Working-out simple examples through editor-assembler-simulator cycle.
Due: Week 4

Week 04
04.1 Internal Hardware Resources of 8051 Microcontroller
- Four 8-bit I/O ports (P0 - P3).

- Two 16-bit timers/counters
- One serial interface
Circuitry for I/O ports

Writing "1" to Output pin P1.X
Writing "0" to Output pin P1.X
Note: - When "0" i written to a pin, transistor M1 shorts Py.x to

ground, and that pin can not be used as Input pin.
- To use pin as Input, "1" must be written to that pin.
Reading Input pin state
Hardware resources occupy Special Function Registers space:
Byte Bit Address Port

Address
***
***
B0 B7 B6 B5 B4 B3 B2 B1 B0 P3
***
***
A0 A7 A6 A5 A4 A3 A2 A1 A0 P2
***
***
90 97 96 95 94 93 92 91 90 P1
***
***
80 87 86 85 84 83 82 81 80 P0
Examples for Writing to Ports and Reading from Ports:
Ports can be referenced

- by Address - 80H, 90H, A0H, B0H
- MOV 90H,#0FH
- by predefined words - P0, P1, P2, P3
- MOV P0,#00001111B
Individual Port Bits can be referenced

- by Bit Address - 87H-80H, 97H-90H, ...
- CLR 0A6H
- by predefined words - P0.7-P0.0, P1.7-P1.0, ...
- SETB P2.6
Results of program execution on simulator:
Disassembled Code Window shows instructions of current program.

Highlighted line is current instruction to be executed, see also value of
Program Counter, "PC 0014". We can see addresses, machine codes and
assembly instructions.
At SF Reisters Window, contents of P0 to P3 can be seen. They have current

value, as result of instructions executed.
- Value "P0 0F" resulted from assembly instruction on line 9.

- Value "P1 0F" resulted from assembly instruction on line 10.
- Value "P2 4F" resulted from assembly instructions on lines 18 to 23.
- Value "P4 4F" resulted from assembly instruction on lines 31 and 32.
Content value of Accumulator is seen on Register Window, "ACC 4F",

and is result of execution of assembly instruction on line 31.
04.2 Timer Operation
Timer Mode Operation
Counter Mode Operation

Registers used in Timer/Counter
TMOD Register
TCON Register
Timer Unit: Modes of Operation (PERIPH CLOCK = OSC/2)

Timer Programming: Mode 1

Programming example:
Timer Programming: Mode 2

Note:
Counter
04.3 Serial Port Operation
RxD and TxD pins in the 8051

8051 to PC Communication
SCON Register
Schematics and Configuring the Development Board
SBUF - Serial Port Buffer Register

8051 Serial Port "ECHO" Example
Blocks of used program:

- Initialization of Serial Port and Timer 1, that is used as Baud
Rate Generator
- Input Character Subroutine
- Output Character Subroutine
- ECHO Received Character
- Get Received Character, if there are no Received Characters
Wait for one, and Transmit it Back to Sender
04.4 Interrupts
Steps in Executing an Interrupt
Interrupt Sources
Interrupt Vectors
ISRs and Main Program in 8051

Interrupt Enable Register (IE)
Enabling and Disabling an Interrupt
Priority of Interrupt may be assigned with Interrupt Priority

Register (IP).
- Location of Bits in IP is same as in IE.
Session 2: State Diagrams and Programming of

Microcomputer Systems
Week 05
05.1 Program Structure and Design
Good program requirements, beyond "it works":

- maintenance
- computer language
- quality of documentation
- development time
- program length
- execution time
- reliability
- security
Sructured programming
- technique for organizing and coding programs
- reduces complexity
- improves clearity
- fascilitates debugging and modifying
- all programs may be written using only three structures
- statements
- loops
- choices
- each structure has one entry point and one exit point
"Visual" tools for initial stage

- flowcharts
- pseudo-code
Common symbols for flowcharting
Decision block
Program flow arrow
Process block
Input block
Output block
Program terminator
Off-page connector
Pre-defined process
(subroutine)
05.1.1 Sequential Programming
If all instructions executed by Single-Processor System belong to

same process then it is pure Sequential Program.
- Almost all systems have other special-purpose processors
- disk, keyboard, graphics controller, ...
- system remains single-processor system
05.1.2 Multiprogramming
It is often useful to be able to do several things at once:
- when latency (responsiveness) is an issue

- when you want to parallelise your program
- when your program consists of a number of distributed parts
Implementations of concurrency
- shared memory
- multiprogramming (concurrency is simulated)
- time-sharing (or multitasking)
- multiprocessing (true parallelism as in distributed proc.)
- distributed processing
05.2 Operating Systems
Definition:
User and OS:

User and System View of OS:
So what does an OS do?

Operating System Facilities
Operative Environment for RTOS
- Scenario : A temperature monitoring chemical process.

- What we need : A supervisory program to raise an alarm when
temperature goes beyond a certain band.
- The desired sequence of operational events : Measure input
temperature, process the most recent measurement, perform an
output task.
05.2.1 Process Concept
What is a Process?
- A process is a program in execution.

- A process in execution needs resources like processing resource,
memory and IO resource..
- Imagine a program written in C
- After compilation we get an executable.
- If we now execute that executable, it becomes a process.
- A computer can have several processes running or active at any
given time.
- In case of multiple users on a system, all users share a common
processing resource.
Process States
Modeling Process States

05.2.2 Scheduling
- OS maintains process data in various queues.
- These queues advance based on scheduling policies

- First Come First Served.
- Shortest Job First
- Priority Based Scheduling
- Batch Processing.
- We also need to understand Preemptive and Non-Preemptive

operations.
- Note that each policy affects the performance of the overall

system.
- Scheduling policy depends on the nature of operations.
- An OS policy may be chosen to suit situations with specific

requirements.
- Within a computer system, we need policies to schedule access to

processor, memory, disc, IO and shared resource (e.g. printers).
- A scheduling policy is often determined by a machines

configuration and its pattern of usage.
- Scheduling is considered in the following context:

- We have only one processor in they system
- We have a multi-programming system more than one
ready-to-run program in memory.
- Scheduling will effect on the following quality parameters:

- Response time to users
- Turn around time
- Processor utilization
- Throughput of the system
- Fairness of allocation
- Effect on other resources.
- Measures for response time and turn around are user centered
parameters.
- Process utilization and throughput are system centered

considerations.
- Fairness of allocation and effect on other resources affect both

the system and users.
- An OS performance can be tuned by choosing an appropriate

scheduling policy.
05.2.3 Interprocess Communication
Processes executing concurrently in the operating system may be:
- independent processes
- cannot effect other processes
- cannot be effected by other processes
- does not share data with any process
- cooperating processes
- can effect other processes
- cant be effected by other processes
- shares data with other processes
Reasons for providing an environment that allow process cooperation:
- Information sharing
- Computation speedup
- Modularity
- Convenience
Fundamental models of InterProcess Communication (IPC) mechanisms:
- (b) shared memory

- (a) message passing
05.2.4 Process Coordination
Race condition
- several processes access and manipulate the same data concurrently
- guard against race condition is needed
- requirement for process synchronization
The Critical-Section Problem

- when one process is executing in its critical section, no other process
is to be allowed to execute in its critical section.
General structure of a typical process
Requirements for critical-section problem solution

- Mutual exclusion
- Progress
- Bounded waiting
- Peterson's Solution
- Synchronization Hardware
- lock
-Semaphores
- wait( )
-signal( )
- Monitors
- Atomic Transactions
- Deadlocks
05.3 Events, States, and State-Diagrams
Event-driven application
- Statless
- Stateful
- States
Actions
- Entry action
- During action
- Exit action
Transitions
- Events
- Conditions
Triggering state-diagrams
- Sampling
- Events
- One state-diagram to drive activity of another
Example of three-state process:

P0.1="L" / f_P1.2=4Hz
S00 / Inic
S01 S02
P0.2="L" / f_P1.1=2Hz
Function StateScan is called periodically (Sample). Frequency of sampling is

set by Timer 1 and value on register 38h. Register 38h serves as divide
counter.
After Reset, entry state is set by value on register p1_S. At this example, it is
state 0.
When all initializations are done, main ends up with dead loop, "Idle Process".
Each state has its row on tabproc1, 3-bytes for ljmp p1_Sxx and one for nop.
Every call of StateScan will switch to start address of current state, p1_S.
Transition Conditions i/j will be tested, one by one.
First one fulfilled will continue with Transition Actions:
- Exit Action i
- Entry Action j
State processing ends.
Multiprogramming is easily implemented by adding additional calls to

StateScans of other processes to t0isr:
t0isr: djnz 38h,t0_01

;Period n*250us
mov 38h,#4 ;Sample frquency of State-Diagram = 4000/4[Hz]
lcall StateScan_1 ;Process 1
t0_01: reti
Session 3: Input/Output Programming and Interfacing

to Physical Signals
Week 06
06.1 Interfacing to Logical (On/Off) Sensors and Actuators
Connecting small loads to microcontroller Port pins
This is usual connection for using port pins as current sink. Sinking is done by
internal transistor, and can sink several mA.
Source confiuration is not approprite for connectin loads, since internal pull-up
resistence tens to hundreds of kilooms.
For driving more powerful load, drivers are needed. We may use transistors or
Interated Circuits.
Driving Relay from microcontroller pin

Controlling Output state:
- Byte-wide: MOV Px,source (x=0, 1, 2 or 3 for Port 0, 1, 2 or 3)
- Bit-wide: MOV Px.b,C (C - Carry Flag)
Interfacing to mechanical contact inputs:
Contact bounce problem Solution: Debounce

- Software
- Hardware
Reading Input state:

- Byte-wide: MOV dest,Px (x=0, 1, 2 or 3 for Port 0, 1, 2 or 3)
- Bit-wide: MOV C,Px.b,C (C - Carry Flag)
06.2 Programmable Logic Controller (PLC)
PLC conceptual application diagram
PLC block diagram

06.3 8051-based PLC
Input interface circuit: 12 inputs

- galavanic isolation with opto-couplers
- hardware debounce (RC-74HC14)
- reading gates (2 x 74HC244)
- LED for input state indication
Realy outputs: 8 Relays

- SPDT
- LED for output state indication
- drivers (ULN2803)
- state LATCH with RESET
AT89C2051 microcontroller. Communication I/O waveforms are generated by

software.
Voltage regulator +5V (7805) for logic circuit and power-on RESET generator
(TL7705A).
PLC Board - Component side design.

View of finished PLC board
- microcontroller (AT89C2051) and RESET generator (TL7705A)

(white)
- input gates (2 x 74HC244) (pink)
- inverters with Schmitt Trigger input for input debounce (74HC14)
(cian)
- input stage with opto isolation, RC-filtering and green-LED
indication (red)
- output LATCH with RESET (74HC273) and relay drivers
(ULN2803) (green)
- SPDT Relays and red-LED indication (yellow)
- Voltage regulator +5V (7805) (orange)
06.3.1 Input/Output Interface
Block diagram of an AC/DC input circuit
Typical AC/DC input circuit
AC oputput block diagram

PLC output circuits
Connections for sourcing/sinking DC outputs

06.3.2 Scan-Cycle
PLC scan cycle
Illustration of a signal that will not be detected by a PLC during normal

scan
06.3.3 Ladder-Diagram Programming for PLC
IEC 1131-3 PLC programming standard
Graphical languages
- Ladder Diagrams (LD)
- Function Block Diagram (FBD)
Text-based languages
- Instruction List (IL)
- Structured Text (ST)
Sequential Function Charts (SFC)

- object-orinted programming
- organizational structure that coordinates LD, FBD, IL, and ST
- roots on Grafcet (IEC 848)
LOGO! program in ladder diagram
LOGO! program i function block diagram

06.4 DC-motor with Limit-Switches

Program is written to be in form similar to PLC programming scan-

cycle.
- First inputs are read and image of inputs is created (PII - bit-
addressable registers 24H and 25H).
- Program Scan block solves logic equations. It uses only copies of
input state from PII. Results are stored to image of outputs (PIQ -
bit-addressable register 28H).
- Output states from PIQ are written to Output LATCH.
- Processing of system functions may continue.

to Physical Signals
Week 07
07.1 Position/Speed Proportionality Control with Logical
Outputs
By using dynamic properties of systems, it is possible to create proportional

signals from logic outpus.
- Pulse Width Modulation (PWM)

- Pulse frequency modulation
When signals are filtered with appropriate low-pass filter, we will have
proportional analog signal. Not always we have to use filter, because most
processes used to control by nature have low-pass filtering properties.
Sometimes proportionality is created by construction with small number of

dicrete steps, and selection of active one is done with logical signals. Systems
of this type are for example speed control of elevator motor, speed control of
washing machine motor.
Special types of actuators are step-motors that are controlled by logical signals
and give as output proportional position.
In similar way we can control heating of electric heater by controlling number

of power supply periods that heater is on or off.
Flow proportionality may be contolled by a number of valves, whoes on/off

state is controlled by logical signals.
Low-Pass
Filter
07.2 Interfacing to Step-Motors
Types of Step-motors
Unipolar drive step-motor
Bipolar drive step-motor
Different wirings
07.3 Unipolar Drivers
Microcontroller must provide logical signals for driving each of

four transistors according to drive waveform.
07.3 Bipolar Drivers
For driving bipolar step-motor we need 2 full-bridges (8

transistors). Additional circuit is used for preventing short-
circuiting of power supply by simultaneous on condition of
upper and lower transistor on same leg.
For control we will need four outputs to control state of four
legs.
Block diagram of integrated circuit L298: Dual full-bride driver
Microcontroller can be directly connected to inputs of L298, In1, In2, EnA,

In3, In4, EnB, or through additional interface circuit L297, which can generate
control sequences:
Two Phase Bipolar Stepper Motor Circuit - L297/L298

07.4 Full- and Half-Step Drive
Stepper Motor Drive Modes:

- Wave-Drive - One phase energized at any instant
- Full-Step Drive - Two phases energized at any instant
- Half-Step Drive - One then two phases, everyother-step
- Micro-stepping - Continuously varying current between phases
- Brushless DC Motor - Closed-loop controlled special case.
Half-step mode
Full-step mode (normal drive mode)

Wave-drive
Application example for unipolar drive with 3-step current control

STK6713BMK Internal Circuit and basic wiring
STK6713BMK4 Application Circuit

STK6713BMK4 Drive
07.5 Interfacing Scanner Step-Motor and its Slotted Opto-

Coupler
Scanner head is drived by unipolar step-motor. Integrated circuit ULN2803, 8

darlington transistors, is used for driving step-motor.
For driving we used 4 transistors.
Head position is detected with slotted opto-coupler.
Four control signals are connected to P1.7, P1.6, P1.5 and P1.4.
Sensor state is read at P1.0.
Source code of test software for Half-Step drive

;*******************************************
;
; Half-step drive
;
;*******************************************
org 0
;unipolar Step-motor control signals

sma equ p1.7
smac equ p1.6
smb equ p1.5
smbc equ p1.4
mov p1,#00000001b
loop:
mov p0,p1
setb sma
lcall delay
setb smb
lcall delay
clr sma
lcall delay
setb smac
lcall delay
clr smb
lcall delay
setb smbc
lcall delay
clr smac
lcall delay
setb sma
lcall delay
clr smbc
sjmp loop
delay: mov r5,#5

loop5: mov r6,#200
loop6: mov r7,#250
loop7: djnz r7,loop7
djnz r6,loop6
djnz r5,loop5
ret
end

to Physical Signals
Week 08
08.1 Analog Inputs and Analog Outputs
Development board is equiped with 4 analog inputs and 1 analog output,

each with input range 0-5 V / 0-4.095 V, and 12 bit resolution.
Analo input section
DIP switches SW1 must be set according to the figure in oder to use analog
inputs. They connect control lines of analog-to-digital converter (A/D) with
I/O port lines of microcontroller.
Potentiometer P3 can be used as analog sinal source for testin purpose.

Channel that will receive signal can be set by jumper J12, and this channel
must not be used as input through connector CN14.
Analog output section
Signals SPI-SCK and SPI-MOSI are the same for A/D and D/A.
4.096 V voltage reference for A/D and D/A

08.2 Analog/Digital and Digital/Analog Converters
A/D used on development board is MCP3204

- 12-bit resolution
- SAR architecture
- SPI serial interface
- 4 channel
MCP3204 functional block diagram
Communication with MCP3204

Configuration bits for the MCP3204
Pin configuration
D/A used on development board is MCP4921

- 12-bit resolution
- SPI serial interface
- 1 channel
- voltage output
MCP4921/MCP4922 block diagram
Pin configuration
Write command register
Write command
08.3 Voltage References
MCP1541 application circuit - 4.096 V

08.4 Communication Waveforms and Bit-Banging I/O Bits

and/or Ports
and program would be:
CLR P1.0
CLR P1.2
SETB P1.1
CLR P1.1
SETB P1.2
SETB P1.1
CLR P1.1
time specification must be fulfilled
tCSSR = 2 cycles = 2s > 40 ns

tSU = 1 cycle = 1 s > 15 ns
tHD = 2 cycle = 2 s > 10 ns.
08.5 Analog Position and Speed Sensor Interfacing
VTG
TG
GND
Potentiometer and tacho-generator
Example for reading analog value and showing it on P0 (MSD)

and P2 (LSD)
org 0
clk equ p1.7

sdo equ p1.6
sdi equ p1.5
cs equ p3.5
Loop:
clr cs
clr clk
setb sdi ;bit0 - Start

setb clk
clr clk
setb sdi ;bit1 - SGL

setb clk
clr clk
clr sdi ;bit2 - D2

setb clk
clr clk
clr sdi ;bit3 - D1

setb clk
clr clk
setb sdi ;bit4 - D0

setb clk
clr clk
setb clk
clr clk
mov c,sdo ;bit5 - Null Bit

cpl c
mov p0.4,c
setb clk
clr clk
mov c,sdo ;bit6 - B11

cpl c
mov p0.3,c
setb clk
clr clk

cpl c
mov p0.2,c
setb clk
clr clk

cpl c
mov p0.1,c
setb clk
clr clk

cpl c
mov p0.0,c
setb clk
clr clk

cpl c
mov p2.7,c
setb clk
clr clk

cpl c
mov p2.6,c
setb clk
clr clk

cpl c
mov p2.5,c
setb clk
clr clk

cpl c
mov p2.4,c
setb clk
clr clk

cpl c
mov p2.3,c
setb clk
clr clk

cpl c
mov p2.2,c
setb clk
clr clk

cpl c
mov p2.1,c
setb clk
clr clk

cpl c
mov p2.0,c
setb clk
;clr clk
setb cs
nop
nop
nop
nop
LJMP Loop
end
08.6 Command Signal Generation
Generating any form of voltage can be done by calling

sequentially subroutine for writing to D/A.
Example for writing analog value to D/A

org 0
clk equ p1.7

sdi equ p1.5
cs equ p3.4
DAh equ 31h

DAl equ 30h
Loop:
mov DAh,#01111000b
mov DAl,#00000000b
clr cs
clr clk
mov a,DAh
;clr sdi ;bit0 - A/B

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit1 - BUF

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit2 - GAIN

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit3 - SHDN

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit4 - D11

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit5 - D10

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit6 - D9

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit7 - D8

rlc a
mov sdi,c
setb clk
clr clk
mov a,DAl
;clr sdi ;bit8 - D7

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit9 - D6

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
;clr clk
setb cs
SJMP Loop
end

to Physical Signals
Week 09
09.1 Unipolar and Bipolar Analog Signals
The maximum (Vmax) and minimum (Vmin) voltages are a function of the
control hardware. Some of standard ranges are:
0V to 5V
0V to 10V
-2.5V to 2.5V
-5V to 5V
-10V to 10V
It is possible to switch from one to the other by scaling and offsetting. It is

usually done by hardware, using operational amplifiers.
09.2 Number Representation
Computer represent all numbers, other than integers and some fractions
with imprecision.
Numbers are stored in some approximation which can be represented
by a fixed number of bits or bytes.
There are different types of representations or data types.
Data types vary in number of bits used (word length) and
representation - fixed point (int or long) or floating point (float or
double) format.
- Fixed point Integer Representation

- Floating point Representation
- IEEE Standard 754
09.3 Introduction to QET (Quanser Engineer Training)

Control Plant
Photograph of the QET DC Motor Control Trainer (DCMCT)
External connections
DCMCT schematic
The experiments:
- Modeling
- Speed control
- Robustness
- Position control
- Haptic interaction
09.4 Interfacing Parallel D/A of QET to 8051 Board
Signals on microcontroller interface connector
Decoder and control signals for D/A (MAX530)
Interfacing with 8051 microcontroller

MAX530 functional diagram
MAX530 input latch addressing

Example for writing analog value to QET D/A

QETDbus equ p2
QETwr equ p3.7
QETrd equ p3.6
switch equ p3.5
A0 equ p1.4
A1 equ p1.5
A0_139 equ p1.6
A1_139 equ p1.7
QET:
mov 50h,#0
QETloop:
mov r5,#50
Qloop5: mov r6,#100
Qloop6: mov r7,#100
Qloop7: djnz r7,Qloop7
djnz r6,Qloop6
djnz r5,Qloop5
cpl p3.4
mov QETDbus,#00000000b ;NBM NBL

clr A0
clr A1
clr A0_139 ;CS DA - MAX530
setb A1_139 ;
clr QETwr
;nop
;nop
setb QETwr
mov QETDbus,50h ;#11111111b ;NBH
setb A0
setb A1
clr QETwr
;nop
;nop
setb QETwr
clr A0_139 ;CS DA - MAX530

clr A1_139 ;
;clr switch
inc 50h
ljmp QETloop
ret
09.5 Linear Power Amplifiers and DC-Motor Drive
Quanser UPM xx-yy Schematic
Quanser UPM connection

Apex PA03 linear power amplifier - typical application


to Physical Signals
Week 10
10.1 Interfacing Absolute and Incremental Encoders
Incremental encoder connected to 8051 development board
Linear incremental encoder

10.2 Software Processing of Incremental Encoder Pulses
Quadrature clock, A, B and Index input
Example of software processing of incremental encoder pulses,

with digital filtering and displaying
p1_gj equ 37h

p2_gj equ 36h
p2old equ 35h

p2new equ 34h
ADB equ 27h

BDB equ 28h
encB0 equ 40h

encB1 equ 41h
encB2 equ 42h
encB3 equ 43h
org 0
ljmp main
org 000bh
ljmp t0isr

;koha n*250us
mov 38h,#5
lcall dispscan
t0_01:
lcall encscan
reti
main: mov tmod,#02h

mov th0,#-167
setb tr0
mov ie,#82h
mov p1_gj,#0
mov p2_gj,#0
mov p2old,#0
mov p2new,#0
mov 30h,#0 ;#00111111b ;0 ne disp0

mov 31h,#0 ;#00000110b ;1 ne disp1
mov 32h,#0 ;#01011011b ;2 ne disp2
mov 33h,#0 ;#01001111b ;3 ne disp3
mov encB0,#0 ;0 ne disp0

clr p2.7
loop:
mov a,encB0
lcall n_to_7seg
mov 30h,a
mov a,encB1
lcall n_to_7seg
mov 31h,a
mov a,encB2
lcall n_to_7seg
mov 32h,a
mov a,encB3
lcall n_to_7seg
mov 33h,a
sjmp loop
delay25:
mov r5,#1
loop5: mov r6,#4
loop6: mov r7,#250
djnz r6,loop6
djnz r5,loop5
ret
dispscan:
mov a,p1_gj
rl a
rl a
mov dptr,#tabproc1
jmp @a+dptr
tabproc1:
ljmp p1_gj00
nop
ljmp p1_gj01
nop
ljmp p1_gj02
nop
ljmp p1_gj03
nop
p1_gj00:
anl p1,#11110000b
mov p0,30h ;#00111111b ;0 ne disp0
setb p1.0
mov p1_gj,#1
ljmp p1_end
p1_gj01:
anl p1,#11110000b
mov p0,31h ;#00000110b ;1 ne disp1
setb p1.1
mov p1_gj,#2
ljmp p1_end
p1_gj02:
anl p1,#11110000b
mov p0,32h ;#01011011b ;2 ne disp2
setb p1.2
mov p1_gj,#3
ljmp p1_end
p1_gj03:
anl p1,#11110000b
mov p0,33h ;#01001111b ;3 ne disp3
setb p1.3
mov p1_gj,#0
ljmp p1_end
p1_end:
ret
encscan:
;ENC AB Filter
mov 20h,p2
mov c,20h.1 ;encA
mov a,ADB
rrc a
mov ADB,a
anl a,#01110000b
cjne a,#01110000b,anot1
;A=1
setb 21h.0
sjmp aend
anot1: cjne a,#00000000b,anot0
;A=0
clr 21h.0
anot0:
aend:
mov c,20h.2 ;encB
mov a,BDB
rrc a
mov BDB,a
anl a,#01110000b
cjne a,#01110000b,bnot1
;B=1
setb 21h.1
sjmp bend
bnot1: cjne a,#00000000b,bnot0
;B=0
clr 21h.1
bnot0:
bend:
;ENC Finite State Machine
;mov a,p2
;anl a,#00000110b
;rr a
mov a,21h
anl a,#00000011b
mov p2new,a
mov a,p2old
rl a
rl a
orl a,p2new
mov p2old,p2new
; mov a,#0
;mov a,p2_gj
rl a
rl a
mov dptr,#tabproc2
jmp @a+dptr
tabproc2:
ljmp p2_gj00
nop
ljmp p2_gj01
nop
ljmp p2_gj02
nop
ljmp p2_gj03
nop
ljmp p2_gj04
nop
ljmp p2_gj05
nop
ljmp p2_gj06
nop
ljmp p2_gj07
nop
ljmp p2_gj08
nop
ljmp p2_gj09
nop
ljmp p2_gj10
nop
ljmp p2_gj11
nop
ljmp p2_gj12
nop
ljmp p2_gj13
nop
ljmp p2_gj14
nop
ljmp p2_gj15
nop
p2_gj00:
ljmp p2_end
p2_gj01:
;dec p3
lcall encdec
ljmp p2_end
p2_gj02:
;inc p3
lcall encinc
ljmp p2_end
p2_gj03:
cpl p1.7
ljmp p2_end
p2_gj04:
;inc p3
lcall encinc
ljmp p2_end
p2_gj05:
ljmp p2_end
p2_gj06:
cpl p1.7
ljmp p2_end
p2_gj07:
;dec p3
lcall encdec
ljmp p2_end
p2_gj08:
;dec p3
lcall encdec
ljmp p2_end
p2_gj09:
cpl p1.7
ljmp p2_end
p2_gj10:
ljmp p2_end
p2_gj11:
;inc p3
lcall encinc
ljmp p2_end
p2_gj12:
cpl p1.7
ljmp p2_end
p2_gj13:
;inc p3
lcall encinc
ljmp p2_end
p2_gj14:
;dec p3
lcall encdec
ljmp p2_end
p2_gj15:
ljmp p2_end
p2_end:
ret
encinc:
inc encB0
mov a,encB0
cjne a,#10,eiend
mov encB0,#0
inc encB1
mov a,encB1
cjne a,#10,eiend
mov encB1,#0
inc encB2
mov a,encB2
cjne a,#10,eiend
mov encB2,#0
inc encB3
mov a,encB3
cjne a,#10,eiend
mov encB3,#0
eiend:
ret
encdec:
dec encB0
mov a,encB0
cjne a,#0ffH,edend
mov encB0,#9
dec encB1
mov a,encB1
cjne a,#0ffH,edend
mov encB1,#9
dec encB2
mov a,encB2
cjne a,#0ffH,edend
mov encB2,#9
dec encB3
mov a,encB3
cjne a,#0ffH,edend
mov encB3,#9
edend:
ret
n_to_7seg:
inc a
movc a,@a+pc
ret
n7segtab:
db 00111111b ;0
db 00000110b ;1
db 01011011b ;2
db 01001111b ;3
db 01100110b ;4
db 01101101b ;5
db 01111100b ;6
db 00000111b ;7
db 01111111b ;8
db 01100111b ;9
sjmp $
end
10.3 Special Dedicated Integrated Circuits for Counting

Incremental Encoder Pulses
Single axis block diagram (1/2 LS7266)

Session 3: Input/Output Programming and Interfacing to

Physical Signals
Week 11
11.1 Accepting/Presenting Data from/to User
Pushbutton switches
and more organized keys, and a mouse

Port LEDs
and some more organized Graphic LCD 128x64

11.2 Human-Machine-Interface (HMI)
These allow control systems to be much more interactive than before.
The basic purpose of an HMI is to allow easy graphical interface with a

process.
These devices have been known by a number of names,

- touch screens
- displays
- Man Machine Interface (MMI)
- Human Machine Interface (HMI)
These allow an operator to use simple displays to determine machine

condition and make simple settings.
The most common uses are,

- display machine faults
- display machine status
- allow the operator to start and stop cycles
- monitor part counts
These devices allow certain advantages such as,

- color coding allows for easy identification (eg. red for trouble)
- pictures/icons allow fast recognition
- use of pictures eases problems of illiteracy
- screen can be changed to allow different levels of information and
access
The general implementation steps are,

1. Layout screens on PC based software.
2. Download the screens to the HMI unit.
3. Connect the unit to a PLC.
4. Read and write to the HMI using PLC memory locations to get input
and update screens.
To control the HMI from a PLC the user inputs set bits in the PLC memory,
and other bits in the PLC memory can be set to turn on/off items on the HMI
screen.
Examples of HMI screens

11.3 Keyboard Interfacing and Programming
For keyboard with individual connection of single switch to input line

programming is simply reading the state of corresponding bit
MOV dest,Px
MOV C,Px.b
or testing its state
JB Px.b,rel
JNB Px.b,rel
For matrix organization, scanning procedure is applied.
11.4 7-Segment Display Interfacing and Programming
Iterfacing to 7-segment displays
Code illustration of principles of display multiplexing

org 0
loop:
anl p1,#11110000b
mov p0,#00111111b ;0 ne disp0
setb p1.0
lcall delay25
anl p1,#11110000b
mov p0,#00000110b ;1 ne disp1
setb p1.1
lcall delay25
anl p1,#11110000b
mov p0,#01011011b ;2 ne disp2
setb p1.2
lcall delay25
anl p1,#11110000b
mov p0,#01001111b ;3 ne disp3
setb p1.3
lcall delay25
sjmp loop
delay25:
mov r5,#1
loop5: mov r6,#4
loop6: mov r7,#250
djnz r6,loop6
djnz r5,loop5
ret
end
11.5 LCD Interfacing and Programming
Interfacing to LCD 2x16 in 8-bit mode

11.6 Control Performance of QET and PC Interface
Screen capture of the QICii software
Ball and Beam module of the QICii software

Session 4: Real-time Control

Week 12
12.1 Closing the loop
Digital controller with microcontroller implementation
12.2 Minimal Real-time Kernel for Control Applications
org 0
ljmp main
org 000bh
ljmp t0isr

;Sample time start n*250us
mov 38h,#10
;Digital Controller
LCALL ADC
LCALL Controller
LCALL DAC
LCALL Ready4NextT
t0_01: reti
main: mov tmod,#02h

mov th0,#-167
setb tr0
mov ie,#82h
loop: ;
;Non critical processes
;
sjmp loop
end
12.3 Simple First-Order RC Plant
1
G C s
1 sRC
12.4 Nonlinear Relay Controller
12.5 Proportional Controller
U(z) = K E(z)
Code for implementing proportional controller
MOV R2,35H ; R2 <-- P L

MOV 71H,36H ; 71H <-- P H
MOV R7,46H ; R7 <-- e(n) L

MOV R6,47H ; R6 <-- e(n) H
LCALL MULREC ; R5_R4 <== 71H_R2 * R6_R7
MOV R7,04H ; R7 = R4
MOV R6,05H ; R6 = R5
MOV 48H,R4 ; TEMP L

MOV 49H,R5 ; TEMP H
12.5.1 Steady-State Errors
ess = rss - yss
- for Type 0 systems
1
ess
1 K
12.5.2 Analog vs. Digital Control

Assignment 3:
Research dhe internet for CNC with step-motors with PC parallel-port

interface.
Select one system and write short paper about hardware construction, types of
step-motors, elekctronics for step-motor drive, and for control software. What
types of data format if can accept?
Due: Week 13

Week 13
13.1 More Advanced Control Algorithms
For any controller
we be write its linear difference equation
and it may be implemented by microcontroller system.
13.2 Mathematical Calculations on Microcontroller Systems
Mathematical functions needed for implementing any digital controller

- multiplication
- addition
- subtraction
- software implementation
- hardware implementation (DSP, pentium)
13.3 Proportional-Integral (PI) Controllers
t
1
u t K P et et dt
Ti 0
13.4 Proportional-Derivative (PD) Controllers
det
u t K P et Td
dt
13.5 PID Controllers
t
1 det
u t K P et et dt Td
Ti 0 dt
K PT
u kT u kT T K P ekT ekT T ekT
TI
K P TD
ekT 2ekT T ekT 2T
T
13.6 Digital Controllers and Digital Filtering
- Digital Controllers: Gc(z)
- Digital Filters: Gf(z-1)
13.7 Real-time Control with PC
- DOS
- Real Time Linx
- Real Time Operating Systems

- stand-alone
- concurrently with Windows
13.7.1 Real-Time-Operating Systems (RTOS)
- QuaRC
13.7.2 Hardware-in-the-Loop (HIL)

Testing control systems with real process.
13.7.3 Rapid Prototyping

Development system generates directly code for controller.
13.8 MATLAB/Simulink/QuaRC System

Hardware-in-the-Loop
Rapid Prototyping

Week 14
14.1 Pulse Drives (Switch-Mode)
- Bipolar transistors
- MOSFETs
- IGBTs
- Thyristors
- Triacs
- State on (saturation)
- State off
- Power losses on switching element very low compared to linear mode
14.2 Pulse-Width-Modulation (PWM)
A pulse-width modulated waveform is used to create an average voltage and

an average current equal to the nominal voltage and current for the winding.
Current and supply voltage for PWM control

Generating PWM signal from analog signal
14.3 Thyristors, Triacs and Phase-Control Drives
Synchronos time-proportional control

Phase-control - resistive loads
Half wave control

Full wave control
14.4 Inverters and AC Motor Drives

14.5 Switch-Mode Drives for Step-Motors
Current limiting
Stepping motors are often run at voltages higher than their rated voltage.
Although this is not necessarily the case for very small stepper motors, high
torque stepper motors need to run at higher voltages in order for the motor to
reach its full potential. Increasing the voltage supplied to a motor increases the
rate at which current rises in the windings of the motor. The more responsive
current in the windings, the greater the torque and speed characteristics of the
motor.
Chopper Control
Chopper control is a way to limit the current in the winding of a stepping
motor when using a high voltage supply (a voltage higher than a motors rated
voltage). This method is very suitable when using a microcontroller for
stepping motor control because limited additional microcontroller resources
are required. The basic idea behind chopper control is to use a high voltage
source to bring the current in the winding of a stepping motor up to IMAX
very quickly. When IMAX is reached the voltage is chopped or switched off.
Current Limiting For Microstepping

Current limiting is an integral part of microstepping. Microstepping varies the
current sinusoidally between 0 and IMAX, rather than bringing the current up
to IMAX as quickly as possible. Microstepping can be combined with the high
voltage supply current limiting techniques talked about in this section in order
to improve the responsiveness of a motor when microstepping. When
microstepping at a high voltage, the duty cycle of waveforms modulating each
of the windings must be limited so that the current in the windings never
exceeds IMAX. For instance, if a 5V stepping motor is being driven by a 10V
peak-to-peak waveform, the duty cycle of the waveform should never exceed
50%. With reference to Figure 22, microstepping could be mplemented by
deriving VCONTROL from the output of a digital-to-analog converter in the
controller; some motor driver chips even include 3-bit internal DACs along
with the comparator and final-stage drive circuitry.
CHOPPER CIRCUIT
Low performance stepper motors are purposefully built with a high internal
resistance so that they can be run on a typical voltage source, usually 5V to
12V. These motors do not produce much torque for their size, nor do they spin
very fast. They can be run without current limiting considerations as long as
they are driven at their rated voltage. However, higher motor performance
(speed and torque) can be achieved by running these motors at higher voltages.
High torque stepping motors are a different story all together. These motors
have very small internal resistances and run at high currents. An example of a
high performance motor would be a motor with the specifications shown in
Table. The statement of holding torque in Table is typical of many motor
manufacturers, using kilograms as a measure of force. This must be converted
to dyne-centimeters or newtonmeters before doing any physical calculations.
SLA7024M and SLA7026M
14.6 Micro-Step Driving for Step-Motors
Single stepping a motor results in jerky movements of the motor, especially at

lower speeds. Microstepping is used to achieve increased step resolution and
smoother transitions between steps. In most applications, microstepping
increases system performance while limiting noise and resonance problems.
Microstepping works on the principle of gradually transferring current from
one winding to another. This is achieved by pulse-width modulating the
voltage across the windings of a motor. The duty cycle of the signal charging
one winding is decreased as the duty cycle of the signal charging the next
winding is increased.
In order to understand the fundamentals of microstepping, its necessary to
look at the torque exerted by a stepper motor as it turns. Figure 10 shows a
graph of torque verses rotor position for an ideal two-winding stepper motor.
Note the sinusoidal shape of the waveforms; in real motors, these waveforms
will only be approximately sinusoidal, and the sum of the torques from the two
windings will not be the perfect arithmetic sum of the torques with just one or
the other winding powered.
The desired motion of a stepper motor is linear. This means the steps should
be equal in size with no noticeable acceleration or deceleration of the shaft as
the motor turns. Good microstepping implementations strive to get as near to
this linear motion as possible.
In an ideal motor, microstepping can be used to achieve arbitrarily fine angular

resolution, but in practice friction and departures from the ideal sinusoidal
torque versus shaft angle curve make this impractical. In practice, it is rarely
worthwhile to subdivide each motor step into more than 32 microsteps, and
even this is generous! Using 32 microsteps per step, we can step in increments
of 0.23 degrees using an inexpensive permanent magnet motor with 7.5
degrees per step. We could achieve the same resolution using 1:32 reduction
gearing, but this introduces backlash and it reduces the maximum speed.
Compared to microstepping, gearing has the benefit of increasing the torque
and position-holding stiffness of the motor.
It is impractical to calculate the sine or cosine of the duty cycle for the PWM
signal supplying a winding because the time to process the calculation and
code space needed. Its more practical to have a sine lookup table with the
values for the duty cycle. In practice, only one look-up table is needed because
cosine is just an offset of sine. The look-up table pointers corresponding to
each winding just need to be offset by 90 degrees.
A3967SLB a complete micro-stepping driver with buit-in translator
14.7 Levels of Interfacing Drives to Microcontroller Systems
Microstepping using DSP

Session 5: Networking, Inter-Unit Communication and

Protocols
Week 15
15.1 Distributed Systems
Large network using many different topologies

15.2 Networks and Topologies
Star topology
Common bus topology
Master/slave bus topology

Ring topology
15.3 OSI Layers
OSI reference model

15.4 Smart-Sensors, Smart-Actuators, Sensor-Actuator-

Networks
Fieldbus network
15.5 Protocols and Communication between Units

15.6 Industrial Protocols
Network and protocol standards

15.6 Master-Slave Network with MODBUS over Serial-Line

Protocol
Serial communication interface on development board
Serial bus infrastructure

Master state diagram
Slave state diagram
MODBUS - Master/Slave
- RTU (Remote Terminal Unit)
- ASCII (American Standard Code for Information Interchange)
RTU message frame

MODBUS Master implemented on Visual Basic
MODBUS Master - Application
MODBUS Slave is implemented on 8051 microcontroller

systems. Code is given in appendix A3.
Appendices
A1: Ink-jet printer internals with part description

A2: PLC Example

ORG 0000H
LJMP MAIN
ORG 0030H
MAIN: MOV 24H,#00H ;PII
MOV 25H,#00H ;
MOV 28H,#00H ;PIQ
CycleBeg:
;Read Inputs -> PII
CLR P3.4
MOV 24H,P1
SETB P3.4
CLR P3.5
MOV 25H,P1
SETB P3.5
;Program Scan
MOV C,24H.0
ORL C,28H.0
ANL C,/24H.1
ANL C,/24H.4
ORL C,24H.2
MOV 28H.0,C
;Write Outputs <- PIQ

MOV P1,28H
CLR P3.3
SETB P3.3
MOV P1,#0FFH
;System functions
LJMP CycleBeg
END
A3: Closed Loop A/D - K=2 - D/A with analog reference (from
on-board potentiometer or external input)
org 0
clk equ p1.7

sdo equ p1.6
sdi equ p1.5
cs equ p3.5
csDA equ p3.4
DAh equ 31h

DAl equ 30h
ADh0 equ 41h

ADl0 equ 40h
ADh1 equ 43h
ADl1 equ 42h
ADh2 equ 45h
ADl2 equ 44h
ADh3 equ 47h
ADl3 equ 46h
REFh equ 35h

REFl equ 34h
Loop:
;mov REFh,#00001000b
;mov REFl,#00000000b
mov REFh,ADh2
mov REFl,ADl2
clr c
mov a,REFl
subb a,ADl3
mov DAl,a
mov a,REFh
subb a,ADh3
mov DAh,a
jnc anneg
mov DAh,#00000000b
mov DAl,#00000000b
sjmp apos
anneg: clr c
mov a,DAl
rlc a
mov DAl,a
mov a,DAh
rlc a
mov DAh,a
mov a,DAh
anl a,#11110000b
jz apos
mov DAh,#00001111b
mov DAl,#11111111b
apos:
;mov DAh,#01111000b
;mov DAl,#00100000b
mov a,DAh
cpl a
mov p0,a
mov a,DAl
cpl a
mov p2,a
mov a,DAh
anl a,#00001111b
orl a,#01110000b
clr csDA
clr clk
;mov a,DAh
;clr sdi ;bit0 - A/B

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit1 - BUF

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit2 - GAIN

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit3 - SHDN

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit6 - D9

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit7 - D8

rlc a
mov sdi,c
setb clk
clr clk
mov a,DAl
;clr sdi ;bit8 - D7

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit9 - D6

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
;clr clk
setb csDA
nop
nop
nop
nop
mov A,#11011000b ;CH3
clr cs
clr clk
;setb sdi ;bit0 - Start

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit1 - SGL

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit2 - D2

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk
setb clk
clr clk
mov a,#0

;cpl c
;mov p0.4,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.3,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.2,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.1,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.0,c
rlc a
setb clk
clr clk
mov ADh3,a

;cpl c
;mov p2.7,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.6,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.5,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.4,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.3,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.2,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.1,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.0,c
rlc a
setb clk
;clr clk
mov ADl3,A
setb cs
mov A,#11010000b ;CH2
clr cs
clr clk
;setb sdi ;bit0 - Start

rlc a
mov sdi,c
setb clk
clr clk
;setb sdi ;bit1 - SGL

rlc a
mov sdi,c
setb clk
clr clk
;clr sdi ;bit2 - D2

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk

rlc a
mov sdi,c
setb clk
clr clk
setb clk
clr clk
mov a,#0

;cpl c
;mov p0.4,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.3,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.2,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.1,c
rlc a
setb clk
clr clk

;cpl c
;mov p0.0,c
rlc a
setb clk
clr clk
mov ADh2,a

;cpl c
;mov p2.7,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.6,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.5,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.4,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.3,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.2,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.1,c
rlc a
setb clk
clr clk

;cpl c
;mov p2.0,c
rlc a
setb clk
;clr clk
mov ADl2,A
setb cs
; mov a,ADh
; cpl a
; mov p0,a
; mov a,ADl
; cpl a
; mov p2,a
nop
nop
nop
nop
; mov r7,#10
;del07: mov r6,#100
del06: mov r5,#100
del05: djnz r5,del05
; djnz r6,del06
; djnz r7,del07
LJMP Loop
end
A4: MODBUS Slave for 8051

CRC_ACCUM_LOW EQU 0DH ; bank 1 regjistri R5
CRC_ACCUM_HI EQU 0EH ; bank 1 regjistri R6
CRC_MASK_LSB EQU 001H ;CRC-16 polinomi

CRC_MASK_MSB EQU 0A0H
COIL_ADDR EQU 20H

INP_ADDR EQU 20H
HREG_ADDR EQU 20H
IREG_ADDR EQU 20H
HREGNUM EQU 08H
IREGNUM EQU 08H
INPNUM EQU 128
COILNUM EQU 128 ;numri total i coilave
t15 EQU 63817 ;65536-1719 , 11bit/9600*1.5=63817

t35 EQU 61526 ;65536-4010 =61526
t20 EQU 15366 ;63245 diferenca negative t15-t35=2291
ORG 0
LJMP INIT
ORG 0BH
TMR0 EQU $ ;vektori i tajmerit 0
LJMP TMR0VEC
ORG 23H
SERINT EQU $ ;vektori i interaptit serik I/O
LJMP SERVEC
ORG 30H
INIT:
MOV SP,#30H
MOV R3,#01H ;regjistri i gjendjes
MOV R4,#00H ;fshihet numruesi i bafferit te
memories eksterne per shkrim
MOV SCON,#50H ;TI=1, RI=0, REN=1
MOV TMOD,#21H ;TIMER1=MOD2-AUTORELOAD,TIMER0=MOD1-
16BIT
MOV PCON,#00H ;SINGLE BAUD RATE
MOV TH1,#0FDH ;9600 BAUD, #0xF3=>1200 BAUD (12 MHz)
SETB TR1 ;startohet timeri per portin serik
MOV TH0,#HIGH t35
MOV TL0,#LOW t35
SETB TR0
MOV IE,#92H ;lejohet interapti i tajmerit0 dhe i
portit serik
MOV 20H,#00H
SJMP $
;********************************
;INTERAPTI I TAJMERIT
TMR0VEC:
CLR TR0 ;ndalet tajmeri
CJNE R3,#01H,TOJO1
MOV R3,#02H
RETI
TOJO1:
TOJO2: CJNE R3,#03H,TOJO3

MOV R3,#04H
CLR TR0 ;ndalet tajmeri0
CLR TF0 ;fshihet flagu
MOV TH0,#HIGH t20
MOV TL0,#LOW t20
SETB TR0
RETI
TOJO3: CJNE R3,#04H,TOJO4

CALL ANALIZA
TOJO4: RETI
;********************************
;RX INTERAPTI
SERVEC: JB RI,RX
MOV A,R4 ;rutina per dergim
CJNE A,02H,NEXTCH ;r2=02h
MOV R3,#02H
MOV R4,#00H
CLR TI
RETI
NEXTCH:
MOV DPH,#40H
MOV DPL,R2
MOVX A,@DPTR
MOV SBUF,A
INC R2
CLR TI
RETI
RX: CLR RI
CJNE R3,#01H,RXJO1
CLR TR0
MOV TH0,#HIGH t35
MOV TL0,#LOW t35
SETB TR0
RETI
RXJO1: CJNE R3,#02H,RXJO2
MOV R4,#00H ;fshihet bufferi duke u pozicionuar ne

0 pas kalimit nga 2-3
RXGJ2: CLR TR0
CLR TF0 ;flagu i tajmerit0
MOV TH0,#HIGH t15

MOV TL0,#LOW t15
SETB TR0
MOV R3,#03H
MOV A,SBUF ;shkrimi ne buffer
MOV DPH,#40H
MOV DPL,R4
MOVX @DPTR,A
INC R4
RETI

SJMP RXGJ2

CLR TR0
CLR TF0
MOV TH0,#HIGH t35
MOV TL0,#LOW t35
SETB TR0
MOV R3,#01H
;fshirja e bafferit
; MOV R4,#00H
; RETI
RXJO4: RETI
;*******************************
;ANALIZA
ANALIZA:
MOV A,R4
MOV R7,A ;R7=R4 por ndyshon ne 0 gjate kalkulimit
teCRC
DEC R7 ;zvoglojme per 2(e hjekim crc nga
mesazhi)
DEC R7
CALL CALC_CRC
;krahsimi i crc
MOV DPH,#40H
MOV DPL,R7
MOVX A,@DPTR
CJNE A,CRC_ACCUM_LOW,ANALEND ;shkon ne analend nese crc
gabim
INC DPTR
MOVX A,@DPTR
CJNE A,CRC_ACCUM_HI,ANALEND ;shkon ne analend nese crc
gabim
;fundi i krahasimit (CRC-OK)
;krahasimi i adreses
MOV DPH,#40H
MOV DPL,#00H
MOVX A,@DPTR
CJNE A,#01H,ANALEND
JMP FUNKS
ANALEND:
JMP ANALEND2
;fundi i krahasimit(AdresaOK)
;*******************************
;FUNKSIONI
FUNKS: MOV DPL,#01H
MOVX A,@DPTR
CJNE A,#1,JOFO1
FO1:
INC DPTR
MOVX A,@DPTR
JZ FO1_01
JMP STADDERR
FO1_01: INC DPTR
MOVX A,@DPTR
MOV R6,A
CLR C
SUBB A,#COILNUM ;numri total i coilave=coilnum
JC FO1_02
JMP STADDERR
FO1_02: INC DPTR
MOVX A,@DPTR
JZ FO1_03
JMP VALERR
FO1_03: INC DPTR
MOVX A,@DPTR
MOV R5,A
DEC A
ADD A,R6
CLR C
JC FO1_04
JMP VALERR
FO1_04: MOV R4,#02H
CALL READCOIL
JMP SENDMSG
JOFO1: CJNE A,#2,JOFO2

FO2:
JMP FO1

FO3:
INC DPTR
MOVX A,@DPTR
JZ FO3_01
JMP STADDERR
FO3_01: INC DPTR
MOVX A,@DPTR
MOV R6,A
CLR C
SUBB A,#HREGNUM ;numri total i regjistrave
JC FO3_02
JMP STADDERR
FO3_02: INC DPTR
MOVX A,@DPTR
JZ FO3_03
JMP VALERR
FO3_03: INC DPTR
MOVX A,@DPTR
MOV R5,A
DEC A
ADD A,R6
CLR C
JC FO3_04
JMP VALERR
FO3_04: MOV R4,#02H
CALL READREG
JMP SENDMSG

FO4:
JMP FO3
FO5:
INC DPTR
MOVX A,@DPTR
CJNE A,#0,FO5_E1 ;E1 ERROR 1
INC DPTR
MOVX A,@DPTR
MOV R6,A
CLR C
JNC FO5_E1
INC DPTR
MOVX A,@DPTR
JZ FO5_00
CJNE A,#0FFH,FO5_E2
INC DPTR
MOVX A,@DPTR
JNZ FO5_E2
CALL SETCOIL
JMP SENDMSG1
FO5_00: INC DPTR
MOVX A,@DPTR
JNZ FO5_E2
CALL RESCOIL
JMP SENDMSG1
FO5_E1: JMP STADDERR

FO5_E2: JMP VALERR

FO6:
INC DPTR
MOVX A,@DPTR
CJNE A,#0,FO6_E1
INC DPTR
MOVX A,@DPTR
MOV R6,A
CLR C
SUBB A,#HREGNUM ;numri total i regjistrave=hregnum
JNC FO6_E1
INC DPTR
CALL PRESREG
JMP SENDMSG1
FO6_E1: JMP STADDERR

FO15:
INC DPTR
MOVX A,@DPTR
JZ FO15_01
JMP STADDERR
FO15_01:INC DPTR
MOVX A,@DPTR
MOV R6,A
CLR C
JC FO15_02
JMP STADDERR
FO15_02:INC DPTR
MOVX A,@DPTR
JZ FO15_03
JMP VALERR
FO15_03:INC DPTR
MOVX A,@DPTR
MOV R5,A
DEC A
ADD A,R6
CLR C
JC FO15_04
JMP VALERR
FO15_04:MOV R4,#06H
CALL FOMCOIL
MOV R4,#06H
JMP SENDMSG

FO16:
INC DPTR
MOVX A,@DPTR
JZ FO16_01
JMP STADDERR
FO16_01:INC DPTR
MOVX A,@DPTR
MOV R6,A
CLR C
JC FO16_02
JMP STADDERR
FO16_02:INC DPTR
MOVX A,@DPTR
JZ FO16_03
JMP VALERR
FO16_03:INC DPTR
MOVX A,@DPTR
MOV R5,A
DEC A
ADD A,R6
CLR C
JC FO16_04
JMP VALERR
FO16_04:MOV R4,#06H
CALL PRESMREG
JMP SENDMSG
JOFO16:
FUNCERR:
MOV DPTR,#4001H
MOVX A,@DPTR
SETB ACC.7
MOVX @DPTR,A
INC DPTR
MOV A,#01H
MOVX @DPTR,A
MOV R4,#03H
JMP SENDMSG
ANALEND2:
RET ;kthehet ne ANALIZA nga TOJO3
VALERR:
MOV DPTR,#4001H
MOVX A,@DPTR
SETB ACC.7
MOVX @DPTR,A
INC DPTR
MOV A,#03H
MOVX @DPTR,A
MOV R4,#03H
JMP SENDMSG
STADDERR:
MOV DPTR,#4001H
MOVX A,@DPTR
SETB ACC.7
MOVX @DPTR,A
INC DPTR
MOV A,#02H
MOVX @DPTR,A
MOV R4,#03H
JMP SENDMSG
SENDMSG:MOV DPH,#40H
MOV DPL,R4
MOV 07H,R4
CALL CALC_CRC
MOV A,0DH
MOVX @DPTR,A
INC DPTR
MOV A,0EH
MOVX @DPTR,A
INC R4
INC R4
SENDMSG1: ;reply i njejte tx=rx pa llogaritje
MOV R2,#0 ;te CRC-se
SETB TI
RET
CALC_CRC:
;kalkulon crc ne karakteret e shkruar ne memorie extprej4000h dhe
rezulratin
;e vendose ne 0D,0E praR5,R6banka1
;perdore R4=numri char te pranuar,R7=R4=DPL pastaj behet 0 dhe R6=8bit
ne bajt
MOV CRC_ACCUM_LOW,#0FFH ;fshihet crc accum para

fillimit
MOV CRC_ACCUM_HI,#0FFH
MOV DPH,#40H
MOV DPL,#00H
push 07H ;e ruajm R7=07H direkt
; XOR bajti i pare me bajtin e
ulet te CRC
;
CC10:
MOVX A,@DPTR
XRL A,CRC_ACCUM_LOW
MOV CRC_ACCUM_LOW,A
MOV R6,#8 ;R6 sherben si numrues i 8
bitave ne bajt
CC20:
MOV A,CRC_ACCUM_HI ;merret bajti i larte
CLR C ;mbushet me 0
RRC A ;shiftohet djathtas
MOV CRC_ACCUM_HI,A
MOV A,CRC_ACCUM_LOW ;dhe per bajtin e ulet
RRC A ;shiftohet djathtas
MOV CRC_ACCUM_LOW,A
JNC CC30
MOV A,CRC_ACCUM_LOW
XRL A,#CRC_MASK_LSB
MOV CRC_ACCUM_LOW,A
MOV A,CRC_ACCUM_HI
XRL A,#CRC_MASK_MSB
MOV CRC_ACCUM_HI,A
CC30:
DJNZ R6,CC20 ;perseritet tete here
INC DPTR ;gati per bajtin e ardhshem te
mesazhit
DJNZ R7,CC10 ;nje bajt me pak per te
llogarite
pop 07H
RET
;***************************************
;Set coil rutina
;Coili qe setohet ne R6
SETCOIL:
MOV A,R6
ANL A,#07H
INC A
MOV R1,A
MOV A,#00H
SETB C
SC_00: RLC A
DJNZ R1,SC_00
MOV R1,A
MOV A,R6
ANL A,#0F8H
RR A
RR A
RR A
ADD A,#20H
MOV R0,A
MOV A,@R0
ORL A,R1
MOV @R0,A
MOV A,20H ;Bartja e coilave ne portin P1
; CPL A ;Percaktimi i logjikes 1/0,
on/off
MOV P1,A
RET
RESCOIL:
MOV A,R6
ANL A,#07H
INC A
MOV R1,A
MOV A,#00H
SETB C
RC_00: RLC A
DJNZ R1,RC_00
CPL A
MOV R1,A
MOV A,R6
ANL A,#0F8H
RR A
RR A
RR A
ADD A,#20H
MOV R0,A
MOV A,@R0
ANL A,R1
MOV @R0,A
MOV A,20H ;Bartja e coilave ne portin P1
on/off
MOV P1,A
RET
;preset i nje regjistri presreg

PRESREG:
MOV A,R6
RL A
ADD A,#20H
INC A
MOV R0,A
MOVX A,@DPTR
MOV @R0,A
DEC R0
INC DPTR
MOVX A,@DPTR
MOV @R0,A
MOV A,20H
; CPL A ;Bartja e regjistrit ne portin
P1
MOV P1,A ;Percaktimi i logjikes 1/0,
on/off
RET
;Testbit:
;gjendja e bitit qe testohet bartet ne carry C,
;R6 permban adresen e bitit qe testohet(0-127)
TESTBIT:
MOV DPTR,#3F00H
MOV A,#72H ;kodi i ORL C,BIT
MOVX @DPTR,A
INC DPL
MOV A,R6 ;parametri BIT i ORL me lart
MOVX @DPTR,A
INC DPL
MOV A,#22H ;kodi i RET
MOVX @DPTR,A
CLR C
JMP 3F00H
;R7 regjistri i rezultatit te perkohshem per nje bajt

;R5 sasia e bitave qe lexohen
;R6 adresa e bitit fillestar
READCOIL:
MOV A,R5
DEC A
ANL A,#0F8H
RR A
RR A
RR A
INC A
MOV DPH,#40H
MOV DPL,R4
MOVX @DPTR,A
INC R4
CLR C
MOV A,R5
TB_03: SUBB A,#9
JNC TB_01
MOV A,#00H
PUSH ACC
SJMP TB_02
TB_01: INC A
PUSH ACC
MOV R5,#8
TB_02: MOV R7,#00H
MOV A,R5
ADD A,R6
MOV R6,A
PUSH 06H
TB_00: DEC R6
CALL TESTBIT
MOV A,R7
RLC A
MOV R7,A
DJNZ R5,TB_00
POP 06H
MOV DPH,#40H
MOV DPL,R4
MOV A,R7
MOVX @DPTR,A
INC R4
POP ACC
JNZ TB_03
RET
;readreg
;leximi i regjistrave
;R6 start adress,R5 count
READREG:
MOV 20H,P1
MOV A,R5
RL A
MOV DPH,#40H
MOV DPL,R4
MOVX @DPTR,A
INC DPL
INC R4
MOV A,R6
ADD A,#20H
MOV R0,A
RR_00: INC 00H
MOV A,@R0
MOVX @DPTR,A
INC DPL
INC R4
DEC 00H
MOV A,@R0
MOVX @DPTR,A
INC DPL
INC R4
INC 00H
INC 00H
DJNZ R5,RR_00
RET
;presreg=preset register
;shkruarja e regjistrave
;R6 start adress,R5 count
PRESMREG:
MOV DPH,#40H
MOV DPL,R4
INC DPL
MOV A,R6
ADD A,#20H
MOV R0,A
PMR_00: INC 00H
MOVX A,@DPTR
MOV @R0,A
INC DPL
DEC 00H
MOVX A,@DPTR
MOV @R0,A
INC DPL
INC 00H
INC 00H
DJNZ R5,PMR_00
MOV A,20H
on/off
MOV P1,A ;Bartja e regjistrit ne portin
P1
RET
;Forcebit:
;carry C bartet ne bitin e adresuar
;R6 permban adresen e bitit qe vendoset(0-127)
FORCEBIT:
JC FB_00
MOV DPTR,#3F00H
MOV A,#0C2H ;kodi i CLR BIT
MOVX @DPTR,A
INC DPL
MOVX @DPTR,A
INC DPL
MOVX @DPTR,A
JMP 3F00H
FB_00: MOV DPTR,#3F00H
MOV A,#0D2H ;kodi i SET BIT
MOVX @DPTR,A
INC DPL
MOVX @DPTR,A
INC DPL
MOVX @DPTR,A
JMP 3F00H
;R7 regjistri i rezultatit te perkohshem per nje bajt

;R5 sasia e bitave qe lexohen
;R6 adresa e bitit fillestar
FOMCOIL:
MOV A,R5
FMC_03: SUBB A,#9
JNC FMC_01
MOV A,#00H
PUSH ACC
SJMP FMC_02
FMC_01: INC A
PUSH ACC
MOV R5,#8
FMC_02: INC R4
MOV DPH,#40H
MOV DPL,R4
MOVX A,@DPTR
MOV R7,A
FMC_00: MOV A,R7
RRC A
MOV R7,A
CALL FORCEBIT
INC R6
DJNZ R5,FMC_00
POP ACC
JNZ FMC_03
MOV A,20H
; CPL A ;Percaktimi i logjikes 1/0, on/off
MOV P1,A ;Bartja e coilave ne portin P1
RET
END

Scripta - Mechatronical Project

Diunggah oleh

Informasi Dokumen

Hak Cipta

Format Tersedia

Bagikan dokumen Ini

Bagikan atau Tanam Dokumen

Opsi Berbagi

Apakah menurut Anda dokumen ini bermanfaat?

Apakah konten ini tidak pantas?

Hak Cipta:

Format Tersedia

Scripta - Mechatronical Project

Diunggah oleh

Hak Cipta:

Format Tersedia

UNIVERSITY OF PRISHTINA

FACULTY OF ELECTRICAL AND COMPUTER ENGINEERING

Mr.sc. Lavdim KURTAJ

Zhvillimi i ksaj lnde msimore n kuadr t Programit pr Zhvillim t Studimeve

Session 1: Microcomputer systems and interfacing

Session 2: State-diagrams and programming of microcomputer system

Session 3: Input/Output programming and interfacing to physical signals

Session 4: Real-time control

Inverters and AC Motor Drives 171

Session 4: Networking, inter-unit communication and protocols

Session 1: Microcomputer Systems and Interfacing

Harashima, Tomizuka, and Fukada (1996):

Auslander and Kempf (1996):

Shetty and Kolk (1997):

Some, of many, pictorial presentations:

Historical Development of Mechanical, Electrical, and Electronic

The evolution of mechatronics:

Properties of Conventional and Mechatronic Design Systems:

MECHATRONICS is an interdisciplinary field:

01.2 Mechatronic System Examples

Practically all mechanical devices that include electronic components and

Honda Robot - Asimo Industial Robot - Kuka KR-1000

Medical - Brilliance CT Military - BigDog

Rescue - Robot Education - Lego NXT

Research: Medical - Heartbeat Compensation Robot

Research - Wall Walking Robot

Entertainment - Sony Aibo Education - SRV-1 Mobile Robot

Research, Education - Quad-Cam 3

Examples around us:

Camera, Film-Scanner Ink-Jet Printer

Floppy-Disk-Dive Internal Functional Components

Basic Laser Printer Components and Paper Path

InkJet Printers - DC-Motor Drive with Incremental Encoders

InkJet Printers - Stepper-Motor Drive

Lab work 10 points

Project idea 10 points

1. Clarence W. de Silva, Mechatronics: A Foundation Course, CRC Press/ Taylor &

2. Clarence W. de Silva, Sensors and Actuators: Control System Instrumentation,

3. I. Scott MacKenzie, Raphael C.-W. Phan, The 8051 Microcontroller (Fourth

4. Abraham Silberschatz, Peter B. Galvin, Greg Gagne, Operating System Concepts

Datasheets and User Manuals will be used.

Working groups to be formed

Session 1: Microcomputer Systems and Interfacing

Mechanical process and information processing develop towards mechatronic

Electronic Control Unit (ECU):

One example of ECU:

Processing inside ECU can be:

02.2 Microcomputer Systems

General Blok-Diagram of Microcomputer System

Main Parts of a Microcomputer System:

Microcomputer Development Board - Based on 8085-Microprocessor

02.3 8051 Microcontroller Development Board

Easy8051A Development Board

Development Board that will be used (mostly) during the Course:

02.4 Software Development and IDE

Product development cycle

Detailed steps in the development cycle

02.5 "Hello World"

Purpose of "Hello World" example is to show all development steps, from

P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0

Session 1: Microcomputer Systems and Interfacing

Features of generic 8051

- 4K bytes internal ROM

- On chip oscillator (external crystal)