Lecture 2 Framing
Data Link Layer
Error control
2-1 2-2
back within a specified interval, it may retransmit the frame. Stop & Wait
Error can be corrected directly & quickly Flow control
Go-back N
(ARQ)
Selective Repeat
Acknowledged connection-oriented service
Frames are delivered without loss/duplication/error in correct S-ALOHA
Link access
CSMA-CA, -CD
sequence (MAC sublayer)
Polling
Three phases: connex establishment, frame trans., connex release
2-3 2-4
Framing: Byte stuffing I Framing: Byte stuffing II
2-5 2-6
Flag sequence with bit stuffing Q: How many 0 bits as overhead should be inserted? (j = 6)
Case 1: 0 is inserted if the first j 1 1s in the frame appear
Each frame ends with a flag sequence, 01111110 New frame
Bit stuffing: 0 is inserted after a sequence of five contiguous 1s.
Frame 0111110 11111
0
Data to be sent:
th
Case 2: For the i bit of 011111,
01111110 1111110111111111110111110 01111110
0 0 0 0 011111
bit stuffing
Case 3: long 1s after the case 2
Receiver checks for five consecutive 1s:
If next bit = 0, it is removed
011111 11111
If next two bits = 10, then flag is detected
If next two bits = 11, then frame has errors (abnormal termination)
Is this robust to channel errors? We can ignore this and a sequence of bits having longer 1s after
011111
2-7 2-8
Framing: Bit stuffing III Framing: Bit stuffing IV
You can still add one last 0 bit of indicating the termination
If E[K ] = 1000 bits and j = 6, E[OH] 23.625 (bits)
2-9 2-10
Packet
See also transmission
time Total delay for the
Clock-based framing (SONET: Synchronous Optical NETworking) Propagation Total packet two half packets over
delay over both links
Coding violation, e.g. Manchester (line) encoding: delay
queueing both links
low-to-high (1), high-to-low (0) high-to-high and/or delay +
Processing
low-to-low can be used for delimiter delay 0
Time Time
Shortening packet size: pipeline effect
2-11 2-12
Maximum frame size II Maximum frame size III
All links have the same link capacity C (bps)
The expected number of bit transmission times E[T C ] (bits):
Single packet transmission Small
The first
packet delay E[M ]V
up to
E[T C ] (Kmax + V )(j 1) + E[M ] + + 0.5V
links
Kmax
One message = g(Kmax )
delay over
the final link
M is uniformly distributed over Kmax :
Time Time E[dM /Kmax e] = E[M /Kmax ] + 0.5
S 1 2 D S 1 2 D
g(Kmax ) is convex: d 2 g(Kmax )/dKmax
2
>0
Via pipelining of using small Kmax , total time required to transmit
Kmax of minimizing g(Kmax ), i.e., dg(Kmax )/dKmax = 0
the message
s
1 l M m
T= (Kmax + V )(j 1) + M + V E[M ]V
C Kmax Kmax
j 1
no queueing delay, propagation delay, and processing delay are
included without an error on links
2-13 2-14
Link transmission should be faster than packet generation This tends to map a txed codeword into binary blocks around it.
T K : K can be reduced up to (K + V )/Ci = K /R for some link Combination of both models: the periods of error bursts (1), the
period of low error rate (2)
2-15 2-16
Linear Block Codes I Linear Block codes II
A codeword is generated by x = u G (G: generator matrix) Maximum likelihood (ML) decoding: try to maximize
Add r(= n k) redundant bits to correct and/or detect errors
Pr[y|u] Pr[u]
2k out of 2n possible n-bit words are codewords, e.g., Pr[u|y] = argu max Pr[y|u]
Pr[y]
message codeword
i
000 000000 i bits in errors: Pr[y|u] = pi (1 p)ni = (1 p)n 1pp
001 101001
110|100
010 011010 p
Log-likelihood: log Pr[y|u] = n log(1 p) + i log 1p
G = 011|010 = [ |{z} P | I] 011 110011
100 110100 maximizing the log likelihood boils down to minimizing i
101|001 k(nk)
101 011101
| {z
systematic form
} Nearest neighbour decoding
110 101110
111 000111 Decode y as the nearest codeword x
This set of 2k code words is called a block code. Hamming distance between codeword x(i) and x(j) ,
Code rate: k/n
dist(x(i) , x(j) ) = # of bits in which they differ
A binary code is called linear: x1 C and x2 C x1 + x2 C
e.g. dist(001101, 111000) = 4.
Parity check matrix H = [I | PT ] satisfies G H T = 0:
See also Syndrome decoding, soft decision decoding, etc.
y H T = (u G + e) H T = e H T (called syndrome)
2-17 2-18
2-19 2-20
Linear block codes V Linear Block codes VI
Hamming bound Undetected error probability Pud
Hamming sphere of radius t contains all possible received vectors Prob. of an error pattern being equal to a nonzero codeword
that are at a Hamming distance less than t from a codeword. For binary symmetric channel, Pud is expressed as
The size of a Hamming sphere for an (n, k) binary linear block n
X
codes V (n, t) is Pud = Aj j (1 )nj , (Aj = 0 for j = 0, 1, . . . , d 1)
t j=dmin
X n
V (n, t) = Ai : the number of codewords with hamming distance i,
j=0
j
called the weight distribution of the code
Every codeword, a total of 2k , in C with a Hamming sphere of In the previous example, A3 = 4, A4 = 3, n = 6, dmin = 3
radius t should not overlap with each other
Pud = 43 (1 )3 + 34 (1 )2 |=103 4 109
n k
2 2 V (n, t) n k log2 V (n, t)
Random error vector model: 2k 1 non-zero codeword error
This gives the least number of redundancy that must be added
patterns among 2n (approximation)
on a codeword in order to correct t errors.
An (n, k) binary linear block code is called a perfect code if Pud < (2k 1)/2n < 2(nk) (indepedent of Aj )
| {z }
Hamming bound is satisfied. =0.1094, for n=k=3
2-21 2-22
X n
Pud = i (1 )ni Detect a single burst of errors of length l: # of columns
i Misses burst errors of length n + 1 if there are n 1 uninverted
i even,i6=0
bits between the first and last bit
n = 32 and = 0.001: Pud = 0.496 103 1/2000
2-25 2-26
Divisor
x6 + x4 + x3
T (x) =x r U (x) + C (x) x5 + x4 + x3
=um1 x r+m1 + . . . + u0 x r + cr1 x r1 + ur2 x r2 + . . . + c0 3 x5 + x3 + x2
35 122 x4 + x2
Multiplying x r : appending r zeros from the least significant bit 105
x4 + x2 + x
17
Codeword or code polynomial can be interchangeably used x = r(x) Remainder
CRC codeword generation: Other description: Cyclic code is a subclass of linear code
Generator polynomial, G(x) of degree r(= n m): Codewords of a cyclic code can be generated by an m n
G(x) = 1 x r + gr1 x r1 + + g1 x + 1 generator matrix
The CRC polynomial, C (x), is generated (REM: remainder) g0 g1 g2 gr 0 0 0 0
0 g
0 g1 g2 gr 0 0 0
x r U (x)
C (x) = REM x r U (x) = Q(x)G(x) + C (x) 0 0 g0 g1 g2 gr 0 0
G(x) G= .
. ..
Q(x) is the quotient . .
0 0 0 g0 g1 g2 gr
C (x) is a polynomial r 1 degree
All rows of G are linearly independent
Codeword T (x): Adding C (x) back to x r U (x):
Each row represents G(x), xG(x), x 2 G(x), . . ., x m1 G(x)
r
T (x) = x U (x) + C (x)
Every codeword can be expressed as a linear combination of rows
= Q(x)G(x) + C (x) + C (x) = G(x)Q(x)
G can be rewritten in systematic form
Thus, all codewords are divisible
| {z } by G(x), i.e., multiple of G(x)
remainder=0
G = [I | P]
2-31 2-32
Cyclic redundancy codes (CRC) V Cyclic redundancy codes (CRC) VI
The number of nonzero terms of E(x) is exactly the number of
erroneous bits in Y (x)
If remainder 6= 0, transmission error is detected:
G(x) cannot divide E(x) Input
Cyclic redundancy codes (CRC) VII Cyclic redundancy codes (CRC) VIII
164 CHAPTER 3 Digital Transmission Fundamentals
Error-detecting capabilities of CRC:
Encoder for g(x) = x3 + x + 1
Notation:
g0 = 1 g1 = 1 g3 = 1 G(x) | E(x) : G(x) divides E(x) (remainder=0)
i(x) + x3 + x2 |
G(x) /E(x) : G(x) does not divide E(x)
i(x) + Reg 0 + Reg 1 Reg 2
P1) All single bit errors, E(x) = x i
Clock Input Reg 0 Reg 1 Reg 2
x i : one bit error at the i th position
0 - 0 0 0
1 1 = i3 1 0 0 G(x) has two nonzero terms, x r and 1: G(x) /E(x)
|
2 1 = i2 1 1 0
3 0 = i1 0 1 1 P2) Double bit error separated by k bits, i.e., two isolated single bit
4 0 = i0 1 1 1
| k + 1)
errors, is detected if G(x) /(x
5 0 1 0 1
6 0 1 0 0 E(x) = x i + x j = x i (1 + x k ) = x i Ek (x) for k = j i
7 0 0 1 0
Check bits: r0 = 0 r1 = 1 r2 = 0 x i (1 + x k )
| i,
G(x) /x from P1)
r(x) = x G(x) | k + 1), then G(x) /E(x)
if G(x) /(x |
The same division circuit that was used by the encoder can be used by the
A bit of the Theory of Finite Fields Cyclic redundancy codes (CRC) IX
P3) Odd number bit errors are detected if G(x) has a factor (1 + x)
Definition 1: A polynomial p(x) over GF(2) (Galois Field) of degree
m is said to be irreducible over GF(2) if p(x) is not divisible by any G(x) = (1 + x)B(x), where B(x) is a polynomial
polynomial over GF(2) of degree less than m, but greater than zero If G(x) | E(x), then E(x) = G(x)Q(x) = (1 + x)B(x)Q(x)
e.g., p(x) = x 2 + x is not irreducible since divisible by x + 1 For undetected errors, E(x)|x=1 = (x + 1)B(x)Q(x)|x=1 = 0
However, odd number of bits in error, E(x)|x=1 = 1
Definition 2: An irreducible polynomial p(x) of degree m is said to
|
Contradiction: G(x) /E(x) errors can be detected
be primitive if the smallest positive integer n for which p(x) divides
x n + 1 is n = 2m 1 P4) Single burst errors of length r are detected
e.g., p(x) = x 6 + x + 1 divides x 63 + 1, but does not divide any Burst error of length k r:
x n + 1 for 1 n < 63
E(x) = x i+k1 + ei+k2 x i+k2 + . . . + ei+1 x i+1 + x i
If G(x) has a primitive polynomial of degree m as a factor, = x i (1 x k1 + . . . + e1 x + 1) = x i Be (x)
then double bit error separated by k bits for 1 k < 2m 1 can be
detected | i
From 1), we know G(x) /x
Since degree of G(x) = r > k 1, G(x) /B
| e (x) G(x) /E(x)
|
2-37 2-38
| i
Recall G(x) /x If G(x) | E(x), then E(x) = G(x)Q(x),
Pr[undetected burst errors of length r + 1] = 2(r1) : there are 2kr2 such patterns.
2kr2
Pr[undetected burst errors of length > r + 1] = = 2r
2k2
2-39 2-40
Stop-and-Wait ARQ I Stop-and-Wait ARQ II
Sender transmits a frame, wait for ACK from receiver How many SN is needed for both ends? 1-Bit SN Suffices
Time-out use a timer
Case 1: a frame is lost Time 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Time-out Time
A FrameA Time-out time time
Frame Frame Time
Frame
A 0 Frame Frame Frame Frame
Frame 1 1 2
Frame
0 1Frame ACK Frame 1 2
B 0 ACK Cant wait indefinitely
1 ACK Timer
Cant 1
wait indefinitely 2 ACK
BACK Cant wait indefinitely ACK
B Transmitter Receiver
A B
Case 2: ACK is lost use a sequence number (SN) for frame
Time-out Time
Time-out Time
A FrameA Time-out Time
Frame Frame Frame
A 0
Frame
Frame
1 Frame 1 Frame
2 Frame State transition diagram of SNs
Frame
0 ACK 1Frame ACK Frame
0 ACK 1 2 Global State:
B 1 ACK 1 ACK 2 ACK Error-free frame 0
B ACK ACK
Cant know old and new frameACK
1 (0,0) (0,1)
B Cant know old and new frame 1 arrives at receiver
Cant know old and new frame 1
ACK for ACK for
Time-out earlier use an SN for ACKTime
Case 3: Timer expires Cant know which frame is ACKed
Time-out Time frame 1 frame 0
A Time-out Cant know which frame is ACKed
Frame A Cant know which frame is ACKed Time arrives at arrives at
A 0 Frame
Frame Frame Frame
Frame transmitter
0ACK
00
Frame
Frame 2 Frame
1 Frame transmitter
ACK
ACK 0 Frame 1
Frame 2
B ACK 0 1 ACK 2 Error-free frame 1
B ACK
B (1,0) arrives at receiver (1,1)
2-41 2-42
Transmission efficiency
nf no nf no tf nf no 1
= U = =
tsw
nf nf tsw tf =nf /R tsw R
X
e
1)tout )Pfk1
tsw =(1 Pf ) (tsw + (k =
1 Pf
| {z }
effective information k=1 tout =tsw
transmission rate
no e e
Usw = tf /tsw = (1 Pf )U
1
nf
= Transmission efficiency with channel errors
na 2( + tproc )R
1+ + e
nf nf sw = (1 Pf )
2-45 2-46
2-47 2-48
Go-Back-N ARQ II Go-Back-N ARQ III: Window size
Example 1: Go-Back-4 is not good.
Comparison with Stop-and-Wait ARQ Go-Back-4: Ws =N= 22 good.
Example 1: Go-Back-4 is not
Transmitter
Transmitter goes
goes back
back 4 4 Sequence
Sequence
Stop-and-Wait ARQ Time-out expires:
Time frfr frfr frfr fr fr fr fr fr fr fr fr fr frnumber
number
0 0 1 A
A 00 11 22 33 00 1 1 2 2 3 3 TimeTime
A
AA AA AA A A
BB CC CC CC C C
B Receiver is looking for A KK KK KK K K Receiver hashas
Receiver , but cant
, but cant
11 22 33 0 0
C know
knowwhether
whetherthisthis
is for the the
is for old old
frame
frame
K 00 11 22 33 00 or or
a new frame
a new frame
1
Example 2:
Example 2: Go-Back-3
Go-Back-3 is
is good.
good.
7 frames are outstanding; Go-Back-3: Ws =N= 22 1 2m 1 suffices
Go-Back-N ARQ so go back 7 frfr frfr frfr fr fr fr fr fr fr Sequence number
Time Sequence number
0 1 2 3 4 5 6 A 0
A 0 11 22 00 11 2 2 Time
Time
A
A A A
B CA CA CA
B A A
B KC KC KC Receiver has , so it
Receiver is looking for Out-of-sequence A 1K 2K 3 K Receiver
rejects hasframe 0
the old , so it
C C C 1 2 3
frames 0 1 2 3 rejects the old frame 0
K K K
1 2 3 0 1 2 3
2-49 2-50
Bidirectional GBN ARQ: Piggybacking ACK Timer setting of Bidirectional GBN ARQ
tout 2tf ,max + 2 + tproc
Transmitter Receiver
Receiver Transmitter
Timer
...
sequence error-free
... transmitters timer
Timer
... frames discarded ... Sporadic traffic arrivals:
after examined
Timer Timer Set a timer for ACK transmission
2-53 2-54
timer
0 1 2 3 4 5 6 7 Time time
0 1 2 3 4 5 6 7 Time
ACK keeps
window sliding
ACK1
The first frame transmission failure causes retx. of Ws frames
ACK1
X
tf Ws t0 : Ugbn = 1 Time tgbn =(1 Pf ) Pfi (tf + i Ws tf )
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
i=0
Time Pf Ws
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 =tf 1+
1 Pf
Link utilization
tf 1 Pf
Ugbn = =
tgbn 1 + (Ws 1)Pf
2-55 2-56
Go-Back-N ARQ X Go-Back-N ARQ XI
2-57 2-58
7 5
ACK up to 6
B 6
A A N A A A A A A A A A
C C A C C C C C C C C C
K K K K K K K K K K K Window advances whenever an ACK with Rnext arrives
K
1 2 2 2 2 7 8 9 1 1 1
2 0 1 2 Whenever a NAK arrives, the specific Rnext in the NACK is resent
Out of sequence!
Stored in the receiver buffer If a timer expires, the corresponding frame is resent, and the timer
Resequencing delay
is reset
2-59 Receiver window has the same structure with Rnext and Wr 2-60
Selective Repeat ARQ III Selective Repeat ARQ IV
window
0 1 2 0 Time
A
ACK4
B B
Receiver ACK1 ACK2 ACK3 Receiver {0,1,2,3} {2,3,4,5} {4,5,6,7} {0,1,2,3} {2,3,4,5} {4,5,6,7}
Window {0,1,2} {1,2,3} {2,3,0} {3,0,1} Window Window slides Window doesnt slides
{1,2,3,4} {3,4,5,6} {5,6,7,0} {1,2,3,4} {3,4,5,6}
Accept old frame 0 as a new frame
Accept old frame 0 as a new one Reject old frame 0
2-61 2-62
p
time no + no2 4no / ln(1 )
ACK1 ACK1 nf = the same as GBN
2
GBN: Ws = 10
X tf 0.8
tsr = tf (1 Pf ) kPfk1 = SR
Link utilization
1 Pf 0.6 GBN: Ws = 100
k=1
tf
Usr = tsr = 1 Pf 0.4
0.2
Comparison with GBN: SW: Ws = 10
SW: Ws = 100
0
Usr Ugbn if Pf 0 or Ws = 1 10-4 10-3 10-2 10-1 100
Pf
2-63 2-64
the asynchronous balanced mode (ABM) for data transfer for this conguration. Commands
In this mode information frames can be transmitted in full-duplex manner, that Primary
is, simultaneously in both directions. Responses
High-level Data Link Control (HDLC) Protocol I HDLC Protocol II
HDLC FRAME FORMAT
Secondary Secondary Secondary
We saw in the discussion of ARQ that the functionality of a protocol depends on
the control elds that are dened in the header. The format of the HDLC frame
Link configurations: Balanced operation
is dened so that it can accommodate the various data transfer modes. Figure Two stations called combined stations have equal capability
Unbalanced
5.35 showsoperation
the format of an HDLC frame. Each frame is delineated by two 8-bit
Balanced point-to-point link between combined stations
Link management is localized in a primary station Primary Commands Responses Secondary
Unbalanced point-to-point link
Secondary Responses Commands Primary
Commands
Primary Secondary
Data transferFIGURE
modes5.34 HDLC congurations
Responses
Supervisory frame
Flag sequence (01111110): bit stuffing used for data transparency
1 0 S S P/F N(R)
Address: (8 or 8 n bits extended address)
NRM and ARM: the address of the secondary station Unnumbered frame
ABM: the address of the responding station 1 1 M M P/F M M M
Control: purpose & functions of frame (1 or 2 octets)
FIGURE 5.36 Control eld format
Data: length is variable but limited considering error detection N(S): Send Sequence Number, (modulus 8 or 128)
capability (present in I-frames & some U-frames) N(R): Receive Sequence Number
Frame check sequence (FCS) computed before bit stuffing secondary. The bit indicates a nal frame when being sent from a secondary to a
primary.
The information
Thus to poll aframes and supervisory
given secondary, a host sendsframes
a frameallow HDLC to
to the secondary,
: FCS is generated based on Control & Data part of a frame for indicated by the
implement address eld withGo-Back-N,
Stop-and-Wait, the P/F bit set to 1. The
and secondaryRepeat
Selective respondsARQ.
to
error detection. such a frame by transmitting the frames it has available for transmission. Only
P/F: Poll/final bit for interaction between primary and secondary
the last frame transmitted from the secondary has the P/F bit set to 1 to indicate
16 bits for error detection using CRC-CCITT or
that it is thesends
Primary nal frame.
a 1 to poll the secondary
32 bits for error detection using CRC-32 In balanced mode the P/F bit implements the checkpointing procedure that
was
Secondary
introducedsends a 1 to denote
in the discussion on ARQ the final frame of the response
protocols.
2-67 The N(S) eld in the I-frame provides the send sequence number of the I- 2-68
frame. The N(R) eld is used to piggyback acknowledgments and to indicate the
next frame that is expected at the given station. N(R) acknowledges the correct
receipt of all frames up to and including N(R) 1.
There are four types of supervisory frames, corresponding to the four pos-
HDLC Protocol V HDLC VI
2-69 2-70
HDLC Protocol VII: NRM and SR-ARQ HDLC Protocol VIII: ABM and GBN
Combined Station A Combined Station B
B, I, 0, 0 A, I, 0, 0
Address of secondary
Primary A Secondaries B, C B, I, 1, 0 A, I, 1, 1 B ACKs fr0
X
A polls B B, RR, 0, P N(S) N(R) A sends 5
RR=receive ready frames B, I, 2, 1 A, I, 2, 1
B, I, 0, 0
N(R) B sends 3 info
X B, I, 1, 0 B, I, 3, 2 B rejects
frames B, REJ, 1
B, I, 2, 0,F fr1