January 2002
FDS8958A
Dual N & P-Channel PowerTrench MOSFET
General Description Features
These dual N- and P-Channel enhancement mode Q1: N-Channel
power field effect transistors are produced using
Fairchild Semiconductors advanced PowerTrench 7.0A, 30V RDS(on) = 0.028 @ VGS = 10V
process that has been especially tailored to minimize RDS(on) = 0.040 @ VGS = 4.5V
on-state ressitance and yet maintain superior switching
performance. Q2: P-Channel
These devices are well suited for low voltage and -5A, -30V RDS(on) = 0.052 @ VGS = -10V
battery powered applications where low in-line power
loss and fast switching are required. RDS(on) = 0.080 @ VGS = -4.5V
Q2
DD2 5 4
DD2
DD1 6 3
D1
D
Q1
7 2
SO-8 G2
S2 G
G1 S 8 1
S1 S
Pin 1 SO-8 S
Thermal Characteristics
RJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 C/W
RJC Thermal Resistance, Junction-to-Case (Note 1) 40 C/W
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 A Q1 1 1.6 3 V
VDS = VGS, ID = -250 A Q2 -1 -1.7 -3
VGS(th) Gate Threshold Voltage ID = 250 A, Referenced to 25C Q1 -4.3 mV/C
TJ Temperature Coefficient ID = -250 A, Referenced to 25C Q2 4
RDS(on) Static Drain-Source VGS = 10 V, ID = 7 A Q1 21 28 m
On-Resistance VGS = 10 V, ID = 7 A, TJ = 125C 32 42
VGS = 4.5 V, ID = 6 A 27 40
VGS = -10 V, ID = -5 A Q2 41 52
VGS = -10 V, ID = -5 A, TJ = 125C 58 78
VGS = -4.5 V, ID = -4 A 58 80
ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V Q1 20 A
VGS = -10 V, VDS = -5 V Q2 -20
gFS Forward Transconductance VDS = 5 V, ID = 7 A Q1 19 S
VDS = -5 V, ID =-5 A Q2 11
Dynamic Characteristics
Ciss Input Capacitance Q1 Q1 789 pF
VDS = 10 V, VGS = 0 V, f = 1.0 MHz Q2 690
Coss Output Capacitance Q1 173 pF
Q2 Q2 306
Crss Reverse Transfer Capacitance VDS = -10 V, VGS = 0 V, f = 1.0 MHz Q1 66 pF
Q2 77
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
30 2.4
VGS = 10V
4.0V 2.2 VGS = 3.0V
7.0V 3.5V
2.0
ID, DRAIN CURRENT (A)
5.0V
20
4.5V 1.8
3.5V
1.6
3.0V 4.0V
1.4
10 4.5V
5.0V
1.2 6.0V
7.0V
1.0 10V
2.5V
0.8
0
0 1 2 3 4 5 0 6 12 18 24 30
1.9 0.09
ID = 7A ID = 7A
VGS = 10V 0.08
1.6
0.07
0.06
1.3
0.05 o
TA = 125 C
1.0
0.04
0.03
0.7
o
0.02 TA = 25 C
0.4
0.01
-50 -25 0 25 50 75 100 125 150
2 4 6 8 10
o
TJ, JUNCTION TEMPERATURE ( C) VGS, GATE TO SOURCE VOLTAGE (V)
30 100
VGS = 0V
VDS = 10V
25 25oC
TA = -55oC 10
ID, DRAIN CURRENT (A)
o
TA = 125 C
20
125oC 1
15 25 C
o
0.1
10
o
-55 C
0.01
5
0.001
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
1 2 3 4 5
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
10 1200
ID =7A VDS = 5V f = 1MHz
VGS, GATE-SOURCE VOLTAGE (V)
10V VGS = 0 V
8
15V 900
CISS
6
600
4
300
2 COSS
CRSS
0 0
0 4 8 12 16 0.0 5.0 10.0 15.0 20.0
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
100 50
RDS(ON) LIMIT
SINGLE PULSE
100s
40 RJA = 135C/W
10 1ms
10ms TA = 25C
100ms 30
1s
1 10s
DC 20
VGS = 10V
0.1 SINGLE PULSE
o
RJA = 135 C/W 10
o
TA = 25 C
0.01 0
0.1 1 10 100 0.001 0.01 0.1 1 10 100 1000
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
30
2.5
VGS = -10.0V
25 VGS = -3.5V
-7.0V
-5.0V
2
20 -6.0V
-4.0V -4.0V
15 -4.5V
1.5 -5.0V
-3.5V -6.0V
10 -7.0V
-10.0V
1
5 -3.0V
0
0.5
0 1 2 3 4 5
0 6 12 18 24 30
-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT (A)
1.6 0.2
ID = -5A ID = -5A
VGS = -10V
1.4
0.15
1.2
0.1
1.0 o
TA = 125 C
0.05 o
0.8 TA = 25 C
0.6 0
-50 -25 0 25 50 75 100 125 150 2 4 6 8 10
Figure 13. On-Resistance Variation with Figure 14. On-Resistance Variation with
Temperature. Gate-to-Source Voltage.
30 100
VDS = -10V o VGS = 0V
TA = -55 C
25
10
o
25 C
20 TA = 125 C
o
1
o
15 25 C
o
125 C 0.1 o
-55 C
10
0.01
5
0 0.001
1.5 2.5 3.5 4.5 5.5 0 0.2 0.4 0.6 0.8 1 1.2 1.4
-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
10 1000
ID = -5.3A f = 1 MHz
VDS = -5V -10V
-VGS, GATE-SOURCE VOLTAGE (V)
VGS = 0 V
8 800
CISS
-15V
6 600
4 400 COSS
2 200
CRSS
0 0
0 4 8 12 16 0 5 10 15 20
Qg, GATE CHARGE (nC)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
100 50
RDS(ON) LIMIT
1ms 100 s SINGLE PULSE
40 RJA = 135C/W
10 10ms
TA = 25C
100ms
1s 30
1 10s
DC 20
VGS = -10V
0.1 SINGLE PULSE
o
RJA = 135 C/W 10
o
TA = 25 C
0.01 0
0.1 1 10 100 0.001 0.01 0.1 1 10 100
Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.
1
r(t), NORMALIZED EFFECTIVE
D = 0.5
RJA(t) = r(t) * RJA
TRANSIENT THERMAL
0.2
0.1 RJA = 135oC/W
0.1
RESISTANCE
0.05
P(pk)
0.02
0.01 t1
SINGLE PULSE t2
0.01
TJ - TA = P * RJA(t)
Duty Cycle, D = t1 / t2
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Rev. H4
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