Electronic Circuits I Laboratory

8 JFET Amplifying Circuits

8.1 Objectives
Understand the principles of JFET amplifier circuits.

8.2 Basic Description

8.2.a Terminology
The three most important parameters of JFETs are described as follows:

id
1) gm (trans conductance) =
Vgs Vds = fixed

Vds
2) rd (drain resistance) =
id Vgs = fixed

Vds
3) (amplification factor) =
Vgs id = fixed

8.2.b Basic Principle

8.2.b.1 Bias Arrangement

Self bias arrangement

Source self-bias arrangement for JFET is shown in Fig 8.1 (a). When the single
power supply Vdd is applied to drain, the self-bias can be established at gate and
souce so as to result in adequate operating point. There is no need for a second
power supply in order to have a negative VGS voltage value

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Since RG is very large,

I G 0, VRG = VG = 0.
We can also write:

VG = VGS + VRS = VGS + I D i Rs = 0.

This equation yields:

VGS = I D i Rs.

Fig. 8.1 JFET Self biasing

Plotting the load line:

a. From the KVL of output circuit:

Vdd = I D RD + VDS + I D RS
b. When Id = 0, VDS = Vdd = 12V (point A)

c. When VDS = 0,

Vdd 12V
ID = = = 4 mA
RD + RS 3K (point B)

d. The straight line connected between point A and B is the DC load line. The
operating point lies in the intersection of this load line and the curve for VGS.

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Voltage dividing bias arrangement

Fig 8.3 shows a voltage-dividing circuit for JFET, wherein except no longer
setting Vg as zero, the solutions to Vsg and Id are same as those of self-bias.

R2
VG = Vdd
R1 + R 2 ,

VGS = VG I D RS and

VGS Q
I DQ = I DSS (1 )2
Vp .

Fig. 8.2 Voltage dividing bias arrangement

8.3 Experiment Equipments

1. KL- 200 Linear Circuit Lab. Device
2. Experiment Module: KL-23004
3. Experiment Instruments: Oscilloscope, Multimeter, Function Generator
4. Connection cables and short-circuit clips

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8.4 Procedures
Procedure : Common Source Amplifier Self Biasing

( 1 ) Locate the block marked 23004-block c.

( 2 ) Insert the short-circuit clips by referring to Fig 8.4.

Fig. 8.4

( 3 ) Use voltmeter (DCV) to measure VGS and VD, then make records.
( 4 ) Connect signal generator in the input terminal (IN) and connect
oscilloscope to the output terminal (OUT).
( 5 ) Adjust the output of signal generator to 1 kHz sine wave and gradually
increase the amplitude so that the oscilloscope can display maximum non-
distorted output waveform, and make records. At the same time use the
oscilloscope to measure the waveform in the input terminal (IN), and make
records on Table 8.1.
( 6 ) Change R12 to R16 (6.8K), then repeat Step (3), (4) and (5).
( 7 ) Resume R12 to 3.3K and disconnect C3, then repeat Step (5).

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VDS

VGS
R12 VD
AV
Vin max

VDS

VGS
R16 VD
AV
Vin max

VDS

VGS
C3
VD
Disc.
AV
Vin max

Table 8.1 CS Self Biasing

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