Anda di halaman 1dari 38

1 2 3 4 5 6 7 8

AC/BATT BATT CHARGER CPU Thermal CPU CORE DC/DC IO


A
CONNECTOR MAX1772 PRESCOTT / TEJAS Sensor ISL6247 Max 1999 SC1470 A

PG 31 PG 31 LGA775 PG 4 PG 34,35 PG 33 PG 36,37,38


CPU
PG 2,3

LCD 17.0"/15.4"
WXGA PG 19 SYSTEM BUS
800MHz CPUHCLK_200M PCMPCLK_33M
DVI (CABLE CHANNEL A PG9 MCHHCLK_100M LANPCLK_33M
DOCK) PG 19 VGA MCHGCLK_100M CLOCK 591PCLK_33M
PCI-EXPRESS GRANTSDALE DDR 2-SODIMM1 VGACLK_100M MINIPCLK_33M
708 BGA DDR2 SDRAM 1.8V CK-410
CRT ICHDCLK_100M
ATI(M24-P) BGA
PG 19 CHANNEL B NEWCCLK_100M USB48M&1394_48M
X16 GMCH 2.1 GB/s up to 2.7GB/s
PG 13,14,15,16 ICS954101 ICHPCLK_33M
TV / HDTV(CABLE DDR 2-SODIMM2
PG 5,6,7,8 SATACLK_100M ICH14M_14.318M
B DOCK) PG 19 B

PG 4
VGA Memory DMI
(64/128M) PCI BUS ROUTING TABLE
PG 17,18
PCMCIA --- AD16, -REQ0, -INTA -INTF, -INTG
14.318MHz
LAN --- AD18, -REQ2, -INTE
MINI PCI --- AD19, -REQ3, -INTB, -INTC
Primary Master IDE - HDD
PG 28 IDE PCI,33MHZ, 3.3V
Primary Salve
(CDROM,DVD PG 28
CD-RW,DVD-RW)
1394
LAN MINI-PCI PCMCIA
RTL8100C/SB SOCKET TI 7411 PORTX1
(CABLE
BlueTooth X1 USB STICK X1 (10/100)(1000) DOCK
PG 22 PG 29
C USB 2.0 ICH6 128 Pins PG23 PG 27 PG 20 X1) PG 22 C

USB PORT X4 609 BGA


PG 29
X8
CABLE DOCK X1 PG 10,11,12 Wireless LAN PCMCIA Memory Card
PG 27 CABLE RJ45
Card SLOT reader slot
DOCK 802.11 b / SM/SD/
802.11
X1 MS/SC/XD
FAN 1,2,3 PG 28 PG 20 PG 23 a/b PG 27 PG 21 PG 21

FLASH ROM 512K


PG 30 PC87591
176 Pins LQFP LPC AC97 AUDIO PG 24 MODEM RJ11
MU902 28P
Touchpad PG30 CONEXANT
3.3V, 33MHz CX20468-21 PG 23
Keyboard/Mouse PG 30
D
PG 30 D

PCI-
SATA EXT. AUDIO STEREO SPEAKER
EXPRESS
SYSTEM LEDPG 29 MIC-IN AMP Headphone-OUT
USBX1 PCI EXPRESS SATA HDD (CABLE TPA0312 (CABLE DOCK) PROJECT : NT2
DOCK)
CARD (RESERVE) PG 25 Quanta Computer Inc.
CIR PG 24 PG 26 PG 29
PG 25 PG 25
Size Document Number R ev
Custom 2B
Block Diagram
Date: Tuesday, January 25, 2005 Sheet 1 of 38
1 2 3 4 5 6 7 8
A B C D E

U51A U51B
-CPUA3
-CPUA4
L5 A03# D00# B4 -CPUD0
-CPUD1
PLACEMENT NOTICE : CB501 10UC COREVCC
COREVCC
N29 VCCP185 CPUVID0
P6 A04# D01# C5 N30 VCCP186 VID0 AM2 CPUVID0 34
-CPUA5
-CPUA6
M5 A05# D02# A4 -CPUD2
-CPUD3
1. CPUIOPLLVCC, CPUVCCA AND CB498 10UC COREVCC
COREVCC
N8 VCCP187 VID1 AL5 CPUVID1
CPUVID2
CPUVID1 34
L4 C6 P8 AM3 CPUVID2 34
-CPUA7 M4
A06#
A07#
D03#
D04# A5 -CPUD4 CPUVSSA RELATIVE R/C MUST NEAR CB60 10UC COREVCC R8
VCCP188
VCCP189
VID2
VID3 AL6 CPUVID3
CPUVID3 34
-CPUA8 -CPUD5 CB516 10UC COREVCC CPUVID4
-CPUA9
R4
T5
A08# D05# B6
B7 -CPUD6 CPU PIN CB514 10UC/Y5U COREVCC
T23
T24
VCCP190 VID4 AK4
AL4 CPUVID5
CPUVID4 34
A09# D06# VCCP191 VID5 CPUVID5 34
-CPUA10
-CPUA11
U6 A10# D07# A7 -CPUD7
-CPUD8
2. CPUGTLREF RELATIVE R/C MUST CB509 *10UC/Y5V COREVCC
COREVCC
T25 VCCP192
T4 A10 T26
-CPUA12 U5
A11# D08#
A11 -CPUD9 NEAR CPU PIN COREVCC T27
VCCP193 VCORE VID
A12# D09# VCCP194
-CPUA13
-CPUA14
U4 A13# D10# B10 -CPUD10
-CPUD11
3. IDEALLY, PLACE 1 CAP PER COREVCC
COREVCC
T28 VCCP195 VCCSENSE AN3 VCCSENSE_AN3 TP3
V5 C11 T29 AN4 VSSSENSE_AN4 TP2
4
-CPUA15 V4
A14#
A15#
D11#
D12# D8 -CPUD12 POWER PIN AND BASED ON REAL COREVCC T30
VCCP196
VCCP197
VSSSENSE 4
-CPUA16 -CPUD13 COREVCC
-CPUA17
W5
AB6
A16# D13# B12
C12 -CPUD14 CASE TO REDUCE. COREVCC
T8
U23
VCCP198
A17# D14# VCCP199
-CPUA18
-CPUA19
W6 A18# D15# D11 -CPUD15
-CPUD16
4. CPUCOMP0 AND CPUCOMP1 COREVCC
COREVCC
U24 VCCP200
Y6 G9 U25
-CPUA20 Y4
A19#
A20#
D16#
D17# F8 -CPUD17 PULLDN MUST NEAR CPU PIN COREVCC U26
VCCP201
VCCP202
-CPUA21
-CPUA22
AA4 A21# ADDR DATA D18# F9 -CPUD18
-CPUD19
5. ALL TESTHIx PULLUP MUST NEAR COREVCC
COREVCC
U27 VCCP203 15MILS IC0805A103R-K0 100mA
AD6 E9 U28
-CPUA23 AA5
A22#
A23#
D19#
D20# D7 -CPUD20 CPU PIN COREVCC U29
VCCP204
VCCP205 VCCIOPLL C23 CPUIOPLLVCC COREVTT
-CPUA24
-CPUA25
AB5 A24# D21# E10 -CPUD21
-CPUD22
6. AT LEAST 4 BULK CAPACITORS COREVCC
COREVCC
U30 VCCP206
L5
L6
IC0805A103R-K0
AC5 D10 U8
-CPUA26 AB4
A25#
A26#
D22#
D23# F11 -CPUD23 ON BOTH SIDE OF CPU POWER COREVCC V8
VCCP207
VCCP208 15MILS
-CPUA27 -CPUD24 COREVCC
-CPUA28
AF5
AF4
A27# D24# F12
D13 -CPUD25 PLANE COREVCC
W23
W24
VCCP209
A23 CPUVCCA R58 *0R CPUIOPLLVCC
A28# D25# VCCP210 VCCA
-CPUA29
-CPUA30
AG6 A29# D26# E13 -CPUD26
-CPUD27
7. AT LEAST 32PCS 22U CAP AND 42 COREVCC
COREVCC
W25 VCCP211
AG4 G13 W26
-CPUA31 AG5
A30#
A31#
D27#
D28# F14 -CPUD28 .47U CAP AROUND CPU COREVCC W27
VCCP212
VCCP213 15MILS
-CPUA32 AH4 G14 -CPUD29 COREVCC W28 C21 *1U CPUIOPLLVCC
T6 A32# D29# VCCP214
-CPUA33 AH5 F15 -CPUD30 COREVCC W29 B23 CPUVSSA C22 1U CPUVCCA
T9 A33# D30# VCCP215 VSSA
-CPUA34 AJ5 G15 -CPUD31 COREVCC W30
T4 A34# D31# VCCP216
-CPUA35 AJ6 G16 -CPUD32 COREVCC W8 C704 33U/3528
T10 A35# D32# VCCP217
-CPUD33 COREVCC

+
E15 Y23
5 -CPUADSTB0 R6
D33#
E16 -CPUD34 COREVCC Y24
VCCP218 MISC Close to GTLREF0
ADSTB0# D34# -CPUD35 COREVCC VCCP219
5 -CPUADSTB1 AD5 ADSTB1# D35# G18 Y25 VCCP220
G17 -CPUD36 COREVCC Y26
D36# -CPUD37 COREVCC VCCP221 CPUGTLVREF R61 100/F
5 -CPUREQ0 K4 REQ0# D37# F17 Y27 VCCP222 GTLREF H1 COREVTT_L
5 -CPUREQ1 J5 F18 -CPUD38 COREVCC Y28
REQ1# D38# -CPUD39 COREVCC VCCP223 CB82
5 -CPUREQ2 M6 REQ2# D39# E18 Y29 VCCP224
5 -CPUREQ3 K6 REQ3# D40# E19 -CPUD40 COREVCC Y30 VCCP225
220P C25 CPUGTLVREF
3 5 -CPUREQ4 J6 F20 -CPUD41 COREVCC Y8 R73 (0.6XVTT=0.8V) 3
REQ4# D41# -CPUD42 VCCP226 210/F
D42# E21 1U

PRESCOTT775 2 OF 5
-CPUD43 CB490 .47UA COREVTT
PRESCOTT775 1 OF 5

-ADS1 D43# F21 A25 VTT1


5 -CPUADS D2 G21 -CPUD44 CB474 .47UA COREVTT A26
ADS# D44# -CPUD45 CB473 .47UA COREVTT VTT2
5 -CPUBNR C2 BNR# D45# E22 A27 VTT3
CPU_NC0 U2 D22 -CPUD46 CB491 .47UA COREVTT A28
T19 AP0# D46# VTT4
CPU_NC1 U3 G22 -CPUD47 CB485 .47UA COREVTT A29 A13 CPUCOMP0 R74 60.4/F
T23 AP1# D47# VTT5 COMP0
CPU_NC2AD3 D20 -CPUD48 CB487 .47UA COREVTT A30 T1 CPUCOMP1 R47 60.4/F
T14 BINIT# D48# VTT6 COMP1
5 -CPUCREQ G5 D17 -CPUD49 CB87 .47UA COREVTT B25 G2 CPUCOMP2 R79 100/F COREVTT_L
CPU_NC3 J16 PCREQ# D49# -CPUD50 CB472 .47UA COREVTT VTT7 COMP2 CPUCOMP3 R55 100/F
T26 DP0# D50# A14 B26 VTT8 COMP3 R1
CPU_NC4H15 C15 -CPUD51 CB489 .47UA COREVTT B27
T27 DP1# D51# VTT9
CPU_NC5H16 C14 -CPUD52 CB486 .47UA COREVTT B28
T34 DP2# D52# VTT10
CPU_NC6 J17 B15 -CPUD53 CB86 .47UA COREVTT B29
T28 DP3# D53# VTT11
C18 -CPUD54 CB475 .47UA COREVTT B30
D54# -CPUD55 CB488 .47UA COREVTT VTT12 COREVTT
4,5 -CPUBREQ0 F3 BR0# D55# B16 C25 VTT13
G8 A17 -CPUD56 CB483 *10UC COREVTT C26
5 -CPUBPRI
5 -CPUEDRDY F2
BPRI# CONTROL D56#
B18 -CPUD57 CB481 10UC/Y5U COREVTT C27
VTT14
EDRDY# D57# -CPUD58 CB476 10UC/Y5U COREVTT VTT15 TESTHI0 R77 62R
5 -CPUDBSY B2 DBSY# D58# C21 C28 VTT16 TESTHI00 F26
5 -CPUDEFER G7 B21 -CPUD59 CB477 10UC/Y5U COREVTT C29 W3 TESTHI1 R50 62R COREVTT_L
DEFER# D59# -CPUD60 CB479 *10UC/Y5V COREVTT VTT17 TESTHI01 TESTHI2 R71 62R
5 -CPUDRDY C1 DRDY# D60# B19 C30 VTT18 TESTHI02 F25
5 -CPUHIT D4 A19 -CPUD61 CB482 10UC COREVTT D25 G25
HIT# D61# -CPUD62 CB484 10UC COREVTT VTT19 TESTHI03
5 -CPUHITM E4 HITM# D62# A22 D26 VTT20 TESTHI04 G27
B22 -CPUD63 CB480 *10UC/Y5V COREVTT D27 G26
D63# CB478 10UC/Y5U COREVTT VTT21 TESTHI05 COREVTT_L
4 -CPUIERR AB2 IERR# D28 VTT22 TESTHI06 G24
A8 -CPUDBI0 COREVTTD29 D29 F24
DBI0# -CPUDBI1 R82 0R COREVTTD30 VTT23 TESTHI07 TESTHI8 R78 62R
10 -CPUINIT P3 INIT# DBI1# G11 COREVTT D30 VTT24 TESTHI08 G3
D19 -CPUDBI2 R83 0R G4 TESTHI9 R59 62R
DBI2# -CPUDBI3 COREVTTPWG AM6 TESTHI09 TESTHI10 R62 62R
5 -CPULOCK C3 LOCK# DBI3# C20 VTTPWRGD TESTHI10 H5
P1 TESTHI11 R65 62R
CPU_NC7AB3 -CPUDSTB+0 TESTHI11 TESTHI12 R52 62R
2 T15 MCERR# DSTBP0# B9 COREVTT_R AA1 VTT_OUT1 TESTHI12 W2 2
C8 -CPUDSTB-0
DSTBN0# -CPUDSTB+1
4,5 -CPURST G23 RESET# DSTBP1# E12 COREVTT_L J1 VTT_OUT2
E3 G12 -CPUDSTB-1 COREVTT_L
5 -CPUTRDY TRDY# DSTBN1#
5 -CPURS0 B3 G19 -CPUDSTB+2 3V VTT_SEL1 F27
RS0# DSTBP2# -CPUDSTB-2 R75 *1K VTT_SEL
5 -CPURS1 F5 RS1# DSTBN2# G20
A3 C17 -CPUDSTB+3 3VSUS
5 -CPURS2 RS2# DSTBP3# BSEL0 4
CPU_NC8 H4 A16 -CPUDSTB-3 R653
T32 RSP# DSTBN3# BSEL1 4
.1U/16V/X7R 680R C23 C15
COREVTT_L BSEL2 4
10 -CPUA20M K3 AJ2 -CPUBPM0
A20M# BPM0# -CPUBPM1 .1U .1U
10,11 -CPUFERR R3 FERR#/PBE# BPM1# AJ1
10 -CPUIGNNE N2 IGNNE# BPM2# AD2 -CPUBPM2 C712 R654
COREVTTPWG 34 BSEL0 G29 BSEL0 R66 0R
FSBSEL0 5
AG2 -CPUBPM3 8.2K H30 BSEL1 R68 0R
LEGACY BPM3# BSEL1 FSBSEL1 5
3

10 CPUINTR K1 LINT0 BPM4# AF2 -CPUBPM4 R54


BSEL2 G30 BSEL2 R76 0R
FSBSEL2 5
-CPUBPM5 2.74K
10 CPUNMI
10 -CPUSMI
L1
P2
LINT1 CPU BPM5# AG3
SMI# VTT_PG2 2 FOX=PE077507-204-01
10 -CPUSTPCLK M3 STPCLK# ITP AE1 CPUTCK
TCK
3
VTT_PG1

4 CPUTHRM+ AL1 AD1 CPUTDI R70 470R


THERMDA TDI CPUTDO Q57 R69 470R COREVTT
4 CPUTHRM- AK1 THERMDC THERM TDO AF1 2
11 -CPUTHRMTRIP M2 AC1 CPUTMS 2N7002E R67 470R
1

THERMTRIP# TMS -CPUTRST


AG1
1

TRST# -CPUITPDBR C17


4 -CPUPROCHOT AL2 PROCHOT# DBR# AC2
4,11 CPUPG N1 PWRGOOD MISC ITPCLKOUT1 AJ3 -ITPCLK
T3
1U R655 If only TEJAS and CEDAR MILL are
10 -CPUSLP L2 AK3 +ITPCLK 22.1K supported the FSBSEL resistor can
SLP# ITPCLKOUT0 T5
Q58
V2 UMT2222A be removed.
4 LL_ID0 LL_ID0
LL_ID1 AA2 F28 +CPUCLK R57 *10K
T16 LL_ID1 +CPUCLK +CPUCLK 4
G28 -CPUCLK -CPUTHRMTRIP1
R34 *0R -SKTOCC AE8 CLK -CPUCLK -CPUCLK 4 COREVTT_L
SKTOCC# -PCURSTIN 4,30,33
1 COREVTT_R BOOTSELECTY1 1
R48 *1K BOOTSELECT
FOX=PE077507-204-01

3
-CPUA[3..35] -CPUD[0..63] R63 *62R Q56 2 Q55
5 -CPUA[3..35] -CPUD[0..63] 5 COREVTT
-CPUBPM[0..5] -CPUDBI[0..3] *MMBT3904 *MMBT3904
4 -CPUBPM[0..5] -CPUDBI[0..3] 5
3
PROJECT : NT2
CPUTMS -CPUDSTB+[0..3]
4 CPUTMS -CPUDSTB+[0..3] 5

1
-CPUTRST -CPUDSTB-[0..3] -CPUTHRMTRIP R64 *330R -CPUTHRMTRIP2 2
4 -CPUTRST -CPUDSTB-[0..3] 5
Quanta Computer Inc.
4,11 -CPUITPDBR -CPUITPDBR CPUTCK CPUTCK 4
4 CPUTDO CPUTDO CPUTDI CPUTDI 4
1

3,32,34,35 COREVCC COREVCC


COREVTT Size Document Number R ev
4,5,7,11,12,32,37 COREVTT Custom 3A
PRESCOTT(CPU-A)
Date: Tuesday, February 15, 2005 Sheet 2 of 38
A B C D E
8 7 6 5 4 3 2 1

U51E U51C U51D


COREVCC AA8 AK25 COREVCC CB515 10UC A12 AJ23 E27 R28
CB510 10UC COREVCC VCCP1 VCCP93 COREVCC CB63 10UC/Y5U VSS1 VSS90 VSS179 VSS251
AB8 VCCP2 VCCP94 AK26 A15 VSS2 VSS91 AJ24 E28 VSS180 VSS252 R29
CB511 COREVCC
10UC/Y5U AC23 AK8 COREVCC CB64 10UC A18 AJ27 E29 R30
COREVCC VCCP3 VCCP95 COREVCC CB504 10UC VSS3 VSS92 VSS181 VSS253
AC24 VCCP4 VCCP96 AK9 A2 VSS4 VSS93 AJ28 E8 VSS182 VSS254 R5
CB505 COREVCC
10UC/Y5U AC25 AL11 COREVCC CB506 10UC/Y5U A21 AJ29 F10 R7
CB502 *10UC/Y5V
COREVCC VCCP5 VCCP97 COREVCC CB494 10UC/Y5U VSS5 VSS94 VSS183 VSS255
AC26 VCCP6 VCCP98 AL12 A24 VSS6 VSS95 AJ30 F13 VSS184 VSS256 T3
CB499 10UC COREVCC AC27 AL14 COREVCC CB496 10UC A6 AJ4 F16 T6
CB503 10UC COREVCC VCCP7 VCCP99 COREVCC CB493 10UC VSS7 VSS96 VSS185 VSS257
AC28 AL15 A9 AJ7 F19 T7

PRESCOTT775 4 OF 5
CB507 10UC/Y5U
COREVCC VCCP8 VCCP100 COREVCC CB495 *10UC/Y5V VSS8 VSS97 VSS186 VSS258
AC29 VCCP9 VCCP101 AL18 AA23 VSS9 VSS98 AK10 F22 VSS187 VSS259 U1
CB492 COREVCC
10UC/Y5U AC30 AL19 COREVCC AA24 AK13 F4 U7
COREVCC VCCP10 VCCP102 COREVCC VSS10 VSS99 VSS188 VSS260
4
AC8 VCCP11 VCCP103 AL21 AA25 VSS11 VSS100 AK16 F7 VSS189 VSS261 V23 4
COREVCC AD23 AL22 COREVCC AA26 AK17 G1 V24
COREVCC VCCP12 VCCP104 COREVCC VSS12 VSS101 VSS190 VSS262
AD24 VCCP13 VCCP105 AL25 AA27 VSS13 VSS102 AK2 H10 VSS191 VSS263 V25
COREVCC AD25 AL26 COREVCC AA28 AK20 H11 V26
COREVCC VCCP14 VCCP106 COREVCC VSS14 VSS103 VSS192 VSS264
AD26 VCCP15 VCCP107 AL29 AA29 VSS15 VSS104 AK23 H12 VSS193 VSS265 V27
COREVCC AD27 AL30 COREVCC AA3 AK24 H13 V28
COREVCC VCCP16 VCCP108 COREVCC VSS16 VSS105 VSS194 VSS266
AD28 VCCP17 VCCP109 AL8 AA30 VSS17 VSS106 AK27 H14 VSS195 VSS267 V29
COREVCC AD29 AL9 COREVCC AA6 AK28 H17 V3

PRESCOTT775 5 OF 5
COREVCC VCCP18 VCCP110 COREVCC VSS18 VSS107 VSS196 VSS268
AD30 VCCP19 VCCP111 AM11 AA7 VSS19 VSS108 AK29 H18 VSS197 VSS269 V30
COREVCC AD8 AM12 COREVCC AB1 AK30 H19 V6
COREVCC VCCP20 VCCP112 COREVCC VSS20 VSS109 VSS198 VSS270
AE11 VCCP21 VCCP113 AM14 AB23 VSS21 VSS110 AK5 H20 VSS199 VSS271 V7
COREVCC AE12 AM15 COREVCC AB24 AK7 H21 W4
COREVCC VCCP22 VCCP114 COREVCC VSS22 VSS111 VSS200 VSS272
AE14 VCCP23 VCCP115 AM18 AB25 VSS23 VSS112 AL10 H22 VSS201 VSS273 W7
CB497 10UC COREVCC AE15 AM19 COREVCC CB61 10UC AB26 AL13 H23 Y2
CB29 .47UA COREVCC VCCP24 VCCP116 COREVCC CB5 .47UA VSS24 VSS113 VSS202 VSS274
AE18 VCCP25 VCCP117 AM21 AB27 VSS25 VSS114 AL16 H24 VSS203 VSS275 Y5
CB41 .47UA COREVCC AE19 AM22 COREVCC CB22 .47UA AB28 AL17 H25 Y7
CB58 .47UA COREVCC VCCP26 VCCP118 COREVCC CB47 .47UA VSS26 VSS115 VSS204 VSS276
AE21 VCCP27 VCCP119 AM25 AB29 VSS27 VSS116 AL20 H26 VSS205
CB51 .47UA COREVCC AE22 AM26 COREVCC CB46 .47UA AB30 AL23 H27
CB6 .47UA COREVCC VCCP28 VCCP120 COREVCC CB23 .47UA VSS28 VSS117 VSS206
AE23 VCCP29 VCCP121 AM29 AB7 VSS29 VSS118 AL24 H28 VSS207
CB7 .47UA COREVCC AE9 AM30 COREVCC CB85 .47UA AC3 AL27 H29
CB50 .47UA COREVCC VCCP30 VCCP122 COREVCC CB17 .47UA VSS30 VSS119 VSS208
AF11 VCCP31 VCCP123 AM8 AC6 VSS31 VSS120 AL28 H3 VSS209
CB49 .47UA COREVCC AF12 AM9 COREVCC CB15 .47UA AC7 AL3 H6
CB45 .47UA COREVCC VCCP32 VCCP124 COREVCC CB66 .47UA VSS32 VSS121 VSS210
AF14 VCCP33 VCCP125 AN11 AD4 VSS33 VSS122 AL7 H7 VSS211
CB70 .47UA COREVCC AF15 AN12 COREVCC CB11 .47UA AD7 AM1 H8
CB10 .47UA COREVCC VCCP34 VCCP126 COREVCC CB20 .47UA VSS34 VSS123 VSS212
AF18 VCCP35 VCCP127 AN14 AE10 VSS35 VSS124 AM10 H9 VSS213
CB84 .47UA COREVCC AF19 AN15 COREVCC CB37 .47UA AE13 AM13 J4 N4 NCRSVD1 T25
CB30 .47UA COREVCC VCCP36 VCCP128 COREVCC CB21 .47UA VSS36 VSS125 VSS214 RSVD1 NCRSVD2
AF21 VCCP37 VCCP129 AN18 AE16 VSS37 VSS126 AM16 J7 VSS215 RSVD2 P5 T18
CB44 .47UA COREVCC AF22 AN19 COREVCC CB26 .47UA AE17 AM17 K2 AC4 NCRSVD3 T11
CB72 .47UA COREVCC VCCP38 VCCP130 COREVCC CB75 .47UA VSS38 VSS127 VSS216 RSVD3 NCRSVD4
AF8 VCCP39 VCCP131 AN21 AE2 VSS39 VSS128 AM20 K5 VSS217 RSVD4 AE4 T8
CB79 .47UA COREVCC AF9 AN22 COREVCC CB39 .47UA AE20 AM23 K7 D23 NCRSVD5 T54
CB43 .47UA COREVCC VCCP40 VCCP132 COREVCC CB73 .47UA VSS40 VSS129 VSS218 RSVD5 NCRSVD6
3 AG11 VCCP41 VCCP133 AN25 AE24 VSS41 VSS130 AM24 L23 VSS219 RSVD6 AM5 T2 3
CB57 .47UA COREVCC AG12 AN26 COREVCC CB9 .47UA AE25 AM27 L24 AN5 RSVAN5 R16 0R
VCCP42 VCCP134 VSS42 VSS131 VSS220 VCC_MB_REG VCCSENS 34
CB71 .47UA COREVCC AG14 AN29 COREVCC CB69 .47UA AE26 AM28 L25 AN6 RSVAN6 R19 0R

PRESCOTT775 3 OF 5
VCCP43 VCCP135 VSS43 VSS132 VSS221 VSS_MB_REG VSSSENS 34
CB13 .47UA COREVCC AG15 AN30 COREVCC CB78 .47UA AE27 AM4 L26 F29 NCRSVD9 T29
CB68 .47UA COREVCC VCCP44 VCCP136 COREVCC CB25 .47UA VSS44 VSS133 VSS222 RSVD9 RSVAK6 R26 *62R
AG18 VCCP45 VCCP137 AN8 AE28 VSS45 VSS134 AM7 L27 VSS223 RSVD10 AK6 COREVTT_R
CB77 .47UA COREVCC AG19 AN9 COREVCC CB76 .47UA AE29 AN1 L28 G6 RSVG6 R60 *62R COREVTT_L
CB16 .47UA COREVCC VCCP46 VCCP138 COREVCC CB83 .47UA VSS46 VSS135 VSS224 RSVD11 NCRSVD12
AG21 VCCP47 VCCP139 J10 AE30 VSS47 VSS136 AN10 L29 VSS225 RSVD12 AH2 T12
CB18 .47UA COREVCC AG22 J11 COREVCC CB27 .47UA AE5 AN13 L3 N5 NCRSVD13 T24
CB80 .47UA COREVCC VCCP48 VCCP140 COREVCC CB81 .47UA VSS48 VSS137 VSS226 RSVD13 NCRSVD14
AG25 VCCP49 VCCP141 J12 AE7 VSS49 VSS138 AN16 L30 VSS227 RSVD14 AE6 T7
CB40 .47UA COREVCC AG26 J13 COREVCC CB12 .47UA AF10 AN17 L6 C9 NCRSVD15 T41
CB59 .47UA COREVCC VCCP50 VCCP142 COREVCC CB24 .47UA VSS50 VSS139 VSS228 RSVD15 NCRSVD16
AG27 VCCP51 VCCP143 J14 AF13 VSS51 VSS140 AN2 L7 VSS229 RSVD16 G10 T30
CB8 .47UA COREVCC AG28 J15 COREVCC CB19 .47UA AF16 AN20 M1 D16 NCRSVD17 T37
CB14 .47UA COREVCC VCCP52 VCCP144 COREVCC CB65 .47UA VSS52 VSS141 VSS230 RSVD17 NCRSVD18
AG29 VCCP53 VCCP145 J18 AF17 VSS53 VSS142 AN23 M7 VSS231 RSVD18 A20 T111
CB52 .47UA COREVCC AG30 J19 COREVCC CB48 .47UA AF20 AN24 N3 E23 NCRSVD19 T36
CB42 .47UA COREVCC VCCP54 VCCP146 COREVCC CB74 .47UA VSS54 VSS143 VSS232 RSVD19 NCRSVD20
AG8 VCCP55 VCCP147 J20 AF23 VSS55 VSS144 AN27 N6 VSS233 RSVD20 E24 T57
CB67 .47UA COREVCC AG9 J21 COREVCC CB38 .47UA AF24 AN28 N7 F23 NCRSVD21 T31
COREVCC VCCP56 VCCP148 COREVCC VSS56 VSS145 VSS234 RSVD21 NCRSVD22
AH11 VCCP57 VCCP149 J22 AF25 VSS57 VSS146 AN7 P23 VSS235 RSVD22 H2 T42
CB513 10UC COREVCC AH12 J23 COREVCC AF26 B1 P24 J2 NCRSVD23 T43
COREVCC VCCP58 VCCP150 COREVCC VSS58 VSS147 VSS236 RSVD23 NCRSVD24
AH14 VCCP59 VCCP151 J24 AF27 VSS59 VSS148 B11 P25 VSS237 RSVD24 J3 T33
CB512 COREVCC
10UC/Y5U AH15 J25 COREVCC CB508 10UC/Y5U AF28 B14 P26 V1 NCRSVD25 T20
COREVCC VCCP60 VCCP152 COREVCC CB62 10UC/Y5U VSS60 VSS149 VSS238 MS_ID1 NCRSVD26
AH18 VCCP61 VCCP153 J26 AF29 VSS61 VSS150 B17 P27 VSS239 RSVD26 F6 T35
CB28 .47UA COREVCC AH19 J27 COREVCC CB500 10UC AF3 B20 P28 T2 NCRSVD27 T22
COREVCC VCCP62 VCCP154 COREVCC VSS62 VSS151 VSS240 RSVD27 NCRSVD28
AH21 VCCP63 VCCP155 J28 AF30 VSS63 VSS152 B24 P29 VSS241 RSVD28 Y3 T17
COREVCC AH22 J29 COREVCC AF6 B5 P30 AE3 NCRSVD29 T13
COREVCC VCCP64 VCCP156 COREVCC VSS64 VSS153 VSS242 RSVD29 NCRSVD30
AH25 VCCP65 VCCP157 J30 AF7 VSS65 VSS154 B8 P4 VSS243 MS_ID0 W1 T21
COREVCC AH26 J8 COREVCC AG10 C10 P7 E7 NCRSVD31
COREVCC AH27
VCCP66 VCCP158
J9 COREVCC AG13
VSS66 VSS155
C13 R2
VSS244 GROUND RSVD31
B13 NCRSVD32
T39
T38
COREVCC VCCP67 VCCP159 COREVCC VSS67 VSS156 VSS245 RSVD32 NCRSVD33
AH28 VCCP68 VCCP160 K23 AG16 VSS68 VSS157 C16 R23 VSS246 RSVD33 D14 T44
COREVCC AH29 K24 COREVCC AG17 C19 R24 E6 NCRSVD34 T40
COREVCC VCCP69 VCCP161 COREVCC VSS69 VSS158 VSS247 RSVD34 NCRSVD35
2
AH30 VCCP70 VCCP162 K25 AG20 VSS70 VSS159 C22 R25 VSS248 RSVD35 D1 T51 2
COREVCC AH8 K26 COREVCC AG23 C24 R26 E5 NCRSVD36 T58
COREVCC VCCP71 VCCP163 COREVCC VSS71 VSS160 VSS249 RSVD36
AH9 VCCP72 VCCP164 K27 AG24 VSS72 VSS161 C4 R27 VSS250
COREVCC AJ11 K28 COREVCC AG7 C7
COREVCC VCCP73 VCCP165 COREVCC VSS73 VSS162
AJ12 VCCP74 VCCP166 K29 AH1 VSS74 VSS163 D12
COREVCC AJ14 K30 COREVCC AH10 D15 FOX=PE077507-204-01
COREVCC VCCP75 VCCP167 COREVCC VSS75 VSS164
AJ15 VCCP76 VCC VCCP168 K8 AH13 VSS76 VSS165 D18
COREVCC AJ18 L8 COREVCC AH16 D21
COREVCC AJ19
VCCP77 VCCP169
M23 COREVCC AH17
VSS77 GROUND VSS166
D24
COREVCC VCCP78 VCCP170 COREVCC VSS78 VSS167
AJ21 VCCP79 VCCP171 M24 AH20 VSS79 VSS168 D3
COREVCC AJ22 M25 COREVCC AH23 D5
COREVCC VCCP80 VCCP172 COREVCC VSS80 VSS169
AJ25 VCCP81 VCCP173 M26 AH24 VSS81 VSS170 D6
COREVCC AJ26 M27 COREVCC AH3 D9
COREVCC VCCP82 VCCP174 COREVCC VSS82 VSS171
AJ8 VCCP83 VCCP175 M28 AH6 VSS83 VSS172 E11
COREVCC AJ9 M29 COREVCC AH7 E14
COREVCC VCCP84 VCCP176 COREVCC VSS84 VSS173 H10 H4 H11 H3
AK11 VCCP85 VCCP177 M30 AJ10 VSS85 VSS174 E17
COREVCC AK12 M8 COREVCC AJ13 E2 CPU-NUT-NT2 CPU-NUT-NT2 CPU-NUT-NT2 CPU-NUT-NT2
COREVCC VCCP86 VCCP178 COREVCC VSS86 VSS175
AK14 VCCP87 VCCP179 N23 AJ16 VSS87 VSS176 E20
COREVCC AK15 N24 COREVCC AJ17 E25
COREVCC VCCP88 VCCP180 COREVCC VSS88 VSS177
AK18 VCCP89 VCCP181 N25 AJ20 VSS89 VSS178 E26
COREVCC AK19 N26 COREVCC
COREVCC VCCP90 VCCP182 COREVCC
AK21 N27

1
COREVCC VCCP91 VCCP183 COREVCC FOX=PE077507-204-01
AK22 VCCP92 VCCP184 N28

FOX=PE077507-204-01

COREVCC
1 1
2,32,34,35 COREVCC COREVCC

C144 C708 C706 C19 C707 C710 C709 C20 C14 C18

10UC *22U/16V *22U/16V 22U/16V/Y5V *22U/16V *22U/16V/Y5V *22U/16V/Y5V 10UC 10UC 22U/16V

PROJECT : NT2
Quanta Computer Inc.
Inside processor socket cavity
Size Document Number R ev
Custom PRESCOTT(POWER/GND) 1A

Date: Tuesday, February 15, 2005 Sheet 3 of 38


8 7 6 5 4 3 2 1
1 2 3 4 5 6 7 8

C608 U47
14MXIN 50 52 ICH14MR R543 33/F ICH14M
XTAL_IN REF ICH14M 10
22P R546 Y8 36 +CPUCLK R126 49.9/F +CPUCLK C87 *10P CLKVDDA C622 .1U
TXC=14.318M CPUT2_SRCT7 -CPUCLK R121 49.9/F -CPUCLK C81 *10P CLKVDDA C58 4.7U
CPUC2_SRCC7 35
+MCHHCLK R559 49.9/F +MCHHCLK C98 *10P 48MCLKVCC C611 .1U
*2M 14.318MHz 41 +CPUHCLKR R572 33/F +CPUCLK -MCHHCLK R565 49.9/F -MCHHCLK C93 *10P 48MCLKVCC C610 2.2U
CPUT1 +CPUCLK 2
22P
14MXOUT 49
CK410 CPUC1 40 -CPUHCLKR R575 33/F -CPUCLK
-CPUCLK 2
+VGACLK
-VGACLK
R568
R574
49.9/F
49.9/F
+VGACLK
-VGACLK
C92
C85
*10P
*10P
CLKVCC
CLKVDD
C612
C620
.1U
.1U
XTAL_OUT +MCHHCLKR R560 33/F +MCHHCLK +ICHDCLK R578 49.9/F +ICHDCLK C80 *10P CLKVCC C607 .1U
CPUT0 44 +MCHHCLK 5
C613 -CLKPG 17 43 -MCHHCLKR R566 33/F -MCHHCLK -ICHDCLK R581 49.9/F -ICHDCLK C75 *10P CLKVDD C625 .1U
VTT_PWRGD# CPUC0 -MCHHCLK 5
+NEWCCLK R120 49.9/F +NEWCCLK C72 *10P CLKVDD C59 1000P
19 +MCHGCLKR R557 33/F +MCHGCLK -NEWCCLK R119 49.9/F -NEWCCLK C69 *10P CLKCPU_VDD C621 1000P
A SRCT1 +MCHGCLK 5 A
20 -MCHGCLKR R561 33/F -MCHGCLK +SATACLK R584 49.9/F +SATACLK C71 *10P CLKCPU_VDD C615 .1U
SRCC1 -MCHGCLK 5
MAINSMBCLK 46 -SATACLK R587 49.9/F -SATACLK C61 *10P CLKVCC C605 4.7U
MAINSMBDATA SCLK +VGACLKR R567 33/F +VGACLK ICHPCLK R136 *10K USB48M C132 *10P CLKVCC C606 .1U
47 SDATA SRCT2 22 +VGACLK 13
23 -VGACLKR R573 33/F -VGACLK +MCHGCLK R558 49.9/F 1394_48M C119 *10P CKREF_VCC C720 .1U
SRCC2 -VGACLK 13
BSEL0 18 -MCHGCLK R562 49.9/F ICHPCLK C141 *10P
2 BSEL0 FS_A
R264 0R BSEL1R 16 24 +ICHDCLKR R577 33/F +ICHDCLK PCMPCLK C152 *10P
2 BSEL1 FS_B SRCT3 +ICHDCLK 10
R539 0R BSEL2R 53 25 -ICHDCLKR R580 33/F -ICHDCLK LANPCLK C154 *10P
2 BSEL2 FS_C SRCC3 -ICHDCLK 10
591PCLK C153 *10P
3V L77 FBM2125HM330 CKREF_VCC 48 31 +NEWCCLKR R582 33/F +NEWCCLK MINIPCLK C147 *10P
VDD_REF SRCT5 +NEWCCLK 26
1 30 -NEWCCLKR R585 33/F -NEWCCLK ICH14M C149 *10P
VDD_PCI1 SRCC5 -NEWCCLK 26
3V L55 FBM2125HM330 7 +MCHGCLK C117 *10P
CLKVCC VDD_PCI2 -MCHGCLK C96 *10P
SRCT6 33
32 SIOCLK C34 *10P
CLKVDD SRCC6
3V 21 VDD_SRC1
L15 FBM2125HM330 28 26 +SATACLKR R583 33/F +SATACLK
VDD_SRC2 SRCT4_SATAP +SATACLK 10
34 27 -SATACLKR R586 33/F -SATACLK
VDD_SRC3 SRCC4_SATAN -SATACLK 10
3V CLKCPU_VDD 42
L13 CLKVDDAFBM2125HM330 VDD_CPU ICHPCLKR R550 33R ICHPCLK
PCIF_0 8 ICHPCLK 10
3V CLKVDDA 37 9
L14 FBM2125HM330 VDD_A PCIF_1
PCIF_2 10
SET IREF AS 2.32mA
R579 475/F I REF 39 54 PCMPCLKR R537 33R PCMPCLK
IREF PCI_0 PCMPCLK 20
55 LANPCLKR R535 33R LANPCLK
F S2 F S1 F S0 CPU
CLK48_VCC

PCI_1 LANPCLK 23
R140 10R 48MCLKVCC 11 56 591PCLKR R536 33R 591PCLK
VDD_48M PCI_2 591PCLK 30
48MCLKVCC 3 MINI1PCLKR R544 33R MINIPCLK
PCI_3 MINIPCLK 27
51 4 SIOCLKR R104 33R SIOCLK 0 1 0 200MHZ HOST CLOCK
VSS_REF PCI_4 SIOCLK 29
2 VSS_1 PCI_5 5
6 R555 22R 1394_48M
3V VSS_2 1394_48M 22
L23 0R 29 12 USB48MR R553 22R USB48M
VSS_USB USB_48M USB48M 10
B 45 VSS_CPU
B
13 VSS48 DOT_96C 15
38 VSS_A DOT_96T 14

ICS954101
BSEL1R R267 *22R 1394_48M
1394_48M 22
HWPG 30,33,34,36,37,38
5V 5V 11,12,19,21,25,26,27,28,29,30,32,33,34,35,37 BSEL2R R145 *22R R_14.318M
TP9

2
5VSUS 5VSUS 27,29,30,32,33,37,38 -CLKPG Q21 2N7002E
3V 3V 2,7,9,10,11,12,13,14,15,16,19,20,21,22,23,25,26,27,28,29,30,32,33,34,36,37,38
3VSUS 3VSUS 2,11,22,25,27,32,33 3V R133 10K 3 1
COREVCC COREVCC 2,3,32,34,35

Close to CPU BOM C2 NOTE:


COREVTT R44 62R -CPUIERR
-CPUIERR 2 ADD D52 BCCH501HZ01
R18 120R -CPUPROCHOT 3V
-CPUPROCHOT 2 These are for backdrive issue
CPU THARMAL CONTROL
30 -CPUHOT_551 1 2 3 1
R618 10 ICHSMBCLK 3 1 MAINSMBCLK MAINSMBCLK 9,26
D52 RB501H Q59
2N7002E 2.2K Q19 2N7002E
2

CPUPROCHOT 11 2,30,33 -PCURSTIN

2
C MOVE PLACE_3C R556 10K 3V C
-781THRMTRIP1 5V

3
R137 10K

2
Q52 2 Q53 Q20 2N7002E
R28 49.9/F COREVTT_R MMBT3904 MMBT3904
2 -CPUBPM0

3
R25 49.9/F 10 ICHSMBDATA 3 1 MAINSMBDATA MAINSMBDATA 9,26
2 -CPUBPM1
1

R39 49.9/F 2 Z0301 -781THRMTRIP


2 -CPUBPM2
R27 49.9/F R632 330R
2 -CPUBPM3
R49 49.9/F
2 -CPUBPM4
1

R40 49.9/F
2 -CPUBPM5

Close to CPU
LL_ID0 R103 *2.7K
2 LL_ID0
R42 49.9/F

PRESCPUINS1
2 CPUTDI Close to CPU

Close to ITP R53 49.9/F


2 CPUTMS
CPU781_3V R620 100/F 3V
2 CPUTDO Close to ITP R51 49.9/F

2,5 -CPURST R36 62R C690


5VPCU

2
.1U *MMBT3906 Q15 *MMBT3904
U50

1
8 1 Q14 2 -PRESCPUINS3R101 *10K -PRESCPUINS2 3 1
13,24,30 ECSMBCLK SMCLK VCC
7 2 CPUTHRM+ 2 C33 *.1U R100 *2.7K
13,24,30 ECSMBDATA 5VPCU

3
R43 49.9/F -CPUTRST SMDATA DXP C695
-CPUTRST 2
-781THRMTRIP 6 3 2200P C32 *.1U R98 *10K
R45 49.9/F -ALT DXN
CPUTCK 2 CPUTHRM- 2
3V R633 2.2K 5 4
GND -OVT PRESCPUINSYS 34
D Close to ITP D
GMT-781 M AX6657
-781OVT

Close to ICH R207 *220R RVCC3V


2,11 -CPUITPDBR

11 -ICHTHRM R619 0R

PROJECT : NT2
COREVTT_L
R80 62R -CPUBREQ0
-CPUBREQ0 2,5
Quanta Computer Inc.
R56 100R CPUPG
CPUPG 2,11 Size Document Number R ev
Custom CLOCK GENERATOR 3B

Date: Tuesday, January 25, 2005 Sheet 4 of 38


1 2 3 4 5 6 7 8
5 4 3 2 1

-CPUD[0..63] -CPUA[3..35] GMCHEXP_TXP[0..15]


2 -CPUD[0..63] -CPUA[3..35] 2 13 GMCHEXP_TXP[0..15]
U49A U49B GMCHEXP_TXN[0..15]
13 GMCHEXP_TXN[0..15]
-CPUD0 J33 H29 -CPUA3 GMCHEXP_TXP0 C669 .1U/X7R CGMCHEXP_TXP0 C10 R3 GMCHDMI_TXP0
-CPUD1 HD0 HA3# -CPUA4 GMCHEXP_TXN0 C667 .1U/X7R CGMCHEXP_TXN0 C9 EXP_TXP0 DMI_TXP0 GMCHDMI_TXN0
H33 K29 T3
-CPUD2
-CPUD3
J34
HD1
HD2
HA4#
HA5# J29 -CPUA5
-CPUA6
GMCHEXP_TXP1 C666
GMCHEXP_TXN1 C665
.1U/X7R
.1U/X7R
CGMCHEXP_TXP1 A9
CGMCHEXP_TXN1 A8
EXP_TXN0
EXP_TXP1
GRANTSDALE DMI_TXN0
DMI_TXP1 T1 GMCHDMI_TXP1
GMCHDMI_TXN1 GMCHEXP_RXP[0..15]
G35 G30 U1
-CPUD4
-CPUD5
H35
G34
HD3
HD4
HOST HA6#
HA7# G32
K30
-CPUA7
-CPUA8
GMCHEXP_TXP2 C663
GMCHEXP_TXN2 C662
.1U/X7R
.1U/X7R
CGMCHEXP_TXP2 C8
CGMCHEXP_TXN2 C7
EXP_TXN1
EXP_TXP2 2 OF 8
DMI_TXN1
DMI_TXP2 U3
V3
GMCHDMI_TXP2
GMCHDMI_TXN2
13 GMCHEXP_RXP[0..15]
GMCHEXP_RXN[0..15]
HD5 HA8# EXP_TXN2 DMI_TXN2 13 GMCHEXP_RXN[0..15]
-CPUD6 F34 L29 -CPUA9 GMCHEXP_TXP3 C661 .1U/X7R CGMCHEXP_TXP3 A7 V5 GMCHDMI_TXP3
-CPUD7 HD6 HA9# -CPUA10 GMCHEXP_TXN3 C659 .1U/X7R CGMCHEXP_TXN3 A6 EXP_TXP3 DMI_TXP3 GMCHDMI_TXN3
G33 HD7 HA10# M30 EXP_TXN3 DMI_TXN3 W5

PCI EXPRESS (VGA)


-CPUD8 D34 L31 -CPUA11 GMCHEXP_TXP4 C657 .1U/X7R CGMCHEXP_TXP4 C6 U5 GMCHDMI_RXP0
D
-CPUD9 HD8 HA11# -CPUA12 GMCHEXP_TXN4 C658 .1U/X7R CGMCHEXP_TXN4 C5 EXP_TXP4 DMI_RXP0 GMCHDMI_RXN0 COREVCC D
C33 HD9 HA12# L28 EXP_TXN4 DMI_RXN0 U6 2,3,32,34,35 COREVCC
-CPUD10 D33 J28 -CPUA13 GMCHEXP_TXP5 C633 .1U/X7R CGMCHEXP_TXP5 C2 T9 GMCHDMI_RXP1 1.5V
HD10 HA13# EXP_TXP5 DMI_RXP1 7,10,12,14,26,32,36,37 1.5V
-CPUD11 B34 K27 -CPUA14 GMCHEXP_TXN5 C634 .1U/X7R CGMCHEXP_TXN5 D2 T8 GMCHDMI_RXN1
HD11 HA14# EXP_TXN5 DMI_RXN1

DMI
-CPUD12 C34 K33 -CPUA15 GMCHEXP_TXP6 C646 .1U/X7R CGMCHEXP_TXP6 E3 V7 GMCHDMI_RXP2
-CPUD13 HD12 HA15# -CPUA16 GMCHEXP_TXN6 C647 .1U/X7R CGMCHEXP_TXN6 F3 EXP_TXP6 DMI_RXP2 GMCHDMI_RXN2
B33 HD13 HA16# M28 EXP_TXN6 DMI_RXN2 V8
-CPUD14 C32 R29 -CPUA17 GMCHEXP_TXP7 C635 .1U/X7R CGMCHEXP_TXP7 F1 V10 GMCHDMI_RXP3 GMCHDMI_TXP[0..3]
HD14 HA17# EXP_TXP7 DMI_RXP3 GMCHDMI_TXP[0..3] 10
-CPUD15 B32 L26 -CPUA18 GMCHEXP_TXN7 C636 .1U/X7R CGMCHEXP_TXN7 G1 U10 GMCHDMI_RXN3
-CPUD16 HD15 HA18# -CPUA19 GMCHEXP_TXP8 C648 .1U/X7R CGMCHEXP_TXP8 G3 EXP_TXN7 DMI_RXN3 GMCHDMI_TXN[0..3]
E28 HD16 HA19# N26 EXP_TXP8 GMCHDMI_TXN[0..3] 10
-CPUD17 C30 M26 -CPUA20 GMCHEXP_TXN8 C649 .1U/X7R CGMCHEXP_TXN8 H3
-CPUD18 HD17 HA20# -CPUA21 GMCHEXP_TXP9 C637 .1U/X7R CGMCHEXP_TXP9 H1 EXP_TXN8
D29 HD18 HA21# N31 EXP_TXP9

GRANTSDALE 1 OF 8
-CPUD19 H28 P26 -CPUA22 GMCHEXP_TXN9 C638 .1U/X7R CGMCHEXP_TXN9 J1 A2 GMCHDMI_RXP[0..3]
HD19 HA22# EXP_TXN9 NC_1 GMCHDMI_RXP[0..3] 10
-CPUD20 G29 N29 -CPUA23 GMCHEXP_TXP10 C650 .1U/X7R CGMCHEXP_TXP10 J3 A34
-CPUD21 HD20 HA23# -CPUA24 GMCHEXP_TXN10 C651 .1U/X7R CGMCHEXP_TXN10 K3 EXP_TXP10 NC_2 GMCHDMI_RXN[0..3]
J27 HD21 HA24# P28 EXP_TXN10 NC_3 A35 GMCHDMI_RXN[0..3] 10
-CPUD22 F28 R28 -CPUA25 GMCHEXP_TXP11 C639 .1U/X7R CGMCHEXP_TXP11 K1 AA12

STRAPPING AND GPIO


-CPUD23 HD22 HA25# -CPUA26 GMCHEXP_TXN11 C640 .1U/X7R CGMCHEXP_TXN11 L1 EXP_TXP11 NC_4
F27 HD23 HA26# N33 EXP_TXN11 NC_5 AB12
-CPUD24 E27 T27 -CPUA27 GMCHEXP_TXP12 C652 .1U/X7R CGMCHEXP_TXP12 L3 AC23 -ICH SYNC -ICHSYNC 11
-CPUD25 HD24 HA27# -CPUA28 GMCHEXP_TXN12 C653 .1U/X7R CGMCHEXP_TXN12 M3 EXP_TXP12 NC_6
E25 HD25 HA28# T31 EXP_TXN12 NC_7 AC24
-CPUD26 G25 U28 -CPUA29 GMCHEXP_TXP13 C641 .1U/X7R CGMCHEXP_TXP13 M1 AD30 -ICHPLTRST
HD26 HA29# EXP_TXP13 NC_8 -ICHPLTRST 11,13,26,28
-CPUD27 J25 T26 -CPUA30 GMCHEXP_TXN13 C642 .1U/X7R CGMCHEXP_TXN13 N1 AG6
-CPUD28 HD27 HA30# -CPUA31 GMCHEXP_TXP14 C654 .1U/X7R CGMCHEXP_TXP14 N3 EXP_TXN13 NC_9
K25 HD28 HA31# T29 EXP_TXP14 NC_10 AH24
-CPUD29 L25 GMCHEXP_TXN14 C655 .1U/X7R CGMCHEXP_TXN14 P3 AJ14
-CPUD30 HD29 GMCHEXP_TXP15 C643 .1U/X7R CGMCHEXP_TXP15 P1 EXP_TXN14 NC_11
L23 HD30 HREQ0# F33 -CPUREQ0 2 EXP_TXP15
-CPUD31 K23 E32 GMCHEXP_TXN15 C644 .1U/X7R CGMCHEXP_TXN15 R1 R599 *1K GMCH_2.5V
HD31 HREQ1# -CPUREQ1 2 EXP_TXN15
-CPUD32 J22 H31 GMCHEXP_RXN15 E11 A16 MCH_NC12 R598 1K
HD32 HREQ2# -CPUREQ2 2 EXP_RXP0 EXP_SLR
-CPUD33 J24 G31 GMCHEXP_RXP15 F11 C15 MYTYPE R108 1K
HD33 HREQ3# -CPUREQ3 2 EXP_RXN0 MTYPE
-CPUD34 K22 F31 GMCHEXP_RXN14 J11
HD34 HREQ4# -CPUREQ4 2 EXP_RXP1
-CPUD35 J21 J31 GMCHEXP_RXP14 H11 M13 1.5V
HD35 HADSTB0# -CPUADSTB0 2 EXP_RXN1 DREFCLKP
-CPUD36
-CPUD37
M21 HD36 HADSTB1# N27 -CPUADSTB1 2
GMCHEXP_RXN13 F9
GMCHEXP_RXP13 E9 EXP_RXP2 DREFCLKN M12 Memory Type Select Strap
H23 HD37 HPCREQ# E31 -CPUCREQ 2 EXP_RXN2
-CPUD38 GMCHEXP_RXN12 F7 K16 -EXTTS R107 10K
C M19 HD38 EXP_RXP3 EXTTS#
M14 -ICH SYNC
GMCH_2.5V 0 DDR2
C
-CPUD39 K21 HD39 HDSTBP0# E33 -CPUDSTB+0 2
GMCHEXP_RXP12 E7
EXP_RXN3 ICH_SYNC# MTYPE
-CPUD40 GMCHEXP_RXN11 B3 AF7 -ICHPLTRST DDR1
-CPUD41
H20
H19
HD40 HDSTBN0# E35
E34
-CPUDSTB-0 2
GMCHEXP_RXP11 B4 EXP_RXP4 RSTIN# 1
HD41 HDINV0# -CPUDBI0 2 EXP_RXN4
-CPUD42 M18 H26 GMCHEXP_RXN10 D5
HD42 HDSTBP1# -CPUDSTB+1 2 EXP_RXP5
-CPUD43
-CPUD44
K18 HD43 HDSTBN1# F26 -CPUDSTB-1 2
GMCHEXP_RXP10 E5
GMCHEXP_RXN9 EXP_RXN5 DDC_DATA L14 MCH_NC13
MCH_NC14
PCI Express Static Lane Reversal
K17 HD44 HDINV1# J26 -CPUDBI1 2 G6 EXP_RXP6 DDC_CLK M15
-CPUD45 G18 J19 GMCHEXP_RXP9 G5
HD45 HDSTBP2# -CPUDSTB+2 2 EXP_RXN6 0 Lane numbers are reversed
-CPUD46
-CPUD47
H18 HD46 HDSTBN2# F19 -CPUDSTB-2 2
GMCHEXP_RXN8
GMCHEXP_RXP8
H8 EXP_RXP7 RED F14 GMCH_2.5V EXP_SLR
-CPUD48
F17
A25
HD47 HDINV2# K19
B29
-CPUDBI2 2
GMCHEXP_RXN7
H7
J6
EXP_RXN7 RED# G14
D14
1 Normal operation
HD48 HDSTBP3# -CPUDSTB+3 2 EXP_RXP8 GREEN
-CPUD49 C27 C29 GMCHEXP_RXP7 J5 E14

VGA
HD49 HDSTBN3# -CPUDSTB-3 2 EXP_RXN8 GREEN#
-CPUD50 C31 B26 GMCHEXP_RXN6 K8 H14
HD50 HDINV3# -CPUDBI3 2 EXP_RXP9 BLUE
-CPUD51 B30 GMCHEXP_RXP6 K7 J14
-CPUD52 HD51 GMCHEXP_RXN5 EXP_RXN9 BLUE#
B31 HD52 HADS# M31 -CPUADS 2 L6 EXP_RXP10
-CPUD53 A31 N34 GMCHEXP_RXP5 L5 E12 MCH _HSYNC R110 10K
HD53 HTRDY# -CPUTRDY 2 EXP_RXN10 HSYNC
-CPUD54 B27 M32 GMCHEXP_RXN4 P10 D12 MCH_VSYNC R111 10K
HD54 HDRDY# -CPUDRDY 2 EXP_RXP11 VSYNC
-CPUD55 A29 J35 GMCHEXP_RXP4 R10
HD55 HDEFER# -CPUDEFER 2 EXP_RXN11
-CPUD56 C28 N35 GMCHEXP_RXN3 M8 A15
HD56 HHITM# -CPUHITM 2 EXP_RXP12 REFSET
-CPUD57 A28 L34 GMCHEXP_RXP3 M7
HD57 HHIT# -CPUHIT 2 EXP_RXN12
-CPUD58 C25 L33 GMCHEXP_RXN2 N6 AL28
HD58 HLOCK# -CPULOCK 2 EXP_RXP13 NC_12
-CPUD59 C26 R33 GMCHEXP_RXP2 N5 AN19
HD59 HBREQ0# -CPUBREQ0 2,4 EXP_RXN13 NC_13
-CPUD60 D27 M35 GMCHEXP_RXN1 P7 AP1
HD60 HBNR# -CPUBNR 2 EXP_RXP14 NC_14
-CPUD61 A27 E30 GMCHEXP_RXP1 P8 AP35
HD61 HBPRI# -CPUBPRI 2 EXP_RXN14 NC_15
-CPUD62 E24 L35 GMCHEXP_RXN0 R6 AR1
HD62 HDBSY# -CPUDBSY 2 EXP_RXP15 NC_16
-CPUD63 B25 HD63 HRS0# K34 -CPURS0 2
GMCHEXP_RXP0 R5 EXP_RXN15 NC_17 AR2 ANALOG RGB/CRT GUIDELINES FOR
P34 AR34
HRS1#
J32
-CPURS1 2 NC_18
AR35 GRANTSDALE

NC/RESERVED
HRS2# -CPURS2 2 NC_19
HCPURST# G24 -CPURST 2,4 NC_20 B1
AG7 B35 SIGNAL GUIDELINE
B PWROK ECPWROK 10,30 NC_21 B
HEDRDY# P33 -CPUEDRDY 2 NC_22 C16
GMCHSCOMP D24 +MCHGCLK A11 E16 RED,GREEN,BLUE TIE DIRECTLY TO 2.5V
HSCOMP 4 +MCHGCLK GCLKP NC_23
4 -MCHGCLK -MCHGCLK B11 F12
R601 GCLKN NC_24 RED#,GREEN#,BLUE# TIE DIRECTLY TO 2.5V
NC_25 F24
GMCHRCOMP B23 M23 +MCHHCLK G12
HRCOMP HCLKP +MCHHCLK 4 NC_26 TIE DIRECTLY TO 2.5V
M22 -MCHHCLK H12 VCCA_DAC
HCLKN -MCHHCLK 4 NC_27
20/F H15
MCHGTLSWING A23 NC_28 VSSA_DAC TIE DIRECTLY TO GND
HSWING NC_29 H17
BSEL0 H16 FSBSEL0 2 NC_30 J12
R109 24.9/F MCH_EXP_COMPY10 R31 REFSET TIE DIRECTLY TO GND
1.5V EXP_COMPO RSV_34
MCHGTLVREF A24 W10 R35
HVREF EXP_COMPI RSV_35 DREFCLKINP TIE DIRECTLY TO 1.5V
BSEL1 E15 FSBSEL1 2 RSV_36 U30
RSV_37 V30
MCH_NC39 K13 V31 DREFCLKINN TIE DIRECTLY TO GND
MCH_NC40 J13 SDVO_CTRLDATA RSV_38
BSEL2 D17 FSBSEL2 2 SDVO_CTRLCLK HSYNC Tie to ground
through 10K
GRANTSDALE-DDR2
15MILS
VSYNC Tie to ground
GRANTSDALE-DDR2 through 10K

15MILS
DDCA_DATA NC
R604 301/F
COREVTT NC
DDCA_CLK

R603 102/F
R605 49.9/F
COREVTT PLACEMENT NOTICE : DDCA_DATA NC
R606 100/F
C675 .01U/X7R
C677 .1U
1. GMCHSWING, GMCHVREF, GMCHHLSWING, GMCHHLVREF DDCA_CLK NC

MCHGTLSWING RELATIVE R/C MUST NEAR GMCH PIN D_REFSCKINP TIE DIRECTLY TO 1.5V
C678 220P
2. GMCHRCOMP AND AGPRCOMP RELATIVE R/C MUST NEAR
A
GMCHSWING = 1/4 * GMCHVTT MCHGTLVREF GMCH PIN
D_REFSCKINN TIE DIRECTLY TO GND A

3. GMCHRCOMP AND AGPRCOMP RELATIVE R/C MUST NEAR


COREVTT R607 60.4/F GMCHSCOMP GMCH PIN
GMCHVREF = 0.67 * COREVTT=0.8V 4. GMCHREFSET R/C MUST NEAR GMCH PIN
C679
5. GMCHHLRCOMP R/C MUST NEAR GMCH PIN PROJECT : NT2
2.2P
6. GMCHBSEL0 AND GMCHBSEL1 MUST NEAR GMCH PIN Quanta Computer Inc.
Size Document Number R ev
7. -AGPRST R/C MUST NEAR GMCH PIN Custom 1A
GMCH(Processor System Bus)
Date: Tuesday, January 25, 2005 Sheet 5 of 38
5 4 3 2 1
5 4 3 2 1

U49C U49D
DDRMDA0 AE3 AG1 DDRDQSA0 DDRMDB0 AH4 AK5 DDRDQSB0
DDRMDA1 SDQ_A0 SDQS_A0 -DDRDQSA0 DDRMDB1 SDQ_B0 SDQS_B0 -DDRDQSB0
AF3 AG2 AJ6 AL4
DDRMDA2
DDRMDA3
AH3
SDQ_A1
SDQ_A2 GRANTSDALE
SDQS_A0#
SDQS_A1 AL3 DDRDQSA1
-DDRDQSA1
DDRMDB2
DDRMDB3
AL6
SDQ_B1
SDQ_B2
GRANTSDALE SDQS_B0#
SDQS_B1 AK10 DDRDQSB1
-DDRDQSB1 +DIMMCLKA[0..2]
AJ2 SDQ_A3 SDQS_A1# AL2 AN6 SDQ_B3 SDQS_B1# AH10 +DIMMCLKA[0..2] 9
DDRMDA4 AE2 AP7 DDRDQSA2 DDRMDB4 AG9 AK13 DDRDQSB2
DDRMDA5 AE1
SDQ_A4 SDQS_A2
AR7 -DDRDQSA2 DDRMDB5 AH7
SDQ_B4 4 OF 8 SDQS_B2
AL14 -DDRDQSB2 -DIMMCLKA[0..2]
DDRMDA6 AG3
SDQ_A5 3 OF 8 SDQS_A2#
AF17 DDRDQSA3 DDRMDB6 AL5
SDQ_B5 SDQS_B2#
AD20 DDRDQSB3
-DIMMCLKA[0..2] 9
DDRMDA7 SDQ_A6 SDQS_A3 -DDRDQSA3 DDRMDB7 SDQ_B6 SDQS_B3 -DDRDQSB3 DDRMDA[0..63]
AH2 SDQ_A7 SDQS_A3# AG17 AM5 SDQ_B7 SDQS_B30# AF20 DDRMDA[0..63] 9
DDRMDA8 AK2 AM30 DDRDQSA4 DDRMDB8 AJ8 AH25 DDRDQSB4
DDRMDA9 SDQ_A8 SDQS_A4 -DDRDQSA4 DDRMDB9 SDQ_B8 SDQS_B4 -DDRDQSB4 DDRMAA[0..13]
AK3 SDQ_A9 SDQS_A4# AL29 AL8 SDQ_B9 SDQS_B4# AG26 DDRMAA[0..13] 9
DDRMDA10 AN4 AG35 DDRDQSA5 DDRMDB10 AF11 AH28 DDRDQSB5
DDRMDA11 SDQ_A10 SDQS_A5 -DDRDQSA5 DDRMDB11 SDQ_B10 SDQS_B5 -DDRDQSB5 DDRBAA[0..2]
D
AP4 SDQ_A11 SDQS_A5# AG33 AE11 SDQ_B11 SDQS_B5# AH30 DDRBAA[0..2] 9 D
DDRMDA12 AJ1 AA34 DDRDQSA6 DDRMDB12 AJ7 AB31 DDRDQSB6
DDRMDA13 SDQ_A12 SDQS_A6 -DDRDQSA6 DDRMDB13 SDQ_B12 SDQS_B6 -DDRDQSB6 DDRDQSA[0..7]
AJ3 SDQ_A13 SDQS_A6# AA35 AL7 SDQ_B13 SDQS_B6# AC30 DDRDQSA[0..7] 9
DDRMDA14 AP2 U34 DDRDQSA7 DDRMDB14 AG10 W27 DDRDQSB7
DDRMDA15 SDQ_A14 SDQS_A7 -DDRDQSA7 DDRMDB15 SDQ_B14 SDQS_B7 -DDRDQSB7 -DDRDQSA[0..7]
AP3 SDQ_A15 SDQS_A7# U35 AG11 SDQ_B15 SDQS_B7# Y28 -DDRDQSA[0..7] 9
DDRMDA16 AR5 DDRMDB16 AF13
DDRMDA17 SDQ_A16 DDRMDB17 SDQ_B16 -DDRCSA[0..1]
AP6 AH12
DDRMDA18
DDRMDA19
AP9
AN9
SDQ_A17
SDQ_A18
DDR SDM_A0 AF2
AL1
DDRSDMA0
DDRSDMA1
DDRMDB18
DDRMDB19
AD14
AD15
SDQ_B17
SDQ_B18
DDR SDM_B0 AJ5
AH9
DDRSDMB0
DDRSDMB1 DDRCKEA[0..1]
-DDRCSA[0..1] 9

SDQ_A19 SDM_A1 SDQ_B19 SDM_B1 DDRCKEA[0..1] 9


DDRMDA20 AN5 AN7 DDRSDMA2 DDRMDB20 AD12 AH13 DDRSDMB2 -DDRRASA
SDQ_A20 SDM_A2 SDQ_B20 SDM_B2 -DDRRASA 9
DDRMDA21 AP5 AH16 DDRSDMA3 DDRMDB21 AE13 AG20 DDRSDMB3 -DDRCASA
DDRMDA22
DDRMDA23
AN8
AR8
SDQ_A21
SDQ_A22
CHANNEL A SDM_A3
SDM_A4 AK29
AG34
DDRSDMA4
DDRSDMA5
DDRMDB22
DDRMDB23
AG14
AF14
SDQ_B21
SDQ_B22
CHANNEL B SDM_B3
SDM_B4 AG24
AH31
DDRSDMB4
DDRSDMB5
-DDRWEA
-DDRCASA 9
-DDRWEA 9
DDRMDA24 SDQ_A23 SDM_A5 DDRSDMA6 DDRMDB24 SDQ_B23 SDM_B5 DDRSDMB6 DDRSDMA[0..7]
AL17 SDQ_A24 SDM_A6 AA33 AK19 SDQ_B24 SDM_B6 AD24 DDRSDMA[0..7] 9
DDRMDA25 AJ17 U33 DDRSDMA7 DDRMDB25 AH19 W31 DDRSDMB7
DDRMDA26 SDQ_A25 SDM_A7 DDRMDB26 SDQ_B25 SDM_B7 DDRSODTA[0..3]
AF19 SDQ_A26 AH21 SDQ_B26 DDRSODTA[0..3] 9
DDRMDA27 AH18 DDRMDB27 AD21
DDRMDA28 SDQ_A27 DDRMAA0 DDRMDB28 SDQ_B27 DDRMAB0
AK16 SDQ_A28 SMA_A0 AP26 AD18 SDQ_B28 SMA_B0 AM15
DDRMDA29 AF16 AR24 DDRMAA1 DDRMDB29 AL18 AR15 DDRMAB1
DDRMDA30 SDQ_A29 SMA_A1 DDRMAA2 DDRMDB30 SDQ_B29 SMA_B1 DDRMAB2
AD17 SDQ_A30 SMA_A2 AL24 AE22 SDQ_B30 SMA_B2 AN15
DDRMDA31 AE19 AP23 DDRMAA3 DDRMDB31 AF22 AL15 DDRMAB3 +DIMMCLKB[0..2]
SDQ_A31 SMA_A3 SDQ_B31 SMA_B3 +DIMMCLKB[0..2] 9
DDRMDA32 AK27 AR23 DDRMAA4 DDRMDB32 AF24 AP14 DDRMAB4
DDRMDA33 SDQ_A32 SMA_A4 DDRMAA5 DDRMDB33 SDQ_B32 SMA_B4 DDRMAB5 -DIMMCLKB[0..2]
AJ28 SDQ_A33 SMA_A5 AP22 AF25 SDQ_B33 SMA_B5 AM12 -DIMMCLKB[0..2] 9
DDRMDA34 AL31 AN23 DDRMAA6 DDRMDB34 AL26 AP13 DDRMAB6
DDRMDA35 SDQ_A34 SMA_A6 DDRMAA7 DDRMDB35 SDQ_B34 SMA_B6 DDRMAB7 DDRMDB[0..63]
AK31 SDQ_A35 SMA_A7 AP21 AJ26 SDQ_B35 SMA_B7 AL12 DDRMDB[0..63] 9
DDRMDA36 AH27 AN22 DDRMAA8 DDRMDB36 AF23 AN13 DDRMAB8
DDRMDA37 SDQ_A36 SMA_A8 DDRMAA9 DDRMDB37 SDQ_B36 SMA_B8 DDRMAB9 DDRMAB[0..13]
AL27 SDQ_A37 SMA_A9 AN21 AD23 SDQ_B37 SMA_B9 AR12 DDRMAB[0..13] 9
DDRMDA38 AN30 AM27 DDRMAA10 DDRMDB38 AL25 AP15 DDRMAB10
DDRMDA39 SDQ_A38 SMA_A10 DDRMAA11 DDRMDB39 SDQ_B38 SMA_B10 DDRMAB11 DDRBAB[0..2]
AL30 SDQ_A39 SMA_A11 AM21 AJ25 SDQ_B39 SMA_B11 AP11 DDRBAB[0..2] 9
DDRMDA40 AH33 AR20 DDRMAA12 DDRMDB40 AK32 AR11 DDRMAB12
DDRMDA41 SDQ_A40 SMA_A12 DDRMAA13 DDRMDB41 SDQ_B40 SMA_B12 DDRMAB13 DDRDQSB[0..7]
C AH35 SDQ_A41 SMA_A13 AP31 AJ31 SDQ_B41 SMA_B13 AL33 DDRDQSB[0..7] 9 C
DDRMDA42 AF33 DDRMDB42 AG31
DDRMDA43 SDQ_A42 DDRMDB43 SDQ_B42 -DDRDQSB[0..7]
AE33 SDQ_A43 AF28 SDQ_B43 -DDRDQSB[0..7] 9
DDRMDA44 AJ33 AN28 -DDRWEA DDRMDB44 AJ29 AP17 -DDRWEB
DDRMDA45 SDQ_A44 SWE_A# -DDRCASA DDRMDB45 SDQ_B44 SWE_B# -DDRCASB -DDRCSB[0..1]
AJ34 SDQ_A45 SCAS_A# AN29 AK33 SDQ_B45 SCAS_B# AP18 -DDRCSB[0..1] 9
DDRMDA46 AG32 AP27 -DDRRASA DDRMDB46 AG30 AN17 -DDRRASB
DDRMDA47 SDQ_A46 SRAS_A# DDRMDB47 SDQ_B46 SRAS_B# DDRCKEB[0..1]
AF34 SDQ_A47 AG27 SDQ_B47 DDRCKEB[0..1] 9
DDRMDA48 AD31 DDRMDB48 AF27 -DDRRASB
SDQ_A48 SDQ_B48 -DDRRASB 9
DDRMDA49 AD35 AR27 DDRBAA0 DDRMDB49 AE27 AR16 DDRBAB0 -DDRCASB
SDQ_A49 SBS_A0 SDQ_B49 SBS_B0 -DDRCASB 9
DDRMDA50 Y33 AN27 DDRBAA1 DDRMDB50 AC26 AN16 DDRBAB1 -DDRWEB
SDQ_A50 SBS_A1 SDQ_B50 SBS_B1 -DDRWEB 9
DDRMDA51 W34 AN20 DDRBAA2 DDRMDB51 AB26 AN11 DDRBAB2
DDRMDA52 SDQ_A51 SBS_A2 DDRMDB52 SDQ_B51 SBS_B2 DDRSDMB[0..7]
AE35 SDQ_A52 AE31 SDQ_B52 DDRSDMB[0..7] 9
DDRMDA53 AE34 DDRMDB53 AE29
DDRMDA54 SDQ_A53 -DDRCSA0 DDRMDB54 SDQ_B53 -DDRCSB0 DDRSODTB[0..3]
AA32 SDQ_A54 SCS_A0# AR29 AC28 SDQ_B54 SCS_B0# AN33 DDRSODTB[0..3] 9
DDRMDA55 Y35 AP32 -DDRCSA1 DDRMDB55 AB27 AM34 -DDRCSB1
DDRMDA56 SDQ_A55 SCS_A1# -DDRCSA2_NC DDRMDB56 SDQ_B55 SCS_B1# -DDRCSB2_NC
V34 SDQ_A56 SCS_A2# AR28 AA28 SDQ_B56 SCS_B2# AP34
DDRMDA57 V33 AN31 -DDRCSA3_NC DDRMDB57 W29 AN34 -DDRCSB3_NC
DDRMDA58 SDQ_A57 SCS_A3# DDRMDB58 SDQ_B57 SCS_B3#
R32 SDQ_A58 V28 SDQ_B58
DDRMDA59 R34 AP19 DDRCKEA0 DDRMDB59 V29 AP10 DDRCKEB0
DDRMDA60 SDQ_A59 SCKE_A0 DDRCKEA1 DDRMDB60 SDQ_B59 SCKE_B0 DDRCKEB1
W35 SDQ_A60 SCKE_A1 AM18 Y26 SDQ_B60 SCKE_B1 AN10
DDRMDA61 W33 AN18 DDRCKEA2_NC DDRMDB61 AA29 AR9 DDRCKEB2_NC
DDRMDA62 SDQ_A61 SCKE_A2 DDRCKEA3_NC DDRMDB62 SDQ_B61 SCKE_B2 DDRCKEB3_NC
T33 SDQ_A62 SCKE_A3 AR19 W26 SDQ_B62 SCKE_B3 AM9
DDRMDA63 T35 DDRMDB63 U26
SDQ_A63 +DIMMCLKA0 SDQ_B63 +DIMMCLKB0
SCLK_A0 AN26 SCLK_B0 AH22
T69 REVDDRMAA13AB33 AP25 -DIMMCLKA0 DDRSODTB0 AM33 AG23 -DIMMCLKB0
DDRSODTA0 AP30 RSV_4 SCLK_A0# DDRSODTB1 SODT_B0 SCLK_B0#
SODT_A0 AL34 SODT_B1
DDRSODTA1 AN32 AM2 +DIMMCLKA1 DDRSODTB2 AL35 AK9 +DIMMCLKB1
DDRSODTA2 AP29 SODT_A1 SCLK_A1 -DIMMCLKA1 DDRSODTB3 SODT_B2 SCLK_B1 -DIMMCLKB1
SODT_A2 SCLK_A1# AM3 AK34 SODT_B3 SCLK_B1# AL9
DDRSODTA3 AP33
SODT_A3 +DIMMCLKA2 REVDDRMAB13 +DIMMCLKB2
B SCLK_A2 AC34 T70 AD32 RSV_16 SCLK_B2 AE26 B
T71 MCHRSV_TP1 AH15 AC35 -DIMMCLKA2 T74 MCHRSV_TP3 AK15 AE25 -DIMMCLKB2
MCHRSV_TP0 RSV_TP1 SCLK_A2# MCHRSV_TP2 RSV_TP3 SCLK_B2#
T72 AE16 RSV_TP0 T73 AN14 RSV_TP2
AN25 +DIMMCLKA3_NC AL23 +DIMMCLKB3_NC
SCLK_A3 -DIMMCLKA3_NC SCLK_B3 -DIMMCLKB3_NC
SCLK_A3# AM24 SCLK_B3# AK22
MCH_SLWIN0 AJ12 MCH_SLWIN1 AF9
SM_SLEWIN0 +DIMMCLKA4_NC SM_SLEWIN1 +DIMMCLKB4_NC
AK12 SM_SLEWOUT0 SCLK_A4 AN3 AE10 SM_SLEWOUT1 SCLK_B4 AJ11
AN2 -DIMMCLKA4_NC AL11 -DIMMCLKB4_NC
SCLK_A4# SCLK_B4#
MEMVREFA AE7 AC33 +DIMMCLKA5_NC MEMVREFB AE8 AD28 +DIMMCLKB5_NC
SVREF0 SCLK_A5 -DIMMCLKA5_NC SVREF1 SCLK_B5 -DIMMCLKB5_NC
SCLK_A5# AB34 SCLK_B5# AD29
MCHSRCOMP1 AG8
GRANTSDALE-DDR2 MCHSRCOMP0 SRCOMP1
AG4 SRCOMP0
MCHCOMP1 AE5
MCHCOMP0 SOCOMP1
AF5 SOCOMP0
GRANTSDALE-DDR2

MEMVREFA R590 1K/F 1.8VSUS


1.8VSUS
MEMVREFB R594 40.2/F MCHCOMP1 R592 80.6/F MCHSRCOMP0
R114 0R R589 1K/F R595 40.2/F MCHCOMP0 R597 80.6/F MCHSRCOMP1
C50
C645 .1U .1U

A A
MEMVREFB
C53 .1U
1. MEMVREFA AND MEMVREFB RELATIVE R/C
MUST NEAT GMCH PIN
PROJECT : NT2
Quanta Computer Inc.
Size Document Number R ev
Custom GMCH DDR2 CHANNEL A 1A

Date: Tuesday, January 25, 2005 Sheet 6 of 38


5 4 3 2 1
5 4 3 2 1

L12 0C 1.5VEXPRESS
1.5V 1.5VEXPRESS
U49E

.1U CB184 1.5V AA13 T19 1.5V CB213 .1U


.1U CB121 1.5V VCC_1 VCC_82 1.5V CB150 .1U
1.4A AA14 VCC_2 VCC_83 T20
U49H .1U CB154 1.5V AA16 T21 1.5V CB198 .1U
CB197
CB171
.1U
.1U
1.8VSUS
1.8VSUS
AK35
AM10
VCCSM_1 VCC_EXP_1 W1
W2
1.5VEXPRESS .1U
1.5VEXPRESS .1U
CB244
CB252
.1U
.1U
CB220
CB120
1.5V
1.5V
AA18
AA20
VCC_3
VCC_4
POWER VCC_84
VCC_85 T23
T24
1.5V
1.5V
CB201
CB119
.1U
.1U
CB104 .1U 1.8VSUS VCCSM_2 VCC_EXP_2 1.5VEXPRESS .1U CB263 .1U CB129 1.5V VCC_5 VCC_86 1.5V CB145 .1U
AM11 VCCSM_3 VCC_EXP_3 W3 AA21 VCC_6 VCC_87 U13
CB117 .1U 1.8VSUS AM13 W4 1.5VEXPRESS .1U CB258 .01U/X7R CB141 1.5V AA22 U14 1.5V CB170 .1U
D
CB93 .1U 1.8VSUS VCCSM_4 VCC_EXP_4 1.5VEXPRESS .1U CB267 .01U/X7R CB250 1.5V VCC_7 VCC_88 1.5V CB257 .01U/X7R D
AM14 VCCSM_5 VCC_EXP_5 W6 AA23 VCC_8 VCC_89 U16
CB137 .1U 1.8VSUS AM16 W7 1.5VEXPRESS .1U CB273 .01U/X7R CB204 1.5V AA24 U18 1.5V CB203 .01U/X7R
CB92 .1U 1.8VSUS VCCSM_6 VCC_EXP_6 1.5VEXPRESS .1U CB248 .01U/X7R CB149 1.5V VCC_9 VCC_90 1.5V CB190 .01U/X7R
AM17 VCCSM_7 VCC_EXP_7 W8 AB1 VCC_10 VCC_91 U20
CB105 .1U 1.8VSUS AM19 W9 1.5VEXPRESS .1U CB255 .01U/X7R CB230 1.5V AB2 U22 1.5V CB143 .01U/X7R
CB174 .1U 1.8VSUS VCCSM_8 VCC_EXP_8 1.5VEXPRESS .1U CB277 .01U/X7R CB186 1.5V VCC_11 VCC_92 1.5V CB266 .01U/X7R
AM20 VCCSM_9 VCC_EXP_9 Y1 AB3 VCC_12 VCC_93 U24
CB111 .1U 1.8VSUS AM22 Y2 1.5VEXPRESS .1U CB235 .01U/X7R CB222 1.5V AB4 V13 1.5V CB264 .01U/X7R
CB210 .1U 1.8VSUS VCCSM_10 VCC_EXP_10 1.5VEXPRESS .1U CB261 .01U/X7R CB216 1.5V VCC_13 VCC_94 1.5V CB268 .01U/X7R
AM23 VCCSM_11 VCC_EXP_11 Y3 AB5 VCC_14 VCC_95 V14
CB238 .1U 1.8VSUS AM25 Y4 1.5VEXPRESS .1U CB276 .01U/X7R CB180 1.5V AB6 V15 1.5V
CB462 4.7U 1.8VSUS VCCSM_12 VCC_EXP_12 1.5VEXPRESS .1U CB270 .01U/X7R CB206 1.5V VCC_15 VCC_96 1.5V
AM26 VCCSM_13 VCC_EXP_13 Y5 AB7 VCC_16 VCC_97 V17
CB453 4.7U 1.8VSUS AM28 Y6 1.5VEXPRESS 4.7U CB449 .01U/X7R CB153 1.5V AB8 V19 1.5V
CB215 .1U 1.8VSUS VCCSM_14 VCC_EXP_14 1.5VEXPRESS 4.7U CB447 .01U/X7R CB202 1.5V VCC_17 VCC_98 1.5V
AM32 Y7 AB9 V21

GRANTSDALE 5 OF 8
CB229 .1U 1.8VSUS VCCSM_15 VCC_EXP_15 1.5VEXPRESS .1U CB265 1000P CB278 1.5V VCC_18 VCC_99 1.5V
AN35 VCCSM_16 VCC_EXP_16 Y8 AB10 VCC_19 VCC_100 V23
CB88 .1U 1.8VSUS AP12 Y9 1.5VEXPRESS .1U CB241 1000P CB271 1.5V AB11 V24 1.5V
CB219 .1U 1.8VSUS VCCSM_17 VCC_EXP_17 4.7U CB446 1.5V VCC_20 VCC_101 1.5V
AP16 VCCSM_18 AB13 VCC_21 VCC_102 W13
CB207 .1U 1.8VSUS AP20 4.7U CB274 1.5V AB14 W14 1.5V
CB130 .1U 1.8VSUS VCCSM_19 1.5V VCC_22 VCC_103 1.5V
AP24 VCCSM_20 POWER AB15 VCC_23 VCC_104 W16
CB100
CB208
.1U
.1U
1.8VSUS
1.8VSUS
AP28 VCCSM_21 45mA 1.5V
1.5V
AB16 VCC_24 VCC_105 W18 1.5V
1.5V CB259 .01U/X7R
AR10 VCCSM_22 AB17 VCC_25 VCC_106 W20
CB89 .1U 1.8VSUS AR14 A17 GMCHPLL1.5V 0R L66 1.5V AB18 W22 1.5V CB221 .01U/X7R
VCCSM_23 VCCA_HPLL 1.5V VCC_26 VCC_107
CB97 .1U 1.8VSUS AR18 1.5V AB19 W24 1.5V CB253 .01U/X7R
CB173 .1U 1.8VSUS VCCSM_24 .1U CB182 1.5V VCC_27 VCC_108 1.5V CB178 .01U/X7R
AR22 VCCSM_25 AB20 VCC_28 VCC_109 Y13
CB90
CB98
.1U
.1U
1.8VSUS
1.8VSUS
AR26 VCCSM_26 60mA 4.7U CB457 1.5V
1.5V
AB21 VCC_29 VCC_110 Y14 1.5V
1.5V
CB256
CB217
.01U/X7R
.01U/X7R
AR31 VCCSM_27 AB22 VCC_30 VCC_111 Y15
CB455 4.7U 1.8VSUS AR33 B17 GMCHSMPLL1.5V 0R L67 1.5V AB23 Y16 1.5V CB242 .01U/X7R
VCCSM_28 VCCA_SMPLL 1.5V VCC_31 VCC_112

GRANTSDALE 6 OF 8
1.5V AB24 Y17 1.5V CB269 1000P
.1U CB195 1.5V VCC_32 VCC_113 1.5V CB445 1000P
AC1 VCC_33 VCC_114 Y19
55mA 4.7U CB458 1.5V
1.5V
AC2 VCC_34 VCC_115 Y20 1.5V
1.5V
CB275 1000P
AC3 VCC_35 VCC_116 Y21
COREVTT A19 A12 GMCHDPLL1.5V_A 0R L61 1.5V AC4 Y23 1.5V
VTT_1 VCCA_DPLLA 1.5V VCC_36 VCC_117
C CB132 .1U COREVTT A20 B13 1.5V AC5 Y24 1.5V C
CB166 .1U COREVTT VTT_2 VCCA_DPLLB .1U CB226 1.5V VCC_37 VCC_118
A21 VTT_3 AC6 VCC_38
CB134
CB160
.1U
.1U
COREVTT
COREVTT
A22 VTT_4 55mA 4.7U CB452 1.5V
1.5V
AC7 VCC_39
B19 VTT_5 AC8 VCC_40
CB162 .1U COREVTT B20 GMCHDPLL1.5V_B 0R L63 1.5V AC9
VTT_6 1.5V VCC_41
COREVTT B21 A14 1.5V AC10
COREVTT VTT_7 VCCA_EXPPLL .1U CB223 1.5V VCC_42
B22 VTT_8 AC11 VCC_43
CB161 .1U COREVTT C19 4.7U CB454 1.5V AD1
COREVTT VTT_9 1.5V VCC_44
C20 VTT_10 AD2 VCC_45 RSV_1 AA30
COREVTT C21 1.5V AD3 AA31
COREVTT VTT_11 GMCHPPLL1.5V 0R L64 1.5V VCC_46 RSV_2
C22 VTT_12 VCCA_DAC1 E13 1.5V AD4 VCC_47 RSV_3 AB29
COREVTT D19 D13 1.5V AD5 AC12
CB465 4.7U COREVTT VTT_13 VCCA_DAC2 .1U CB211 .1U CB165 1.5V VCC_48 RSV_5
D20 VTT_14 AD6 VCC_49 RSV_6 AC13
CB463 4.7U COREVTT D21 4.7U CB456 .1U CB185 1.5V AD7 AC14
COREVTT VTT_15 .1U CB189 1.5V VCC_50 RSV_7
D22 VTT_16 AD8 VCC_51 RSV_8 AC15
CB163 .1U COREVTT E19 .1U CB122 1.5V AD9 AC16
CB133 .1U COREVTT VTT_17 GMCHDAC2.5V 0R L11 .1U CB176 1.5V VCC_52 RSV_9
E20 VTT_18 VSSA_DAC F13 GMCH_2.5V AD10 VCC_53 RSV_10 AC17
CB135 .1U COREVTT E21 .1U CB232 1.5V L10 AC18
CB164 .1U COREVTT VTT_19 .1U CB214 .1U CB234 1.5V VCC_54 RSV_11
E22 VTT_20 N13 VCC_55 RSV_12 AC19
COREVTT F20 4.7U CB450 .1U CB140 1.5V N14 AC20
COREVTT VTT_21 .01U/X7R CB249 1.5V VCC_56 RSV_13
F21 VTT_22 N15 VCC_57 RSV_14 AC21
CB136 .1U COREVTT F22 A13 .01U/X7R CB237 1.5V N16 AC22
VTT_23 VCC2 GMCH_2.5V VCC_58 RSV_15
COREVTT G21 .01U/X7R CB231 1.5V N18 AJ18
CB466 4.7U COREVTT VTT_24 .01U/X7R CB260 1.5V VCC_59 RSV_17
G22 VTT_25 N20 VCC_60 RSV_18 AJ20
CB464 4.7U COREVTT H22 .01U/X7R CB196 1.5V N21 AJ21
VTT_26 .01U/X7R CB262 1.5V VCC_61 RSV_19
P13 VCC_62 RSV_20 AJ23
GRANTSDALE-DDR2 .01U/X7R CB254 1.5V P14 AJ24
.01U/X7R CB243 1.5V VCC_63 RSV_21
P15 VCC_64 RSV_22 AK18
.01U/X7R CB118 1.5V P17 AK21
.01U/X7R CB175 1.5V VCC_65 RSV_23
B
P19 VCC_66 RSV_24 AK24 B
.01U/X7R CB172 1.5V P21 AL20
.01U/X7R CB124 1.5V VCC_67 RSV_25
P22 VCC_68 RSV_26 AL21
GICT_B15
CURRENT SPEC 1.6A
.01U/X7R CB123 1.5V R13 B15
.01U/X7R CB246 1.5V VCC_69 RSV_27 GICT_C14
R14 VCC_70 RSV_28 C14
.01U/X7R CB247 1.5V R15 F15 GICT_F15
.01U/X7R CB236 1.5V VCC_71 RSV_29
R16 VCC_72 RSV_30 G16
4.7U CB279 1.5V R18 K15 GICT_K15
COREVTT 1.8VSUS 1.5V 1.5V VCC_73 RSV_31 GICT_M16
R20 VCC_74 RSV_32 M16
1.5V R22 R30
1.5V VCC_75 RSV_33
R23 VCC_76
1.5V T13
CB461 CB471 CB470 CB469 CB459 CB468 CB467 CB460 CB451 CB448 CB272 CB444 1.5V VCC_77
T14 VCC_78
10UC 10UC 10UC 2.2U 2.2U 2.2U 2.2U 2.2U 2.2U 10UC 10UC 10UC 1.5V T15
1.5V VCC_79
T16 VCC_80
1.5V T17 VCC_81
GRANTSDALE-DDR2

1.5V 5,10,12,14,26,32,36,37

3V
L72 *0C
3V 2,4,9,10,11,12,13,14,15,16,19,20,21,22,23,25,26,27,28,29,30,32,33,34,36,37,38 U52 2.5V
2.5V 14,15,17,18,26,32,38
COREVCC 2,3,32,34,35 3 IN OUT 4 GMCH_2.5V
1.8VSUS
1.8VSUS 6,9,26,32,36,37 GM25ON
R680 0R 1 C714
COREVTT 2,4,5,11,12,32,37 30,31,32,36,37,38 MAINON SHDN
COREVTT G913_GSET
2 5 1U
C717 GND SET
A A
C713 G913
1000P 1U
R1
PLACEMENT NOTICE : GMCH_2.5V R656
R657
100K/F
100K/F

1. IDEALLY, PLACE 1 CAP PER POWER PIN AND BASED ON REAL CASE TO REDUCE. R2 PROJECT : NT2
2. GMCHFSB1.5V RELATIVE R/C MUST NEAR GMCH PIN Vout=1.25(1+R1/R2) Quanta Computer Inc.
Size Document Number R ev
3. GMCHDACPLL1.5V RELATIVE R/C MUST NEAR GMCH PIN Custom 2A
GMCH(POWER/GND)
Date: Tuesday, January 25, 2005 Sheet 7 of 38
5 4 3 2 1
8 7 6 5 4 3 2 1

U49G U49F
F16 VSS_203 VSS_319 P11 A3 VSS_1 VSS_102 AJ13
F18 VSS_204 VSS_320 P16 A5 VSS_2 VSS_103 AJ15
F23 VSS_205 VSS_321 P18 A10 VSS_3 VSS_104 AJ16
F25 VSS_206 VSS_322 P20 A18 VSS_4 VSS_105 AJ19
F29 VSS_207 VSS_323 P25 A26 VSS_5 VSS_106 AJ22
F30 VSS_208 VSS_324 P27 A30 VSS_6 VSS_107 AJ27
F32 VSS_209 VSS_325 P29 A33 VSS_7 VSS_108 AJ30
F35 VSS_210 VSS_326 P31 AA1 VSS_8 VSS_109 AJ32
G2 VSS_211 VSS_327 P32 AA2 VSS_9 VSS_110 AJ35
G4 VSS_212 VSS_328 P35 AA3 VSS_10 VSS_111 AK1
G7 VSS_213 VSS_329 R2 AA4 VSS_11 VSS_112 AK4
G8 VSS_214 VSS_330 R4 AA5 VSS_12 VSS_113 AK6

GRANTSDALE 8 OF 8
G9 R7 AA6 AK7

GRANTSDALE 7 OF 8
VSS_215 VSS_331 VSS_13 VSS_114
4 G10 VSS_216 VSS_332 R8 AA7 VSS_14 VSS_115 AK8 4
G11 VSS_217 VSS_333 R9 AA8 VSS_15 VSS_116 AK11
G13 VSS_218 VSS_334 R11 AA9 VSS_16 VSS_117 AK14
G15 VSS_219 VSS_335 R17 AA10 VSS_17 VSS_118 AK17
G17 VSS_220 VSS_336 R19 AA11 VSS_18 VSS_119 AK20
G19 VSS_221 VSS_337 R21 AA15 VSS_19 VSS_120 AK23
G20 VSS_222 VSS_338 R25 AA17 VSS_20 VSS_121 AK25
G23 VSS_223 VSS_339 R26 AA19 VSS_21 VSS_122 AK26
G26 VSS_224 VSS_340 R27 AA25 VSS_22 VSS_123 AK28
G27 VSS_225 VSS_341 T2 AA26 VSS_23 VSS_124 AK30
G28 VSS_226 VSS_342 T4 AA27 VSS_24 VSS_125 AL10
H2 VSS_227 VSS_343 T5 AB25 VSS_25 VSS_126 AL13
H4 VSS_228 VSS_344 T6 AB28 VSS_26 VSS_127 AL16
H5 VSS_229 VSS_345 T7 AB30 VSS_27 VSS_128 AL19
H6 VSS_230 VSS_346 T10 AB32 VSS_28 VSS_129 AL22
H9 VSS_231 VSS_347 T11 AB35 VSS_29 VSS_130 AL32
H10 VSS_232 VSS_348 T18 AC25 VSS_30 VSS_131 AM4
H13 VSS_233 VSS_349 T22 AC27 VSS_31 VSS_132 AM6
H21 VSS_234 VSS_350 T25 AC29 VSS_32 VSS_133 AM7
H24 VSS_235 VSS_351 T28 AC31 VSS_33 VSS_134 AM8
H25 VSS_236 VSS_352 T30 AC32 VSS_34 VSS_135 AM29
H27 VSS_237 VSS_353 T32 AD11 VSS_35 VSS_136 AM31
H30 VSS_238 VSS_354 T34 AD13 VSS_36 VSS_137 AN1
H32 VSS_239 VSS_355 U2 AD16 VSS_37 VSS_138 AR3
H34 VSS_240 VSS_356 U4 AD19 VSS_38 VSS_139 AR6
J2 VSS_241 VSS_357 U7 AD22 VSS_39 VSS_140 AP8
J4 VSS_242 VSS_358 U8 AD25 VSS_40 VSS_141 AR13
J7 VSS_243 VSS_359 U9 AD26 VSS_41 VSS_142 AR17
J8 VSS_244 VSS_360 U11 AD27 VSS_42 VSS_143 AR21
J9 VSS_245 VSS_361 U15 AD34 VSS_43 VSS_144 AR25
J10 VSS_246 VSS_362 U17 AE4 VSS_44 VSS_145 AR30
3 J15 U19 AE6 B2 3
VSS_247 VSS_363 VSS_45 VSS_146
J16 VSS_248 VSS_364 U21 AE9 VSS_46 VSS_147 B5
J17 VSS_249 VSS_365 U23 AE12 VSS_47 VSS_148 B6
J18 VSS_250 VSS_366 U25 AE14 VSS_48 VSS_149 B7
J20 VSS_251 VSS_367 U27 AE15 VSS_49 VSS_150 B8
J23 VSS_252 VSS_368 U29 AE17 VSS_50 VSS_151 B9
J30 VSS_253 VSS_369 U31 AE18 VSS_51 VSS_152 B10
K2 VSS_254 VSS_370 U32 AE20 VSS_52 VSS_153 B12
K4 VSS_255 VSS_371 V1 AE21 VSS_53 VSS_154 B14
K5 V2 AE23 B16
K6
K9
VSS_256
VSS_257
VSS_372
VSS_373 V4
V6
AE24
AE28
VSS_54
VSS_55
GND VSS_155
VSS_156 B18
B24
VSS_258 VSS_374 VSS_56 VSS_157
K10 VSS_259 VSS_375 V9 AE30 VSS_57 VSS_158 B28
K11 VSS_260 VSS_376 V11 AE32 VSS_58 VSS_159 C1
K14 VSS_261 VSS_377 V16 AF1 VSS_59 VSS_160 C3
K20 VSS_262 VSS_378 V18 AF4 VSS_60 VSS_161 C4
K24 VSS_263 VSS_379 V20 AF6 VSS_61 VSS_162 C11
K26 VSS_264 VSS_380 V22 AF8 VSS_62 VSS_163 C13
K28 VSS_265 VSS_381 V25 AF10 VSS_63 VSS_164 C17
K31 VSS_266 VSS_382 V26 AF12 VSS_64 VSS_165 C18
K32 VSS_267 VSS_383 V27 AF15 VSS_65 VSS_166 C23
K35 VSS_268 VSS_384 V35 AF18 VSS_66 VSS_167 C35
L2 VSS_269 VSS_385 W11 AF21 VSS_67 VSS_168 D3
L4 VSS_270 VSS_386 W15 AF26 VSS_68 VSS_169 D4
L7 VSS_271 VSS_387 W17 AF29 VSS_69 VSS_170 D6
L8 VSS_272 VSS_388 W19 AF30 VSS_70 VSS_171 D7
L9 VSS_273 VSS_389 W21 AF31 VSS_71 VSS_172 D8
L11 VSS_274 VSS_390 W23 AF32 VSS_72 VSS_173 D9
L13 VSS_275 VSS_391 W25 AF35 VSS_73 VSS_174 D10
L15 VSS_276 VSS_392 W28 AG5 VSS_74 VSS_175 D11
L16 VSS_277 VSS_393 W30 AG12 VSS_75 VSS_176 D15
2 2
L17 VSS_278 VSS_394 W32 AG13 VSS_76 VSS_177 D16
L18 VSS_279 VSS_395 Y11 AG15 VSS_77 VSS_178 D18
L20 VSS_280 VSS_396 Y18 AG16 VSS_78 VSS_179 D23
L21 VSS_281 VSS_397 Y22 AG18 VSS_79 VSS_180 D25
L22 VSS_282 VSS_398 Y25 AG19 VSS_80 VSS_181 D26
L24 VSS_283 VSS_399 Y27 AG21 VSS_81 VSS_182 D28
L27 VSS_284 VSS_400 Y29 AG22 VSS_82 VSS_183 D30
L30 VSS_285 VSS_401 Y31 AG25 VSS_83 VSS_184 D31
L32 VSS_286 VSS_402 Y32 AG28 VSS_84 VSS_185 D32
M2 VSS_287 VSS_403 Y34 AG29 VSS_85 VSS_186 E1
M4 VSS_288 AH1 VSS_86 VSS_187 E2
M5 VSS_289 AH5 VSS_87 VSS_188 E4
M6 VSS_290 AH6 VSS_88 VSS_189 E6
M9 VSS_291 AH8 VSS_89 VSS_190 E8
M10 VSS_292 AH11 VSS_90 VSS_191 E10
M11 AH14 E17
M17
M20
VSS_293
VSS_294
GND AH17
AH20
VSS_91
VSS_92
VSS_192
VSS_193 E18
E23
VSS_295 VSS_93 VSS_194
M24 VSS_296 AH23 VSS_94 VSS_195 E26
M25 VSS_297 AH26 VSS_95 VSS_196 E29
M27 VSS_298 NC_31 K12 AH29 VSS_96 VSS_197 F2
M29 VSS_299 NC_32 L12 AH32 VSS_97 VSS_198 F4
M34 VSS_300 NC_33 L19 AH34 VSS_98 VSS_199 F5
N2 VSS_301 NC_34 N12 AJ4 VSS_99 VSS_200 F6
N4 VSS_302 NC_35 N22 AJ9 VSS_100 VSS_201 F8
N7 VSS_303 NC_36 N23 AJ10 VSS_101 VSS_202 F10
N8 VSS_304 NC_37 N24
N9 VSS_305 NC_38 P12
N10 VSS_306 NC_39 P23
N11 P24 GRANTSDALE-DDR2
VSS_307 NC_40
1 N17 VSS_308 NC_41 P30 1
N19 VSS_309 NC_42 R12
N25 VSS_310 NC_43 R24
N28 VSS_311 NC_44 T12
N30 VSS_312 NC_45 U12
N32 VSS_313 NC_46 V12
P2 VSS_314 NC_47 W12
P4
P5
VSS_315
VSS_316
NC_48 Y12
PROJECT : NT2
P6
P9
VSS_317
VSS_318
RSV_39
RSV_40
V32
Y30 Quanta Computer Inc.
Size Document Number R ev
Custom GMCH(POWER/GND)-2 1A
GRANTSDALE-DDR2
Date: Tuesday, January 25, 2005 Sheet 8 of 38
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

DDRMDA4 5 123 DDRMDA33 DDRMDB5 5 123 DDRMDB37 MEMVREF 1 2 MEMVREF 1 2


DDRMDA0 DQ0 DQ32 DDRMDA36 DDRMDB0 DQ0 DQ32 DDRMDB36 VREF VSS_1 VREF VSS_1 R115 1K/F
7 DQ1 DQ33 125 7 DQ1 DQ33 125 VSS_2 3 VSS_2 3 MEMVREF 1.8VSUS
DDRMDA2 17 135 DDRMDA34 DDRMDB7 17 135 DDRMDB39 8 8
DDRMDA6 DQ2 DQ34 DDRMDA38 DDRMDB3 DQ2 DQ34 DDRMDB35 CB147 .1U 1.8VSUS 81 VSS_3 CB148 .1U 1.8VSUS VSS_3 R116 1K/F
19 DQ3 DQ35 137 19 DQ3 DQ35 137 VDD_1 VSS_4 9 81 VDD_1 VSS_4 9
DDRMDA5 4 124 DDRMDA37 DDRMDB4 4 124 DDRMDB33 CB157 .1U 1.8VSUS 82 12 CB114 .1U 1.8VSUS 82 12
DDRMDA1 DQ4 DQ36 DDRMDA32 DDRMDB1 DQ4 DQ36 DDRMDB32 CB156 .1U 1.8VSUS 87 VDD_2 VSS_5 CB139 .1U 1.8VSUS VDD_2 VSS_5 MEMVREF CB443 4.7U
6 DQ5 DQ37 126 6 DQ5 DQ37 126 VDD_3 VSS_6 15 87 VDD_3 VSS_6 15
DDRMDA3 14 134 DDRMDA35 DDRMDB6 14 134 DDRMDB34 CB240 .1U 1.8VSUS 88 18 CB110 .1U 1.8VSUS 88 18 MEMVREF CB281 .1U
DDRMDA7 DQ6 DQ38 DDRMDA39 DDRMDB2 DQ6 DQ38 DDRMDB38 CB192 .1U 1.8VSUS 95 VDD_4 VSS_7 CB103 .1U 1.8VSUS VDD_4 VSS_7 MEMVREF CB280 .1U
16 DQ7 DQ39 136 16 DQ7 DQ39 136 VDD_5 VSS_8 21 95 VDD_5 VSS_8 21
DDRMDA9 23 141 DDRMDA40 DDRMDB8 23 141 DDRMDB44 CB168 .1U 1.8VSUS 96 24 CB146 .1U 1.8VSUS 96 24 MEMVREF CB282 .01U/X7R
DDRMDA12 DQ8 DQ40 DDRMDA41 DDRMDB12 DQ8 DQ40 DDRMDB46 CB126 .1U 1.8VSUS103 VDD_6 VSS_9 CB127 .1U 1.8VSUS VDD_6 VSS_9
25 DQ9 DQ41 143 25 DQ9 DQ41 143 VDD_7 VSS_10 27 103 VDD_7 VSS_10 27
DDRMDA11 35 151 DDRMDA42 DDRMDB10 35 151 DDRMDB42 CB169 .1U 1.8VSUS104 28 CB109 .1U 1.8VSUS 104 28
DDRMDA10 DQ10 DQ42 DDRMDA43 DDRMDB15 DQ10 DQ42 DDRMDB45 CB113 .1U 1.8VSUS111 VDD_8 VSS_11 CB191 .1U 1.8VSUS VDD_8 VSS_11
4
37 DQ11 DQ43 153 37 DQ11 DQ43 153 VDD_9 VSS_12 33 111 VDD_9 VSS_12 33 4
DDRMDA13 20 140 DDRMDA44 DDRMDB9 20 140 DDRMDB47 CB188 .1U 1.8VSUS112 34 CB187 .1U 1.8VSUS 112 34
DDRMDA8 DQ12 DQ44 DDRMDA45 DDRMDB13 DQ12 DQ44 DDRMDB43 CB94 4.7U 1.8VSUS117 VDD_10 VSS_13 CB225 4.7U 1.8VSUS VDD_10 VSS_13 +DIMMCLKA[0..1]
22 DQ13 DQ45 142 22 DQ13 DQ45 142 VDD_11 VSS_14 39 117 VDD_11 VSS_14 39 +DIMMCLKA[0..1] 6
DDRMDA15 36 152 DDRMDA47 DDRMDB11 36 152 DDRMDB41 CB96 4.7U 1.8VSUS118 40 CB95 4.7U 1.8VSUS 118 40 -DIMMCLKA[0..1]
DQ14 DQ46 DQ14 DQ46 VDD_12 VSS_15 VDD_12 VSS_15 DDRMDA[0..63] -DIMMCLKA[0..1] 6
DDRMDA14 38 154 DDRMDA46 DDRMDB14 38 154 DDRMDB40 41 41

PC2100 DDR2 SDRAM

PC2100 DDR2 SDRAM


DQ15 DQ47 DQ15 DQ47 VSS_16 VSS_16 DDRMAA[0..13] DDRMDA[0..63] 6
DDRMDA20 43 157 DDRMDA48 DDRMDB16 43 157 DDRMDB48 42 42
DQ16 DQ48 DQ16 DQ48 VSS_17 VSS_17 DDRBAA[0..2] DDRMAA[0..13] 6
DDRMDA21 45 159 DDRMDA49 DDRMDB21 45 159 DDRMDB49 DDRSODTA0 114 47 DDRSODTB0 114 47
DQ17 DQ49 DQ17 DQ49 ODT0 VSS_18 ODT0 VSS_18 DDRDQSA[0..7] DDRBAA[0..2] 6
DDRMDA17 55 173 DDRMDA51 DDRMDB18 55 173 DDRMDB54 DDRSODTA1 119 48 DDRSODTB1 119 48
DQ18 DQ50 DQ18 DQ50 ODT1 VSS_19 ODT1 VSS_19 -DDRDQSA[0..7] DDRDQSA[0..7] 6
DDRMDA16 DDRMDA50 DDRMDB19 DDRMDB50

SO-DIMM (200P)

SO-DIMM (200P)
57 DQ19 DQ51 175 57 DQ19 DQ51 175 VSS_20 53 VSS_20 53 -DDRDQSA[0..7] 6
DDRMDA23 44 158 DDRMDA52 DDRMDB20 44 158 DDRMDB52 54 54 DDRSDMA[0..7]
PC2100 DDR2 SDRAM SO-DIMM

PC2100 DDR2 SDRAM SO-DIMM


DQ20 DQ52 DQ20 DQ52 VSS_21 VSS_21 DDRSODTA[0..1] DDRSDMA[0..7] 6
DDRMDA18 46 160 DDRMDA53 DDRMDB17 46 160 DDRMDB53 50 59 50 59
DQ21 DQ53 DQ21 DQ53 NC_1 VSS_22 NC_1 VSS_22 -DDRCSA[0..1] DDRSODTA[0..1] 6
DDRMDA22 56 174 DDRMDA54 DDRMDB22 56 174 DDRMDB51 69 60 69 60
DQ22 DQ54 DQ22 DQ54 NC_2 VSS_23 NC_2 VSS_23 DDRCKEA[0..1] -DDRCSA[0..1] 6
DDRMDA19 58 176 DDRMDA55 DDRMDB23 58 176 DDRMDB55 83 65 83 65
DQ23 DQ55 DQ23 DQ55 NC_3 VSS_24 NC_3 VSS_24 DDRCKEA[0..1] 6
DDRMDA24 61 179 DDRMDA62 DDRMDB31 61 179 DDRMDB56 84 66 84 66 -DDRRASA
DQ24 DQ56 DQ24 DQ56 NC_4/A15 VSS_25 NC_4/A15 VSS_25 -DDRRASA 6
DDRMDA25 63 181 DDRMDA63 DDRMDB26 63 181 DDRMDB61 86 71 86 71 -DDRCASA
DQ25 DQ57 DQ25 DQ57 DDRMAA13 NC_5/A14 VSS_26 DDRMAB13 NC_5/A14 VSS_26 -DDRCASA 6
DDRMDA31 73 189 DDRMDA59 DDRMDB27 73 189 DDRMDB58 116 72 116 72 -DDRWEA
DQ26 DQ58 DQ26 DQ58 NC_6/A13 VSS_27 NC_6/A13 VSS_27 -DDRWEA 6
DDRMDA30 75 191 DDRMDA58 DDRMDB30 75 191 DDRMDB59 120 77 120 77
DDRMDA29 DQ27 DQ59 DDRMDA60 DDRMDB29 DQ27 DQ59 DDRMDB62 NC_7 VSS_28 NC_7 VSS_28 +DIMMCLKB[0..2]
62 DQ28 DQ60 180 62 DQ28 DQ60 180 163 NC_8 VSS_29 78 163 NC_8 VSS_29 78 +DIMMCLKB[0..2] 6
DDRMDA28 64 182 DDRMDA56 DDRMDB28 64 182 DDRMDB60 121 121 -DIMMCLKB[0..2]
DQ29 DQ61 DQ29 DQ61 VSS_30 VSS_30 DDRMDB[0..63] -DIMMCLKB[0..2] 6
DDRMDA26 74 192 DDRMDA61 DDRMDB24 74 192 DDRMDB57 122 122
DQ30 DQ62 DQ30 DQ62 VSS_31 VSS_31 DDRMAB[0..13] DDRMDB[0..63] 6
DDRMDA27 76 194 DDRMDA57 DDRMDB25 76 194 DDRMDB63 162 127 162 127
DQ31 DQ63 DQ31 DQ63 VSS_45 VSS_32 VSS_45 VSS_32 DDRBAB[0..2] DDRMAB[0..13] 6
165 VSS_46 VSS_33 128 165 VSS_46 VSS_33 128 DDRBAB[0..2] 6
DDRMAA0 102 10 DDRSDMA0 DDRMAB0 102 10 DDRSDMB0 168 132 168 132 DDRDQSB[0..7]
A0 DM0 A0 DM0 VSS_47 VSS_34 VSS_47 VSS_34 -DDRDQSB[0..7] DDRDQSB[0..7] 6
DDRMAA1 101 26 DDRSDMA1 DDRMAB1 101 26 DDRSDMB1 171 133 171 133
A1 DM1 A1 DM1 VSS_48 VSS_35 VSS_48 VSS_35 DDRSDMB[0..7] -DDRDQSB[0..7] 6
DDRMAA2 100 52 DDRSDMA2 DDRMAB2 100 52 DDRSDMB2 172 138 172 138
A2 DM2 A2 DM2 VSS_49 VSS_36 VSS_49 VSS_36 DDRSODTB[0..3] DDRSDMB[0..7] 6
DDRMAA3 99 67 DDRSDMA3 DDRMAB3 99 67 DDRSDMB3 177 139 177 139
A3 DM3 A3 DM3 VSS_50 VSS_37 VSS_50 VSS_37 -DDRCSB[0..1] DDRSODTB[0..3] 6
DDRMAA4 98 130 DDRSDMA4 DDRMAB4 98 130 DDRSDMB4 178 144 178 144
A4 DM4 A4 DM4 VSS_51 VSS_38 VSS_51 VSS_38 DDRCKEB[0..1] -DDRCSB[0..1] 6
DDRMAA5 97 147 DDRSDMA5 DDRMAB5 97 147 DDRSDMB5 183 145 183 145
A5 DM5 A5 DM5 VSS_52 VSS_39 VSS_52 VSS_39 DDRCKEB[0..1] 6
DDRMAA6 94 170 DDRSDMA6 DDRMAB6 94 170 DDRSDMB6 184 149 184 149 -DDRRASB
(200P)

(200P)
A6 DM6 A6 DM6 VSS_53 VSS_40 VSS_53 VSS_40 -DDRRASB 6
DDRMAA7 92 185 DDRSDMA7 DDRMAB7 92 185 DDRSDMB7 187 150 187 150 -DDRCASB
A7 DM7 A7 DM7 VSS_54 VSS_41 VSS_54 VSS_41 -DDRCASB 6
3 DDRMAA8 93 13 DDRDQSA0 DDRMAB8 93 13 DDRDQSB0 190 155 190 155 -DDRWEB 3
A8 DQS0 A8 DQS0 VSS_55 VSS_42 VSS_55 VSS_42 -DDRWEB 6
DDRMAA9 91 11 -DDRDQSA0 DDRMAB9 91 11 -DDRDQSB0 193 156 193 156
DDRMAA10 A9 DQS0 DDRDQSA1 DDRMAB10 A9 DQS0 DDRDQSB1 VSS_56 VSS_43 VSS_56 VSS_43 MAINSMBCLK
105 A10/AP DQS1 31 105 A10/AP DQS1 31 196 VSS_57 VSS_44 161 196 VSS_57 VSS_44 161 MAINSMBCLK 4,26
DDRMAA11 90 29 -DDRDQSA1 DDRMAB11 90 29 -DDRDQSB1 201 202 201 202 MAINSMBDATA
A11 DQS1 A11 DQS1 VSS_58 VSS_59 VSS_58 VSS_59 MAINSMBDATA 4,26
DDRMAA12 89 51 DDRDQSA2 DDRMAB12 89 51 DDRDQSB2
A12 DQS2 -DDRDQSA2 A12 DQS2 -DDRDQSB2 1.8VSUS
DQS2 49 DQS2 49 1.8VSUS 6,7,26,32,36,37
DDRBAA0 107 70 DDRDQSA3 DDRBAB0 107 70 DDRDQSB3
DDRBAA1 BA0 DQS3 -DDRDQSA3 DDRBAB1 BA0 DQS3 -DDRDQSB3 FOX=AS0A426-M2S-TR FOX=AS0A426-MAS-TR
106 BA1 DQS3 68 106 BA1 DQS3 68
DDRBAA2 85 131 DDRDQSA4 DDRBAB2 85 131 DDRDQSB4 CN29B CN28B
NC/BA2 DQS4 -DDRDQSA4 NC/BA2 DQS4 -DDRDQSB4
DQS4 129 DQS4 129
+DIMMCLKA1 30 148 DDRDQSA5 +DIMMCLKB1 30 148 DDRDQSB5
-DIMMCLKA1 CLK0 DQS5 -DDRDQSA5 -DIMMCLKB1 CLK0 DQS5 -DDRDQSB5
32 CLK0 DQS5 146 32 CLK0 DQS5 146
169 DDRDQSA6 169 DDRDQSB6
+DIMMCLKA0 DQS6 -DDRDQSA6 +DIMMCLKB0 DQS6 -DDRDQSB6
164 CLK1 DQS6 167 164 CLK1 DQS6 167
-DIMMCLKA0 166 188 DDRDQSA7 -DIMMCLKB0 166 188 DDRDQSB7
CKL1 DQS7 -DDRDQSA7 CKL1 DQS7 -DDRDQSB7
DQS7 186 DQS7 186
MAINSMBCLK 197 MAINSMBCLK 197 MEMVTT_0.9V CB91 4.7U 4.7U CB251 MEMVTT_0.9V
MAINSMBDATA SCL -DDRCSA0 MAINSMBDATA SCL -DDRCSB0 MEMVTT_0.9V CB108 .1U .1U CB205 MEMVTT_0.9V
195 SDA CS0 110 195 SDA CS0 110
DDRASA0
DDRASA1
198 SA0 CS1 115 -DDRCSA1
-DDRRASA
DDRBSA0
DDRBSA1
198 SA0 CS1 115 -DDRCSB1
-DDRRASB
MEMVTT_0.9V
MEMVTT_0.9V
CB228
CB116
.1U
.1U
.1U
.1U
CB239
CB101
MEMVTT_0.9V
MEMVTT_0.9V
PLACEMENT NOTICE :
200 SA1 RAS 108 200 SA1 RAS 108
113 -DDRCASA 113 -DDRCASB MEMVTT_0.9V CB227 .1U .1U CB152 MEMVTT_0.9V
CAS CAS
3V 199 VDDSPD WE 109 -DDRWEA
DDRCKEA0
3V 199 VDDSPD WE 109 -DDRWEB
DDRCKEB0
MEMVTT_0.9V
MEMVTT_0.9V
CB144
CB167
.1U
.1U
.1U
.1U
CB224
CB128
MEMVTT_0.9V
MEMVTT_0.9V
1. IDEALLY, PLACE 1 CAP PER POWER PIN AND BASED
79 79
CKE0
CKE1 80 DDRCKEA1 CKE0
CKE1 80 DDRCKEB1 MEMVTT_0.9V CB125 .1U .1U CB99 MEMVTT_0.9V ON REAL CASE TO REDUCE.
MEMVTT_0.9V CB245 .1U .1U CB158 MEMVTT_0.9V
CHANNEL A SINGLE DIMM CHANNEL B SINGLE DIMM MEMVTT_0.9V
MEMVTT_0.9V
CB209
CB212
.1U
.1U
.1U CB151 MEMVTT_0.9V
2. MEMVREF RELATIVE R/C IN MIDDLE OF TWO DIMM
FOX=AS0A426-M2S-TR FOX=AS0A426-MAS-TR AND ONE CAP FOR EACH DIMM
CN29A CN28A
2 3. AT LEAST ONE CAP ON 1.275V FOR ONE 2

TERMINATOR RESISTOR ARRAY


R91 *10K DDRASA0 R90 10K R95 *10K DDRBSA0 R92 10K
3V 3V
R88 *10K DDRASA1 R87 10K R94 10K DDRBSA1 R89 *10K
4. TERMINATOR SIGNAL SHOULD BASED ON DIMM TO
3V 3V
ARRANGE APPROPRIATE

DIMM-1 Address 00 DIMM-2 Address 10

MEMVTT_0.9V MEMVTT_0.9V

RN16 33X2 RN24 39X2 RN17 33X2 RN5 39X2


DDRMAA0 1 2 4 3 DDRCKEA0 MEMVTT_0.9V CB155 4.7U 4.7U CB179 MEMVTT_0.9V DDRMAB4 1 2 4 3 DDRSODTB0
DDRMAA6 3 4 2 1 DDRCKEA1 MEMVTT_0.9V CB233 .1U .1U CB106 MEMVTT_0.9V DDRMAB6 3 4 2 1 -DDRCSB0
RN20 33X2 RN2 39X2 MEMVTT_0.9V CB183 .1U .1U CB159 MEMVTT_0.9V RN22 33X2 RN25 39X2
DDRMAA11 1 2 4 3 -DDRCSA1 MEMVTT_0.9V CB102 .1U .1U CB142 MEMVTT_0.9V DDRMAB12 1 2 4 3 DDRCKEB0
DDRMAA7 3 4 2 1 DDRSODTA1 MEMVTT_0.9V CB138 .1U .1U CB107 MEMVTT_0.9V DDRMAB5 3 4 2 1 DDRCKEB1
RN6 33X2 RN4 39X2 MEMVTT_0.9V CB112 .1U .1U CB131 MEMVTT_0.9V RN15 33X2 RN27 33X2
-DDRCASA 1 2 4 3 DDRSODTA0 MEMVTT_0.9V CB181 .1U .1U CB200 MEMVTT_0.9V DDRMAB1 1 2 4 3 DDRMAB9
-DDRWEA 3 4 2 1 -DDRCSA0 MEMVTT_0.9V CB115 .1U .1U CB218 MEMVTT_0.9V DDRMAB10 3 4 2 1 DDRBAB2
RN8 33X2 RN14 33X2 MEMVTT_0.9V CB193 .1U .1U CB199 MEMVTT_0.9V RN10 33X2 RN3 39X2
DDRMAA13 1 2 4 3 DDRMAA1 .1U CB194 MEMVTT_0.9V DDRMAB2 1 2 2 1 -DDRCSB1
DDRBAA1 3 4 2 1 DDRMAA3 .1U CB177 MEMVTT_0.9V DDRMAB0 3 4 4 3 DDRSODTB1
1 RN13 33X2 RN11 33X2 RN21 33X2 RN19 33X2 1
-DDRRASA 1 2 4 3 DDRBAA0 DDRMAB7 1 2 2 1 DDRMAB8
DDRMAA2 3 4 2 1 DDRMAA10 DDRMAB11 3 4 4 3 DDRMAB3
RN26 33X2 RN18 33X2 RN12 33X2 RN7 33X2
DDRBAA2 1 2 4 3 DDRMAA8 DDRBAB0 1 2 2 1 -DDRWEB
DDRMAA9 3 4 2 1 DDRMAA5 -DDRCASB 3 4 4 3 DDRMAB13

PROJECT : NT2
RN23 33X2 RN9 33X2
DDRMAA12 1 2 DDRBAB1 1 2
Quanta Computer Inc.
DDRMAA4 3 4 -DDRRASB 3 4

MEMVTT_0.9V 36 Size Document Number R ev


Custom 1A
System DRAM Expansion(200P-DDR2_SODIMM)
Date: Tuesday, January 25, 2005 Sheet 9 of 38
8 7 6 5 4 3 2 1
1 2 3 4 5 6 7 8

U42A U42B
22 USBP0+ D21 D17 USBP4+
USBP_0P USBP_4P USBP4+ 25
GATEA20 AF22 AF25 CPUNMI R302 33R ACS YNCR C21 E17 USBP4-
30 GATEA20
2 -CPUA20M -CPUA20M
-CPUSLP
AF23
AE27
A20GATE
A20M#
ICH6 NMI
RCIN# AD23 - RCIN
CPUNMI 2
-RCIN 30
24 SYNC1
24 SDOUT1 R287
R301
33R
0R
ACSDOUTR
ACBITCLKR
22
27
USBP0-
USBP1+ B20
A20
USBP_0N
USBP_1P
ICH6
USBP_4N
USBP_5P A16
B16
USBP5+
USBP5-
USBP4-
USBP5+
25
26
2 -CPUSLP CPUSLP# 24 BITCLK1 27 USBP1- USBP_1N USBP_5N USBP5- 26
-CPUFERR AF24 AG27 -CPUSMI -CODEC_RST C19 D15
2,11 -CPUFERR
2 -CPUIGNNE -CPUIGNNE
-CPUINIT
AG26
FERR#
IGNNE#
1 OF 5 SMI#
STPCLK# AE26 -CPUSTPCLK
-CPUSMI 2
-CPUSTPCLK 2
24 -CODEC_RST 29
29
USBP2+
USBP2- D19
USBP_2P
USBP_2N 2 OF 5
USBP_6P
USBP_6N C15
USBP6+ 29
USBP6- 29
2 -CPUINIT AF27 INIT# DPRSLPVR/TP_1 AE20 CPUDPRSLPVR T82 BITCLK1 R309 *10K 29 USBP3+ B18 USBP_3P USBP_7P B14 USBP7+ 29
2 CPUINTR CPUINTR AG24 AE24 -CPUDPSTP T79 29 USBP3- A18 A14
INTR DPRSTP#/TP_4 USBP_3N USBP_7N USBP7- 29
AE22 INIT3_3V# CPU AC-LINK SETTING -USBOC0 C27 OC0# OC_4#_GPI9 C23 -USBOC4
-USBOC1 B27 OC1# OC_5#_GPI10 D23 -USBOC5
B26 C25
A
AD0 E2 AD_0 C_BE_ 0# J6 -CBE0
-USBOC2
-USBOC3 C26
OC2#
OC3#
USB OC_6#_GPI14
OC_7#_GPI15 C24
-USBOC6
-USBOC7 A
AD1 E5 H6 -CBE1 ICHSMBCLK R194 2.2K
AD_1 C_BE_ 1# RVCC3V
* USBBIAS
AD2 C2 G4 -CBE2 ICHSMBDATAR199 2.2K SUSPEND WELL R289 22.6/F
AD3 AD_2 C_BE_ 2# -CBE3
F5 AD_3 C_BE_3 # G2 USBRBIAS B22
AD4 F3 4 USB48M A27 A22
AD5 AD_4 -FRAME CLK48 USBRBIAS#
E9 AD_5 FRAME# J3
ICHPCLK AD6 F2 A3 -IR DY GMCHDMI_TXP0 T24 Y24 GMCHDMI_TXP2
AD7 AD_6 IRDY# -TR DY GMCHDMI_TXN0 DMI_0RXP DMI_2RXP GMCHDMI_TXN2
D6 AD_7 TRDY# J2 T25 DMI_0RXN DMI_2RXN Y25
AD8 E6 C3 -DEVSEL GMCHDMI_RXP0 R26 W26 GMCHDMI_RXP2
AD9 AD_8 DEVSEL# -STOP GMCHDMI_RXN0 DMI_0TXP DMI_2TXP GMCHDMI_RXN2
D3 AD_9 STOP# J1 R27 DMI_0TXN DMI_2TXN W27
R260 AD10 A2 E1 PAR USB48M GMCHDMI_TXP1 V24 AB23 GMCHDMI_TXP3
*68R AD11 D2
AD_10
AD_11
PCI PAR
PERR# E3 -PERR GMCHDMI_TXN1 V25
DMI_1RXP
DMI_1RXN DMI
DMI_3RXP
DMI_3RXN AB24 GMCHDMI_TXN3
AD12 D5 C5 -PLOCK GMCHDMI_RXP1 U26 AA26 GMCHDMI_RXP3
AD13 AD_12 PLOCK# -SERR R294 GMCHDMI_RXN1 DMI_1TXP DMI_3TXP GMCHDMI_RXN3
H3 AD_13 SERR# G5 U27 DMI_1TXN DMI_3TXN AA27
ICHPCLKC

AD14 B4
AD15 AD_14 -REQ0 *68R +ICHDCLK DMIBIAS
J5 AD_15 REQ_0# L5 -REQ0 20 4 +ICHDCLK AC25 DMI_CLKP DMI_ZCOMP F24 1.5V
AD16 K2 B5 -REQ1 4 -ICHDCLK -ICHDCLK AD25 F23 R467
AD_16 REQ_1# -REQ1 DMI_CLKN DMI_IRCOMP
AD17 K5 M5 -REQ2 24.9/F

USB48MC
AD_17 REQ_2# -REQ2 23
AD18 D4 B8 -REQ3
AD_18 REQ_3# -REQ3 27
AD19 L6 P2 P3 -LPCFRAME 29,30
AD_19 29,30 LPCAD0 LAD0/FWH0 LFRAME#/FWH4
AD20 G3 C1 -GNT0 N3 N6 -LPCDRQ0 29,30
AD_20 GNT_0# -GNT0 20 29,30 LPCAD1 LAD1/FWH1 LDRQ_0#
C347 AD21 H4 B6 -GNT1 N5 P4
*10P AD22 H2
AD_21
AD_22
GNT_1#
GNT_2# F1 -GNT2
-GNT1
-GNT2 23
29,30
29,30
LPCAD2
LPCAD3 N4
LAD2/FWH2
LAD3/FWH3
LPC LDRQ_1/GPI41 -LPCDRQ1
AD23 H5 C8 -GNT3 C396
AD_23 GNT_3# -GNT3 27
AD24 B3 ACS YNCR B9 F11 SDINA 24
AD25 AD_24 -INTA *10P -CODEC_RST ACZ_SYNC ACZ_SDIN_0
(SUSPEND WELL)
M6 AD_25 PIRQA# N2 -INTA 20 A10 ACZ_RST#(SUSPEND WELL) ACZ_SDIN_1
(SUSPEND WELL)
F10 ACSDIN1
AD26 B2 L2 -INTB ACSDOUTR C9 B10 ACSDIN2
AD_26 PIRQB# -INTB 27 ACZ_SDOUT ACZ_SDIN_2
(SUSPEND WELL)
AD27 K6 M1 -INTC ACBITCLKR C10
AD28
AD29
K3
AD_27
AD_28
PIRQC#
PIRQD# L3 -INTD
-INTE
-INTC
-INTD
27 ACZ_BIT_CLK AC97
A5 AD_29 PIRQE#_GPI2 D9 -INTE 23
B AD30
AD31
L1 AD_30 PIRQF#_GPI3 C7 -INTF
-INTG
-INTF 20 CLK AC TERMINATOR 4 ICHSMBCLK Y4 SMBCLK SMLINK_0 W4 SMLINK0R204
SMLINK1
10K RVCC3V B
K4 C6 W5 U6
AD_31 PIRQG#_GPI4
PIRQH#_GPI5 M3 -INTH
-INTG
-INTH
20 4 ICHSMBDATA SMBDATA SMB SMLINK_1 R227 10K
SUSPEND WELL
F7 -REQ4
REQ_4#_GPI40 -REQ4
4 ICHPCLK ICHPCLK G6 E8 -REQA 4 ICH14M E10 AA1 ECPWROK 5,30
PCICLK REQ_5#_GPI1 -REQA CLK14 (RTC WELL) PWROK
-PCIRST R2 B7 -REQB F8 PCSPK 25
20,23,27,29,30 -PCIRST PCIRST# (SUSPEND WELL) REQ_6#_GPI0 -REQB SPKR
E7 -GNT4
SERIRQ AB20 SERIRQ
GNT_4#_GPO48
GNT_5#_GPO17 F6 -ICH_GPIO17NC
-ICH_GPIO16NC
-GNT4
T97
PC LEGACY
GNT_6#_GPO16 D8 T101
H24 M24 PERp_3
26 ICHEXP_RXP1 PERp[1] PERp[3]
AC14 -PIDEIOW -PIDEIOW 28 H25 M25 PERn_3
DIOW# 26 ICHEXP_RXN1 PETp_1 PERn[1] PERn[3]
28 PIDED0 PIDED0 AD14 AB15 -PIDEDACK -PIDEDACK 28 C576 .1U/X7R G26 L26 PETp_3
DD_0 DDACK# 26 ICHEXP_TXP1 PETn_1 PETp[1] PETp[3]
28 PIDED1 PIDED1 AF15 AB14 PIDEDREQ PIDEDREQ 28 C575 .1U/X7R G27 L27 PETn_3
DD_1 DDREQ 26 ICHEXP_TXN1 PETn[1] PETn[3]
PIDED2 AF14 AE16 -PIDEIOR PERp_2 K24 P23 PERp_4
28 PIDED2
28 PIDED3 PIDED3 AD12
DD_2
DD_3
DIOR#
IORDY AF16 PIDEIOR DY
-PIDEIOR 28
PIDEIORDY 28
PERn_2
PETp_2
K25
PERp[2]
PERn[2]
PCI EXPRESS PERp[4]
PERn[4] P24 PERn_4
28 PIDED4 PIDED4 AE14 AC16 PIDEA0 PIDEA0 28 J26 N26 PETp_4
PIDED5 DD_4 DA0 PIDEA1 PETn_2 PETp[2] PETp[4] PETn_4
28 PIDED5 AC11 DD_5 DA1 AB17 PIDEA1 28 J27 PETn[2] PETn[4] N27
28 PIDED6 PIDED6 AD11 AC17 PIDEA2 PIDEA2 28
PIDED7 DD_6 DA2 -PIDECS1
28 PIDED7 AB11 DD_7 DCS1# AD16 -PIDECS1 28
PIDED8 AE13 AE17 -PIDECS3
28 PIDED8
28 PIDED9 PIDED9 AF13
DD_8
DD_9
IDE DCS3#
IDEIRQ AB16 PIDEIRQ14
-PIDECS3 28
PIDEIRQ14 28
ICH6

28 PIDED10 PIDED10 AB12


PIDED11 DD_10
28 PIDED11 AB13 DD_11
28 PIDED12 PIDED12
PIDED13
AC13 DD_12 NET USBBIAS:
28 PIDED13 AE15 DD_13
28 PIDED14 PIDED14
PIDED15
AG15 DD_14 Traces tied together close
28 PIDED15 AD13 DD_15
to pin.LENGTH no longer
C than 200mil to resistor. C

ICH6_-SATARX0C206 .01U/X7R -SATARX0 AE3 -SATARX2 C207 *.01U/X7R ICH6_-SATARX2


IF not used,then pull up
SATA0RXN SATA2RXN AD7
ICH6_+SATARX0C222 .01U/X7R +SATARX0AD3 AC7 +SATARX2 C208 *.01U/X7R ICH6_+SATARX2 RVCC3V
ICH6_-SATATX0 C173 .01U/X7R -SATATX0 AG2 SATA0RXP SATA2RXP -SATATX2 C601 *.01U/X7R ICH6_-SATATX2
SATA0TXN SATA2TXN AF6
ICH6_+SATATX0C189 .01U/X7R +SATATX0 AF2 AG6 +SATATX2 C602 *.01U/X7R ICH6_+SATATX2 -USBOC0 R464 10K R288 10K -USBOC4 GMCHDMI_RXP[0..3]
SATA0TXP SATA2TXP 5 GMCHDMI_RXP[0..3]
ICH6_-SATARX1C210 *.01U/X7R -SATARX1AC5 AC9 -SATARX3 C211 *.01U/X7R ICH6_-SATARX3 -USBOC1 R460 10K R466 10K -USBOC5
ICH6_+SATARX1C209 *.01U/X7R +SATARX1AD5 SATA1RXN SATA3RXN +SATARX3 C212 *.01U/X7R ICH6_+SATARX3 -USBOC2 R455 10K R465 10K -USBOC6 GMCHDMI_RXN[0..3]
SATA1RXP SATA3RXP AD9 5 GMCHDMI_RXN[0..3]
ICH6_-SATATX1 C604 *.01U/X7R -SATATX1 AF4 AF8 -SATATX3 C599 *.01U/X7R ICH6_-SATATX3 -USBOC3 R463 10K R461 10K -USBOC7
ICH6_+SATATX1C603 *.01U/X7R +SATATX1AG4 SATA1TXN SATA3TXN +SATATX3 C600 *.01U/X7R ICH6_+SATATX3 GMCHDMI_TXP[0..3]
SATA1TXP SATA3TXP AG8 5 GMCHDMI_TXP[0..3]
GMCHDMI_TXN[0..3]
5 GMCHDMI_TXN[0..3]

SATA NET SATABIAS: - RCIN R170 10K


28 -SATALED AC19 SATALED# 3V
Traces tied together close to GATEA20 R532 10K 3V
*

4 +SATACLK +SATACLK AC1 SATA_CLKP SATARBIAS AF11 SATABIAS R163 24.9/F pin.LENGTH no longer than PLACEMENT NOTICE :
SATARBIAS# AG11
200mil to resistor. CPU LEGACY Pullups
4 -SATACLK -SATACLK AC2 SATA_CLKN 1. ICHHLVREF AND ICHHLSWING RELATIVE R/C MUST NEAR ICH PIN
2. USB48MC AND ICHPCLKCR/C MUST NEAR ICH PIN
3. ICHCLK66C R/C MUST NEAR ICH PIN
ICH6 CONFIRM IDSEL,INT,REQ/GNT PCI Pullups RP28 8.2K-10P8R
4. SATABIAS, ICHRCOMP AND USBBIAS R MUST NEAR ICH PIN
3V 10 1 -SERR
ICH6_-SATARX[0..3] ICH6_-SATATX[0..3]
RP21 8.2K-10P8R -IR DY
-PERR
9 2 -DEVSEL 5. SATA RESERVED R NEAR ICH AS CLOSE AS POSSIBLE
28 ICH6_-SATARX[0..3] ICH6_-SATATX[0..3] 28 3V 10 1 8 3 -TR DY
D 9 2 -REQ0 -FRAME 7 4 -INTC D
ICH6_+SATARX[0..3] ICH6_+SATATX[0..3] 8 3 -REQ2 -STOP 6 5
28 ICH6_+SATARX[0..3] ICH6_+SATATX[0..3] 28 3V
-INTA 7 4 -INTB
-INTD 6 5 3V 3V 10 1 -REQ4
-STOP AD[0..31] -REQA 9 2
20,23,27 -STOP AD[0..31] 20,23,27
PAR -CBE[0..3] -INTE R290 8.2K -PLOCK 8 3 SERIRQ
20,23,27 PAR -CBE[0..3] 20,23,27 3V
PROJECT : NT2
20,23,27 -PERR -PERR -FRAME -INTF R291 8.2K -REQ3 7 4 -REQB
-FRAME 20,23,27
20 -PLOCK -PLOCK -IR DY -INTG R292 8.2K -REQ1 6 5 3V
-IRDY 20,23,27
Quanta Computer Inc.
20,23,27 -SERR -SERR -TR DY -INTH R254 8.2K
-TRDY 20,23,27
20,23,27 -DEVSEL -DEVSEL 3V RP31 8.2K-10P8R
3V 2,4,7,9,11,12,13,14,15,16,19,20,21,22,23,25,26,27,28,29,30,32,33,34,36,37,38
20,29,30 SERIRQ SERIRQ -PCIRST
-PCIRST 20,23,27,29,30 Size Document Number R ev
-PME
-PME 11,20,23,27 Custom 1A
ICH6(CPU,PCI,IDE)
PCI MODULE PROT FOR INTERSHEET Date: Tuesday, January 25, 2005 Sheet 10 of 38
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

RTCVCC
GPIO PIN DEFINE U42E
R182 1K
3VSUS 2,22,25,27,32,33
GPI6 R512 1 2 3VSUS
GPI7 PULL UP -DNBSWON U1 D35 RB501H
GPI8 -KBSMI PULL UP
30 -DNBSWON
ICH_TP0 V2
PWRBTN#
BATLOW#
ICH6 SLP_S3# T4 -SUSB
-SUSB 20,30
*0R RTC1 -RTCRST

1
GPI11 -SWI PULL UP -PME P6 T5 -SUSC C260 .1U
20,23,27 -PME PME# SLP_S4# -SUSC 30
GPI12 PULL UP - RI T2 T6 -SUSS5 R509 200K
GPI13 -RUNSCI PULL UP -SMLINKALERT
-SWI
Y5
RI#
LINKALERT#
3 OF 5 SLP_S5#
SUS_STAT*/LPCPD# W3 -SUSSTAT
SUSCLK
T91
D33
GPI26 SYS_ID0 PULL UP W6 SMBALERT#/GPI11 SUSCLK V6 T108
RB501H
GPI29 SYS_ID1 PULL LO GPI11 V3
T87 PMU

2
-KBSMI GPIO24
GPI30 PULL UP R1 GPI8
A
GPI31 PULL UP -WAKE U5 WAKE# A
GPO18 SET OUTPUT -RU NSCI R6 D32 RB501H
GPIO25 GPI13
GPO19 SET OUTPUT P5 GPIO25 1 2 RTC3 1 3 RTC4
5VPCU
GPO20 SET OUTPUT T90
GPIO27 R3 GPIO27 SUSPEND WELL TP_3 U3 ICH6_TP_1
T88
GPO21 SET OUTPUT GPIO28 R506 2.2K

RTC6
T89 T3 GPIO28
GPO23 DISPON SET OUTPUT -SYSRST U2 Q22

2
-ICHPLTRST R5 SYS_RESET#
GPIO24 SET OUTPUT PLTRST#
MMBT3904 R510

1
GPO49 CPUPG SET OUTPUT 47K
GPIO25 SET OUTPUT T92
GPI12 M2 GPI12
CN12
GPIO27 SET OUTPUT -ICH SYNCAG21 AB21 -CPUPROH_E ML1220-SOCKET RTC5
5 -ICHSYNC MCH_SYNC# GPO19
GPIO28 SET OUTPUT AD27 -DPSLP
T81

2
DPSLP#/TP_2
GPIO32 SET OUTPUT -ICHTHRMTRIP AE23
THRMTRIP# (CPUCORE VRMPWRGD AF21 VRMPG
GPIO33 SET OUTPUT
RTC BATTERY & CHARGE CIRCUIT
WELL)
-ICHTHRM AC20 AG25 CPUPG R513
THRM# CPUPWRGD/GPO49 CPUPG 2,4
GPIO34 SET OUTPUT STP_CPU#/GPO20 AD22 GPO20
T83
150K
ADD-3C T80
GPI6 AD19 AC21 GPO18
GPI7 AE19
BMBUSY#/GPI6 STP_PCI#/GPO18
AD20 -VROMWP_ICHT78
T109 GPI7 GPO21
Functional Straps R744
V_PWRCNTL *0R
T77
GPIO32 AF19
V_PW RICH AF20 CLKRUN#/GPIO32 GPO23 AD21 DISPON
SYS_ID1
GPIO33 SATA1GP/GPI29 AE18 SYS_ID1
Top-Block Swap Override -VGARST_ICHAC18 AF17 SYS_ID0
GNT[6]#/
13 -VGARST_ICH GPIO34 GPIO SATA0GP/GPI26
SATA2GP/GPI30 AF18 SYS_ID2 SYS_ID0 29
SYS_ID2 29
GPO[16] Pull-Low : "top-block swap" mode MAIN POWER SATA3GP/GPI31 AG18 GPI31
T110 MAIN POWER PULLUP/DN
RTCVCC 3V
Re served
LINKALERT# -RSMRST Y3 RSMRST# RTC VCC INTRUDER# AA3 -INTRUDER R189 1M SYS_ID2 R658 47K
Requires an external pull-up resistor. INTVRMEN AA5 INTVRMEN R185 330K SYS_ID0 R531 47K
SYS_ID1 R529 *47K
No Reboot 32.768MHz
SPKR -RTCRST AA2 RTCRST# RTCX1 Y1 ICH32KX1 C596 15P GPI31 R530 10K
Pull-up : "No Reboot" mode GPI7 R528 220K
RTC

4
3
VRMPG R526 10K
B Integrated VccSus1.5 VRM enable/disable RTCVCC AB3 VCCRTC
Y7 R193 4 -ICHTHRM
-ICHTHRM R160 4.7K B
INTVRMEN RTC VCC 6H03200299 10M GPI12 R246 10K
Pull-up : Enable integrated VccSus1.5V VRM C273 C253 -CPUPROH_E R659 10K
C722 .1U 1U -VGARST_ICH R713 *10K
13 -VGARST_ICH

1
2
Integrated Vcc2.5 VRM enable/disable *.1U
RTCX2 Y2 ICH32KX2
13,37 V_PWRCNTL
V_PWRCNTL R714 10K
GPIO[25] C590 15P
Pull-Low : Enable inegrated Vcc2.5 VRM
ICH5_NC0 E12 B11 ICH5_NC6
T98 LAN_RXD_0 LAN_RSTSYNC T105
Re served T93
ICH5_NC1 E11 F12 ICH5_NC7 V_PWRCNTL R743 10K
EE_CS ICH5_NC2 C13
LAN_RXD_1 LAN_CLK
V5 -ICH_LANRST T95 13,37 V_PWRCNTL GPIO25 R212 10K
T99 LAN_RXD_2 LAN_RST#
iternal pull-down & should not be pull-high -ICH_LANRST
(SUSPEND WELL)
ICH5_NC3 C12 R191 10K
T102 LAN_TXD_0 SYS_ID0
ICH5_NC4 C11 D12 ICH5_NC9 R162 *10K
Boot BIOS Desination Selection
T100
ICH5_NC5 E13
LAN_TXD_1 LAN & EEPROM EE_CS
B12 ICH5_NC10
T103
T107
SYS_ID1 R161 10K
T96 LAN_TXD_2 EE_SHCLK
GNT[5]#/ EE_DOUT D11 ICH5_NC11
T104 19 DISPON
DISPON R159 1K
GPO[17] This functionality for debug/testing only EE_DIN F13 ICH5_NC12
T94
Re served ICH6 SUSPEND WELL PULLUP
EE_DOUT
iternal pull-up & should not be pull-low
ASSUME S5 SUPPORT
XOR chain Entrance / PCI Express port
RVCC3V
config bit1
ACZ_SDOUT Close to ICH
Pull-low : allows entrance to XOR Chain testing
COREVTT R171 62R -CPUFERR - RI R211 8.2K
-CPUFERR 2,10 -RI
PCI Express Port Config bit 0 -SMLINKALERT
-SMLINKALERT R195 10K
ACZ _SYNC R180 62R R72 0R
-CPUTHRMTRIP 2 30 -KBSMI
-KBSMI R497 10K
This signal has a weak internal pull-down 30 -SWI
-SWI R181 10K
-RU NSCI R210 10K
30 -RUNSCI
C TP[1] iternal pull-down & should not be pull-high -ICHTHRMTRIP -SUSSTAT R198 10K
C
-SYSRST R493 8.2K
STATLED# iternal pull-up & should not be pull-low ICH_TP0 R201 10K
-WAKE R220 5.1K/F
26 -WAKE
REQ[4:1] XOR Chain Selection / See Chapter 8 2,4 -CPUITPDBR
R213 *0R -SYSRST
5,13,26,28 -ICHPLTRST
-ICHPLTRST R214 *10K

XOR Chain Entrance / See Chapter 8


TP[3] This signal should not be Pull-low unless using
Q25
XOR Chain testing 5VPCU 2N7002E 5VSUSREF

RVCC3V
R176 *100K RVCC3V 3 1
5

1 -RSMRST1 2 1 RVCCON_R R157 *0R


-RSMRST RVCCON 30,32
R164 0R 4
30 -RSMRST_591

2
2 D21
*SW1010C 32,33 RVCCOND RVC COND
3

R168 22K C219


*.1U
DESIGN CHECK LIST : U13
1. CLASSIFY THE POWER PLANE FOR PMU AND GPIO PIN *74AHC1G32GW
PLACEMENT NOTICE :
2. CLASSIFY GPI AND GPO PIN
3. COMMON PIN FOR PMU INPUT: -PME, BATLOW, -RI, 5V
R661
R662
10K
10K
CPUPROCHOT 4 16 -VROM_WP 1. ONE BYPASS CAP FOR EACH ICH PIN IF POSSIBLE
-WAKESCI, RUNSCI, KBSMI AND -DNBSWON
CPUPROH_E

2. RTC XTAL MUST NEAR ICH

3
4. USUALLY USED GPIO PIN : DISPON, CRTSENSE, SPKOFF
3

D
3. PUT RTC BAT CIRCUIT AS A GROUP D
5. USUALLY USED CLK CONTRL PIN : -CPUSTP, -PCISTP, -SUSA AND -VROMWP_ICH 2
-SUSSTAT -CPUPROH_E Q61
4. REF5VSUS AND REF5V R/C/D NEAR ICH PIN
2 2 2 ACIN 29,30,31
6. AGP PMU PIN : -AGPBUSY AND -STPAGP Q60
2N7002E
Q69
7. CHECK -PCIRST BUFFERAND PWROK SIGNAL PROJECT : NT2
2N7002E Q62 *2N7002E

1
2N7002E
1

8. CHECK -RSMRST CIRCUI Quanta Computer Inc.


Size Document Number R ev
Custom ICH6(GPIO/MISC) 3C

Date: Wednesday, January 26, 2005 Sheet 11 of 38


1 2 3 4 5 6 7 8
8 7 6 5 4 3 2 1

U42D

ASSUME S5 SUPPORT A1 G21


U42C VSS1 VSS87
A12 G7
CB354
CB375
.1U
.1U
3V
3V
A6
B1
VCC3_3_1 V5REF_SUS F21 ICHREF5VSUS
D24 *RB751V RVCC3V
A15
A19
VSS2
VSS3
ICH6 VSS88
VSS89 G9
H23
CB442 .1U 3V VCC3_3_2 1UB C400 VSS4 VSS90
E4 A21 H26
CB300 .1U 3V E26
VCC3_3_3
VCC3_3_4
ICH6 .1U C391 A23
VSS5
VSS6
5 OF 5 VSS91
VSS92 H27
CB294 .1U 3V H1 R303 0R A26 J23
VCC3_3_5 5VSUSREF VSS7 VSS93

ICHREF5V
CB301 .1U 3V H7 1UB C408 A4 J24
4
CB291 .1U 3V J7
VCC3_3_6
VCC3_3_7
4 OF 5 .1U C398 A7
VSS8
VSS9
VSS94
VSS95 J25 4
CB321 .1U 3V L4 R300 1K A9 J4
VCC3_3_8 5V VSS10 VSS96
CB319 .1U 3V L7 A8 AA11 K1
CB284 .1U 3V VCC3_3_9 V5REF_1 VSS11 VSS97
M7 VCC3_3_10 V5REF_2 AA18 3V AA13 VSS12 VSS98 K23
CB288 .1U 3V P1 D25 RB751V AA16 K26
CB309 .1U 3V VCC3_3_11 1.5V .1U CB358 VSS13 VSS99
AA10 VCC3_3_12 VCC1_5_A_33 E23 AA4 VSS14 VSS100 K27
CB283 .1U 3V AA12 E24 1.5V .1U CB359 AB1 K7
CB318 .1U 3V VCC3_3_13 VCC1_5_A_34 1.5V .1U CB299 VSS15 VSS101
AA14 VCC3_3_14 VCC1_5_A_35 F9 AB10 VSS16 VSS102 L13
CB286 .1U 3V AA15 F20 1.5V .1U CB295 AB19 L15
CB292 .1U 3V AA17
VCC3_3_15
VCC3_3_16
POWER VCC1_5_A_36
VCC1_5_A_37 G8 1.5V .1U CB384 AB2
VSS17
VSS18
VSS103
VSS104 L23
CB287 .1U 3V AC15 G20 1.5V .1U CB436 AB7 L24
CB320 .1U 3V VCC3_3_17 VCC1_5_A_38 1.5V .1U CB435 VSS19 VSS105
AD17 VCC3_3_18 VCC1_5_A_39 L11 AB9 VSS20 VSS106 L25
CB317 .1U 3V AG10 L12 1.5V .1U CB305 AC10 M12
CB363 .1U 3V VCC3_3_19 VCC1_5_A_40 1.5V .1U CB356 VSS21 VSS107
AG13 VCC3_3_20 VCC1_5_A_41 L14 AC12 VSS22 VSS108 M13
CB323 4.7U 3V AG16 L16 1.5V .1U CB344 AC22 M14
CB396 4.7U 3V VCC3_3_21 VCC1_5_A_42 1.5V .1U CB331 VSS23 VSS109
AG19 VCC3_3_22 VCC1_5_A_43 L17 AC23 VSS24 VSS110 M15
M11 1.5V 4.7U CB439 AC24 M16
VCC1_5_A_44
VCC1_5_A_45 M17 1.5V 4.7U CB437 AC26
VSS25
VSS26
GROUND VSS111
VSS112 M23
CB397 .1U RVCC3V A11 P11 1.5V 4.7U CB440 AC3 M26
CB392 .1U RVCC3V VCCSUS3_3_1 VCC1_5_A_46 1.5V VSS27 VSS113
A17 VCCSUS3_3_2 VCC1_5_A_47 P17 AC6 VSS28 VSS114 M27
CB399 .1U RVCC3V A24 T11 1.5V AD1 M4
CB398 .1U RVCC3V VCCSUS3_3_3 VCC1_5_A_48 1.5V VSS29 VSS115
B17 VCCSUS3_3_4 VCC1_5_A_49 T17 AD10 VSS30 VSS116 N1
CB328 .1U RVCC3V C16 U11 1.5V AD15 N11
CB324 .1U RVCC3V VCCSUS3_3_5 VCC1_5_A_50 1.5V VSS31 VSS117
C17 VCCSUS3_3_6 VCC1_5_A_51 U12 AD18 VSS32 VSS118 N12
CB371 .1U RVCC3V D16 U14 1.5V AD2 N13
CB387 .1U RVCC3V VCCSUS3_3_7 VCC1_5_A_52 1.5V VSS33 VSS119
E16 VCCSUS3_3_8 VCC1_5_A_53 U16 AD24 VSS34 VSS120 N14
CB315 .1U RVCC3V F15 U17 1.5V AD6 N15
CB395 .1U RVCC3V VCCSUS3_3_9 VCC1_5_A_54 1.5V VSS35 VSS121
F16 VCCSUS3_3_10 VCC1_5_B_55 AA22 AE10 VSS36 VSS122 N16
CB385 .1U RVCC3V F18 AA23 ICH6_1.5V_EXP .1U CB316 AE11 N17
CB386 .1U RVCC3V VCCSUS3_3_11 VCC1_5_B_56 ICH6_1.5V_EXP .1U CB345 VSS37 VSS123
G15 VCCSUS3_3_12 VCC1_5_B_57 AA24 AE12 VSS38 VSS124 N7
3 CB400 .1U RVCC3V G16 AA25 ICH6_1.5V_EXP .1U CB330 AE2 P12 3
CB341 .1U RVCC3V VCCSUS3_3_13 VCC1_5_B_58 ICH6_1.5V_EXP .1U CB364 VSS39 VSS125
G17 VCCSUS3_3_14 VCC1_5_B_59 AB25 AE21 VSS40 VSS126 P13
CB370 .1U RVCC3V G18 AB26 ICH6_1.5V_EXP .1U CB343 AE25 P14
CB402 .1U RVCC3V VCCSUS3_3_15 VCC1_5_B_60 ICH6_1.5V_EXP .1U CB366 VSS41 VSS127
U4 VCCSUS3_3_16 VCC1_5_B_61 AB27 AE6 VSS42 VSS128 P15
CB325 .1U RVCC3V V1 F25 ICH6_1.5V_EXP .1U CB311 AE7 P16
CB381 .1U RVCC3V VCCSUS3_3_17 VCC1_5_B_62 ICH6_1.5V_EXP .1U CB322 VSS43 VSS129
V7 VCCSUS3_3_18 VCC1_5_B_63 F26 AF1 VSS44 VSS130 P22
CB373 .1U RVCC3V W2 F27 ICH6_1.5V_EXP .1U CB361 AF12 R11
CB369 .1U RVCC3V VCCSUS3_3_19 VCC1_5_B_64 ICH6_1.5V_EXP .1U CB349 VSS45 VSS131
Y7 VCCSUS3_3_20 VCC1_5_B_65 G22 AF26 VSS46 VSS132 R12
CB327 .1U RVCC3V A13 G23 ICH6_1.5V_EXP .1U CB378 AF3 R13
CB393 .1U RVCC3V VCCSUS3_3_21/VCCLAN3_3 VCC1_5_B_66 ICH6_1.5V_EXP .1U CB380 VSS47 VSS133
F14 VCCSUS3_3_22/VCCLAN3_3 VCC1_5_B_67 G24 AF7 VSS48 VSS134 R14
CB368 .1U RVCC3V G13 G25 ICH6_1.5V_EXP .1U CB329 AG1 R15
CB372 .1U RVCC3V VCCSUS3_3_23/VCCLAN3_3 VCC1_5_B_68 ICH6_1.5V_EXP .1U CB379 VSS49 VSS135
G14 VCCSUS3_3_24/VCCLAN3_3 VCC1_5_B_69 H21 AG12 VSS50 VSS136 R16
H22 ICH6_1.5V_EXP .1U CB377 AG14 R17
VCC1_5_B_70 ICH6_1.5V_EXP .1U CB307 VSS51 VSS137
VCC1_5_B_71 J21 AG17 VSS52 VSS138 R23
J22 ICH6_1.5V_EXP .1U CB362 AG20 R24
VCC1_5_B_72 ICH6_1.5V_EXP .1U CB326 VSS53 VSS139
VCC1_5_B_73 K21 AG22 VSS54 VSS140 R25
CB367 .1U ICH6_SUS1.5VC G19 K22 ICH6_1.5V_EXP .1U CB351 AG3 R4
CB338 .1U ICH6_SUS1.5VA R7 VCCSUS1_5_A VCC1_5_B_74 ICH6_1.5V_EXP 4.7U CB348 VSS55 VSS141
VCCSUS1_5_B VCC1_5_B_75 L21 AG7 VSS56 VSS142 T1
CB337 .1U ICH6_SUS1.5VB U7 L22 ICH6_1.5V_EXP 4.7U CB382 B13 T12
CB376 .1U ICH6_SUS1.5VC G10 VCCSUS1_5_C VCC1_5_B_76 ICH6_1.5V_EXP 4.7U CB355 VSS57 VSS143
VCCSUS1_5_D/VCCLAN1_5 VCC1_5_B_77 M21 B15 VSS58 VSS144 T13
CB374 .1U ICH6_SUS1.5VC G11 M22 ICH6_1.5V_EXP B19 T14
VCCSUS1_5_E/VCCLAN1_5 VCC1_5_B_78 ICH6_1.5V_EXP VSS59 VSS145
VCC1_5_B_79 N21 B21 VSS60 VSS146 T15
N22 ICH6_1.5V_EXP B23 T16
VCC1_5_B_80 ICH6_1.5V_EXP VSS61 VSS147
VCC1_5_B_81 N23 B25 VSS62 VSS148 T23
N24 ICH6_1.5V_EXP C14 T26
CB297 .1U 1.5V VCC1_5_B_82 ICH6_1.5V_EXP VSS63 VSS149
AA6 VCC1_5_A_1 VCC1_5_B_83 N25 C18 VSS64 VSS150 T27
CB312 .1U 1.5V AA7 P21 ICH6_1.5V_EXP C20 T7
CB391 .1U 1.5V VCC1_5_A_2 VCC1_5_B_84 ICH6_1.5V_EXP VSS65 VSS151
AA8 VCC1_5_A_3 VCC1_5_B_85 P25 C22 VSS66 VSS152 U13
CB390 .1U 1.5V AA9 P26 ICH6_1.5V_EXP C4 U15
CB332 .01U/X7R 1.5V VCC1_5_A_4 VCC1_5_B_86 ICH6_1.5V_EXP ICH6_1.5V_EXP 0C L34 VSS67 VSS153
2
AA19 VCC1_5_A_5 VCC1_5_B_87 P27 1.5V D1 VSS68 VSS154 U23 2
CB302 .1U 1.5V AA20 R21 ICH6_1.5V_EXP D10 U24
CB313 .1U 1.5V VCC1_5_A_6 VCC1_5_B_88 ICH6_1.5V_EXP VSS69 VSS155
AA21 VCC1_5_A_7 VCC1_5_B_89 R22 D13 VSS70 VSS156 U25
CB293 .1U 1.5V AB4 T21 ICH6_1.5V_EXP D14 V23
CB360 .1U 1.5V VCC1_5_A_8 VCC1_5_B_90 ICH6_1.5V_EXP VSS71 VSS157
AB5 VCC1_5_A_9 VCC1_5_B_91 T22 D18 VSS72 VSS158 V26
CB308 .1U 1.5V AB6 U21 ICH6_1.5V_EXP D20 V27
CB394 .1U 1.5V VCC1_5_A_10 VCC1_5_B_92 ICH6_1.5V_EXP VSS73 VSS159
AB8 VCC1_5_A_11 VCC1_5_B_93 U22 D22 VSS74 VSS160 V4
CB306 .1U 1.5V AC4 V21 ICH6_1.5V_EXP D7 W1
1.5V VCC1_5_A_12 VCC1_5_B_94 ICH6_1.5V_EXP VSS75 VSS161
AC8 VCC1_5_A_13 VCC1_5_B_95 V22 E14 VSS76 VSS162 W23
1.5V AD4 W21 ICH6_1.5V_EXP E15 W25
1.5V VCC1_5_A_14 VCC1_5_B_96 ICH6_1.5V_EXP VSS77 VSS163
AD8 VCC1_5_A_15 VCC1_5_B_97 W22 E18 VSS78 VSS164 W7
1.5V AE4 Y21 ICH6_1.5V_EXP E19 Y23
1.5V VCC1_5_A_16 VCC1_5_B_98 ICH6_1.5V_EXP VSS79 VSS165
AE5 VCC1_5_A_17 VCC1_5_B_99 Y22 E25 VSS80 VSS166 Y26
1.5V AE8 F17 Y27
1.5V VCC1_5_A_18 1.5V .1U CB383 VSS81 VSS167
AE9 VCC1_5_A_19 VCCDMIPLL AC27 F19 VSS82 VSS168 Y6
1.5V AF5 AE1 1.5V .01U/X7R CB333 F22 AF10
1.5V VCC1_5_A_20 VCCSATAPLL 1.5V VSS83 VSS169
AF9 VCC1_5_A_23 VCCUSBPLL A25 F4 VSS84 VSS170 B24
1.5V AG5 G1 E27
CB298 .1U 1.5V VCC1_5_A_24 VSS85 VSS171
AG9 VCC1_5_A_25 G12 VSS86 VSS172 W24
CB334 .1U 1.5V D24
CB401 .1U 1.5V VCC1_5_A_26 COREVTT .1U CB304
D25 VCC1_5_A_27 V_CPU_IO_1 AB22
CB342 .1U 1.5V D26 AD26 COREVTT .1U CB285 ICH6
CB347 .1U 1.5V VCC1_5_A_28 V_CPU_IO_2 COREVTT .1U CB438
D27 VCC1_5_A_29 V_CPU_IO_3 AG23
CB388 .1U 1.5V E20
CB357 .1U 1.5V VCC1_5_A_30
E21 VCC1_5_A_31
CB389 .1U 1.5V E22 AB18 ICH6_2.5V
VCC1_5_A_32 VCC2_5_1 4.7U CB350
VCC2_5_2 P7
COREVTT
COREVTT 2,4,5,7,11,32,37
COREVCC
COREVCC 2,3,32,34,35
1.5V
1.5V 5,7,10,14,26,32,36,37
1 3V 1
3V 2,4,7,9,10,11,13,14,15,16,19,20,21,22,23,25,26,27,28,29,30,32,33,34,36,37,38
ICH6 5V
5V 4,11,19,21,25,26,27,28,29,30,32,33,34,35,37
RVCC1.5V
RVCC1.5V
3VSUS
3VSUS 2,11,22,25,27,32,33
5VSUS
5VSUS 27,29,30,32,33,37,38
RVCC3V
RVCC3V 4,10,11,26,30,32,33
PROJECT : NT2
Quanta Computer Inc.
DEFINE AS S5 SUPPORT INITIALLY. Size Document Number R ev
Custom 2A
ICH6(POWER/GND)
Date: Tuesday, January 25, 2005 Sheet 12 of 38
8 7 6 5 4 3 2 1
5 4 3 2 1

SRS= 1 DOWN -2.5%


MEMORY CLOCK SPREAD
U45A MK1726_VDD
3V
GMCHEXP_TXN15 AH30 AJ5
5 GMCHEXP_TXP[15..0] PCIE_RX0P GPIO0 GPIO_0 15
GMCHEXP_TXP15 AG30 AH5 0 DOWN -1.8% C82 C139 L20 *0B
SPECTRUM
PCIE_RX0N GPIO1 GPIO_1 15
GMCHEXP_TXN14 AG29 PCIE_RX1P GPIO2 AJ4 GPIO_2 15 V_PWRCNTL *.1U *22U/16V
5 GMCHEXP_TXN[15..0]
GMCHEXP_TXP14 AF29 PCIE_RX1N GPIO3 AK4 GPIO_3 15 M DOWN -0.6%
GMCHEXP_TXN13 AE29 PCIE_RX2P GPIO4 AH4 GPIO_4 15 H=Lower core voltage(1.0V)
GMCHEXP_TXP13 AE30 AF4 L=Higher core voltage(1.2V) U48
PCIE_RX2N GPIO5 GPIO_5 15
GMCHEXP_TXN12 AD30 AJ3 XT_IN 1 8 XT_OUT
PCIE_RX3P GPIO6 GPIO_6 15 XIN XOUT
5 GMCHEXP_RXP[15..0]
GMCHEXP_TXP12 AD29 PCIE_RX3N GPIO7 AK3 VGA_TP_1 TP29 2 VSS VDD 7 MK1726_VDD
GMCHEXP_TXN11 AC29 AH3 3 6
PCIE_RX4P GPIO8 GPIO_8 15,16 SRS PD
GMCHEXP_TXP11 AB29 AJ2 V_MEMSSIN R547 *33R 1726_CKO 4 5 MK_27M R123 *33R 27MOUT
5 GMCHEXP_RXN[15..0] PCIE_RX4N GPIO9 GPIO_9 15,16 SSCLK REF
GMCHEXP_TXN10
GMCHEXP_TXP10
AB30 PCIE_RX5P GPIO10 AH2 GPIO_10 16 TVOUT_SEL PIN: 3V
R552 *10K 1726_S0
*CY25819
MK_PD
C83
D
AA30 PCIE_RX5N GPIO11 AH1 GPIO_11 15 D
GMCHEXP_TXN9 AA29 PCIE_RX6P GPIO12 AG3 GPIO_12 15 0 HDTV OUT MK1726-8 *10P
GMCHEXP_TXP9 Y29 PCIE_RX6N GPIO13 AG1 GPIO_13 15 1 S/AV OUT R135 *0B R130
GMCHEXP_TXN8 W29 PCIE_RX7P GPIO14 AG2 TVSEL_M24 R554 *10K
GMCHEXP_TXP8 W30 AF3 *10K
PCIE_RX7N GPIO_PWRCNTL V_PWRCNTL 11,37 V_MEMSSIN
GMCHEXP_TXN7 V30 AF2 CLK2_GND
GMCHEXP_TXP7 PCIE_RX8P GPIO_MEMSSIN C316 10P R131 *0B
V29 PCIE_RX8N
GMCHEXP_TXN6 U29 AE10 DVOMODE
GMCHEXP_TXP6 PCIE_RX9P DVOMODE R257 0R CLK2_GND CLK2_GND
T29 PCIE_RX9N
GMCHEXP_TXN5 Z_DVPDA0 CLK2_GND

DVO / EXT TMDS / GPIO


T30 PCIE_RX10P DVPDATA_0 AH6 TP16
GMCHEXP_TXP5 R30 AJ6 Z_DVPDA1
PCIE_RX10N DVPDATA_1 TP17
GMCHEXP_TXN4 R29 AK6 Z_DVPDA2
PCIE_RX11P DVPDATA_2 TP30
GMCHEXP_TXP4 P29 AH7 Z_DVPDA3
PCIE_RX11N DVPDATA_3 TP31
GMCHEXP_TXN3 N29 AK7 Z_DVPDA4
PCIE_RX12P DVPDATA_4 TP33
GMCHEXP_TXP3 N30 AJ7 Z_DVPDA5
PCIE_RX12N DVPDATA_5 TP34
GMCHEXP_TXN2 M30 AH8 Z_DVPDA6
PCIE_RX13P DVPDATA_6 TP32
GMCHEXP_TXP2 M29 AJ8 Z_DVPDA7
PCIE_RX13N DVPDATA_7 TP35
GMCHEXP_TXN1 L29 AH9 Z_DVPDA8 R209 *0R
PCIE_RX14P DVPDATA_8 TP38 4,24,30 ECSMBDATA
GMCHEXP_TXP1 K29 AJ9 Z_DVPDA9 R224 *0R 781-1_3V R490 *100/F
PCIE_RX14N DVPDATA_9 TP36 4,24,30 ECSMBCLK 3V
GMCHEXP_TXN0 K30 AK9 DVPDATA_10 U16
PCIE_RX15P DVPDATA_10 DVPDATA_10 15
GMCHEXP_TXP0 J30 AH10 Z_DVPDA11 C586 *.1U
PCIE_RX15N DVPDATA_11 TP39
AE6 Z_DVPDA12 VTHM_CLK R219 *0R 781-1_SMCLK 8 1
DVPDATA_12 TP18 SMCLK VCC
AG6 Z_DVPDA13 C295
DVPDATA_13 TP19
GMCHEXP_RXP0 C138 .1U/X7R V_GMCHEXP_RXP0 AF26 AF6 Z_DVPDA14 VTHM_DAT R203 *0R 781-1_SMDAT 7 2 *2200P VGATHRM+
PCIE_TX0P DVPDATA_14 Z_DVPDA15 TP22 SMDATA DXP
GMCHEXP_RXN0 C137 .1U/X7R V_GMCHEXP_RXN0 AE26 AE7
PCIE_TX0N DPVDATA_15 TP15

PCI EXPRESS
GMCHEXP_RXP1 C116 .1U/X7R V_GMCHEXP_RXP1 AC25 AF7 DVPDATA_16 R200 *4.7K -GMT871_VGA 6 3
PCIE_TX1P DVPDATA_16 DVPDATA_16 15 3V -VGA_ALERT R144 -ALT DXN
GMCHEXP_RXN1 C115 .1U/X7R V_GMCHEXP_RXN1 AB25 AE8 DVPDATA_17 *0R VGATHRM-
PCIE_TX1N DVPDATA_17 DVPDATA_17 15
GMCHEXP_RXP2 C136 .1U/X7R V_GMCHEXP_RXP2 AC27 AG8 SDA R239 5 4
PCIE_TX2P DVPDATA_18 SCL R250 P_I2DAT 19 GND -OVT
GMCHEXP_RXN2 C135 .1U/X7R V_GMCHEXP_RXN2 AB27 AF8 0R
PCIE_TX2N DVPDATA_19 P_I2CLK 19 3V
GMCHEXP_RXP3 C111 .1U/X7R V_GMCHEXP_RXP3 AC26 AE9 DVPDATA_20 0R *GMT-781-1 -VGATHRM 3V
PCIE_TX3P DVPDATA_20 DVPDATA_20 15
C GMCHEXP_RXN3 C110 .1U/X7R V_GMCHEXP_RXN3 AB26 AF9 DVPDATA_21 R494 10K C
PCIE_TX3N DVPDATA_21 DVPDATA_21 15
GMCHEXP_RXP4 C131 .1U/X7R V_GMCHEXP_RXP4 Y25 AG10 DVPDATA_22
PCIE_TX4P DVPDATA_22 DVPDATA_22 15
GMCHEXP_RXN4 C130 .1U/X7R V_GMCHEXP_RXN4 W25 AF10 DVPDATA_23 R138 *4.7K
PCIE_TX4N DVPDATA_23 DVPDATA_23 15 3V

3
GMCHEXP_RXP5 C109 .1U/X7R V_GMCHEXP_RXP5 Y27 2 C43 *.01U/X7R
GMCHEXP_RXN5 C108 .1U/X7R V_GMCHEXP_RXN5 W27 PCIE_TX5P DVPCNTL0 R499 10K -VGA_ALERT
PCIE_TX5N DVPCNTL_0 AJ10 3V 4
GMCHEXP_RXP6 C129 .1U/X7R V_GMCHEXP_RXP6 Y26 AK10 DVPCNTL1 R498 10K 1 -GMT871_VGA
PCIE_TX6P DVPCNTL_1
Thermal Sensor
GMCHEXP_RXN6 C128 .1U/X7R V_GMCHEXP_RXN6 W26 AJ11 DVPCNTL2 R502 10K U12

5
GMCHEXP_RXP7 C113 .1U/X7R V_GMCHEXP_RXP7 U25 PCIE_TX6N DVPCNTL_2 DVPCNTL3 R505 10K *74LVC1G86GW
PCIE_TX7P DVPCNTL_3 AH11
GMCHEXP_RXN7 C112 .1U/X7R V_GMCHEXP_RXN7 T25 R233 1K
PCIE_TX7N 3V
GMCHEXP_RXP8 C127 .1U/X7R V_GMCHEXP_RXP8 U27 AG4 VREFG R232 1K
GMCHEXP_RXN8 C126 .1U/X7R V_GMCHEXP_RXN8 T27 PCIE_TX8P VREFG C300
GMCHEXP_RXP9 C107 .1U/X7R V_GMCHEXP_RXP9 U26 PCIE_TX8N .1U/X7R
GMCHEXP_RXN9 C106 .1U/X7R V_GMCHEXP_RXN9 T26 PCIE_TX9P TXLOUT0-
PCIE_TX9N TXOUT_L0N AH15 TXLOUT0- 19
GMCHEXP_RXP10 C125 .1U/X7R V_GMCHEXP_RXP10 P25 AH16 TXLOUT0+
PCIE_TX10P TXOUT_L0P TXLOUT0+ 19 3V
GMCHEXP_RXN10C124 .1U/X7R V_GMCHEXP_RXN10 N25 AJ16 TXLOUT1- DVI_TX0M_V R516 330R DVI_TX0P_V
PCIE_TX10N TXOUT_L1N TXLOUT1- 19
GMCHEXP_RXP11 C123 .1U/X7R V_GMCHEXP_RXP11 P27 AJ17 TXLOUT1+ DVI_TX1M_V R521 330R DVI_TX1P_V
PCIE_TX11P TXOUT_L1P TXLOUT1+ 19
GMCHEXP_RXN11C122 .1U/X7R V_GMCHEXP_RXN11 N27 AJ18 TXLOUT2- DVI_TX2M_V R522 330R DVI_TX2P_V P_I2CLK R251 4.7K
PCIE_TX11N TXOUT_L2N TXLOUT2- 19
GMCHEXP_RXP12 C105 .1U/X7R V_GMCHEXP_RXP12 P26 AK18 TXLOUT2+ DVI_TXCM_V R504 330R DVI_TXCP_V P_I2DAT R240 4.7K
PCIE_TX12P TXOUT_L2P TXLOUT2+ 19
GMCHEXP_RXN12C104 .1U/X7R V_GMCHEXP_RXN12 N26 AJ20 Z_TXL_OUT3- DVI_CLK R511 4.7K
PCIE_TX12N TXOUT_L3N TP40
GMCHEXP_RXP13 C103 .1U/X7R V_GMCHEXP_RXP13 L25 AJ21 Z_TXL_OUT3+ R132 DVI_DAT R508 4.7K
PCIE_TX13P TXOUT_L3P TP41
GMCHEXP_RXN13C102 .1U/X7R V_GMCHEXP_RXN13 K25 AK19 TXLCLKOUT- *0R DDCDATA R147 4.7K
PCIE_TX13N TXCLK_LN TXLCLKOUT- 19 VGA27M 27M_IN
GMCHEXP_RXP14 C121 .1U/X7R V_GMCHEXP_RXP14 L27 AJ19 TXLCLKOUT+ D DCCLK R149 4.7K
PCIE_TX14P TXCLK_LP TXLCLKOUT+ 19
GMCHEXP_RXN14C120 .1U/X7R V_GMCHEXP_RXN14 K27 AG16 TXUOUT0- VTHM_CLK R158 6.8K/F
PCIE_TX14N TXOUT_U0N TXUOUT0- 19
LVDS

GMCHEXP_RXP15 C101 .1U/X7R V_GMCHEXP_RXP15 L26 AG17 TXUOUT0+ 27MOUT R124 *121/F R129 *0R 27M_O VTHM_DAT R151 6.8K/F
PCIE_TX15P TXOUT_U0P TXUOUT0+ 19 TVSEL_M24R663
GMCHEXP_RXN15C100 .1U/X7R V_GMCHEXP_RXN15 K26 AF16 TXUOUT1- 10K
PCIE_TX15N TXOUT_U1N TXUOUT1- 19
AF17 TXUOUT1+
TXOUT_U1P TXUOUT1+ 19
AE18 TXUOUT2- R127
TXOUT_U2N TXUOUT2- 19
+VGACLK AF27 AE19 TXUOUT2+
4 +VGACLK PCIE_REFCLKP TXOUT_U2P TXUOUT2+ 19
-VGACLK AE27 AF19 Z_TXU_OUT3- *71.5/F
4 -VGACLK PCIE_REFCLKN TXOUT_U3N TP12
AF20 Z_TXU_OUT3+
B TXOUT_U3P TP42 B
TXCLK_UN AG19 TXUCLKOUT-
TXUCLKOUT- 19 PLACE CLOSE TO ASIC VGARED
VGAGREEN
R569 75/F
R541 150/F VPCIE_CR+ AC23 AG20 TXUCLKOUT+ R570 75/F
PCIE_CALRP TXCLK_UP TXUCLKOUT+ 19 VGABLUE
R128 100/F VPCIE_CR- AB24 R576 75/F
VGA1.2V PCIE_CALRN BLON
R538 10K/F VPCIE_CAL AB23 AE12 LCDON R196 10K
PCIE_CALI DIGON LCDON 19
3V
R548 *10K
BLON AG12 BLON
BLON 19 ADD_3B
R542 10K VPCIE_TIN AE25 VGARED C616 *10P
R545 1K -VPCIE_RSTM PCIE_TESTIN DVI_TX0M_V R514 0R VGAGREEN C617 *10P
TX0M AK13 DVI_TX0M 27
-VGARST AD25 AJ13 DVI_TX0P_V R517 0R D58 RB501H VGABLUE C623 *10P
PERSTb TX0P DVI_TX0P 27
R551 *10K AD24 AJ14 DVI_TX1M_V R520 0R 2 1 -VGARST
3V PERSTb_MASK TX1M DVI_TX1M 27 5,11,26,28 -ICHPLTRST
AJ15 DVI_TX1P_V R525 0R
TX1P DVI_TX1P 27
R165 V_R2SET AH21 AK15 DVI_TX2M_V R519 0R R283 *0R
R2SET TX2M DVI_TX2M 27 11 -VGARST_ICH
TMDS

715/F AK16 DVI_TX2P_V R524 0R R736


TX2P DVI_TX2P 27
TV_LUMA AK21 AJ12 DVI_TXCM_V R503 0R 10K
Y_G TXCM DVI_TXCM 27
TV_CHROMA AJ22 AK12 DVI_TXCP_V R507 0R
C_R_PR TXCP DVI_TXCP 27
TV_COMP
DAC2

AK22 COMP_B_PB
DDC2CLK AE13 DVI_CLK Place Close to CN. DVI_CLK 27
Z_V0106 AJ24 AE14 DVI_DAT
TP46 H2SYNC DDC2DATA DVI_DAT 27
TP45 Z_V0107 AK24 C64 *47P
V2SYNC DVI_PLUG R515 20K TV_LUMA R527 75/F
HPD1 AF12 19 TV_LUMA
VTHM_CLK AG22 DVI_PLUG
DDC3CLK DVI_PLUGCN 27
VTHM_DAT AG23 AK27 VGARED C90 *47P
DDC3DATA R VGARED 19 TV_CHROMA
AJ27 VGAGREEN R518 100K R534 75/F
G VGAGREEN 19 19 TV_CHROMA
AJ26 VGABLUE
VGA_SSIN AJ23 B VGABLUE 19
C78 *47P
TP43 SSIN
SS

SSOUT AH24 AJ25 V GAHSYNC D34 ZD/2.5V TV_COMP R533 75/F


TP44 SSOUT HSYNC VGAHSYNC 19 19 TV_COMP
AK25 VGAVSYNC 1 2
VSYNC VGAVSYNC 19
DAC1

C614 22P XT_IN R563 33R 27M_IN AH28 AH26 V_RST R139 499/F
XTALIN RSET
PLACE CLOSE TO ASIC
TV_OUT
A R571 33R 27M_O AJ29 AG25 DDCDATA R715 4.7K A
CLK

XTALOUT DDC1DATA DDCDATA 19


TXC=27MHz
DDC1CLK AF24 D DCCLK
DDCCLK 19 BOM C2 NOTE: TVOUT_SEL 27
Y9
XT_OUT

R564 R142 1K Z_V0101 AH27


TESTEN GPIO_AUXWIN AG24 -VGA_ALERT DEL R282 CS00003J900
3

1M R192 0R Z_V0102 E8
TEST_YCLK ADD R CS31003J908
R197 0R Z_V0103 B6
TEST_MCLK ADD D BCCH501HZ01 Q64

PROJECT : NT2
Z_V0105 AF25 AF11 VGATHRM+ R141 TVSEL_M24 2 DTC144EU
PLLTEST DPLUS
THERM

TP8 AE11 VGATHRM- 10K


DMINUS
Quanta Computer Inc.
C624 22P R146 10K Z_V0104 AH25
STEREOSYNC
1

R143 *10K
3V Size Document Number R ev
M24 Custom VGA HOST(ATI M24/M22) 3B

Date: Tuesday, February 15, 2005 Sheet 13 of 38


5 4 3 2 1
5 4 3 2 1

U45D VGACORE U45E

2.5V T7 VDDR1_T7 VDDC_AC13 AC13 VGACORE A2 VSS_A2 VSS_U4 U4


R4 VDDR1_R4 VDDC_AD13 AD13 A10 VSS_A10 VSS_U8 U8
C94 C133 C155 C284 C573 R1 AD15 C233 C172 C245 C180 C181 A16 W7
VDDR1_R1 VDDC_AD15 VSS_A16 VSS_W7
N8 VDDR1_N8 VDDC_AC15 AC15 A22 VSS_A22 VSS_W8 W8
N7 AC17 1000P 1000P 10U 1000P 1000P C730 + + C731 A29 Y4
10U 1000P 1000P 1000P 1000P VDDR1_N7 VDDC_AC17 VSS_A29 VSS_Y4
M4 VDDR1_M4 C1 VSS_C1 VSS_AB8 AB8
L8 P8 *220U/6032 220U/6032 C3 AB7
VDDR1_L8 VDD15_P8 VGA_1.5V VSS_C3 VSS_AB7
K23 VDDR1_K23 VDD15_Y8 Y8 1.5V C28 VSS_C28 VSS_AB1 AB1
K24 VDDR1_K24 VDD15_AC11 AC11 C30 VSS_C30 VSS_ AC4 AC4
N4 AC20 C276 C280 C270 C186 R696 *0R D27 AC12
D VDDR1_N4 VDD15_AC20 VSS_D27 VSS_AC12 D
J8 VDDR1_J8 VDD15_H20 H20 D24 VSS_D24 VSS_AC14 AC14
J7 H11 1000P 1000P 1000P 1000P D21 AD16
VDDR1_J7 VDD15_H11 VSS_D21 VSS_AD16
J4 VDDR1_J4 VDD15_M23 M23 D18 VSS_D18 VSS_AC16 AC16
2.5V J1 VDDR1_J1 VDD15_Y23 Y23 D15 VSS_D15 VSS_AC18 AC18
H10 VDDR1_H10 D12 VSS_D12 VSS_AD18 AD18
C572 C145 C214 C272 C148 H13 AD7 D10 AK2

CORE GND
VDDR1_H13 VDDR3_AD7 3V VSS_D10 VSS_AK2
H15 VDDR1_H15 VDDR3_AD19 AD19 D6 VSS_D6 VSS_AJ1 AJ1
10U .1U .1U .1U .1U H17 VDDR1_H17 VDDR3_AD21 AD21 C192 C266 C287 C264 C402 (IO.POWER) D4 VSS_D4
T8 VDDR1_T8 VDDR3_AC22 AC22 PCIE_VSS_K28 K28
V4 AC8 .1U .1U .1U .1U 10U AO3408 Q65 L28
VDDR1_V4 VDDR3_AC8 PCIE_VSS_L28
V7 VDDR1_V7 VDDR3_AC21 AC21 PCIE_VSS_M27 M27
V8 VDDR1_V8 VDDR3_AC19 AC19 F27 VSS_F27 PCIE_VSS_M26 M26
AA1 1 3 VGA_1.5V G9 M24
VDDR1_AA1 1.5V VSS_G9 PCIE_VSS_M24
AA4 VDDR1_AA4 VDDR4_AG7 AG7 3V G12 VSS_G12 PCIE_VSS_M25 M25
AA7 VDDR1_AA7 VDDR4_AD9 AD9 G16 VSS_G16 PCIE_VSS_M28 M28
AA8 AC9 C188 C292 C204 C267 C401 (EXT.TMDS) R697 G18 P28

2
VDDR1_AA8 VDDR4_AC9 VSS_G18 PCIE_VSS_P28
2.5V A3 VDDR1_A3 VDDR4_AC10 AC10 3V G21 VSS_G21 PCIE_VSS_N28 N28
A9 AD10 .1U .1U .1U .1U 10U G24 R25
C311 C297 C298 C296 C246 VDDR1_A9 VDDR4_AD10 C721 12.7KA/F VSS_G24 PCIE_VSS_R25
A15 VDDR1_A15 H27 VSS_H27 PCIE_VSS_R23 R23
A21 AG26 .1U H23 R24
.1U .1U .1U .1U .1U VDDR1_A21 PCIE_VDDR_12_AG26 VSS_H23 PCIE_VSS_R24
A28 VDDR1_A28 PCIE_VDDR_12_AK29 AK29 VGA1.2V H21 VSS_H21 PCIE_VSS_R26 R26
B1 AJ30 C114 .1U C70 10U H18 R27
VDDR1_B1 PCIE_VDDR_12_AJ30 VSS_H18 PCIE_VSS_R27
B30 VDDR1_B30 PCIE_VDDR_12_AG28 AG28 C150 .1U C95 .1U (PCIE 1.2V) H16 VSS_H16 PCIE_VSS_R28 R28
D26 AG27 C118 .1U H14 T28
VDDR1_D26 PCIE_VDDR_12_AG27 VSS_H14 PCIE_VSS_T28
D23 VDDR1_D23 VGA1.2V 13,32,37(1.2V~1550mA) H12 VSS_H12 PCIE_VSS_T24 T24
D20 N24 VGA_PCIE12 L17 0B H9 U28
VDDR1_D20 PCIE_PVDD_12_N24 VGA1.2V VSS_H9 PCIE_VSS_U28
L37 *0B D17 N23 C168 .1U H8 V24
2.5V VDDR1_D17 PCIE_PVDD_12_N23 VSS_H8 PCIE_VSS_V24
D14 VDDR1_D14 PCIE_PVDD_12_P23 P23 C163 .1U (QUIET PCIE 1.2V) H4 VSS_H4 PCIE_VSS_V26 V26
L36 0B LVDR25 D11 C162 .1U J23 V27
LVDR_2.8V VDDR1_D11 VSS_J23 PCIE_VSS_V27
C D8 VDDR1_D8 PCIE_PVDD_18_U23 U23 1.8V J24 VSS_J24 PCIE_VSS_V25 V25 C
C74 C356 C215 C230 D5 T23 V28
VDDR1_D5 PCIE_PVDD_18_T23 PCIE_VSS_V28
E27 VDDR1_E27 PCIE_PVDD_18_V23 V23 C165 .1U (PCIE PLL/IO 1.8V) PCIE_VSS_Y28 Y28
10U *10U .1U .1U F4 W23 C164 .1U AD12 W24
VDDR1_F4 PCIE_PVDD_18_W23 VSS_AD12 PCIE_VSS_W24
G7 VDDR1_G7 AG5 VSS_AG5 PCIE_VSS_W28 W28
G10 VDDR1_G10 NC_D9 D9 AG9 VSS_AG9 PCIE_VSS_AA26 AA26
G13 D13 L32 0B TXVDDR18 AG11 AA27
VDDR1_G13 NC_D13 1.8V VSS_AG11 PCIE_VSS_AA27
G15 VDDR1_G15 NC_D19 D19 PCIE_VSS_A23 AA23
L33 0B LVDDR18 G19 D25 C618 C251 C256 AA24
1.8V VDDR1_G19 NC_D25 PCIE_VSS_AA24
G22 VDDR1_G22 NC_E4 E4 R7 VSS_R7 PCIE_VSS_AA25 AA25
C268 C255 C275 G27 T4 10U .1U .1U P4 AA28
VDDR1_G27 NC_T4 VSS_P4 PCIE_VSS_AA28
H22 VDDR1_H22 NC_AB4 AB4 M7 VSS_M7 PCIE_VSS_AB28 AB28
10U .1U .1U H19 M8 AC28
VDDR1_H19 VSS_M8 PCIE_VSS_AC28
AD4 VDDR1_AD4 L4 VSS_L4 PCIE_VSS_AD28 AD28
L23 VDDR1_L23 K1 VSS_K1 PCIE_VSS_AD26 AD26
K7 VSS_K7 PCIE_VSS_AD27 AD27
L73 0B K8 AE28
VGA_2.5V VSS_K8 PCIE_VSS_AE28
L29 *0B A2VDD25 R8 AF28
2.5V VSS_R8 PCIE_VSS_AF28
L30 0B LPVDD AD22 T1 AH29
1.8V AVSSQ VSS_T1 PCIE_VSS_AH29
C229 C201 C200
C244 C231 C237 (VGA CORE=1.2&1.0V)
AE16 AF18 10U .1U .1U P17 M16
LVDDR_25_AE16 LVSSR_AF18 VGACORE VDDC_P17 VSS_M16
10U .1U .1U AE17 AH17 P18 N16
LVDDR_25_AE17 LVSSR_AH17 VDDC_P18 VSS_N16
AF15 LVDDR_18_AF15 LVSSR_AG15 AG15 P19 VDDC_P19 VSS_N15 N15
AE15 LVDDR_18_AE15 LVSSR_AG18 AG18 U12 VDDC_U12 VSS_P15 P15
U23 U13 VDDC_U13 VSS_P16 P16
U14 VDDC_U14 VSS_R18 R18
AH19 LPVDD LPVSS AH18 3V 3 IN OUT 4 LVDR_2.8V U17 VDDC_U17 VSS_R17 R17
AH13 TPVDD TPVSS AH12 U18 VDDC_U18 VSS_R16 R16
C171 1 C367 U19 R15
B
TXVDDR18 SHDN VDDC_U19 VSS_R15 B
AF13 AH14 V19 R14
I/O POWER

TXVDDR_AF13 TXVSSR_AH14 *1U G913_VSET *1U VDDC_V19 VSS_R14


AF14 TXVDDR_AF14 TXVSSR_AG13 AG13 2 GND SET 5 V18 VDDC_V18 VSS_R13 R13
L26 0B AG14 V17 R12
2.5V TXVSSR_AG14 VDDC_V17 VSS_R12
G913 V14 T13
C203 .1U VDDRH VDDC_V14 VSS_T13
F18 F19 V13 T14

CENTER ARRAY
C291 .1U VDDRH0 VSSRH0 VDDC_V13 VSS_T14
N6 VDDRH1 VSSRH1 M6 V12 VDDC_V12 VSS_T15 T15
LVDR_2.8V R273 127K/F N18 W15
R274 100K/F VDDC_N18 VSS_W15
N17 VDDC_N17 VSS_V16 V16
A2VDD25 AF21 AH20 LVDR_2.8V N14 V15
A2VDD_AF21 A2VSSN_AH20 VDDC_N14 VSS_V15
AE20 A2VDD_AE20 A2VSSN_AG21 AG21 W17 VDDC_W17 VSS_U15 U15
L24 0B V_A2VDDQ L82 *0B W18 U16
1.8V VDDC_W18 VSS_U16
C156 .1U AF23 AF22 W12 T19
A2VDDQ A2VSSQ U57 VDDC_W12 VSS_T19
W13 VDDC_W13 VSS_T18 T18
C158 .1U V_AVDD AH23 AH22 3 4 W14 T17
AVDD AVSSN 3V IN OUT VGA_2.5V VDDC_W14 VSS_T17
L25 0B N13 T16
1.8V VDDC_N13 VSS_T16
C719 1 C718 N19
L27 0B VDD1 SHDN VDDC_N19
1.8V AE23 VDD1DI VSS1DI AE24 M19 VDDC_M19
AE22 AE21 1U 2 5 G913_V2SET 1U M18
VDD2DI VSS2DI GND SET VDDC_M18
M12 VDDC_M12
G913 N12
L22 0B PVDD VDDC_N12
1.8V AK28 PVDD PVSS AJ28 M13 VDDC_M13
M14 VGACORE
C140 C143 VGA_2.5V R684 100K/F VDDC_M14
A7 MPVDD MPVSS A6 P12 VDDC_P12
R685 100K/F P13 W16 L31 0B
10U .1U VDDC_P13 VDDC1_W16 C224 1U
M24 P14 VDDC_P14 VDDC1_M15 M15
M17 R19 C227 1U
VDDC_M17 VDDC1_R19 C262 1U
W19 VDDC_W19 VDDC1_T12 T12
C175 1U
VGACORE
M24
A C183 C182 C250 C241 C199 C252 C261 A
L19 0B MPVDD VGA_VDDC
1.8V
VDD1 1U 1U 1000P 1000P 1000P 1U 1U
C88 C285
C195 C157 C170
10U .1U

PROJECT : NT2
10U .1U .1U
VGACORE

Quanta Computer Inc.


C190 C240 C228 C243 C247 C217 C216 C202

.1U .1U .1U .1U .1U .1U .1U .1U


Size Document Number R ev
Custom 3A
DEL C191,C218,C239,C263,C198-3A ATI M24/22(POWER)
Date: Thursday, April 07, 2005 Sheet 14 of 38
5 4 3 2 1
5 4 3 2 1

16,18 MDB[0..63]
16,17 MDA[0..63] MAB[0..13] 16,18
MAA[0..13] 16,17 U45C
U45B MDB0 MAB0
D7 DQB0 MAB0 N5
MDA0 H28 E22 MAA0 MDB1 F7 M1 MAB1
MDA1 DQA0 MAA0 MAA1 MDB2 DQB1 MAB1 MAB2
H29 DQA1 MAA1 B22 E7 DQB2 MAB2 M3
MDA2 J28 B23 MAA2 MDB3 G6 L3 MAB3
MDA3 DQA2 MAA2 MAA3 MDB4 DQB3 MAB3 MAB4
J29 DQA3 MAA3 B24 G5 DQB4 MAB4 L2
MDA4 J26 C23 MAA4 MDB5 F5 M2 MAB5
MDA5 DQA4 MAA4 MAA5 MDB6 DQB5 MAB5 MAB6
H25 DQA5 MAA5 C22 E5 DQB6 MAB6 M5
MDA6 H26 F22 MAA6 MDB7 C4 P6 MAB7
MDA7 DQA6 MAA6 MAA7 MDB8 DQB7 MAB7 MAB8
D
G26 DQA7 MAA7 F21 B5 DQB8 MAB8 N3 D
MDA8 G30 C21 MAA8 MDB9 C5 K2 MAB9
MDA9 DQA8 MAA8 MAA9 MDB10 DQB9 MAB9 MAB10
D29 DQA9 MAA9 A24 A4 DQB10 MAB10 K3
MDA10 D28 C24 MAA10 MDB11 B4 J2 MAB11
MDA11 DQA10 MAA10 MAA11 MDB12 DQB11 MAB11 MAB12
E28 DQA11 MAA11 A25 C2 DQB12 MAB12 P5
MDA12 E29 E21 MAA12 MDB13 D3 P3 MAB13
DQA12 MAA12 DQB13 MAB13 -DQMB[0..7] 16,18
MDA13 G29 B20 MAA13 MDB14 D1 P2
DQA13 MAA13 -DQMA[0..7] 16,17 DQB14 MAB14
MDA14 G28 C19 MDB15 D2
MDA15 DQA14 MAA14 MDB16 DQB15 -DQMB0
F28 DQA15 G4 DQB16 DQMB#0 E6
MDA16 G25 J25 -DQMA0 MDB17 H6 B2 -DQMB1
MDA17 DQA16 DQMA#0 -DQMA1 MDB18 DQB17 DQMB#1 -DQMB2
F26 DQA17 DQMA#1 F29 H5 DQB18 DQMB#2 J5
MDA18 E26 E25 -DQMA2 MDB19 J6 G3 -DQMB3
MDA19 DQA18 DQMA#2 -DQMA3 MDB20 DQB19 DQMB#3 -DQMB4
F25 DQA19 DQMA#3 A27 K5 DQB20 DQMB#4 W6
MDA20 E24 F15 -DQMA4 MDB21 K4 W2 -DQMB5
MDA21 DQA20 DQMA#4 -DQMA5 MDB22 DQB21 DQMB#5 -DQMB6
F23 DQA21 DQMA#5 C15 L6 DQB22 DQMB#6 AC6 QSB[0..7] 16,18
MDA22 E23 C11 -DQMA6 MDB23 L5 AD2 -DQMB7
DQA22 DQMA#6 QSA[0..7] 16,17 DQB23 DQMB#7
MDA23 D22 E11 -DQMA7 MDB24 G2
MDA24 DQA23 DQMA#7 MDB25 DQB24 QSB0
B29 DQA24 F3 DQB25 QSB0 F6

MEMORY INTERFACE B
MDA25 C29 J27 QSA0 MDB26 H2 B3 QSB1
DQA25 QSA0 DQB26 QSB1

MEMORY INTERFACE A
MDA26 C25 F30 QSA1 MDB27 E2 K6 QSB2
MDA27 DQA26 QSA1 QSA2 MDB28 DQB27 QSB2 QSB3
C27 DQA27 QSA2 F24 F2 DQB28 QSB3 G1
MDA28 B28 B27 QSA3 MDB29 J3 V5 QSB4
MDA29 DQA28 QSA3 QSA4 MDB30 DQB29 QSB4 QSB5
B25 DQA29 QSA4 E16 F1 DQB30 QSB5 W1
MDA30 C26 B16 QSA5 MDB31 H3 AC5 QSB6
MDA31 DQA30 QSA5 QSA6 MDB32 DQB31 QSB6 QSB7
B26 DQA31 QSA6 B11 U6 DQB32 QSB7 AD1
MDA32 F17 F10 QSA7 MDB33 U5
MDA33 DQA32 QSA7 MDB34 DQB33 -RASB
E17 DQA33 U3 DQB34 RASB# R2 -RASB 16,18
MDA34 D16 A19 -RASA MDB35 V6
DQA34 RASA# -RASA 16,17 DQB35
MDA35 F16 MDB36 W5 T5 -CASB
DQA35 DQB36 CASB# -CASB 16,18
MDA36 E15 E18 -CASA MDB37 W4
DQA36 CASA# -CASA 16,17 DQB37
C MDA37 F14 MDB38 Y6 T6 -WEB C
DQA37 DQB38 WEB# -WEB 16,18
MDA38 E14 E19 -WEA MDB39 Y5
DQA38 WEA# -WEA 16,17 DQB39
MDA39 F13 MDB40 U2 R5 -CSB0
DQA39 DQB40 CSB0# -CSB0 16,18
MDA40 C17 E20 -CSA0 MDB41 V2
DQA40 CSA0# -CSA0 16,17 DQB41
MDA41 B18 MDB42 V1 R6 -CSB1
DQA41 DQB42 CSB1# -CSB1 16,18
MDA42 B17 F20 -CSA1 MDB43 V3
DQA42 CSA1# -CSA1 16,17 DQB43
MDA43 B15 MDB44 W3 R3 CKEB
DQA43 DQB44 CKEB CKEB 16,18
MDA44 C13 B19 CKEA MDB45 Y2 R330 10K
DQA44 CKEA CKEA 16,17 2.5V 2.5V DQB45
MDA45 B14 R186 10K MDB46 Y3 N1 CLKB0 R238 10R
DQA45 DQB46 CLKB0 M_CLKB0 16,18
MDA46 C14 MDB47 AA2 N2 -CLKB0 R237 10R
DQA46 DQB47 CLKB0# -M_CLKB0 16,18
MDA47 C16 B21 CLKA0 R166 10R MDB48 AA6
DQA47 CLKA0 M_CLKA0 16,17 DQB48
MDA48 A13 C20 -CLKA0 R169 10R MDB49 AA5 T2 CLKB1 R228 10R
DQA48 CLKA0# -M_CLKA0 16,17 DQB49 CLKB1 M_CLKB1 16,18
MDA49 A12 MDB50 AB6 T3 -CLKB1 R229 10R
DQA49 DQB50 CLKB1# -M_CLKB1 16,18
MDA50 C12 C18 CLKA1 R184 10R R202 R248 MDB51 AB5
DQA50 CLKA1 M_CLKA1 16,17 DQB51
MDA51 B12 A18 -CLKA1 R183 10R 100R 100R MDB52 AD6
DQA51 CLKA1# -M_CLKA1 16,17 DQB52
MDA52 C10 MDB53 AD5 E3 DIMB0
DQA52 DQB53 DIMB_0 DIMB0
MDA53 C9 MDB54 AE5 AA3 DIMB1
DQA53 DQB54 DIMB_1 DIMB1
MDA54 B9 MDB55 AE4
MDA55 DQA54 MVREFD MDB56 DQB55
B10 DQA55 MVREFD B7 AB2 DQB56
MDA56 E13 MDB57 AB3 AF5
DQA56 DQB57 ROMCS# -ROMCS 16
MDA57 E12 B8 MVREFS MDB58 AC2
MDA58 DQA57 MVREFS MDB59 DQB58 MEMVMODE0 R252 *4.7K
E10 DQA58 AC3 DQB59 MEMVMODE_0 C6 1.8V
MDA59 F12 MDB60 AD3 C7 MEMVMODE1
MDA60 DQA59 R208 R236 MDB61 DQB60 MEMVMODE_1
F11 DQA60 DIMA_0 D30 AE1 DQB61
MDA61 E9 B13 C309 100R C314 100R MDB62 AE2 C8 MBMTEST R242 4.7K
MDA62 DQA61 DIMA_1 .1U .1U MDB63 DQB62 MEMTEST
F9 DQA62 AE3 DQB63
MDA63 F8 R225 4.7K
DQA63 *4.7K R259
M24
M24 R190
47R
B B
VDDR1 MEMVMODE_0 MEMVMODE_1
1.8V GND +VDDC_CT
2.5V +VDDC_CT GND
Place close to ASIC
PCI-Express Current Calibration Bandgap Backup STRAPS PIN
GPIO_0 0: use reference voltage from Bandgap
1: use reference voltage from resistor divider 3V
Strap to set the debug muxes to bting out DEBUG signals GPIO_[0..13]
GPIO_[0..13] 13,16
PCI-Express PLL Calibration force enable GPIO_8 even if registers are inaccessible R488 10K GPIO_0
GPIO_1 0: Disable PLL force calibration R487 *10K GPIO_1 DVPDATA_16
DVPDATA_16 13
ROMIDCFG R485 *10K GPIO_2 DVPDATA_17
DVPDATA_17 13
1: Enable PLL force calibration R484 *10K GPIO_3 DVPDATA_21
DVPDATA_21 13
GPIO(9,13:11) 0x0x: No ROM, CHG_ID=0 R480 *10K GPIO_4 DVPDATA_22
DVPDATA_22 13
00: PCI Express 1.0 mode 0x1x: No Rom, CHG_ID=1 R231
R481
*10K GPIO_5
*10K GPIO_6
DVPDATA_23
DVPDATA_10
DVPDATA_23 13

01: RESERVED INT P/D 1011 - Serial M25P10 ROM (ST), chip IDis from ROM R477 *10K GPIO_8 DVPDATA_20
DVPDATA_10
DVPDATA_20
13
13
GPIO_(3,2) 1100 - Serial M25P05 ROM (ST), chip IDis from ROM R476 10K GPIO_9
10: PCI Express 1.0 mode R473
R249
10K
10K
GPIO_11
GPIO_12
11: RESERVED DATA23 DATA22 DATA21 DATA20 DATA10 R230 *10K GPIO_13
DVPDATA_10, Vendor Voltage CS MEM SIZE MEM TYPE
R491 *10K DVPDATA_16 R495 10K
Pin strap called Reversed_Lanes 20,21~23
R486
R689
*10K DVPDATA_17 R489
10K DVPDATA_10 R690
10K
*10K
GPIO_4 0: Non-reversed R691 *10K DVPDATA_20 R692 10K
X X X X 0 4MX32 R258 *10K DVPDATA_21 R262 10K
A
1:Reversed PCIe layouts X X X X 1 8MX32 R218
R223
*10K DVPDATA_22 R217
10K DVPDATA_23 R222
10K
*10K
A

GPIO_5 Bypass PCI-Express PLL X X X 0 X 128M(M22), 256M(M24)


MEM TYPE X X X 1 X 64M(M22),128M(M24)
PCI-Express transmitter current compensation
X X 0 X X CS x1
GPIO_6
0: Normal X X 1 X X CS x2 PROJECT : NT2
1: Inject extra current for output buffer switching X
X
0
1
X
X
X
X
X 1.8V
X 2.5V M24-256M 10001 Quanta Computer Inc.
0 X X X X Hynix M24-128M 01010 Size Document Number R ev
Custom 3A
1 X X X X Samsung M22-64M 01010 ATI M24/22 MEM/STRAPS PIN
Date: Tuesday, January 25, 2005 Sheet 15 of 38
5 4 3 2 1
5 4 3 2 1

VMEM_VTT VMEM_VTT VMEM_VTT


15,17 MDA[0..63] 15,18 MDB[0..63]
R155 56R
-RASA 15,17
RP4 1 2 82X4-0402 MDA1 RP41 1 2 82X4-0402 MDB2 R177 56R
-CASA 15,17
3 4 MDA3 3 4 MDB7 C565 C178 R156 56R
15,17 QSA[0..7] -WEA 15,17
C389 C388 5 6 MDA4 C561 C223 5 6 MDB0 R152 56R
-CSA0 15,17
7 8 MDA0 7 8 MDB1 1U 1U R153 56R
MDB4 -CSA1 15,17
1U 1U RP5 1 2 82X4-0402 MDA2 1U 1U RP42 1 2 82X4-0402 RN29 1 2 82X2 -DQMA0 R178 56R
MDB5 VMEM_VTT CKEA 15,17
3 4 MDA6 3 4 3 4 QSA0
5 6 MDA7 5 6 MDB6
7 8 MDA5 7 8 MDB3 C184 RN31 1 2 82X2 -DQMA3
RP2 1 2 82X4-0402 MDA14 RP39 1 2 82X4-0402 MDB11 3 4 QSA3
D D
3 4 MDA13 3 4 MDB10 10U
5 6 MDA8 5 6 MDB8 RN33 1 2 82X2 -DQMA4
7 8 MDA15 7 8 MDB9 3 4 QSA4 R117 56R
15,17 M_CLKA0
RP3 1 2 82X4-0402 MDA11 RP40 1 2 82X4-0402 MDB15
C374 C160 3 4 MDA12 C193 C174 3 4 MDB14 RN34 1 2 82X2 -DQMA6 M_CLKA0-1 C60
5 6 MDA10 5 6 MDB13 3 4 QSA6 .01U/X7R
1U 1U 7 8 MDA9 1U 1U 7 8 MDB12 R118 56R
MDB16 15,17 -M_CLKA0
RP7 1 2 82X4-0402 MDA18 RP29 1 2 82X4-0402
3 4 MDA17 3 4 MDB17 R255 56R
15,17 M_CLKA1
5 6 MDA20 5 6 MDB19
7 8 MDA19 7 8 MDB18 M_CLKA1-1 C332
RP6 1 2 82X4-0402 MDA21 RP33 1 2 82X4-0402 MDB20 .01U/X7R
3 4 MDA22 3 4 MDB23 R256 56R
MDB22 15,17 -M_CLKA1
5 6 MDA23 5 6 15,17 -DQMA[0..7]
7 8 MDA16 7 8 MDB21
C354 C553 RP9 1 2 82X4-0402 MDA25 C57 C197 RP22 1 2 82X4-0402 MDB27
MDB25
1U 1U
3 4 MDA24
MDA27 1U 1U
3 4
MDB28
VMEM_VTT
RN28 1 2 82X2 QSA1
-DQMA1 At least a 2.5:1 spacing between the pair
5 6 5 6 3 4
7 8 MDA28 7 8 MDB30 These resistors and caps must be placed to minimize
RP8 1 2 82X4-0402 MDA30 RP27 1 2 82X4-0402 MDB24 C568 RN30 1 2 82X2 QSA2
3 4 MDA31 3 4 MDB31 3 4 -DQMA2 any st ubs. These must also be placed after the
5 6 MDA26 5 6 MDB26 10U me mory
7 8 MDA29 7 8 MDB29 RN32 1 2 82X2 QSA5
RP15 1 2 82X4-0402 MDA32 RP25 1 2 82X4-0402 MDB35 3 4 -DQMA5
3 4 MDA35 3 4 MDB32
5 6 MDA33 5 6 MDB33 RN35 1 2 82X2 QSA7
7 8 MDA36 7 8 MDB34 3 4 -DQMA7
C54 C55 RP16 1 2 82X4-0402 MDA34 C375 C355 RP23 1 2 82X4-0402 MDB37
3 4 MDA37 3 4 MDB36
C 1U 1U 5 6 MDA39 1U 1U 5 6 MDB39 C
7 8 MDA38 7 8 MDB38
RP13 1 2 82X4-0402 MDA41 RP34 1 2 82X4-0402 MDB40 VMEM_VTT
3 4 MDA40 3 4 MDB41
5 6 MDA42 5 6 MDB43 R342 56R
-RASB 15,18
7 8 MDA47 7 8 MDB42 R335 56R
MDB44 -CASB 15,18
RP14 1 2 82X4-0402 MDA43 RP30 1 2 82X4-0402 C177 C405 R339 56R
MDB45 -WEB 15,18
3 4 MDA46 3 4 R314 56R
MDB46 15,18 QSB[0..7] -CSB0 15,18
5 6 MDA45 5 6 1U 1U R334 56R
MDB47 -CSB1 15,18
7 8 MDA44 7 8 R333 56R
MDA48 CKEB 15,18
C406 C559 RP20 1 2 82X4-0402 C556 C196 RP32 1 2 82X4-0402 MDB49 RN43 1 2 82X2 -DQMB0
VMEM_VTT
3 4 MDA50 3 4 MDB50 3 4 QSB0
1U 1U 5 6 MDA49 1U 1U 5 6 MDB51
7 8 MDA51 7 8 MDB48 C248 RN39 1 2 82X2 QSB2
RP19 1 2 82X4-0402 MDA52 RP26 1 2 82X4-0402 MDB60 3 4 -DQMB2 R447 56R
15,18 M_CLKB0
3 4 MDA55 3 4 MDB61 10U
5 6 MDA53 5 6 MDB62 RN38 1 2 82X2 -DQMB4 M_CLKB0-1 C549
7 8 MDA54 7 8 MDB63 3 4 QSB4 .01U/X7R
RP18 1 2 82X4-0402 MDA56 RP24 1 2 82X4-0402 MDB56 R448 56R
MDA57 MDB57 15,18 -M_CLKB0
3 4 3 4 RN37 1 2 82X2 -DQMB7
5 6 MDA60 5 6 MDB58 3 4 QSB7 R331 56R
MDA59 MDB59 15,18 M_CLKB1
7 8 7 8
RP17 1 2 82X4-0402 MDA62 RP36 1 2 82X4-0402 MDB53 M_CLKB1-1 C420
C551 3 4 MDA58 C56 3 4 MDB55 .01U/X7R
5 6 MDA63 5 6 MDB54 R321 56R
15,18 -M_CLKB1
1U 7 8 MDA61 1U 7 8 MDB52

15,18 -DQMB[0..7] At least a 2.5:1 spacing between the pair


B B
These resistors and caps must be placed to minimize
RN42 1 2 82X2 QSB1
VMEM_VTT
3 4 -DQMB1 any st ubs. These must also be placed after the
15,17 MAA[0..13] 15,18 MAB[0..13] me mory
C571 RN36 1 2 82X2 -DQMB3
3 4 QSB3
RP12 1 2 82X4-0402 MAA11 RP38 1 2 82X4-0402 MAB13 10U
3 4 MAA1 3 4 MAB8 RN40 1 2 82X2 QSB5
5 6 MAA2 5 6 MAB0 3 4 -DQMB5
7 8 MAA7 7 8 MAB5
RP11 1 2 82X4-0402 MAA6 RP37 1 2 82X4-0402 MAB6 RN41 1 2 82X2 QSB6
3 4 MAA4 3 4 MAB2 3 4 -DQMB6
5 6 MAA9 5 6 MAB9 3V
7 8 MAA3 7 8 MAB3
RP10 1 2 82X4-0402 MAA13 RP35 1 2 82X4-0402 MAB11 -VROM_WP R722 10K
3 4 MAA8 3 4 MAB4
5 6 MAA0 5 6 MAB1 U54
7 8 MAA5 7 8 MAB7 R664 33R VBIOS_D 5 8
MAA12 MAB12 13,15 GPIO_9 VBIOS_C 6 D VCC
R179 82/F R320 82/F R665 33R
MAA10 13 GPIO_10 VBIOS_S 1 C
R154 82/F R322 82/F MAB10 R666 33R C716
15 -ROMCS S
R667 10K 7
3V HOLD
3 .1U
11 -VROM_WP VBIOS_Q 2 W
R668 33R 4
13,15 GPIO_8 Q VSS

Place at nets mid point Place at nets mid point M25P10-AVMN6T

SERIAL ROM
A VMEM_VTT VMEM_VTT A

C351 C348 C560 C437 C555 C412 C547 C564 C554 C179 C566 C439 C411 C349 C440 C548 C438 C562 C194 C350

.1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U .1U PROJECT : NT2
Quanta Computer Inc.
Size Document Number R ev
Custom 2A
MEM TERMINATION & VGA ROM
Date: Tuesday, January 25, 2005 Sheet 16 of 38
5 4 3 2 1
5 4 3 2 1

U11 U43 U46 U15

MAA0 M4 A6 MDA25 MAA0 M4 A6 MDA38 MAA0 M4 A6 MDA5 MAA0 M4 A6 MDA48


MAA1 A0 DQ0 MDA27 MAA1 A0 DQ0 MDA37 MAA1 A0 DQ0 MDA6 MAA1 A0 DQ0 MDA49
M5 A1 DQ1 B5 M5 A1 DQ1 B5 M5 A1 DQ1 B5 M5 A1 DQ1 B5
MAA2 L5 A5 MDA24 MAA2 L5 A5 MDA39 MAA2 L5 A5 MDA7 MAA2 L5 A5 MDA50
MAA3 A2 DQ2 MDA28 MAA3 A2 DQ2 MDA34 MAA3 A2 DQ2 MDA2 MAA3 A2 DQ2 MDA51
M6 A3 DQ3 A4 M6 A3 DQ3 A4 M6 A3 DQ3 A4 M6 A3 DQ3 A4
MAA4 M7 B1 MDA30 MAA4 M7 B1 MDA36 MAA4 M7 B1 MDA0 MAA4 M7 B1 MDA52
MAA5 A4 DQ4 MDA31 MAA5 A4 DQ4 MDA33 MAA5 A4 DQ4 MDA4 MAA5 A4 DQ4 MDA55
L8 A5 DQ5 C2 L8 A5 DQ5 C2 L8 A5 DQ5 C2 L8 A5 DQ5 C2
MAA6 M8 C1 MDA26 MAA6 M8 C1 MDA35 MAA6 M8 C1 MDA3 MAA6 M8 C1 MDA53
MAA7 A6 DQ6 MDA29 MAA7 A6 DQ6 MDA32 MAA7 A6 DQ6 MDA1 MAA7 A6 DQ6 MDA54
M9 A7 DQ7 D1 M9 A7 DQ7 D1 M9 A7 DQ7 D1 M9 A7 DQ7 D1
MAA8 M10 J12 MDA13 MAA8 M10 J12 MDA63 MAA8 M10 J12 MDA23 MAA8 M10 J12 MDA40
MAA12 A8(AP) DQ8 MDA14 MAA12 A8(AP) DQ8 MDA61 MAA12 A8(AP) DQ8 MDA16 MAA12 A8(AP) DQ8 MDA41
D
M3 BA0 DQ9 J11 M3 BA0 DQ9 J11 M3 BA0 DQ9 J11 M3 BA0 DQ9 J11 D
MAA13 L4 H12 MDA15 MAA13 L4 H12 MDA62 MAA13 L4 H12 MDA21 MAA13 L4 H12 MDA47
MAA9 BA1 DQ10 MDA8 MAA9 BA1 DQ10 MDA58 MAA9 BA1 DQ10 MDA22 MAA9 BA1 DQ10 MDA42
L7 A9 DQ11 H11 L7 A9 DQ11 H11 L7 A9 DQ11 H11 L7 A9 DQ11 H11
MAA10 K5 F12 MDA11 MAA10 K5 F12 MDA60 MAA10 K5 F12 MDA20 MAA10 K5 F12 MDA43
MAA11 A10 DQ12 MDA12 MAA11 A10 DQ12 MDA59 MAA11 A10 DQ12 MDA19 MAA11 A10 DQ12 MDA46
L6 A11 DQ13 F11 L6 A11 DQ13 F11 L6 A11 DQ13 F11 L6 A11 DQ13 F11
-DQMA3 A2 E12 MDA10 -DQMA4 A2 E12 MDA57 -DQMA0 A2 E12 MDA17 -DQMA6 A2 E12 MDA45
-DQMA1 DQM0 DQ14 MDA9 -DQMA7 DQM0 DQ14 MDA56 -DQMA2 DQM0 DQ14 MDA18 -DQMA5 DQM0 DQ14 MDA44
G11 DQM1 DQ15 E11 G11 DQM1 DQ15 E11 G11 DQM1 DQ15 E11 G11 DQM1 DQ15 E11
-DQMA2 G2 E2 MDA18 -DQMA5 G2 E2 MDA44 -DQMA1 G2 E2 MDA9 -DQMA7 G2 E2 MDA56
-DQMA0 DQM2 DQ16 MDA17 -DQMA6 DQM2 DQ16 MDA45 -DQMA3 DQM2 DQ16 MDA10 -DQMA4 DQM2 DQ16 MDA57
A11 DQM3 DQ17 E1 A11 DQM3 DQ17 E1 A11 DQM3 DQ17 E1 A11 DQM3 DQ17 E1
L1 F2 MDA19 L1 F2 MDA46 L1 F2 MDA12 L1 F2 MDA59
15,16 -RASA RAS DQ18 15,16 -RASA RAS DQ18 15,16 -RASA RAS DQ18 15,16 -RASA RAS DQ18
K1 F1 MDA20 K1 F1 MDA43 K1 F1 MDA11 K1 F1 MDA60
15,16 -CASA CAS DQ19 MDA22 15,16 -CASA CAS DQ19 15,16 -CASA CAS DQ19 15,16 -CASA CAS DQ19
K2 H2 K2 H2 MDA42 K2 H2 MDA8 K2 H2 MDA58
15,16 -WEA WE DQ20 15,16 -WEA WE DQ20 15,16 -WEA WE DQ20 15,16 -WEA WE DQ20
M1 H1 MDA21 M1 H1 MDA47 M1 H1 MDA15 M1 H1 MDA62
15,16 -CSA0 CS DQ21 15,16 -CSA0 CS DQ21 15,16 -CSA1 CS DQ21 15,16 -CSA1 CS DQ21
L10 J1 MDA23 L10 J1 MDA40 L10 J1 MDA13 L10 J1 MDA63
15,16 M_CLKA0 CLK DQ22 15,16 M_CLKA1 CLK DQ22 15,16 M_CLKA0 CLK DQ22 15,16 M_CLKA1 CLK DQ22
L11 J2 MDA16 L11 J2 MDA41 L11 J2 MDA14 L11 J2 MDA61
15,16 -M_CLKA0 CLK# DQ23 15,16 -M_CLKA1 CLK# DQ23 15,16 -M_CLKA0 CLK# DQ23 15,16 -M_CLKA1 CLK# DQ23
M11 D12 MDA1 M11 D12 MDA54 M11 D12 MDA29 M11 D12 MDA32
15,16 CKEA CKE DQ24 15,16 CKEA CKE DQ24 15,16 CKEA CKE DQ24 15,16 CKEA CKE DQ24
L12 C12 MDA3 L12 C12 MDA53 L12 C12 MDA26 L12 C12 MDA35
MAVREF0_A MCL DQ25 MDA4 MAVREF1_A MCL DQ25 MDA55 MAVREF2_A MCL DQ25 MDA31 MAVREF3_A MCL DQ25 MDA33
M12 VREF DQ26 C11 M12 VREF DQ26 C11 M12 VREF DQ26 C11 M12 VREF DQ26 C11
B12 MDA0 B12 MDA52 B12 MDA30 B12 MDA36
DQ27 MDA2 DQ27 MDA51 DQ27 MDA28 DQ27 MDA34
M2 NC1 DQ28 A9 M2 NC1 DQ28 A9 M2 NC1 DQ28 A9 M2 NC1 DQ28 A9
B3 A8 MDA7 B3 A8 MDA50 B3 A8 MDA24 B3 A8 MDA39
NC2 DQ29 MDA6 NC2 DQ29 MDA49 NC2 DQ29 MDA27 NC2 DQ29 MDA37
B10 NC3 DQ30 B8 B10 NC3 DQ30 B8 B10 NC3 DQ30 B8 B10 NC3 DQ30 B8
G3 A7 MDA5 G3 A7 MDA48 G3 A7 MDA25 G3 A7 MDA38
NC4 DQ31 QSA3 NC4 DQ31 QSA4 NC4 DQ31 QSA0 NC4 DQ31 QSA6
G10 NC5 DQS0 A1 G10 NC5 DQS0 A1 G10 NC5 DQS0 A1 G10 NC5 DQS0 A1
K11 G12 QSA1 K11 G12 QSA7 K11 G12 QSA2 K11 G12 QSA5
NC6 DQS1 QSA2 NC6 DQS1 QSA5 NC6 DQS1 QSA1 NC6 DQS1 QSA7
K12 NC7 DQS2 G1 K12 NC7 DQS2 G1 K12 NC7 DQS2 G1 K12 NC7 DQS2 G1
L2 A12 QSA0 L2 A12 QSA6 L2 A12 QSA3 L2 A12 QSA4
NC8 DQS3 NC8 DQS3 VGA_NC22 NC8 DQS3 VGA_NC30 NC8 DQS3
15,16 -CSA1 L3 NC9 15,16 -CSA1 L3 NC9 L3 NC9 L3 NC9
C6 C310 .022U C6 C283 .022U C6 C232 .022U C6 C282 .022U
VDD_0 C278 .022U VDD_0 C151 .022U VDD_0 C142 .022U VDD_0 C161 .022U
G7 NC/TH1 VDD_1 C7 G7 NC/TH1 VDD_1 C7 G7 NC/TH1 VDD_1 C7 G7 NC/TH1 VDD_1 C7
C G8 D3 C584 .022U G8 D3 C254 .022U G8 D3 C169 .022U G8 D3 C234 .022U C
NC/TH2 VDD_2 C277 .022U NC/TH2 VDD_2 C294 .022U NC/TH2 VDD_2 C304 .022U NC/TH2 VDD_2 C344 .022U
H5 NC/TH3 VDD_3 D10 H5 NC/TH3 VDD_3 D10 H5 NC/TH3 VDD_3 D10 H5 NC/TH3 VDD_3 D10
H6 K3 C343 .022U H6 K3 C289 .022U H6 K3 C312 .022U H6 K3 C306 .022U
NC/TH4 VDD_4 C226 .022U NC/TH4 VDD_4 C167 .022U NC/TH4 VDD_4 C274 .022U NC/TH4 VDD_4 C582 .022U
H7 NC/TH5 VDD_5 K6 H7 NC/TH5 VDD_5 K6 H7 NC/TH5 VDD_5 K6 H7 NC/TH5 VDD_5 K6
H8 K7 C269 .022U H8 K7 C236 .022U H8 K7 C286 .022U H8 K7 C249 .022U
NC/TH6 VDD_6 C315 .022U NC/TH6 VDD_6 C301 .022U NC/TH6 VDD_6 C417 .022U NC/TH6 VDD_6 C99 .022U
G5 NC/TH7 VDD_7 K10 G5 NC/TH7 VDD_7 K10 G5 NC/TH7 VDD_7 K10 G5 NC/TH7 VDD_7 K10
G6 C134 .022U G6 C628 .022U G6 C558 .022U G6 C67 .022U
NC/TH8 NC/TH8 NC/TH8 NC/TH8
E5 NC/TH9 E5 NC/TH9 E5 NC/TH9 E5 NC/TH9
E6 NC/TH10 E6 NC/TH10 E6 NC/TH10 E6 NC/TH10
E7 2.5V E7 2.5V E7 2.5V E7 2.5V
NC/TH11 NC/TH11 NC/TH11 NC/TH11
E8 NC/TH12 E8 NC/TH12 E8 NC/TH12 E8 NC/TH12
F5 NC/TH13 More Memory F5 NC/TH13 F5 NC/TH13 More Memory F5 NC/TH13
F6 NC/TH14 decoupling
F6 NC/TH14 More Memory F6 NC/TH14 decoupling
F6 NC/TH14 More Memory
F7 F7 F7 F7
F8
NC/TH15
F8
NC/TH15 decoupling F8
NC/TH15
F8
NC/TH15 decoupling
NC/TH16 NC/TH16 NC/TH16 NC/TH16
D6 VSS_0 D6 VSS_0 D6 VSS_0 D6 VSS_0
D7 VSS_1 D7 VSS_1 D7 VSS_1 D7 VSS_1
D9 B2 C550 220P D9 B2 C443 220P D9 B2 C557 220P D9 B2 C436 220P
VSS_2 VDDQ_0 VSS_2 VDDQ_0 VSS_2 VDDQ_0 VSS_2 VDDQ_0
J5 VSS_3 VDDQ_1 B4 J5 VSS_3 VDDQ_1 B4 J5 VSS_3 VDDQ_1 B4 J5 VSS_3 VDDQ_1 B4
J6 B6 C434 4700P J6 B6 C567 4700P J6 B6 C441 4700P J6 B6 C435 4700P
VSS_4 VDDQ_2 VSS_4 VDDQ_2 VSS_4 VDDQ_2 VSS_4 VDDQ_2
J7 VSS_5 VDDQ_3 B7 J7 VSS_5 VDDQ_3 B7 J7 VSS_5 VDDQ_3 B7 J7 VSS_5 VDDQ_3 B7
J8 B9 C279 .1U J8 B9 C632 .1U J8 B9 C580 .1U J8 B9 C583 .1U
VSS_6 VDDQ_4 VSS_6 VDDQ_4 VSS_6 VDDQ_4 VSS_6 VDDQ_4
K4 VSS_7 VDDQ_5 B11 K4 VSS_7 VDDQ_5 B11 K4 VSS_7 VDDQ_5 B11 K4 VSS_7 VDDQ_5 B11
K9 VSS_8 VDDQ_6 D2 K9 VSS_8 VDDQ_6 D2 K9 VSS_8 VDDQ_6 D2 K9 VSS_8 VDDQ_6 D2
D4 VSS_9 VDDQ_7 D11 D4 VSS_9 VDDQ_7 D11 D4 VSS_9 VDDQ_7 D11 D4 VSS_9 VDDQ_7 D11
C8 VSSQ_0 VDDQ_8 E3 C8 VSSQ_0 VDDQ_8 E3 C8 VSSQ_0 VDDQ_8 E3 C8 VSSQ_0 VDDQ_8 E3
C9 VSSQ_1 VDDQ_9 E10 Memory C9 VSSQ_1 VDDQ_9 E10 Memory C9 VSSQ_1 VDDQ_9 E10 Memory C9 VSSQ_1 VDDQ_9 E10 Memory
C10