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Trimless VCO

Develop A Trimless
Modeling and designing a trimless
Oscillator VCO requires a full understanding
Trimless VCOs, Part 2 of the non-ideal nature of oscillator
components and architectures.

Chris OConnor RIMLESS voltage-controlled oscillators (VCOs) offer a practical

Member of Technical Staff
Maxim Integrated Products, 120 San
Gabriel Dr., Sunnyvale, CA 94086;
(408) 737-7600, FAX: (408) 737-7194,
T alternative to conventional discrete VCO approaches that rely on tun-
ing adjustments during production. The Colpitts style oscillator
topology offers a proven circuit architecture for use in a trimless VCO
design. A basic set of fundamental design equations can be derived for
first-order oscillator design and selection of component values. Unfortu-
nately, real-world components used to implement the trimless VCO are non-
ideal and alter the governing equations. The conclusion of this two-part
article on trimless VCOs covers how actual circuit implementation departs
from the ideal, offering an improved method for modeling, designing, and
implementing trimless VCOs.
In Part 1 (see Microwaves & RF, oscillation frequency was described
July 1999, p. 68), the Colpitts config- in terms of the part-to-part errors of
uration (Fig. 7) was presented as the the frequency-setting components.
basis for a trimless VCO. The classic The total frequency error was com-
oscillator topology was described puted by skewing the value of each
with a generalized set of equations to component by its worst-case toler-
predict the fundamental oscillator ance. The equations proved useful in
behavior for the first-order design of developing a table of calculations to
the oscillator (i.e., component selec- predict the required tuning range,
tion). The variation (error) in actual start-up conditions, phase noise, and



To output
C0 buffer


7. This VCO is based on an ideal Colpitts configuration (with a parallel-mode

tank circuit).


Trimless VCO

In either case, the device has finite

Lp cutoff (transition) frequency, fT, and
B C is typically packaged in a plastic
+ package with metal leads (e.g., SOT-
Cpi V1 gm V1 323). These factors lead to two pre-
dominate non-ideal elements in the
equivalent circuit: capacitance across
E E the base-emitter leads, and induc-
tance in series with the base and
emitter (and collector) leads of the
8. This revised small-signal packaged transistor model forms the core of the oscillator. The capacitance results
new trimless VCO design. from the inherent junction capaci-
tance and base-charging capacitance
oscillation amplitude. Finally, a first- asitic resistance, capacitance, and of the transistor. The full transistor
order, step-wise design process was inductance. The parasitic elements circuit model would include base
introduced as a simple approach to alter the frequency response of the resistance (rb), collector-base capaci-
select the initial component values components to the point where the tance (Cjc), finite beta, etc. However,
for the Colpitts configuration with effective value of the component is it is assumed that fT > fOSC, the oscil-
parallel-mode tank. changed at the frequency of interest. lation frequency, so that rb and Cjc-
Although the basic theory applied Consequently, the oscillator frequen- can be considered negligible along
in Part 1 is useful for first-order cy, tuning range, and other charac- with the other transistor parasitic
design, accurate selection of compo- teristics are affected and the real cir- elements and that the input capaci-
nent values in a real-world oscillator cuit departs from the operating point tance is considered to be the domi-
requires consideration of important predicted by the first-order analysis nant effect.
circuit details. The aim of this article with near-ideal components. The The inductance is a result of the
is to present a possible approach to departure from the ideal needs to be parasitic bondwire and lead induc-
more accurately model the real- accounted for in the design phase, in tance of the package and is therefore
world equivalent of the Colpitts oscil- order to properly select the compo- modeled as a single lumped inductor.
lator topology and to apply it to the nent values. A revised model for each This lumped inductance can also
trimless VCO concept. The primary component is required. The following include series inductance from the
objective is still to provide a simple is an examination of each component pin to capacitors C1 and C2. There are
design process that permits accurate in the oscillator and a proposed cir- other parasitic elements, such as
selection of the initial component val- cuit model for each. Again, the additional transistor parasitic ele-
ues close enough so that minimal fine emphasis is on maintaining the sim- ments and package shunt capaci-
tuning of the values in the actual cir- plest model possible in order to per- tance and mutual inductance, but
cuit is needed to achieve oscillator mit a reasonable analysis and devel- their effects will be ignored for the
operating requirements. This article op some intuition in design of the purpose of this discussion. Figure 8
will cover the effects of non-ideal oscillator circuit. shows a revised model for the tran-
components and models for them, The core of a VCO is typically con- sistor that includes the parasitic
layout parasitic elements in a VCO, a structed from discrete transistors or capacitance (C pi ) and inductance
revised oscillator model, a method for an oscillator integrated circuit (IC). (Lp). Inductance Lp is typically 1.5 to
trimless VCO analysis and simula-
tion, and an example of a Colpitts
oscillator that is constructed from
low-cost, commercial components Cathode Anode Cathode Rs Lp Anode
and the measured results for tuning
range and phase noise versus pre-
dicted results.
Initial analysis of the basic Colpitts
configuration assumed that each 9. This revised varactor model is employed in the new trimless VCO design for
component was ideal. However, tuning purposes.
when a printed-circuit-board (PCB)
solution is implemented with typical
surface-mount components, the real
characteristics for each device must
be taken into account. An examina- RSV L
tion of commonly used surface-mount
components quickly reveals that
they are not ideal elements, but that
the elements contain amounts of par- 10. This revised inductor model is also part of the new trimless VCO design.


Trimless VCO

2.0 nH while capacitance Cpi) is typ-

ically greater than 1 pF. The base- Resonant load Active circuit
emitter capacitance is typically Cp4 Cp3 Cp1
greater than 1 pF for Cjc + Cb.
Oscillator transistor
The parasitic capacitance, Cpi, and
parasitic inductance, Lp, have a sig- C0 Lp
nificant impact on the frequency +
response/input impedance of the Cc C1 Cpi V1
active circuit amplifier. These ele- CVAR
ments must be considered and mod- Lp gm V1
eled to properly predict the equiva- L


lent input capacitance and negative
resistance of the Colpitts oscillator
With capacitances C1 and C2 con-
nected to the emitter and base leads,
a revised analysis can be performed
to determine the equivalent input
impedance of the active circuit. For v
< LpCpi, the inductor on the base side
in series with Cpi has only a small 11. The basic Colpitts VCO configuration has been refined to include the
effect on the impedance since the realistic effects of parasitic elements.
majority of signal current flows from

the gm stage through the inductor in impedance. These approximations
the emitter side. Therefore, the cir- CEQ = 1 / (1 / C12 ) A / (1 + A 2 ) [ ] are used later to develop a revised
cuit can be simplified to facilitate set of design equations for the
analysis by including only the induc- ( gm / C1 C2 )} (16) oscillator.
tor in the emitter lead on the ideal and The varactor is essentially a posi-

[ ]
model and provide a more intuitive tive-negative (PN) junction diode
approximate result. Although the REQ = R 1 / (1 + A 2 ) (17) with specially tailored capacitance-
majority of the signal current flows versus-voltage characteristics. As
through the emitter lead, the capaci- During oscillation, the current with all diodes, the device has a finite
tance Cpi should be included in the flowing in the oscillator transistor is static series resistance. It deter-
calculation of the capacitance. A rea- varying versus time (typically like a mines the effective capacitor and
sonable approximation is C1X = C1 + half-wave rectified sine wave) and tank Q. The varactor is typically
Cpi. Circuit analysis shows that the therefore the instantaneous implemented as a discrete device in a
inductance modifies the equivalent transconductance, g m , is varying plastic package (such as a SC-79
input impedance from the ideal with time. At equilibrium, the effec- package). As with the transistor,
model case: tive large-signal transconductance, there is a parasitic lead and bondwire
Gm, is lower than the DC bias value of inductance in series with the varac-
Zin = j[(C1 + C2 ) / wC1C 2] gm and is only that necessary to sus- tor device. These two non-ideal
+( gm / w 2C1C2 ) (14) tain the loop gain to 1 + d. As a result, effectsthe series inductance and
has a reduced affect on modifying the the series resistancemust be
to a revised model case: input impedance than at its DC bias included to properly predict the oscil-
point. lation frequency and the tank Q
Zin j [(C1 + C 2 ) / C1 C 2] One approximation which could be
used for GM is discussed in ref. 5:
(which impacts the phase noise,
startup, and oscillation amplitude) In
[ A / (1 + A2 )] particular, the series inductance is a
( gm / C1 C 2 )} + [1 / (1 + A )]
2 GM n / REQ where n = critical parasitic to model, because it
[(CC + C12 ) / CC ] [(C1 + C2 ) / C2 ]
strongly changes the effective capac-
( gm / C1 C 2 )
(15) itance of the varactor. (It forms a
where A = gmLp C12 = C1 C2 / (C1 + C2 ) in the... (18 ) series resonant circuit that can occur
very near the desired oscillation fre-
The inductor actually makes the The large-signal Gm should then be quency.) Figure 9 shows a revised
input capacitance appear larger and substituted for gm in the previous model for the varactor which
the negative resistance appears equations. includes the parasitic resistance and
smaller. The equivalent capacitance Detailed simulation of the full cir- inductance in series with the with the
along with negative resistance may cuit reveals that the expressions anode and cathode leads. The series
be expressed by the following equa- above offer a reasonable estimate of inductance is typically 1.5 nH while
tion as: the actual equivalent input the series resistance is typically 0.5


Trimless VCO

A = the capacitor plate area (in

square mil), and
t = the board thickness (in mil).
The active circuit negative resis-
tance for the PCB-level oscillator
design is:
G S11 [
RNEQ = RN 1 / (1 + A 2 ) (20) ]
The resonant load capacitance can
be found from:
A = Gm L p CVAREQ = [CVAR / (1 2

Resonant Active L p C VAR )] + C p 4 (21)

load circuit


12. This model treats an oscillator as an active circuit with a resonant load. + CVAREQ ) + C p3 (22)

to 1.0 V. ideal factor in the PCB level oscilla- The resonant frequency or fre-
The primary inductor in the tank tor design has to do with the parasitic quency of oscillation can be found
circuit has a self-resonant frequency capacitances and inductances that from:
that may affect the frequency of
oscillation. A relatively simple model
are associated with the component
solder pads and interconnect traces. [
fo ~ 1 / 2 TEQ 0.5 ] ( 23)
can be used to describe the inductor These parasitic elements must be
below the self-resonant frequency. extracted from the actual PCB lay- CTEQ = CVEQ + CIN ( 24)
Figure 10 shows the revised model out but are typically not available at
for the inductor. The series resis- the time of design, because the layout The quality factor (Q) of the reso-
tance (R s ) models the loss in the has not been started/completed. nant tank circuit, QT, can be found
inductor that sets the Q. Capacitance However, it is important to include from:
(Cp) models the finite self-resonant them in the oscillator circuit model to QT = TTEQ / 2L (25)
frequency. Some manufacturers are accurately predict the oscillation fre-
supporting this model for their com- quency and tuning range, so a first RTEQ = RQL || RQC ( 26 )
mercial devices. 6 However, many cut layout and analysis of the para-
cost-effective surface-mount induc- sitic element values are needed. A
tors that are available today have choice must be made between model- QC = 1 / 2CV RS ( 27 )
sufficiently high self-resonant fre- ing the parasitic elements with trans-
quencies that it is reasonable to con- mission lines or lumped-element The amplitude of the oscillation
sider the inductor to have negligible equivalents. Strictly speaking, the (the RMS voltage) can be found from:
parasitic capacitance. This permits traces/pads are transmission lines,
the inductor to be modeled as purely but the lumped element approach can
an inductance and a series resistance. provide a more intuitive method of RQC = QC 2 RSC QL = 2LRSL
The series resistance of the induc- modeling the parasitic elements and
tance does need to be modeled to is valid for compact layouts where RQL = QL 2 RSL VO = 2 IQ REQ
accurately describe the tank Q. the interconnects are short (< 40 mil) [ J1 ( ) / J 0 ( )] Vpeak (28)
and wide (>20 mil). In general, if
COUPLING CAPACITORS traces are short then the connection The loop gain can be found from:
The feedback and coupling capaci- could be approximated as just a
tors are high-quality RF compo- shunt capacitance to ground. This
nents. Typically, the capacitors are permits the simple addition of para- [ J1 ( ) / J0 ( )] 0.7 the ratio of the
very small (0603, 0402, even 0201) sitic shunt capacitors at the connec-
Bessel functions
multilayer ceramic surface-mount tion nodes. The parasitic capacitance
capacitors. That technologys small at the connection points can be Loop gain = gm REQ (1 / n) (29)
size inherently provides very-high approximated by a parallel plate
frequency performance and nearly capacitance, Cpad, with the plate area where
ideal frequency characteristics. equal to the total pad/trace area.
Therefore, the capacitors are consid- n [(CC + C12 ) / Cc ]
CPAD = r o ( A / t ) = 1.3 10 15
ered ideal for the purposes of this
( A / t ) pF / mil ( for FR4) (19)
[(C1X + C2 X ) / C2 X ] (30)
second-order design.
A potentially troublesome non- where: The start-up criteria are given by:


Trimless VCO

gm / C1C2 >> REQ / QT 2 VCC

for a minimum 2:1 ratio (31)

The phase noise can be found from:

Phase noise = In 2 (1 / Vo 2 )
( fo / 2Qo 2 ) REQ 2 / ( f fo 2 ] (32)
fo = the frequency of oscillation,
CVAR = the varactor capacitance, E
QL = the inductor quality factor,
QT = the tank quality factor,
REQ = the equivalent tank parallel
gm = the oscillator bipolar transis-
tor transconductance,
V0 = the RMS tank voltage,
CT = the total tank capacitance,
C0 = the varactor coupling capaci- 13. This oscillator active circuit is based on the use of a discrete transistor.
QV = the effective varactor quality resentation of when oscillation condi- far, the most rapid simulation mode
factor, tions exist. available. It is best to use a commer-
R S = the varactor series resis- The basic conditions for oscillation cial circuit simulator, such as the
tance, are: Advanced Design System (ADS)
IQ = the oscillator transistor bias 1. ?1/S11? ?G?, from Agilent Technologies (Santa
current, and 2. ang(1/S11) = ang(G), and Rosa, CA), MMICAD from Optotek
In = the collector shot noise. 3. the curves of 1/S11 and G must (Kanata, Ontario, Canada), the Sere-
One very useful method to view an ultimately intersect each other and nade Suite from Ansoft (Pittsburgh,
oscillator circuit is as a reflection change in opposite angular directions PA), and Microwave Office from
amplifier. This intuitive concept is versus frequency (this occurs at the Advanced Wave Research (El
described in a classic article by John peak-oscillator tank amplitude). Segundo, CA) for this. The simulator
Boyles7 and in a paper by Esdale.8 The reflection amplifier approach should be set up to use the reflection
The reflection amplifier method will be used in the remainder of this amplifier method that was previous-
permits the engineer to use S-param- article to model, simulate, and mea- ly mentioned, using the oscillator cir-
eters for design and measurement of sure the real oscillator circuit. cuit model of Fig. 11. The initial val-
the oscillator. Working with S- The calculations shown are valid as ues can be derived from the revised
parameters facilitates the modeling a method to approximate the initial design equations. Adjustments can
and measurement of the actual oscil- values for the components. A spread- be made to the component values to
lator circuit and helps develop sheet can be developed to compute return the active circuit and resonant
insight into the circuits performance the revised component values (avail- load impedances back to the values
and potential problems.9 able on request from the author). It is required for the desired oscillation
The reflection amplifier important to view the circuits true frequency, start-up, and tuning
approach basically models the oscilla- dependency versus frequency, start- range. In some cases, the values pre-
tor as an active circuit with a reso- up conditions, etc. Computer simula- dicted by the small-signal circuit
nant load and describes the stable tions should be used to provide a model are a sufficient and accurate
oscillation point in terms of the rela- more rapid, accurate method of mod- estimation of the component values
tive impedances. If the active circuit ifying the circuit component values to proceed directly toward construct-
input S-parameters are plotted as that govern the oscillation behavior. ing the actual circuit (Fig. 12). How-
1/S11, then the values can be directly Simulation is an efficient way to ever, when a more accurate or highly
plotted on a Smith chart with the G of make circuit design trade-offs and optimized design is required, it may
the resonant load. A convenient adjustments to account for the be necessary to simulate the actual
aspect of plotting 1/S11 is that the changes caused by the non-ideal cir- active circuit implementation with
impedance of R and X for the active cuit elements. detailed models for all devices. The
circuit can be read and multiplied by The basic circuit model can be sim- full oscillator circuit is then simulat-
1 to provide the correct values of the ulated with a small-signal circuit sim- ed with a time-domain simulator
negative resistance and reactance. ulation, which inherently works in (e.g., SPICE) or a harmonic-balance
This method of plotting the terms of S-parameters. A small-sig- simulator (e.g., Harmonica) to pre-
impedances provides a graphical rep- nal linear circuit simulation is, by cisely determine the frequency tun-


Trimless VCO

ing range and verify that

the circuit design objec-
tives can be met. VCC VCC 1000 pF

Implementation of the 0.1 mF
Colpitts configuration MAX2620 1.5 pF
Co Cc 1 8
shown in Fig. 7 is com-
monly accomplished with VTUNE 2 kV 6 pF 5 pF Out
2 7 VCC to
discrete transistors. C1
Many options exist for 0.1 mF mixer
LF 2.7 pF 3 6
cost-effective, high f T D1 4.7 nH C
transistors packaged in Alpha 2 4 330 pF
1.5 pF Bias 5
small plastic packages SMV1204-34
as single and dual Out
51 V to PLL
devices. However, in 1000 pF
order to achieve a design
that works down to a SHDN
+2.7-VDC supply voltage VCC
with sufficient headroom
for the oscillator device
and output buffer, a 14. Based on a model MAX2620 oscillator IC, this design represents a practical
three-transistor circuit is implementation of the Colpitts oscillator configuration.
typically needed. Figure
13 shows the possible implementa- put matching to the load. If any fine-tuning frequency
tion of the oscillator active circuitry. Referring to the revised circuit adjustment is necessary, adjust the
Discrete implementations are model of Fig. 11, the parasitic-ele- frequency of oscillation with Co, Cc
extremely flexible, but possess sev- ment values in the component models (for an increase in frequency,
eral negatives. The primary nega- are as follows. For the varactor, Lp = decrease Cc and for a decrease in fre-
tives of this circuit are significant 1.5 nH, Rsv = 0.5 V, Cvar(hi) = 8 pF, quency, increase Cc; increase the tun-
variation in biasing versus tempera- and Cvar(lo) = 4 pF. For the inductor, ing range and decrease the frequency
ture and supply voltage, the large Lp = 4.7 nH and Rsl = 0.5 V. For the by increasing Co; and decrease the
number of components required to transistor, Lp ~ 3.0 nH and Cpi = 1.1 tuning until the tuning range and fre-
implement the oscillator active cir- pF. For the layout parasitics, Cp1 = quency limits match a particular set
cuitry, and the relatively large PCB 0.2 pF, Cp2 = 0.2 pF, Cp3 = 0.5 pF, Cp4 of requirements).
area that is required. = 0.3 pF, and Ltrace = 0.3 nH. A circuit (Fig. 14) was constructed
An improved alternative to the The component values are selected in prototype fashion to demonstrate
discrete transistor approach is to use through a simple design process that the performance of an oscillator
an integrated oscillator IC, such as is summarized below as part of the designed from the equations and sim-
the MAX2620 from Maxim Integrat- revised design process: ulation technique outlined in this
ed Products (Sunnyvale, CA), with Select initial values for C1, C2, Lf, article. The circuit is useful for some
an external tank circuit. The Cc, Co, Cvar(hi), and Cvar(lo) based on commercial 900-MHz industrial-sci-
MAX2620 IC integrates the oscilla- the revised design equations devel- entific-medical (ISM) applications.
tor transistor, stable biasing, and an oped for C var , C v , C in , and C 12e Acknowledgments
The author would like to acknowledge that there are
output amplifier in a small uMAX8 described in this article to achieve many previous contributors to the field of oscillators that
are the respected experts (Rohde, Leeson, Boyles, Hay-
package to provide a convenient the require frequency tuning range ward, Meyer, etc.). Their work has led to the advancement
of oscillators in general and provided the foundation for this
method of implementing the oscilla- required for the trimless VCO. two-part article. My effort was simply to introduce a simple
tor active circuitry. This approach Construct a more detailed small- concept for a trimless VCO and to re-describe the oscillator
design task in a simple, improved manner in order to permit
permits the designer to focus only on signal circuit model using the revised ues for a PCB-based
an engineer to quickly calculate the initial component val-
Colpitts VCO design.
selecting the external passive com- models for the varactor, active cir-
ponent values, thereby confining the cuit, and layout parasitic elements. References
5. Kenneth K. Clarke, Communications Circuits: Analy-
design task to achieve the required Simulate the small-signal circuit sis and Design, Addison-Wesley, Boston, 1978, Chap. 6, p.
frequency tuning characteristics. model and adjust the component 6. Modeling Coilcraft RF Inductors, Technical Note,
Coilcraft, Inc., Lisle, IL, 1999.
Figure 14 shows the Colpitts oscilla- value to achieve the target values for 7. John W. Boyles, The Oscillator As A Reflection
tor configuration using the C in, Cvar(hi), Cvar(lo), and startup con- Amplifier: An Intuitive Approach To Oscillator Design,
Microwave Journal, June 1986.
MAX2620. The frequency-setting ditions (maintain loop gain and suffi- Approach to the 8. Daniel J. Esdale et al., A Reflection Coefficient
Design of One-Port Negative Impedance
components are all on the left side of cient negative resistance). Oscillators, IEEE Transactions on Microwave Theory
and Techniques, Vol. MTT-29, No. 8, August 1981, pp. 770-
the circuit. The components that are Construct the oscillator with the 776.
9. Varactor SPICE Models for RF VCO Applications,
connected to the output ports are one simulated component values. Application Note, Alpha Industries, Woburn, MA, 1998.
10. Datasheet for the MAX2620, Maxim Integrated Prod-
possible option to implement the out- Measure 1/S11 and G (optional). ucts, Sunnyvale, CA, 1997.