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5

LOAD FLOW UNDER POWER


ELECTRONIC CONTROL

5.1 Introduction
The relatively recent availability of high voltage power electronic switching has led
to the development of HVDC transmission and FACTS technologies. Although the
original purpose of the former was a return to d.c. transmission for large distances,
most of the recently commissioned schemes are actually back-to-back; their purpose
is the interconnection of asynchronous power systems.
The FACTS technology, on the other hand, has developed to enhance the control-
lability of the synchronous transmission system, thus permitting its operation closer
to the stability limits. The basically different reasons for the existences of HVDC and
FACTS have important consequences in the load flow solutions.
This chapter describes the incorporation of these two power electronic technolo-
gies in conventional load flow solutions whenever possible, and describes alternative
methods of solution when such incorporation makes the load flow convergence difficult.

5.2 Incorporation of FACTS Devices


Chapter 3 has described the functions and steady-state models of the main FACTS
devices already in use or under serious consideration by electricity suppliers. The need
to work plant and transmission systems harder in the new deregulated environment
is likely to increase substantially the use of FACTS controllers. Accordingly, their
behaviour must be adequately represented in power system modelling.
As the variety of power electronic controllers in the network interact with each
other, the reliability of the solution takes precedence over the computational burden.
Moreover, the conditions leading to the acceptability of decoupled load flows do not
necessarily apply when the network operates under power electronics control. There-
fore, iterative methods with strong convergence characteristics are to be preferred.
Similarly, the use of a sequential solution between the a.c. network and each of the
FACTS devices present does not yield quadratic convergence because only the voltage
phasors are used as state variables, while the conditions of the controllable devices
are only updated at the end of each Newton iteration. This often leads to diverging
solutions.
Thus, the original full Newton-Raphson simultaneous technique, described in
Chapter 4, is used here to incorporate FACTS devices in the load flow solution.
130 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

Some FACTS devices present no special problem, as their steady-state behaviour


is adequately represented by the standard load flow specifications. This is the case
of static VAR compensation, whether of the TCR or STATCON types, which can be
specified by a zero active power and constant voltage magnitude, like the conventional
synchronous condensers. In general, however, the incorporation of FACTS devices
requires special consideration and is described in this section.

5.2.1 Static tap changing


The following transfer admittance matrix of a two-winding transformer with complex
taps on the primary and secondary windings has been developed in section 3.2.2 [l].

When applied to in-phase tap changing, the following substitutions must be made
in Equation (5.1):
T , = T: = T,LO",

and
u, = u; = UVLO".
For a tap changer connected between terminals k and m, to control the voltage
magnitude at bus k, the extra linearized load flow equations required at nodes k and
m are:

Finally, at each iteration, the tap controller is updated by the following equation

(5.3)

5.2.2 Phase-shifting (PS)


A transformer admittance matrix for phase-shift use has been described in section 3.2.3.
Its incorporation in Newton's load flow solution requires an enlarged Jacobian, because
the active power flowing from node k to node m, Pkm, is not used as a control variable
in the conventional formulation of the Newton-Raphson solution. Therefore, either d,,
or &, must be added to the state variables.
5.2 INCORPORATION OF FACTS DEVICES 131

The modified matrix equation is [ 11:

and

is a diagonal matrix of order equal to the number of phase-shifters in the network.


Apt, = APf; - pf;l is the PS real power flow mismatch vector.

A4 = - c$i is the vector of incremental changes in phase angle.


Unless the initial values of the complex tap positions are known, the phase-shifter
can be initialized with zero degree angles.

5.2.3 Thyristor controlled series capacitance (TCSC)


The transfer admittance matrix equation of the TCSC connected between nodes k and
m, shown in Figure 5.1, is

(5.6)

(5.7)

and the expression for X I in terms of the firing angle has been derived in section 3.2.1.

v.. I II I v-

Figure 5.1 TCSC module


132 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

The power equations at node k are:


Pk = - v k V m B ( I ) sin(8k - Om), (5.9)
Qk = -viB(~)
-k V k V m B ( I ) c o s ( 8 k - o m ) . (5.10)

The power mismatches required to incorporate a TCSC in the load flow solution are
contained in the following matrix equation (written for a specified power flow from k

- Apk

APm

A Qk (5.11)
AQm

-Apkm

(5.12)

(5.13)

(5.14)

The presence of series compensators can cause ill-conditioning of the Jacobian matrix
if zero voltage angle initialization is adopted. To avoid ill-conditioning, it is recom-
mended to treat the TCSC as a fixed reactance until a specified voltage angle difference
appears across the reactance. From then on, the control equations of the series compen-
sator are included in the iterative process.

5.2.4 Unified power flow controller (UPFC) [3,4]


A UPFC, connected between nodes m and k, can be designed to control the active and
reactive power flows between rn and k, as well as the voltage at node k. In its simplest
form, a loss free UPFC can be specified in the load flow solution as a P m k r Qmk (at
node m) and a P m k . l v k l generator (at node k). No special modification is thus needed
in the standard load flow solution with this model.
Upon convergence, a sequential assessment of the UPFC parameters needs to be
made to ensure that the control limits are not exceeded. This method, however, is
not applicable to cases when the UPFC is only used to control one or two of the
variables. A more flexible and reliable method is next derived with reference to the
5.2 INCORPORATION OF FACTS DEVICES 133

converter I1 12 converter
++

t t
V ~ R0vR
t t
vcR ecR

Figure 5.2 Unified power flow controller [4] (0 1998 IEE)

The power conditions at the terminals of the series converter are:


134 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

where
Ykk = Gkk + jBkk = zii + z&!,
Y m m = Gmm + jBmm = ZFi,
Ykm= Ykm = Gkm+ jBkm = -z,-d,
Y v =~G,R + jBvR = -Z;R.I
Ideally, the UPFC neither absorbs active power from nor injects it into the a.c. system
and the d.c. link voltage, Vdc, remains constant. However, to keep v d c constant, the
shunt converter must supply an amount of active power ( P V ~equal ) to the d.c. power
( v d c l 2 ) , which is equal to the power supplied by the series converter ( P c ~ )i.e.
,

PvR + PcR = 0. (5.23)


As stated in the Introduction, the state variables representing the UPFC must be
added to the network nodal voltage magnitudes and angles to permit a unified solution
by the Newton-Raphson method. In this way, the UPFC state variables are adjusted
automatically to satisfy specified power flows and voltage magnitudes.
When the UPFC controls the voltage magnitude at node k (to which the shunt
converter is connected), as well as the active power transfer from m to k and the
reactive power injection at node m (which is specified as a P, Q bus), the following
matrix equations applies:

(5.24)
where APbb represents the mismatch introduced by the presence of Equation (5.23).
If voltage control at node k is not required, the third column of the Jacobian in
Equation (5.24) is replaced by partial derivatives of the nodal and UPFC mismatch
powers with respect to the nodal voltage magnitude vk. Correspondingly, in the vari-
ables vector the shunt source voltage magnitude increment, A V V ~ / V , is, ~replaced
, by
the nodal voltage magnitude increment at node k, AVk/Vk. In this case, V,R is kept
constant at a value within the specified limits.
5.3 INCORPORATION OF HVDC TRANSMISSION 135

If a limit violation takes place in one of the voltage magnitudes of the UPFC sources,
the voltage magnitude is fixed at that limit and the regulated variable is freed.
In line with the basic load flow solution, in the absence of controlled buses or
branches, 1 p.u. voltage magnitude for all P Q buses and 0 voltage angle for all buses,
provide a suitable starting condition. However, if controllable devices are included in
the analysis, good initial estimates can be obtained by assuming a loss free UPFC and
zero voltage angles in Equations (5.15) to (5.18).
From Equations (5.17) and (5.18) for specified P m , Qm:
(5.25)

(5.26)

where

C1 = Qmref if vO, = v:.


Also, in a lossfree UPFC, the active power absorbed by the shunt converter ( P v ~ )
must be equal to the power ( P c ~delivered
) by the series converter, i.e.
PvR = -pcR (5.27)
combining (5.27) with (5.19) and (5.21), after some reduction leads to:

(5.28)

When the shunt converter operates as a voltage controller, the voltage magnitude of
the shunt source is initialized at the required voltage level and then updated at each
iteration. If the shunt converter is not used as a voltage controller, the voltage magnitude
of the shunt source is kept at a fixed value within its limits during the iterative process.

5.3 Incorporation of HVDC Transmission


The operating state of a combined a.c.-HVDC power system is defined by the vector
[V,8, KIT,
where
-
V is a vector of the voltage magnitudes at all a.c. system busbars;
3 is a vector of the angles at all a.c. system busbars (except the reference bus
which is assigned 8 = 0);
i is a vector of d.c. variables.

e
Chapter 4 has described the use of 7 and as a.c. system variables and the selection
of d.c. variables X is discussed in section 5.3.1.
The development of a Newton-Raphson based algorithm requires the formulation
of n independent equations in terms of the n variables.
136 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

The equations which relate to the a.c. system variables are derived from the specified
a.c. system operating conditions. The only modification required to the usual real and
reactive power mismatches occurs for those equations which relate to the converter
terminal busbars. These equations become:
Pf& - Pterm(ac) - Pterm(dc> = 0 (5.29)
QZm - Qterm(aC) - Qterm(dc) = 0 (5.30)
where
Pterm(ac)is the injected power at the terminal busbar as a function of the a.c.
system variables;
Pterm(dc) is the injected power at the terminal busbar as a function of the d.c.
system variables;
P;:,,, is the usual a.c. system load at the busbar;
and similarly for Qterm(dC) and Qterm(aC).
The injected powers Q,rm(dc) and P,rm(dC) are functions of the converter a.c.
terminal busbar voltage and of the d.c. system variables, i.e.
Pterm(dC) = f ( v t e r m 9 3 (5.31)
Qterm(dc) = f ( v t e r m , 9 (5.32)
The equations derived from the specified a.c. system conditions may, therefore, be
summarized as:

(5.33)

ABterm ( 7 9 8, z)
AG(v,8) =0, (5.35)
ADterm (7,8, @

- -
Wte,,X) -
5.3 INCORPORATION OF HVDC TRANSMISSION 137

53.1 Converter model


The selection of variables 7 and formulation of the equations require several basic
assumptions which are generally accepted in the analysis of steady state d.c. converter
operation. These are:

(i) The three a.c. voltages at the terminal busbar are balanced and sinusoidal.
(ii) The converter operation is perfectly balanced.
(iii) The direct current and voltage are smooth.
(iv) The converter transformer is lossless and the magnetizing admittance is ignored.

Converter variables Under balanced conditions, similar converter bridges, attached


to the same ax. terminal busbar, will operate identically regardless of the transformer
connection. They may, therefore, be replaced by an equivalent single bridge for the
purpose of single-phase load flow analysis. With reference to Figure 5.3, the set of
variables illustrated, representing fundamental frequency or d.c. quantities, permits a
full description of the converter system operation.
An equivalent circuit for the converter is shown in Figure 5.4, which includes the
modification explained in section 5.3 as regards the position of angle reference.
The variables, defined with reference to Figure 5.4, are:
V,,,,L4 converter terminal busbar nodal voltage (phase angle referred to
converter reference);
EL II/ fundamental frequency component of the voltage waveform at the
converter transformer secondary;

Figure 5.3 Basic d.c. converter (angles refer to a.c. system reference)

Figure 5.4 Single-phase equivalent circuit for basic converter (angles refer to d.c. reference)
138 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

I,, I , fundamental frequency component of the current waveshape on the


primary and secondary of the converter transformer, respectively;
0 firing delay angle;
a transformer off-nominal tap ratio;
Vd average d.c. voltage;
Id converter direct current.
These ten variables, nine associated with the converter, plus the a.c. terminal voltage
magnitude Vterm,form a possible choice of X for the formulation of Equations (5.31),
(5.32) and (5.34).
The minimum number of variables required to define the operation of the system is
the number of independent variables. Any other system variable or parameter (e.g. P d c
and Qdc) may be written in terms of these variables.
Two independent variables are sufficient to model a d.c. converter, operating under
balanced conditions, from a known terminal voltage source. However, the control
requirements of HVDC converters are such that a range of variables, or functions
of them (e.g. constant power), are the specified conditions. If the minimum number
of variables is used, then the control specifications must be translated into equations
in terms of these two variables. These equations will often contain complex non-
linearities, and present difficulties in their derivation and program implementation. In
addition, the expressions used for Pdc and Q d c in Equations (5.29) and (5.30) may be
rather complex and this will make the programming of a unified solution more difficult.
For these reasons, a non-minimal set of variables is recommend, i.e. all variables
which are influenced by control action are retained in the model. This is in contrast
to a.c. load flows where, due to the restricted nature of control specifications, the
minimum set is normally used.
The following set of variables permits simple relationships for all the normal control
strategies:
[a] = [ V d , I d , a, cos(Y,#IT.
Variable 4 is included to ensure a simple expression for Qdc. While this is important
in the formulation of the unified solution, variable 4 may be omitted with the sequential
solution as it is not involved in the formulation of any control specification; cosa is
used as a variable rather than (Y in order to linearize the equations and thus improve
convergence.

d.c. per unit system To avoid per unit to actual value translations and to enable the
use of comparable convergence tolerances for both a s . and d.c. system mismatches, a
per unit system is also used for the d.c. quantities.
Computational simplicity is achieved by using common power and voltage base
parameters on both sides of the converter, i.e. the a.c. and d.c. sides. Consequently,
in order to preserve consistency of power in per unit, the direct current base, obtained
from ( M V A B ) / V B , has to be 4 times larger than the alternating current base [ 5 ] .
This has the effect of changing the coefficients involved in the a.c.-d.c. current
relationships. For a perfectly smooth direct current and neglecting the commutation
overlap, the r.m.s. fundamental components of the phase current is related to Id by the
5.3 INCORPORATION OF HVDC TRANSMISSION 139

approximation,
(5.36)

Translating Equation (5.36)to per unit yields


4
ls(p.u,) = -&Id(p.u.),
n
and if commutation overlap is taken into account, as described in Chapter 3, this
equation becomes:
(5.37)
where k is very close to unity. In load flow studies, Equation (5.37) can be made
sufficiently accurate in most cases by letting:
k = 0.995.
Derivation of equations The following relationships are derived for the variables
defined in Figure 5.4. The equations are in per unit.

(i) The fundamental current magnitude on the converter side is related to the direct
current by the equation
(5.38)

(ii) The fundamental current magnitudes on both sides of the lossless transformer
are related by the off-nominal tap, i.e.
I , = a I,. (5.39)
(iii) The d.c. voltage may be expressed in terms of the a.c. source commutating
voltage referred to the transformer secondary, i.e.

(5.40)
The converter a.c. source commutating voltage is the busbar voltage on the
system side of the converter transformer, Vterm.
(iv) The d.c. current and voltage are related by the d.c. system configuration,
f ( v d , Id) = 0, (5.41)
e.g. for a simple rectifier supplying a passive load,
v d - I d & = 0.
(v) The assumptions listed at the beginning of this section prevent any real power
of harmonic frequencies at the primary and secondary busbars. Therefore, the
real power equation relates the d.c. power to the transformer secondary power
in terms of fundamental components only, i.e.
VdId = Els COS II/. (5.42)
140 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

(vi) As the transformer is lossless, the primary real power may also be equated to
the d.c. power, i.e.
VdId = VtermIp cos 4. (5.43)
(vii) The fundamental component of current flow across the converter transformer can
be expressed as
I , = B, sin II/ - BtaVtem sin& (5.44)
where j B , is the transformer leakage susceptance.
So far, a total of seven equations have been derived and no other independent
equation may be written relating the total set of nine converter variables.
+
Variables I , , I,, E and can be eliminated as they play no part in defining control
specifications.
Thus, Equations (5.38), (5.39), (5.42) and (5.43)can be combined into
Vd - klaVterm COS 4 = 0, (5.45)
where kl = k ( 3 a / ~ r ) .
The final two independent equations required are derived from the specified control
mode.
The d.c. model may thus be summarized as follows:
B(z,Vtermlk = 0, (5.46)
where
R(1) = Vd - klavte, cos 4,

R(2) = Vd - klavtem C O S a + -J3rI d x , ,


N 3 )=f W d ?I d ) ,

R(4) = control equation,


R ( 5 ) = control equation,
and
= [vd,I d r a , cosa, $IT.
V,,, can either be a specified quantity or an ax. system variable. The equations for
Pdc and Qdc may now be written as:

Qterm(dc1 = V t e d p sin 4
= Vte,kla I d sin4 (5.47)
and

(5.48)
or
(5.49)
5.3 INCORPORATION OF HVDC TRANSMISSION 141

Incorporation of control equations Each additional converter in the d.c. system


contributes two independent variables to the system and thus two further constraint
equations must be derived from the control strategy of the system to define the operating
state. For example, a classical two-terminal d.c. link has two converters and, therefore,
requires four control equations. The four equations must be written in terms of the ten
d.c. variables (five for each converter).
Any function of the ten d.c. system variables is a valid (mathematically) control
equation so long as each equation is independent of all other equations. I n practice,
there are restrictions limiting the number of alternatives. Some control strategies refer
to the characteristics of power transmission (e.g. constant power or constant current),
other introduce constraints such as minimum delay or extinction angles.
Examples of valid control specifications are:
(i) Specified converter transformer tap,
a - -
- 0.
(ii) Specified d.c. voltage
Vd - vsp= 0.
(iii) Specified d.c. current
Id - Isp = 0.
(iv) Specified minimum firing angle
cos - cos a m i n = 0.
(v) Specified d.c. power transmission
Vdld - P:: = 0.
These control equations are simple and are easily incorporated into the solution
algorithm. In addition to the usual control modes, non-standard modes, such as spec-
ified a.c. terminal voltage, may also be included as converter control equations (see
section 5.3.3).
During the iterative solution procedure, the uncontrolled converter variables may go
outside pre-specified limits. When this occurs, the offending variable is usually held
to its limit value and an appropriate control variable is freed.
Inverter operation All the equations presented so far are equally applicable to
inverter operation. However, during inversion, it is the extinction advance angle ( y )
which is the subject of control action and not the firing angle a. For convenience,
therefore, equation R(2) of (5.46) may be written as

(5.50)
This equation is valid for rectification or inversion. Under inversion, v d , as calculated
by Equation (5.50), will be negative.
To specify operation with constant extinction angle, the following equation is used:
cos(7r - y ) - cos(7r - y ) = 0
where ysP is usually y minimum for minimum reactive power consumption of the
inverter.
142 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

5.3.2 Solution techniques


The converter model developed in section 5.3.1 is to be incorporated with a fast decou-
pled a s . load flow algorithm with the minimum possible modification of the latter in
order to retain its computational advantages.
The solution is first discussed with reference to a single converter connected to an
a.c. busbar. The extension to multiple or multiterminal d.c. systems is relatively trivial
and is discussed in section 5.3.4.
Unified solution [6,7] The unified method gives recognition to the interdependence
of a.c. and d.c. system equations and simultaneously solves the complete system.
Referring to Equation (5.33,the standard Newton-Raphson algorithm involves repeat
solutions of the matrix equation:

(5.51)

where J is the matrix of first order partial derivatives.

APterm = PSL - Pterm(ac) - Ptem(dc), (5.52)


AQterm = QZm - Qterm(aC) - Qterm(dc), (5.53)

and
Pterm(dc) = f(Vterm, (5.54)
Qterm (dc 1 = f ( Vterm 9 (5.55)
Applying the a.c. fast decoupled assumptions to all Jacobian elements related to the
a.c. system equations, yields:

(5.56)

where all matrix elements are zero unless otherwise indicated. The matrices [B] and
[B] are the usual single-phase fast decoupled Jacobians and are constant in value. The
other matrices indicated vary at each iteration in the solution process.
A modification is required for the element indicated as Byi in Equation (5.56). This
element is a function of the system variables and, therefore, varies at each iteration.
5.3 INCORPORATION OF HVDC TRANSMISSION 143

The use of an independent angle reference for the d.c. equations results in
aPterm(dc)/Wem = 0,
i.e. the diagonal Jacobian element for the real power mismatch at the converter terminal
busbar depends on the a.c. equations only and is, therefore, the usual fast decoupled
B element.
In addition,
aR/aOter, = 0,
which will help the subsequent decoupling of the equation.
In order to maintain the block successive iteration sequence of the usual fast decou-
pled a.c. load flow, it is necessary to decouple Equation (5.56). Therefore, the Jacobian
submatrices must be examined in more detail. The Jacobian submatrices are:
1
D D = -a APterml avterm
Vterm

( apterm (dc)/aVterm1-
1 1
- -(aptem(ac) /avteml+ -
Vterm Vterm
Following decoupled load flow practice
1
DD = 0 + -( a p t e m (dc)/aVterm 1 9
Vtem
and since
144 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

In the above formulation, the d.c. variables X are coupled to both the real and reactive
power ax. mismatches. However, Equation (5.56) may be separated to enable a block
successive iteration scheme to be used.
The d.c. mismatches and variables can be appended to the two fast decoupled a.c.
equations, in which case the following two equations result:

, (5.57)

(5.58)
AZ

The iteration scheme illustrated in Figure 5.5 is referred to as -PDC, QDC- and the
significance of the mnemonic should be obvious.
The algorithm may be further simplified by recognizing the following physical char-
acteristics of the a.c. and d.c. systems:

0 The coupling between d.c. variables and the ax. terminal voltage is strong.
0 There is no coupling between d.c. mismatches and a.c. system angles.
0 Under all practical control strategies, the d.c. power is well constrained and this
implies that the changes in d.c. variables j z do not greatly affect the real power
mismatches at the terminals. This coupling, embodied in matrix AA' of Equa-
tion (5.57) can, therefore, be justifiably removed.

These features justify the removal of the d.c. equations from Equation (5.57) to
yield a -P, QDC-block successive iteration scheme, represented by the following two
equations:
[ABIV] = [B'J[AS], (5.59)

Programming considerations for the unified algorithms In order to retain the


efficiency of the fast decoupled load flow, the B' and B" matrices must be factorized
only once before the iterative process begins.
The Jacobian elements related to the d.c. variables are non-constant and must be
re-evaluated at each iteration. It is, therefore, necessary to separate the constant and
non-constant parts of the equations for the solution routine.
5.3 INCORPORATION OF HVDC TRANSMISSION 145

(dc) and d.c. residuals ( R )


Calculate Pterm
1
Yes
- 1

b
I Form d.c. iacobian matrix 1 lP=11

Forward reduction of vector AFI V

Solve reduced equation for Pt,,, and A P

Back substitute for A 3

I
b m

I
I
UDdate Hand 8 1I
t
1 P=O ] I

+=
I Calculate A d(a.c. system only)
1
1
Calculate Qterm (d.c.) and d.c. residuals (A)

Forward reduction of vector AGI V


I

Solve reduced equation for V,,,, and AX


+ 1 No

I I
a I

t i
Figure 5.5 Flow chart for unified a.c.-d.c. load flow
146 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

Initially, the a.c. fast decoupled equations are formed with the d.c. link ignored
(except for the minor addition of the filter reactance at the appropriate a.c. busbar).
The reactive power mismatch equation for the ax. system is:

(5.61)

where
AQ:,,, = Q:, - Qterm(aC)is the mismatch calculated in the absence of the
d.c. converter,
and
B is the usual constant a.c. fast decoupled Jacobian.
After triangulation down to, but excluding, the busbars to which d.c. converters are

=m[
attached, Equation (5.61) becomes

[ (5*62)
--
where (AQ/V) and (AQterm/Vterm) signify that the left-hand side vector has been
processed and matrix B is the new matrix B after triangulation.
This triangulation (performed before the iterative process) may be achieved simply
by inhibiting the terminal busbars being used as pivots during the optimal ordering
process.
The processing of AQ indicated in the equation is actually performed by the standard
forward reduction process used at each iteration.
The d.c. converter equations may then be combined with Equation (5.62) as follows:

(5.63)
where

The unprocessed section, i.e.

[ (W+ K
AQ;iy)] -
BB
[A:;]
(5.64)

may then be solved by any method suitable for non-symmetric matrices.


The values of AX and AVtem are obtained from this equation and AVtermis then
used in a back substitution process for the remaining A T to be completed, i.e. Equation
(5.62) is solved for AV.
5.3 INCORPORATION OF HVDC TRANSMISSION 147

The most efficient technique for solving Equation (5.64) depends on the number
of converters. For six converters or more, the use of sparsity storage and solution
techniques is justified, otherwise all elements should be stored. The method suggested
here is a modified form of Gaussian elimination where all elements are stored but only
non-zero elements processed.

Sequential method [5,8] The sequential method results from a further simplification
of the unified method, i.e. the ax. system equations are solved with the d.c. system
modelled simply as a real and reactive power injection at the appropriate terminal
busbar. For a d.c. solution, the a.c. system is modelled simply as a constant voltage at
the converter ax. terminal busbar.
The following three equations are solved iteratively to convergence:

[ A F / v ] = [B][A8], (5.65)
[AQi/v] = [B][Av], (5.66)
[R] = [A][AT]. (5.67)

This iteration sequence, referred to as P , Q,DC,is illustrated in the flow chart of


Figure 5.6 and may be summarized as follows:

(i) CalculateAF/v, solve Equation (5.65) and update 8.


(ii) Calculate AD/v, solve Equation (5.66) and update 7.
(iii) Calculate d.c. residuals, R, solve Equation (5.67) and update E.
(iv) Return to (i).
With the sequential method, the d.c. equations need not be solved for the entire
iterative process. Once the d.c. residuals have converged, the d.c. system may be
modelled simply as fixed real and reactive power injections at the appropriate converter
terminal busbar. The d.c. residuals must still be checked after each a.c. iteration to
ensure that the d.c. system remains converged.
However, in order to establish a direct comparison between the unified and sequential
algorithms, the d.c. equations continue to be solved until both a s . and d.c. systems
have converged. This ensures that the sequential technique is an exact parallel of the
corresponding unified algorithm.
Alternatively, the d.c. equations can be solved after each real power as well as after
each reactive power iteration and the resulting sequence is referred to as P , DC,Q,
DC. As in the previous method, the d.c. equations are solved until all mismatches are
within tolerance.

5.3.3 Control of converter ax. terminal voltage


A converter terminal voltage may be specified in two ways:

(a) By local reactive power injection at the terminal. In this case, no reactive power
mismatch equation is necessary for that busbar and the relevant variable (i.e.
148 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

(all a.c. busbars)


-.
i Calculate A g(total svstem) and d.c. residuals Ti i
Yes

. i
Solve equation 5.65 and update (8)
t

1
* Converged
) and d.c. residuals R

Solve equation 5.i6 and update (8)

I
I Fl
1

Calculate d.c. mismatches

t
I Form d.c. jacobian matrix I
I
t
I Solve eauation 5.67 and udate K 1

LTJ P=Q=O

Figure 5.6 Flow chart for sequential a.c.-d.c. load flow

AV,,,) is effectively removed from the problem formulation. This is the situation
where the converter terminal busbar is a P-V busbar.
(b) The terminal voltage may be specified as a d.c. system constraint. That is, the d.c.
converter must absorb the correct amount of reactive power so that the terminal
voltage is maintained constant.
5.3 INCORPORATION OF HVDC TRANSMISSION 149

With the unified method, the equation


SP
Vterm - Vterm -
-0 (5.68)
is written as one of the two control equations. This would lead to a zero row in Equation
(5.67) and, therefore, during the solution of Equation (5.67) some other variable (e.g.
tap ratio) must be specified instead. Although d.c. convergence is marginally slower
for the PDC, QDC iteration, the d.c. system is overconverged in this iteration scheme
and the overall convergence rate is practically unaffected.
With the sequential method, Equation (5.68) cannot be written. The terminal busbar
is specified as a P-V busbar and the control equation
Q
m
r:; (dc) - Qterm (dc) = 0
is used, where Q&, (dc) is taken as the reactive power required to maintain the
voltage constant. The specified reactive power thus varies at each iteration and this
discontinuity slows the overall convergence.

5.3.4 Extension to multiple and/or muititerminal d.c. systems


The basic algorithm has been developed in previous sections for a single d.c. converter.
Each additional converter adds a further five d.c. variables and a corresponding set of
five equations. The number of a.c. system Jacobian elements which become modified
in the unified solutions is equal to the number of converters.
As an example, consider the system shown in Figure 5.7. The system represents the
North and South Islands of the New Zealand system, 220 kV a.c. system. Converters 1
and 2 form the original 600 MW, 500 kV d.c. link between the two islands. Converter 3
represents a 420 MW aluminium smelter. A further three-terminal d.c. interconnection
has been added (Converters 4,5 and 6 ) to illustrate the flexibility of the algorithm.

'd 2 'd 6
+ t

Figure 5.7 Multiterminal d.c. system


150 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

Normally, Converter 4 will operate in the rectifier mode with Converters 5 and 6 in
the inversion mode.
The reactive power d.c. Jacobian for the unified method has the structure, shown in
Figure 5.8, where BSOD is the part of B" which becomes modified. Only the diagonal
elements become modified by the presence of the converters.
Off diagonal elements will be present in BboD if there is any a.c. connection between
converter terminal busbars. All off diagonal elements of BB" and AA" are zero.
In addition, matrix A is block diagonal in 5 x 5 blocks with the exception of the
d.c. interconnection equations.
Equation R ( 3 ) of (5.46) in each set of d.c. equations is derived from the d.c. inter-
connection. For the six-converter system, shown in Figure 5.7, the following equations
are applicable.
vdi + v d 2 - Idl(Rd1 +
R d 2 ) = 0,

vd3 - = 0,
Id1 - Id2 = 0,
vd4 + v d 6 - l d 4 R d 4 - l d 6 R d 6 = 0,
vd5 - vd6 - I d s R d ~+ l d 6 R d 6 = 0 ,
I d 4 - I d s - I d 6 = 0.
This example indicates the ease of extension of the multiple converter case.

Avterrn 6

A
(30 x 30)

Figure 5.8 Matrix equation for a multi-terminal configuration


5.3 INCORPORATION OF HVDC TRANSMISSION 151

5.3.5 d.c. convergence tolerance

The d.c. p.u. system is based upon the same power base as the a.c. system and on
the nominal open circuit a.c. voltage at the converter transformer secondary. The p.u.
tolerances for d.c. powers, voltages and currents are, therefore, comparable with those
adopted in the a.c. system.
In general, the control equations are of the form

where X may be the tap or cosine of the firing angle, i.e. they are linear and are
thus solved in one d.c. iteration. The question of an appropriate tolerance for these
mismatches is, therefore, irrelevant.
An acceptable tolerance for the d.c. residuals which is compatible with the a.c.
system tolerance is typically 0.001 p.u. on a 100 MVA base, i.e. the same as that
normally adopted for the ax. system.

5.3.6 Test system and results


The A.E.P standard 14-bus test system is used to show the convergence properties
of the ax.-d.c. algorithms, with the a.c. transmission line between busbars 5 and 4
replaced by a HVDC link. As these two buses are not voltage controlled, the interaction
between the a.c. and d.c. systems will, therefore, be considerable.
Various control strategies have been applied to the link and the convergence results
for the various algorithms are given in Table 5.1. The number of iterations ( i , j ) should
be interpreted as follows:
0 i is the number of reactive power voltage updates required.
0 j is the number of real power angle updates.

Although the number of d.c. iterations varies for the different sequences, this is of
secondary importance and may, if required, be assessed in each case from the number
of a.c. iterations. In this respect, a unified QDC iteration is equivalent to a Q iteration
and a DC iteration executed separately.
The d.c. link data and specified controls for Case 1 are given in Table 5.2 and the
corresponding d.c. link operation is illustrated in Figure 5.9. The specified conditions
for all cases are derived from the results of Case 1. Under those conditions, the a.c.
system in isolation (with each converter terminal modelled as an equivalent a.c. load)
requires (4,3) iterations. The d.c. system in isolation (operating from fixed terminal
voltages) requires two iterations under all control strategies.

Unified cases The results in Table 5.1 show that the unified methods provide fast
and reliable convergence in all cases.
For the unified methods 1 and 2, the number of iterations did not exceed the number
required for the a.c. system alone.
152 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

Table 5.1 Convergence results


Case specification Number of iterations to convergence (0.1 M W M V A R )
Specified d.c. Unified methods Sequential methods
link constraints (5 variables)
(5 variables) (4 variables)
m-rectifier and
n-inverter end PDC.QDC2 P, QDC P.Q,DC2P.DC,Q,DC 1P,Q,DC2P,DC.Q.DC

1 UrnPdrnYnVdn 4,3 4,3 4,3 4.3 44 43


2 UmPdnian Vdn 4,3 43 494 5s 4,4 Failed
3 UmPdmanVdn 4,3 4.3 4,4 5,s 44 Failed
4 UmPdniYn vdri 4,3 4,3 4,4 44 4,4 44
5 UmPdrnYnan 4,3 43 494 44 4,4 494
6 amPdmUmYn 43 4,3 43 4,3 44 43
7 d Vdn
~ m I Yn 4,3 4,3 493 43 44 43
8 amVdmYnPdn 4,3 4,3 4-4 4,4 494 4-4
Case 1 with initial
condition errors
9 50 per cent error 4.3 4,3 44 4,3 4,4 43
10 80 per cent error 5,4' 6,5" 1,6* 5,4" 44 4-3
Where 'indicates a false solution.

Table 5.2 Characteristics of d.c. link


~ ~ ~~

Converter 1 Converter 2
a.c . busbar Bus 5 Bus 4
d.c. voltage base 1 0 0 kV 1 0 0 kV
Transformer reactance 0.126 0.0728
Commutation reactance 0.126 0.0728
Filter admittance Bi 0.478 0.629
d.c. link resistance 0.334a
Control parameters for Case 1
d.c. link power 5 8 . 6 MW -
Rectifier firing angle (deg) 7 -
Inverter extinction angle (deg) 10
Inverter d.c. voltage -1 2 8 . 8 7 kV
"Filters are connected to ax. terminal busbar.
Note: All reactances are in p,u. on a 100 MVA base.

Bus 5 Bus 4
V = 1.032
a=2.8% +Id =454.2 V = 1.061

I R = 0.334

0
-t P = 58.60
0 = 18.79
1
dvd

a = 7.0
= 129.022 Vd=-128.87$.

u = 17.32
y = 10.0
u = 10.33
P = -58.31
Q = 16.78
All angles are in degrees. D.C. voltages and current are in kV and Amp respectively.
D.C. resistance is in ohms. A.C. powers (P,Q)are in MW and MVARs.
-
Figure 5.9 d.c. link operation for Case 1
5.3 INCORPORATION OF HVDC TRANSMISSION 153

Sequential cases The sequential method ( P , Q, DC) produces fast and reliable
convergence although the reactive power convergence is slower than for the a.c. system
alone.
With the removal of the variable 4, &,(dc) converges faster but the convergence
pattern is more oscillatory and an overall deterioration of a.c. voltage convergence
results.
With the second sequential method (P, DC,Q, DC),convergence is good in all cases
except 2 and 3, i.e. the cases where the transformer tap and d.c. voltage are specified
at the inverter end. However, this set of specifications is not likely to occur in practice.

Initial conditions for d.c. system Initial values for the d.c. variables E are assigned
from estimates for the d.c. power and d.c. voltage and assuming a power factor of 0.9
at the converter terminal busbar. The terminal busbar voltage is set at 1.0 p.u. unless
it is a voltage controlled busbar.
This procedure gives adequate initial conditions in all practical cases as good esti-
mates of Pter,(dc) and V d are normally obtainable.
With starting values for d.c. real and reactive powers within 35096, which are
available in all practical situations, all algorithms converged rapidly and reliably (see
Case 9).
Effect of a.c. system strength In order to investigate the performance of the algo-
rithms with a weak a.c. system, the test system described earlier is modified by the
addition of two a.c. lines, as shown in Figure 5.10.
The reactive power compensation of the filters was adjusted to give similar d.c.
operating conditions as previously.
The number of iterations to convergence for the most promising algorithms are
shown in Table 5.3 for the control specifications corresponding to Cases 1 to 4 in the
previous results.
The different nature of the sequential and unified algorithms is clearly demonstrated.
The effect of the type of converter control is also shown. For Case 11, both the d.c.
real power and the d.c. reactive powers are well constrained by the converter control
strategy. Convergence is rapid and reliable for all methods.
In all other cases, where the control angle at one or both converters is free, an
oscillatory relationship between converter a.c. terminal voltage and the reactive power
of the converter is possible. This leads to poor performance of the sequential algorithms.
To illustrate the nature of the iteration, the convergence pattern of the converter
reactive power demand and the ax. system terminal voltage of the rectifier is plotted
in Figure 5.1 1.

Bus 5 Bus 4
ix
I
rl
0 Filters

s. Filters

Figure 5.10 d.c. link operating from weak a.c. system


154 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

Table 5.3 Numbers of iterations for a weak ax. system


Case specification xi = 0.3 X; = 0.4
rn -rectifier
n -inverter Unified Sequential Unified Sequential
P , QDC P , Q , DC P , QDC P , Q , DC
(i) (ii) (i) (ii)

(i) Using the five variable formulation; (ii) using the four variable formulation.

Q term
(MVAR) 1 $el?
-
28 -

26,-

24 - 0.96 1\
22 -
20 -
18 - o-.--
nnl Y I I I I I L
0 1 2 3 4 5 6 7

Q term A
(MVAR)
28 - 1.o
26 - 0.98

24 - 0.96
22 - 0.94
20 -

18 - 0.90
0.92 0 1 1 2 3 4

Figure 5.11 Convergence pattern for a.c.-d.c. load flow with weak ax. system. (a) Sequential
methods ( P , Q, DC five variable); (b) Unified method ( P , QDC)

A measure of the strength of a system in a load flow sense is the short circuit to
converter power ratio (SCR)calculated with all machine reactances set to zero. This
short circuit ratio is invariably much higher than the usual value.
In practice, converter operation has been considered down to an SCR of 3. A survey
of existing schemes shows that, almost invariably, with systems of very low SCR,some
5.3 INCORPORATION OF HVDC TRANSMISSION 155

form of voltage control, often synchronous condensers, is an integral part of the converter
installation. These schemes are, therefore, often very strong in a load flow sense.
It may, therefore, be concluded that the sequential integration should converge in all
practical situations although the convergence may become slow if the system is weak
in a load flow sense.
Discussion of convergence properties The overall convergence rate of the
ax.-d.c. algorithms depends on the successful interaction of the two distinct parts.
The a.c. system equations are solved using the well-behaved constant tangent fast
decoupled algorithm, whereas the d.c. system equations are solved using the more
powerful, but somewhat more erratic, full Newton-Raphson approach.
The powerful convergence of the Newton-Raphson process for the d.c. equations
can cause overall convergence difficulties. If the first d.c. iteration occurs before the
reactive power voltage update, then the d.c. variables are converged to be compat-
ible with the incorrect terminal voltage. This introduces an unnecessary discontinuity
which may lead to convergence difficulties in the sequential method. In the unified
approach, the powerful convergence of the d.c. equations is dampened by the reflec-
tion of the a.c. mismatches onto the changes in d.c. variables. This gives faster and
better behaved convergence. The solution time of the d.c. equations is normally small
compared with the solution time of the a.c. equations. The relative efficiencies of the
alternative algorithms may, therefore, be assessed by comparing the total numbers of
voltage and angle updates.
In general, those schemes which acknowledge the fact that the d.c. variables are
strongly related to the terminal voltage give the fastest and most reliable performance.
The unified methods are the more reliable and the P,QDC solution is the most efficient.
Of the sequential methods, the (P,Q,D C ) solution is only marginally inferior to the
unified method.
When the busbar to which the converters are attached is voltage controlled (as is
often the case) the two approaches become virtually identical as the interaction between
ax. and d.c. systems is much smaller.
The only computational difference between a unified and a comparable sequential
iteration is that the d.c. Jacobian equations for the unified method (Equation (5.64))
is slightly larger. The difference is one additional row and column for each converter
present. In terms of computational cost per iteration, the corresponding unified and
sequential algorithms are virtually identical.

(i) In cases where the a.c. system is strong, both the unified and sequential algorithms
may be programmed to give fast and reliable convergence.
(ii) If the a.c. system is weak, the sequential algorithm is susceptible to convergence
problems. Thus, in general, the unified method id recommended due to its greater
reliability.

5.3.7 Numerical example


The complete New Zealand primary transmission system was used as a basis for a
planning study which included an extra multiterminal HVDC scheme, i.e. involving
six converter stations, as illustrated in Figure 5.7.
156 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

Representative input and output information obtained from the computer is given in
the following pages.

DEPARTYENT OF ELECTRICAL k ELECTRONIC ENCINEER.ING. UNIVERSITY OF CANTERBURY, NEV ZEALAND

SYSTEM NO. 3 23 YAR 90

XAIIYUN NUYBU OF ITEUTIONS 10


POVEL TOLELANCE 0.00100
PRINT WT INDICAML 000000000 NUIBEL OF BUSES 114
SYSTEI YVA BASE 100.00 NUIBEL OF LINES 206
D.C. L W T INDICATOR 6 NUIBER OF TUNSFUPlERS 19
NUIBER OF A.C. SYSTENS 2
SLACK BUSBALS 80 218

B U S D A T A

LOAD CENEUTION IINIYU IAXIXUY SHUNT


BUS NAYE TYPE VOLTS IV IVB nv EVIL IVAL IVAL SUSCEPTANCE

104 AVIEIOIE-220 1 1.0520 0.00 0.00 220.00 -34.40 -500.00 500.00 0.OOO
108 BDINOILE-220 1 1.0520 97.20 0.00 540.00 46.60 -500.00 500.00 0.000
118 BUY-220 0 1.0030 329.60 95.80 0.00 0.00 0.00 0.00 O.Oo0
127 CWIl-220 0 1.0520 0.00 0.00 0.00 0.00 0.00 0.00 0.000
128 CUJMZ-220 0 1.0520 0.00 0.00 0.00 0.00 0.00 0.00 0.000

129 CLUTAA-220 1 1.0300 0.00 0.00 600.00 0.00 0.00 0.00 0.000
138 CMLDINE220 0 1.0210 0.00 0.00 0.00 0.00 0.00 0.00 0.000
143 HyBS---220 0 1.0270 95.30 80.40 0.00 0.00 0.00 0.00 0.OOO

LINE D A T A

BUS NAME BUS NAIE LESISTANQ LEACTANCE SUSCEPTANCE

104 AVIEIOIE-220 108 BENYORE-220 0.00330 0.01630 0.02298


104 AVIEIOIE-220 108 BENIOLE-220 0.00330 0.01530 0.02298
104 AVIEMOIE-220 268 VAITAKI-220 0.00150 0.00730 0.01052
108 BENOS220 255 TVIZEL-220 0.00370 0.02610 0.06954
118 BUY-220 167 ISLINGTON220 0.00210 0.01651 0.05285

118 BUY-220 181 LANILM2-220 0.00110 0.00861 0.02751


127 CUJMl-220 218 1OXBuICH-220 0.00770 0.04450 0.07251
127 CUJI1-220 255 TVIZEd-220 0.00820 0.09260 0.16746
128 cu)I2-220 218 ROXBUILCH-220 0.00770 0.04450 0.07251
128 CUlU2-220 255 TVIZEG-220 0.00820 0.09260 0.16746
5.3 INCORPORATION OF HVDC TRANSMISSION 157

T l A N S F O I I E I D A T A

BUS NAME BUS NAME LESISTANCE IEACTMCE TAP CODE

6 BWTHOlPEl10 7 BWTHWE220 0.00400 0.09560 1.OW 0


6 BWrmOlF'ElIO 7 BIRITHOlPE220 0.00400 0.09560 1.OW 0
6 BIRITHOlPEl10 7 BWTHOlPM20 0.00170 0.04SW 1.ooO 0
10 EDCECOIBEIlO II EDGUXnBEZZO 0.00400 0.09560 1.OOo 0
10 EDCECOMBEllO II EDCECOMBE220 0.00400 0.09560 1.ooO 0
21 HAWAIIIS-I10 22 HAWANIS-220 0.00170 0.05140 1.040 0
21 HAYWAIDS-110 22 HAWANIS-220 0.00170 0.05140 1.000 0
2 1 HAWALDS-I10 22 HAWANIS-220 0.00410 0.10120 1.000 0
?I HIWhM5-110 22 HAWAMS-220 0.004 I0 0.10120 1.OOo 0
23 HFNDEISON110 24 HENDEISONZ20 0.00090 0.01840 1.053 0
39 IAlSDEN-IIO 40 IAlSDW-220 o.oo0oo 0.05500 1.OOO 0
39 MAUDEN-IIO 40 IAISDM-220 0.00000 0.05500 1.OW 0
48 HEVPLYI7HlIO 49 NEWLTITY220 0.00080 0.02480 1.OW 0
54 OTAHIJW-I10 55 OTAWUlN-220 0.00700 0.04100 1.000 0
54 OTAHIJW-I10 55 OTAHWU-220 0 00700
I 0.04100 l.OW 0
54 MAHIJW-I10 55 OTARllWU-220 0.00160 0.04550 1.000 0
58 PMIOSE-IIO 59 PEIROsc220 0.000w 0.02750 1.OW 0
62 STLATSOLDIIO 63 STUtfUlD220 0.00200 0.05260 1.ooO 0
66 TUUTENGAIIO 67 TAIUTI)IGAZ20 0.00080 0.02530 1.OOO 0

WUhTIUNS
. l ~ l D l .III2-1D3 .III3-ID4 .IDI-IDS .IIIS-IW .LD6-1D7 .III7-ID8 .IIIB-IW .NI9-IDlO .u)lO=O
I r ~ ~ ~ + Y M + V D 5 r V W + Y D 7 * V D ~ W 9 + Y DIIII-ID2

,
I I 0 0 0 0 0 0 0 0 25.5800 o.oo00 0 . m o.oo00 o.oo00 o.oo00 o.oo00 o.oo00 o.Ooo0 o.oo00
# 1 0 0 0 0
8 @ 0 1 0 1 0 0 0 0
0 0 0 0.0000 o.Ooo0 0.0019 o.oo00 o.oo00 o.oo00 o.oo00 o.oo00 o.oo00 o.oo00
o.oo00 o.oo00 o.ooO0 1o.oooo 0.M)Oo 2o.oooo o.oo00 o.oo00 o.oo00 o.oo00
8 @ 0 0 I -1 0 0 0 0 0.0000 0.OOOO 0.0000 O.oO00 3.oo00-20.oooO 0.0000 O.oo00 O.oo00 O.Oo0o

~,~~kID4+IDS+IDb+ID7+ID8~ID9+IDlO:O
1-1 0 0 0 0 0 0 0 0

~)~~IDkiD4+ID5rIW+I7+lD8+ID9+IDlO~O
) ( O 1 - 1 4 0 0 0 0

pC CONVEITEI WlBEl 1 INPUT DATA PC CONVEXTU WMBEl 6 lNPWf

CONVElTEl ATTACHED TO BUS NUIBEI I08 co1(yElTEl ATTACHED To BUS N U I B U 7

NOMINAL DC VOLTAGE l10.00oOo NOIINAL DC VOLTAGE 90 * 00000


I A X I I U I DC VOLTAGE 150.00000 IAIINI DC VOLTAGE 140.00000
MINIIUI DC VOLTAGE 0.00000 MINIllll DC VOLTAGE 0.00000
IAIIIUI DC CUuEm O.oo00 I A I I N I DC CUUENI 0.0000

COMIUTATION UACTAWCE (P.U.) 0.08970 COIIVIATIMI LEICIANCE (P.U.) 0.07000


N N S F W E l LEIcIANlZ (P.U.) 0.08970 hlNslolIll UACTANQ (?.U.) 0,07000
FIIINC MCLE:MINIIW (Dffi) 10.00000 FILING AffiU:MINIIUI (DED) 8.o0000
MAIIIW (OK) 110.00000 IAIIIUI (DED) 150.00000
RUlSMUEl TAP:IINIIUI (P.C.)

-
0.00000 T U N S M U U T Y : I I N I I U I (P.C.)

-
0.00000
MAIIIUI (P.C.) 0.00000 IAXIIUI (P.C.) 0.00000
INQEIFN 0.00000 INCWEW o.Ooo00
FILTEL UACTANWCE (P.U.) I .m F I L T U IEACTANCE ( P . U . ) 0.70000
WUIBEI OF BUDGES I N SEIIES 4 WIBU OF WIDGES IN SUlEs 2

ComElTot P O ~ I FACIOI CONVUTU POW FACT01


Dc LINT VOLTAGE (KV) DC Llm VOLTACE (KV) -220.00000
CONVEllUl C O W L ANGLE 10.00000 COwVUTEl COwTlOL AWCLE 8.00000
NNSFOUEI TAP T U N S M U U TAP
CowVEIlEl Dc POVEI ( I V ) 500.00000 CONVUIU. DC POVU (IV)
T E U I N A L IEACIIVE P
O W (IVAI) TEUINAL IEACTIYE POYE1 (IVAI)
AC TEUINAL VOLTACE ( K V ) AC m l I N A L VOLTAGE (KV)
W N V U I U DC CUuEIlf (KA) CONVUTEI DC CVuEnr (KA)
158 5 LOAD FLOW UNDER POWER ELECTRONIC CONTROL

SOLUTION CONYEICED IN 7 P-D ANTI 6V-Q ITERATIONS

WAD CE)IEUTION AC W S S S IISIATCH SWVMS


IV IVAl W IVAL IV IVN IV #VAL IVM

4496.80 1518.60 5226.58 791.80 194.91 -306.06 534.87 -182.89 37.85

@'ELATING STATE OF COIwELTEl Q WICM IS AlTACWED M BUS 7 (BUNTHOlPE220)

CONVELlEL IS OPEUTING IN THE MVELTION NODE


TKE CUKfLOL ANGLE IS TKE EXTINCTION ADVANCE ANGLE
DC p m SUPPLIEDm THE AC SYSTEI = IV
CDNVEIIEI AC VOLTACE TUNSMUE1 TAP CONTML ANGLE COIImATION ANGLE DC C W T DC VOLTAGE
(Y-VOLTS) (PEL CENT) (DW (DGS) (K-ANPS) (I(-VOLTS)

87.94 -8.26 8.00 22.45 I .406 -220.00

W L TUNSFEQ
LIM TUIINAL POVEL = -309.23 IV 207.61 IVAL
no1 TUNSFDUEL M COmFITEI = -309.23 IV 125.89 IVAt
REACTIVE P D V U OF FILTElS = 142.86 IVAL

BUS DATA
CENEMTION MAD SHUNT
BUS NAlE VOLTS ANGLE IV IVAl IV IVAl IVAL BUS NAIE W IVN

104 AVIEIOU-220 1.052 4.78 220.00 -33.87 0.00 0.00 0.00


108 ~ ~ ~ 1 0 ~ 41.89
~ 2 2 -10.17
0
108 BENIOLC220 41.89 -10.17
268 VAITAKI-220 136.22 -13.53
IISIATCH o.oO0 o.Oo0
108 BMIOLC-220 1.052 4.43 540.00 -88.04 97.20 0.00 0.00
104 AVIEIDlE-220 41.83 7.88
104 AVIEIOU-220 -41.83 7.88
255 W 1 2 E 6 2 2 0 26.47 6.87
IISIAtCW 5OO.oO0 -110.672
118 BUY-220 0.968 -12.95 0.00 0.00 329.60 95.80 0.00
167 ISLINCMN220 -120.18 -76.16
181 LAhDf02-220 -209.41 -19.64
IISIATCU 4.019 4.002

5.4 References
1. Fuertes-Esquivel, C R and Acha, E, (1996). Newton-Raphson algorithm for the reliable solu-
tion of large power networks with embedded FACTS devices, Proceedings of the IEE on
Generation, Transmission and Distribution, 143 (3,pp. 447-453.
2. Fuertes-Esquivel, C R, Acha, E and Ambriz-Perez, H, (1998). A thyristor controlled series
compensator model for the power flow solution of practical power networks, IEEE Trunsuc-
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