PD - 96896

AUTOMOTIVE MOSFET
IRLR3705Z
IRLU3705Z
Features
lLogic Level HEXFET Power MOSFET
lAdvanced Process Technology
D
lUltra Low On-Resistance

l175C Operating Temperature

VDSS = 55V
lFast Switching

lRepetitive Avalanche Allowed up to Tjmax RDS(on) = 8.0m

G
Description
Specifically designed for Automotive applications, ID = 42A
S
this HEXFET Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this design are a 175C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating . These features com-
bine to make this design an extremely efficient and
reliable device for use in Automotive applications
and a wide variety of other applications. D-Pak I-Pak
IRLR3705Z IRLU3705Z
Absolute Maximum Ratings
Parameter Max. Units
I D @ T C = 25C Continuous Drain Current, V GS @ 10V (Silicon Limited) 89
I D @ T C = 100C Continuous Drain Current, V GS @ 10V 63 A
I D @ T C = 25C Continuous Drain Current, V GS @ 10V (Package Limited) 42
I DM Pulsed Drain Current c 360
P D @T C = 25C Power Dissipation 130 W
Linear Derating Factor 0.88 W/C
V GS Gate-to-Source Voltage 16 V
E AS (Thermally limited) Single Pulse Avalanche Energyd 110 mJ
E AS (Tested ) Single Pulse Avalanche Energy Tested Value h 190
I AR Avalanche Current c See Fig.12a, 12b, 15, 16 A
E AR Repetitive Avalanche Energy g mJ
TJ Operating Junction and -55 to + 175
T STG Storage Temperature Range C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting Torque, 6-32 or M3 screw y
10 lbf in (1.1N m)y
Thermal Resistance
Parameter Typ. Max. Units
R JC Junction-to-Case j 1.14
R JA Junction-to-Ambient (PCB mount) ij 40 C/W
R JA Junction-to-Ambient j 110
HEXFET is a registered trademark of International Rectifier.
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IRLR/U3705Z
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 V VGS = 0V, ID = 250A
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient 0.053 V/C Reference to 25C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance 6.5 8.0 m VGS = 10V, ID = 42A e
11 VGS = 5.0V, ID = 34A e
12 VGS = 4.5V, ID = 21A e
VGS(th) Gate Threshold Voltage 1.0 3.0 V VDS = VGS, ID = 250A
gfs Forward Transconductance 89 S VDS = 25V, ID = 42A
IDSS Drain-to-Source Leakage Current 20 A VDS = 55V, VGS = 0V
250 VDS = 55V, VGS = 0V, TJ = 125C
IGSS Gate-to-Source Forward Leakage 200 nA VGS = 16V
Gate-to-Source Reverse Leakage -200 VGS = -16V
Qg Total Gate Charge 44 66 ID = 42A
Qgs Gate-to-Source Charge 13 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge 22 VGS = 5.0V e
td(on) Turn-On Delay Time 17 VDD = 28V
tr Rise Time 150 ID = 42A
td(off) Turn-Off Delay Time 33 ns RG = 4.2
tf Fall Time 70 VGS = 5.0V e
LD Internal Drain Inductance 4.5 Between lead, D

nH 6mm (0.25in.)
G
LS Internal Source Inductance 7.5 from package
S
and center of die contact
Ciss Input Capacitance 2900 VGS = 0V
Coss Output Capacitance 420 VDS = 25V
Crss Reverse Transfer Capacitance 230 pF = 1.0MHz
Coss Output Capacitance 1550 VGS = 0V, VDS = 1.0V, = 1.0MHz
Coss Output Capacitance 320 VGS = 0V, VDS = 44V, = 1.0MHz
Coss eff. Effective Output Capacitance 500 VGS = 0V, VDS = 0V to 44V f
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current 42 MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current 360 integral reverse
(Body Diode) c p-n junction diode.
VSD Diode Forward Voltage 1.3 V TJ = 25C, IS = 42A, VGS = 0V e
trr Reverse Recovery Time 21 42 ns TJ = 25C, IF = 42A, VDD = 28V
Qrr Reverse Recovery Charge 14 28 nC di/dt = 100A/s e
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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 IRLR/U3705Z

1000 1000
VGS VGS
TOP 12V TOP 12V
10V 10V
ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
5.0V 5.0V
4.5V 4.5V
3.5V 3.5V
100 3.0V 100 3.0V
BOTTOM 2.8V BOTTOM 2.8V

2.8V
10 10
2.8V

60s PULSE WIDTH 60s PULSE WIDTH

Tj = 25C Tj = 175C
1 1
0.1 1 10 100 0.1 1 10 100

VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000.0 100

TJ = 25C TJ = 25C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current()

80
TJ = 175C
100.0

60
TJ = 175C

40
10.0

VDS = 15V 20
VDS = 8.0V
60s PULSE WIDTH
1.0 380s PULSE WIDTH
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 0
0 10 20 30 40 50 60 70 80
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

vs. Drain Current
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 IRLR/U3705Z

5000 12
VGS = 0V, f = 1 MHZ ID= 42A
Ciss = Cgs + Cgd, Cds SHORTED
VDS = 44V

VGS, Gate-to-Source Voltage (V)

Crss = Cgd 10
4000 VDS= 28V
Coss = Cds + Cgd
VDS= 11V
C, Capacitance (pF)

8
3000 Ciss

2000
4

1000 2
Coss
Crss
0
0
1 10 100 0 20 40 60 80 100
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Fig 6. Typical Gate Charge vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000.0 10000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)

1000
100.0
TJ = 175C

100
100sec
10.0

10 1msec
TJ = 25C
1.0 10msec
1 Tc = 25C
Tj = 175C
VGS = 0V Single Pulse
DC
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 1 10 100

VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRLR/U3705Z

100 2.5
ID = 42A

RDS(on) , Drain-to-Source On Resistance

LIMITED BY PACKAGE
VGS = 10V
80
2.0
ID , Drain Current (A)

60

(Normalized)
1.5
40

1.0
20

0
0.5
25 50 75 100 125 150 175
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
TC , Case Temperature (C)
TJ , Junction Temperature (C)

Fig 9. Maximum Drain Current vs. Fig 10. Normalized On-Resistance

Case Temperature vs. Temperature

10
Thermal Response ( Z thJC )

1
D = 0.50

0.20
R1 R2
0.1
0.10 R1 R2 Ri (C/W) i (sec)
J C
0.05 J 0.6984 0.000465
1 2
0.02 1 2 0.4415 0.004358
0.01 Ci= i/Ri
0.01 Ci i/Ri

Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRLR/U3705Z

500
15V

EAS, Single Pulse Avalanche Energy (mJ)

ID
TOP 5.3A
DRIVER
400 7.0A
VDS L
BOTTOM 42A

RG D.U.T + 300
V
- DD
IAS A
VGS
20V
tp 0.01 200

Fig 12a. Unclamped Inductive Test Circuit

V(BR)DSS 100
tp

0
25 50 75 100 125 150 175

Starting TJ, Junction Temperature (C)

I AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
QG

10 V
QGS QGD 2.5
ID = 250A
VGS(th) Gate threshold Voltage (V)

VG ID = 150A
2.0
ID = 50A

Charge 1.5

Fig 13a. Basic Gate Charge Waveform

1.0

0.5
L
VCC
DUT
0 0.0
1K -75 -50 -25 0 25 50 75 100 125 150 175

TJ , Temperature ( C )

Fig 13b. Gate Charge Test Circuit Fig 14. Threshold Voltage vs. Temperature
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 IRLR/U3705Z

1000

Duty Cycle = Single Pulse

100
Allowed avalanche Current vs
Avalanche Current (A)

avalanche pulsewidth, tav

0.01
assuming Tj = 25C due to
avalanche losses. Note: In no
10 0.05 case should Tj be allowed to
0.10 exceed Tjmax

0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

120 Notes on Repetitive Avalanche Curves , Figures 15, 16:

TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
100 ID = 42A Purely a thermal phenomenon and failure occurs at a
EAR , Avalanche Energy (mJ)

temperature far in excess of Tjmax. This is validated for

every part type.
80
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
60
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
40 avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
20 6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25C in Figure 15, 16).
0 tav = Average time in avalanche.
25 50 75 100 125 150 175 D = Duty cycle in avalanche = tav f
Starting TJ , Junction Temperature (C) ZthJC(D, tav) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3BVIav) = DT/ ZthJC

Fig 16. Maximum Avalanche Energy Iav = 2DT/ [1.3BVZth]
vs. Temperature EAS (AR) = PD (ave)tav
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IRLR/U3705Z

Driver Gate Drive

P.W.
D.U.T P.W.
Period D=
Period
+

*
VGS=10V
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
- Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
Recovery Body Diode Forward
-
+ Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

RG dv/dt controlled by RG VDD Re-Applied

Driver same type as D.U.T. + Voltage Body Diode Forward Drop
ISD controlled by Duty Factor "D" - Inductor Curent
D.U.T. - Device Under Test

Ripple 5% ISD

* VGS = 5V for Logic Level Devices

Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET Power MOSFETs

RD
VDS

VGS
D.U.T.
RG
+
-VDD

10V
Pulse Width 1 s
Duty Factor 0.1 %

Fig 18a. Switching Time Test Circuit

VDS
90%

10%
VGS
td(on) tr t d(off) tf

Fig 18b. Switching Time Waveforms

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 IRLR/U3705Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)

2.38 (.094)
6.73 (.265) 2.19 (.086)
6.35 (.250) 1.14 (.045)
0.89 (.035)
-A-
5.46 (.215) 1.27 (.050) 0.58 (.023)
5.21 (.205) 0.88 (.035)
0.46 (.018)

6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235) 10.42 (.410)
1.02 (.040) 9.40 (.370) LEAD ASSIGNMENTS
1.64 (.025) 1 2 3
1 - GATE
0.51 (.020) 2 - DRAIN
-B- MIN. 3 - SOURCE
1.52 (.060) 4 - DRAIN
1.15 (.045)
0.89 (.035)
3X
0.64 (.025) 0.58 (.023)
1.14 (.045) 0.46 (.018)
2X 0.25 (.010) M A M B
0.76 (.030)

2.28 (.090) NOTES:

1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
4.57 (.180) 2 CONTROLLING DIMENSION : INCH.
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).

D-Pak (TO-252AA) Part Marking Information

EXAMPLE: THIS IS AN IRFR120

PART NUMBER
WITH AS SEMBLY INTERNATIONAL
LOT CODE 1234 RECTIFIER IRFR120 DAT E CODE
ASS EMBLED ON WW 16, 1999 LOGO 916A YEAR 9 = 1999
IN THE AS SEMBLY LINE "A" 12 34 WEEK 16
N ote: "P" in ass embly line LINE A
AS SEMBLY
pos ition indicates "Lead-Free"
LOT CODE

OR
PART NUMBER
INTERNAT IONAL
RECT IFIER IRFR120 DATE CODE
LOGO P916A P = DES IGNAT ES LEAD-FREE
12 34 PRODUCT (OPTIONAL)
YEAR 9 = 1999
ASS EMBLY WEEK 16
LOT CODE
A = ASS EMBLY SITE CODE

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IRLR/U3705Z
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)

6.73 (.265) 2.38 (.094)

6.35 (.250) 2.19 (.086)
-A-
1.27 (.050) 0.58 (.023)
5.46 (.215)
0.88 (.035) 0.46 (.018)
5.21 (.205)
LEAD ASSIGNMENTS
4 1 - GATE
6.45 (.245) 2 - DRAIN
5.68 (.224) 3 - SOURCE
1.52 (.060) 6.22 (.245) 4 - DRAIN
1.15 (.045) 5.97 (.235)

1 2 3

-B- NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2.28 (.090) 9.65 (.380) 2 CONTROLLING DIMENSION : INCH.
1.91 (.075) 8.89 (.350) 3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).

1.14 (.045) 1.14 (.045)

3X 0.89 (.035)
0.76 (.030) 3X 0.89 (.035)
0.64 (.025)

2.28 (.090) 0.25 (.010) M A M B 0.58 (.023)

0.46 (.018)
2X

I-Pak (TO-251AA) Part Marking Information

EXAMPLE: T HIS IS AN IRFU120 PART NUMBER
INT ERNAT IONAL
WIT H AS S EMBLY
RECT IFIER IRFU120 DAT E CODE
LOT CODE 5678
LOGO 919A YEAR 9 = 1999
AS S EMBLED ON WW 19, 1999
56 78 WEEK 19
IN T HE AS SEMBLY LINE "A"
LINE A
AS S EMBLY
Note: "P" in ass embly line
LOT CODE
pos ition indicates "Lead-Free"

OR

PART NUMBER
INT ERNAT IONAL
RECT IFIER IRFU120 DAT E CODE
LOGO P = DES IGNAT ES LEAD-FREE
56 78 PRODUCT (OPT IONAL)
YEAR 9 = 1999
AS S EMBLY WEEK 19
LOT CODE A = AS S EMBLY S ITE CODE

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 IRLR/U3705Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL

16.3 ( .641 ) 16.3 ( .641 )

15.7 ( .619 ) 15.7 ( .619 )

12.1 ( .476 ) FEED DIRECTION 8.1 ( .318 )

FEED DIRECTION
11.9 ( .469 ) 7.9 ( .312 )

NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.

Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25C, L = 0.12mH Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
RG = 25, IAS = 42A, VGS =10V. Part not
recommended for use above this value.
Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
R is measured at TJ approximately 90C

Data and specifications subject to change without notice.

This product has been designed for the Automotive [Q101] market.
Qualification Standards can be found on IRs Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.9/04
www.irf.com 11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/