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Project3.

8 - Circuit1 - Layout Thursday, June 07, 2012

Port1

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Project3.8 - Circuit1 - Layout Thursday, June 07, 2012

Port2

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Project3.8 - Circuit1 - Layout Thursday, June 07, 2012

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Project3.8 - Circuit1 - Layout Thursday, June 07, 2012

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Project3.8 - Circuit1 - Layout Thursday, June 07, 2012

Stackup
Name Material Thickness Lower Level Roughness
Trace copper 0.675mil 19.6625mil 0mil
Dielectric Rogers RT/duroid 5880 (tm) 20mil 0mil 0mil
Ground copper 0mil 0mil 0mil
Layers
Pattern Name Type
Measures measures
Rats rat
Errors error
Symbols symbol
Assembly assembly
Silkscreen silkscreen
Trace signal
Dielectric dielectric
Ground metalizedsignal
Wirebonds wirebond

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