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5 4 3 2 1

01
PCB STACK UP
LAYER 1 : TOP
Shasta_NZ2 BLOCK DIAGRAM
LAYER 2 :VCC
LAYER 3 : IN1 AM3 socket
LAYER 4 : IN2
D D
LAYER 5 :GND DDRIII 1066/1333 MT/s
DDRIII-SODIMM0
LAYER 6 : Bottom CPU
AMD
DDRIII-SODIMM1 DDRIII 1066/1333 MT/s
Athlon II
27MHz
VBIOS ROM
1MB

HT-LINK
AMD 64 Bit LCD CONN
PEG
CEDAR PRO
North Bridge 631FCBGA
CRT CONN

AMD DDR3 512MB VRAM For Debug

RS880M LCD CONN

CRT CONN
C
For Debug C

A-Link 32.768KHz 25MHz

30 Pin
30 Pin
SATA Gen2
SATA - 3.5" HDD
USB Card Reader
6 in 1 CON
South Bridge Camera WLAN/BT RTS5159
SATA - CD-ROM
SATA Gen2 AMD
SB820M USB2.0 Wire ForIR Receiver
IR Receiver

32.768KHz USB2.0 Ports Touch Con


X4
HeadPhone

ITE KBC PCI-E


Keyboard Conn. LPC MIC
B B
For Debug ITE8512NX
Mini PCI-E LAN Mini PCI-E I/O Board
Card Card
25MHz
RTL81111
WLAN/BT GIGA LAN TV 8 Pin

Wire
USB CONN X2
FAN EC ROM
CONN 1MB
RJ45 B-CAS
Azalia

ForIR Blaster Audio Codec Jack to


IR Blaster SPI ROM HP and MIC
2MB RTL ALC269 VB5
Sonic Focus

INT LINEOUT
MIC CONN

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
System Block Diagram
Date: Friday, July 02, 2010 Sheet 1 of 41
5 4 3 2 1
5 4 3 2 1

01--SYSTEM BLOCK DIAGRAM


02--PAGE SHEET & POWER SEQUENCE
NZ2 AM3 platform Power on Seqeunce

NBSWON#
02
03--AM3 CPU HT & DEBUG S5_PWR_ON

04--AM3 CPU MEMORY 5V_S5

05--AM3 CPU CONTROL & MISC 3V_S5


1.2V_S5_USB
06--AM3 CPU PWR & GND 1.1V_S5
D
07--RS880M-HT LINK I/F D

08--RS880M-PCIE I/F RSMRST#

09--RS880M-SYSTEM I/F T1
From EC
10--RS880M-SPMEM/STRAPS DNBSWON#

11--RS880M-POWER SUSB#/SUSC#
T2

12--SB820M-PCIE/PCI/CPU/LPC SUSON
13--SB820M-ACPI/GPIO/USB 5VSUS

14--SB820M-SATA/IDE/HWM/SPI 1.5VSUS T8
15--SB820M-PWR/DECOUPLING MAINON_1
16--SB820M-STRAPS/PWRGD
T3
17--DDR3 CHA DIMM 0 VCC12
18--DDR3 CHB DIMM 1 VCC5
(The difference voltage should not be over 2.1V *0 <(+3.3V) - (+1.8v) < 2.1*)
19--CEDAR-S3_PCIE Interface VCC3
VCC1.8 Group A
20--CEDAR-S3_Main MAINON_2
21--CEDAR-S3_GND / LVDS/ Straps T4
VCC2.5
22--CEDAR-S3_Power_and_NC VCC1.5

C
23--CEDAR-S3/MEM Interface SMDDR_VTERM
C

24--CEDAR_VRAM (DDR3 BGA96) VGA_CORE


25--Panel (LVDS) VCC1.8_VGA

26--EC ITE 8512N/FLASH VCC1.5_VGA


VCC1.0_VGA
27--Audio Codec(ALC269)
28--LAN RTL8111 VRON
29--SATA HDD/ODD/FAN/HOLE CPU_CORE

30--MINI PCIE (WLAN/TV/IR/IO) NBCORE


T5

31--USB/CCD/TOUCH/CRT VRON_DELAY
Group B

32--AMD AM3 CPUCORE(NCP5293) T6


VCC1.2
33--CPU DRIVER
VCC1.1
34--NBCORE (RT8209A), 1.1V_S5
35--System +5V/+3V (RT8206B) VCC_NB
From DC/DC
36--DDR_1.5VSUS (TPS51116) HWPG
37--VGACORE (RT8208/1.8V) From EC
38--LDO/VDDA/+1.8V/0.9V PWROK_EC

39--ACIN/+12V(NCP1589A) T7
From SB
NB_PWRGD
B 40--DISCHARGE From SB B

LDT_PG
41--CHANGE LIST From EC
KBRST#
From SB
A_RST#/PCIRST#
From SB
LDT_RST#

T1: S5_PWR_ON TO RSMRST# 20ms


T2: RSMRST# TO DNBSWON# 50ms
T3:SUSON TO MAIN1ON_1 5ms
T4:MAINON_1 to MAINON_2 2ms
T5:MAINON_2 to VRON 30ms
T6:VRON to VRON_DELAY 12ms
T7:HWPG to PWROK_EC 30ms
T8:SUSB#/SUSC# to SUSON 10ms

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
PAGE SHEET & POWER SEQUENCE
Date: Friday, July 02, 2010 Sheet 2 of 41
5 4 3 2 1
5 4 3 2 1

CPU HyperTransport and Debug 03


U19A

(7) HT_CLKINP1 N6 AD5 HT_CLKOUTP1 (7)


D L0_CLKIN_H1 L0_CLKOUT_H1 D
(7) HT_CLKINN1 P6 AD4 HT_CLKOUTN1 (7)
L0_CLKIN_L1 L0_CLKOUT_L1
(7) HT_CLKINP0 N3 AD1 HT_CLKOUTP0 (7)
L0_CLKIN_H0 L0_CLKOUT_H0 HT_CADOUTP[15..0]
(7) HT_CLKINN0 N2 AC1 HT_CLKOUTN0 (7) HT_CADOUTP[15..0] (7)
L0_CLKIN_L0 L0_CLKOUT_L0
V4 Y6 HT_CADOUTN[15..0]
(7) HT_CTLINP1 L0_CTLIN_H1 L0_CTLOUT_H1 HT_CTLOUTP1 (7) HT_CADOUTN[15..0] (7)
(7) HT_CTLINN1 V5 W6 HT_CTLOUTN1 (7)
L0_CTLIN_L1 L0_CTLOUT_L1 HT_CLKOUTP[1..0]
(7) HT_CTLINP0 U1 W2 HT_CTLOUTP0 (7) HT_CLKOUTP[1..0] (7)
L0_CTLIN_H0 L0_CTLOUT_H0
(7) HT_CTLINN0 V1 W3 HT_CTLOUTN0 (7)
L0_CTLIN_L0 L0_CTLOUT_L0 HT_CLKOUTN[1..0]
HT_CLKOUTN[1..0] (7)
HT_CADINP15 U6 Y5 HT_CADOUTP15 HT_CTLOUTP[1..0]
HT_CADINN15 L0_CADIN_H15 L0_CADOUT_H15 HT_CADOUTN15 HT_CTLOUTP[1..0] (7)
V6 Y4
HT_CADINP14 L0_CADIN_L15 L0_CADOUT_L15 HT_CADOUTP14 HT_CTLOUTN[1..0]
T4 AB6 HT_CTLOUTN[1..0] (7)
HT_CADINN14 L0_CADIN_H14 L0_CADOUT_H14 HT_CADOUTN14
T5 AA6
HT_CADINP13 L0_CADIN_L14 L0_CADOUT_L14 HT_CADOUTP13 HT_CADINP[15..0]
R6 AB5 HT_CADINP[15..0] (7)
HT_CADINN13 L0_CADIN_H13 L0_CADOUT_H13 HT_CADOUTN13
T6 AB4
HT_CADINP12 L0_CADIN_L13 L0_CADOUT_L13 HT_CADOUTP12 HT_CADINN[15..0]
P4 AD6 HT_CADINN[15..0] (7)
HT_CADINN12 L0_CADIN_H12 L0_CADOUT_H12 HT_CADOUTN12
P5 AC6
HT_CADINP11 L0_CADIN_L12 L0_CADOUT_L12 HT_CADOUTP11 HT_CLKINP[1..0]
M4 AF6
HT_CADINN11 L0_CADIN_H11 L0_CADOUT_H11 HT_CADOUTN11 HT_CLKINP[1..0] (7)
M5 AE6
HT_CADINP10 L0_CADIN_L11 L0_CADOUT_L11 HT_CADOUTP10 HT_CLKINN[1..0]
L6 AF5 HT_CLKINN[1..0] (7)
HT_CADINN10 L0_CADIN_H10 L0_CADOUT_H10 HT_CADOUTN10
M6 AF4
HT_CADINP9 L0_CADIN_L10 L0_CADOUT_L10 HT_CADOUTP9 HT_CTLINP[1..0]
K4 AH6 HT_CTLINP[1..0] (7)
HT_CADINN9 L0_CADIN_H9 L0_CADOUT_H9 HT_CADOUTN9
K5 AG6
HT_CADINP8 L0_CADIN_L9 L0_CADOUT_L9 HT_CADOUTP8 HT_CTLINN[1..0]
J6 AH5 HT_CTLINN[1..0] (7)
HT_CADINN8 L0_CADIN_H8 L0_CADOUT_H8 HT_CADOUTN8
K6 AH4
L0_CADIN_L8 L0_CADOUT_L8

HT LINK
HT_CADINP7 U3 Y1 HT_CADOUTP7
HT_CADINN7 L0_CADIN_H7 L0_CADOUT_H7 HT_CADOUTN7
U2 W1
HT_CADINP6 L0_CADIN_L7 L0_CADOUT_L7 HT_CADOUTP6
R1 AA2
HT_CADINN6 L0_CADIN_H6 L0_CADOUT_H6 HT_CADOUTN6
T1 AA3
HT_CADINP5 L0_CADIN_L6 L0_CADOUT_L6 HT_CADOUTP5
R3 AB1
HT_CADINN5 L0_CADIN_H5 L0_CADOUT_H5 HT_CADOUTN5
R2 AA1
HT_CADINP4 L0_CADIN_L5 L0_CADOUT_L5 HT_CADOUTP4
N1 AC2
HT_CADINN4 L0_CADIN_H4 L0_CADOUT_H4 HT_CADOUTN4
P1 AC3
HT_CADINP3 L0_CADIN_L4 L0_CADOUT_L4 HT_CADOUTP3
L1 AE2
HT_CADINN3 L0_CADIN_H3 L0_CADOUT_H3 HT_CADOUTN3
M1 AE3
HT_CADINP2 L0_CADIN_L3 L0_CADOUT_L3 HT_CADOUTP2
L3 AF1
C HT_CADINN2 L0_CADIN_H2 L0_CADOUT_H2 HT_CADOUTN2 C
L2 AE1
HT_CADINP1 L0_CADIN_L2 L0_CADOUT_L2 HT_CADOUTP1
J1 AG2
HT_CADINN1 L0_CADIN_H1 L0_CADOUT_H1 HT_CADOUTN1
K1 AG3
HT_CADINP0 L0_CADIN_L1 L0_CADOUT_L1 HT_CADOUTP0
J3 AH1
HT_CADINN0 L0_CADIN_H0 L0_CADOUT_H0 HT_CADOUTN0
J2 AG1
L0_CADIN_L0 L0_CADOUT_L0

AM3_SOCKET

B B

1.5VSUS
A1 A31
PVT

R109 R101 R99 R97 R96 HDT Connector


300/F_4 *1K/F_4 *1K/F_4 *1K/F_4 *1K/F_4 CN5
1 2
3 4
AM3 5
7
6
8
(5) CPU_DBREQ#
Top View (5) CPU_DBRDY 9
11
10
12
(5) CPU_TCK
(5) CPU_TMS 13 14
(5) CPU_TDI 15 16
(5) CPU_TRST# 17 18
(5) CPU_TDO 19 20
21 22
23 24 CPU_LDT_HDT_RST#
25
KEY

AL1 AL31 *ASP-68200-07


Use buffered reset

HDT Header
VCC3
A A

R329
*1K/F_4
5

+ U20

(5,12) CPU_LDT_RST# 2 Open 4 CPU_LDT_HDT_RST#


Drain

- *74LVC07 Quanta Computer Inc.


3

PROJECT : Shasta_(NZ2)
1 2 Size Document Number Rev
DVT
R330 0 AM3 CPU HT & Debug
Date: Wednesday, September 15, 2010 Sheet 3 of 41
5 4 3 2 1
A B C D E

04
U19B U19C

M_A_DQ[63..0] (17) M_B_DQ[63..0] (18)


AG21 AE14 M_A_DQ63 AJ19 AH13 M_B_DQ63
T42 MA_CLK_H7 MA_DATA63 T31 MB_CLK_H7 MB_DATA63
AG20 AG14 M_A_DQ62 AK19 AL13 M_B_DQ62
T45 MA_CLK_L7 MA_DATA62 T39 MB_CLK_L7 MB_DATA62
AE20 AG16 M_A_DQ61 AL19 AL15 M_B_DQ61
T44 MA_CLK_H6 MA_DATA61 T37 MB_CLK_H6 MB_DATA61
AE19 AD17 M_A_DQ60 AL18 AJ15 M_B_DQ60
T34 MA_CLK_L6 MA_DATA60 T32 MB_CLK_L6 MB_DATA60
U27 AD13 M_A_DQ59 U31 AF13 M_B_DQ59
T52 MA_CLK_H5 MA_DATA59 T53 MB_CLK_H5 MB_DATA59
U26 AE13 M_A_DQ58 U30 AG13 M_B_DQ58
4 T49 MA_CLK_L5 MA_DATA58 T50 MB_CLK_L5 MB_DATA58 4
(17) M_CLK_DDR_A0 V27 AG15 M_A_DQ57 (18) M_CLK_DDR_B0 W29 AL14 M_B_DQ57
MA_CLK_H4 MA_DATA57 M_A_DQ56 MB_CLK_H4 MB_DATA57 M_B_DQ56
(17) M_CLK_DDR#_A0 W27 AE16 (18) M_CLK_DDR#_B0 W28 AK15
MA_CLK_L4 MA_DATA56 M_A_DQ55 MB_CLK_L4 MB_DATA56 M_B_DQ55
T54 W26 AG17 T47 Y31 AL16
MA_CLK_H3 MA_DATA55 M_A_DQ54 MB_CLK_H3 MB_DATA55 M_B_DQ54
T48 W25 AE18 T51 Y30 AL17
MA_CLK_L3 MA_DATA54 M_A_DQ53 MB_CLK_L3 MB_DATA54 M_B_DQ53
(17) M_CLK_DDR_A1 U24 AD21 (18) M_CLK_DDR_B1 V31 AK21
MA_CLK_H2 MA_DATA53 M_A_DQ52 MB_CLK_H2 MB_DATA53 M_B_DQ52
(17) M_CLK_DDR#_A1 V24 AG22 (18) M_CLK_DDR#_B1 W31 AL21
MA_CLK_L2 MA_DATA52 M_A_DQ51 MB_CLK_L2 MB_DATA52 M_B_DQ51
T41 G19 AE17 T40 A18 AH15
MA_CLK_H1 MA_DATA51 M_A_DQ50 MB_CLK_H1 MB_DATA51 M_B_DQ50
T33 H19 AF17 T38 A19 AJ16
MA_CLK_L1 MA_DATA50 M_A_DQ49 MB_CLK_L1 MB_DATA50 M_B_DQ49
T43 G20 AF21 T35 C19 AH19
MA_CLK_H0 MA_DATA49 M_A_DQ48 MB_CLK_H0 MB_DATA49 M_B_DQ48
T46 G21 AE21 T36 D19 AL20
MA_CLK_L0 MA_DATA48 M_A_DQ47 MB_CLK_L0 MB_DATA48 M_B_DQ47
AF23 AJ22
MA_DATA47 M_A_DQ46 MB_DATA47 M_B_DQ46
AE23 AL22
MA_DATA46 M_A_DQ45 MB_DATA46 M_B_DQ45
AJ26 AL24
MA_DATA45 M_A_DQ44 MB_DATA45 M_B_DQ44
(17) M_CS#_A1 AC25 AG26 (18) M_CS#_B1 AE30 AK25
MA0_CS_L1 MA_DATA44 M_A_DQ43 MB0_CS_L1 MB_DATA44 M_B_DQ43
(17) M_CS#_A0 AA24 AE22 (18) M_CS#_B0 AC31 AJ21
MA0_CS_L0 MA_DATA43 M_A_DQ42 MB0_CS_L0 MB_DATA43 M_B_DQ42
AG23 AH21
MA_DATA42 M_A_DQ41 MB_DATA42 M_B_DQ41
(17) M_ODT_A1 AE28 AH25 (18) M_ODT_B1 AF31 AH23
MA0_ODT1 MA_DATA41 M_A_DQ40 MB0_ODT1 MB_DATA41 M_B_DQ40
(17) M_ODT_A0 AC28 AF25 (18) M_ODT_B0 AD29 AJ24
MA0_ODT0 MA_DATA40 M_A_DQ39 MB0_ODT0 MB_DATA40 M_B_DQ39
AJ28 AL27
MA_DATA39 M_A_DQ38 MB_DATA39 M_B_DQ38
AD27 AJ29 AE29 AK27
MA1_CS_L1 MA_DATA38 M_A_DQ37 MB1_CS_L1 MB_DATA38 M_B_DQ37
AA25 AF29 AB31 AH31
MA1_CS_L0 MA_DATA37 M_A_DQ36 MB1_CS_L0 MB_DATA37 M_B_DQ36
AE26 AG30
MA_DATA36 M_A_DQ35 MB_DATA36 M_B_DQ35
AE27 AJ27 AG31 AL25
MA1_ODT1 MA_DATA35 M_A_DQ34 MB1_ODT1 MB_DATA35 M_B_DQ34
AC27 AH27 AD31 AL26
MA1_ODT0 MA_DATA34 M_A_DQ33 MB1_ODT0 MB_DATA34 M_B_DQ33
AG29 AJ30
MA_DATA33 M_A_DQ32 MB_DATA33 M_B_DQ32
(17) M_A_RST# E20 AF27 (18) M_B_RST# B19 AJ31
MA_RESET_L MA_DATA32 M_A_DQ31 MB_RESET_L MB_DATA32 M_B_DQ31
E29 E31
MA_DATA31 M_A_DQ30 MB_DATA31 M_B_DQ30
(17) M_A_CAS# AB25 E28 (18) M_B_CAS# AC29 E30
MA_CAS_L MA_DATA30 M_A_DQ29 MB_CAS_L MB_DATA30 M_B_DQ29
(17) M_A_WE# AB27 D27 (18) M_B_WE# AC30 B27
MA_WE_L MA_DATA29 M_A_DQ28 MB_WE_L MB_DATA29 M_B_DQ28
(17) M_A_RAS# AA26 C27 (18) M_B_RAS# AB29 A27
MA_RAS_L MA_DATA28 M_A_DQ27 MB_RAS_L MB_DATA28 M_B_DQ27
G26 F29
MA_DATA27 M_A_DQ26 MB_DATA27 M_B_DQ26
(17) M_BA_A2 N25 F27 (18) M_BA_B2 N31 F31
MA_BANK2 MA_DATA26 M_A_DQ25 MB_BANK2 MB_DATA26 M_B_DQ25
(17) M_BA_A1 Y27 C28 (18) M_BA_B1 AA31 A29
MA_BANK1 MA_DATA25 M_A_DQ24 MB_BANK1 MB_DATA25 M_B_DQ24
(17) M_BA_A0 AA27 E27 (18) M_BA_B0 AA28 A28
MA_BANK0 MA_DATA24 M_A_DQ23 MB_BANK0 MB_DATA24 M_B_DQ23
F25 A25
MA_DATA23 M_A_DQ22 MB_DATA23 M_B_DQ22
(17) M_CKE_A1 L27 E25 (18) M_CKE_B1 M31 A24
MA_CKE1 MA_DATA22 M_A_DQ21 MB_CKE1 MB_DATA22 M_B_DQ21
(17) M_CKE_A0 M25 E23 (18) M_CKE_B0 M29 C22
MA_CKE0 MA_DATA21 M_A_DQ20 MB_CKE0 MB_DATA21 M_B_DQ20
D23 D21
3 MA_DATA20 M_A_DQ19 MB_DATA20 M_B_DQ19 3
E26 A26
MEM CHA

(17) M_A_A[15..0] MA_DATA19 (18) M_B_A[15..0] MB_DATA19

MEM CHB
M_A_A15 M27 C26 M_A_DQ18 M_B_A15 N28 B25 M_B_DQ18
M_A_A14 MA_ADD15 MA_DATA18 M_A_DQ17 M_B_A14 MB_ADD15 MB_DATA18 M_B_DQ17
N24 G23 N29 B23
M_A_A13 MA_ADD14 MA_DATA17 M_A_DQ16 M_B_A13 MB_ADD14 MB_DATA17 M_B_DQ16
AC26 F23 AE31 A22
M_A_A12 MA_ADD13 MA_DATA16 M_A_DQ15 M_B_A12 MB_ADD13 MB_DATA16 M_B_DQ15
N26 E22 N30 B21
M_A_A11 MA_ADD12 MA_DATA15 M_A_DQ14 M_B_A11 MB_ADD12 MB_DATA15 M_B_DQ14
P25 E21 P29 A20
M_A_A10 MA_ADD11 MA_DATA14 M_A_DQ13 M_B_A10 MB_ADD11 MB_DATA14 M_B_DQ13
Y25 F17 AA29 C16
M_A_A9 MA_ADD10 MA_DATA13 M_A_DQ12 M_B_A9 MB_ADD10 MB_DATA13 M_B_DQ12
N27 G17 P31 D15
M_A_A8 MA_ADD9 MA_DATA12 M_A_DQ11 M_B_A8 MB_ADD9 MB_DATA12 M_B_DQ11
R24 G22 R29 C21
M_A_A7 MA_ADD8 MA_DATA11 M_A_DQ10 M_B_A7 MB_ADD8 MB_DATA11 M_B_DQ10
P27 F21 R28 A21
M_A_A6 MA_ADD7 MA_DATA10 M_A_DQ9 M_B_A6 MB_ADD7 MB_DATA10 M_B_DQ9
R25 G18 R31 A17
M_A_A5 MA_ADD6 MA_DATA9 M_A_DQ8 M_B_A5 MB_ADD6 MB_DATA9 M_B_DQ8
R26 E17 R30 A16
M_A_A4 MA_ADD5 MA_DATA8 M_A_DQ7 M_B_A4 MB_ADD5 MB_DATA8 M_B_DQ7
R27 G16 T31 B15
M_A_A3 MA_ADD4 MA_DATA7 M_A_DQ6 M_B_A3 MB_ADD4 MB_DATA7 M_B_DQ6
T25 E15 T29 A14
M_A_A2 MA_ADD3 MA_DATA6 M_A_DQ5 M_B_A2 MB_ADD3 MB_DATA6 M_B_DQ5
U25 G13 U29 E13
M_A_A1 MA_ADD2 MA_DATA5 M_A_DQ4 M_B_A1 MB_ADD2 MB_DATA5 M_B_DQ4
T27 H13 U28 F13
M_A_A0 MA_ADD1 MA_DATA4 M_A_DQ3 M_B_A0 MB_ADD1 MB_DATA4 M_B_DQ3
W24 H17 AA30 C15
MA_ADD0 MA_DATA3 M_A_DQ2 MB_ADD0 MB_DATA3 M_B_DQ2
E16 A15
MA_DATA2 M_A_DQ1 MB_DATA2 M_B_DQ1
(17) M_A_DQS7 AD15 E14 (18) M_B_DQS7 AK13 A13
MA_DQS_H7 MA_DATA1 M_A_DQ0 MB_DQS_H7 MB_DATA1 M_B_DQ0
(17) M_A_DQS#7 AE15 G14 (18) M_B_DQS#7 AJ13 D13
MA_DQS_L7 MA_DATA0 MB_DQS_L7 MB_DATA0
(17) M_A_DQS6 AG18 (18) M_B_DQS6 AK17
MA_DQS_H6 MB_DQS_H6
(17) M_A_DQS#6 AG19 J28 (18) M_B_DQS#6 AJ17 J31
MA_DQS_L6 MA_DQS_H8 MB_DQS_L6 MB_DQS_H8
(17) M_A_DQS5 AG24 J27 (18) M_B_DQS5 AK23 J30
MA_DQS_H5 MA_DQS_L8 MB_DQS_H5 MB_DQS_L8
(17) M_A_DQS#5 AG25 (18) M_B_DQS#5 AL23
MA_DQS_L5 MB_DQS_L5
(17) M_A_DQS4 AG27 J25 (18) M_B_DQS4 AL28 J29
MA_DQS_H4 MA_DM8 MB_DQS_H4 MB_DM8
(17) M_A_DQS#4 AG28 (18) M_B_DQS#4 AL29
MA_DQS_L4 MB_DQS_L4
(17) M_A_DQS3 D29 K25 (18) M_B_DQS3 D31 K29
MA_DQS_H3 MA_CHECK7 MB_DQS_H3 MB_CHECK7
(17) M_A_DQS#3 C29 J26 (18) M_B_DQS#3 C31 K31
MA_DQS_L3 MA_CHECK6 MB_DQS_L3 MB_CHECK6
(17) M_A_DQS2 C25 G28 (18) M_B_DQS2 C24 G30
MA_DQS_H2 MA_CHECK5 MB_DQS_H2 MB_CHECK5
(17) M_A_DQS#2 D25 G27 (18) M_B_DQS#2 C23 G29
MA_DQS_L2 MA_CHECK4 MB_DQS_L2 MB_CHECK4
(17) M_A_DQS1 E19 L24 (18) M_B_DQS1 D17 L29
MA_DQS_H1 MA_CHECK3 MB_DQS_H1 MB_CHECK3
(17) M_A_DQS#1 F19 K27 (18) M_B_DQS#1 C17 L28
MA_DQS_L1 MA_CHECK2 MB_DQS_L1 MB_CHECK2
(17) M_A_DQS0 F15 H29 (18) M_B_DQS0 C14 H31
MA_DQS_H0 MA_CHECK1 MB_DQS_H0 MB_CHECK1
(17) M_A_DQS#0 G15 H27 (18) M_B_DQS#0 C13 G31
MA_DQS_L0 MA_CHECK0 MB_DQS_L0 MB_CHECK0
(17) M_A_DM7 AF15 W30 MEM_MA_EVENT_L (17) (18) M_B_DM7 AJ14 V29 MEM_MB_EVENT_L MEM_MB_EVENT_L (18)
MA_DM7 MA_EVENT_L MB_DM7 MB_EVENT_L
(17) M_A_DM6 AF19 (18) M_B_DM6 AH17
MA_DM6 MB_DM6
(17) M_A_DM5 AJ25 1.5VSUS (18) M_B_DM5 AJ23 1.5VSUS
2 MA_DM5 R95 1K/F MB_DM5 R94 1K/F 2
(17) M_A_DM4 AH29 (18) M_B_DM4 AK29
MA_DM4 MB_DM4
(17) M_A_DM3 B29 (18) M_B_DM3 C30
MA_DM3 MB_DM3
(17) M_A_DM2 E24 (18) M_B_DM2 A23
MA_DM2 MB_DM2
(17) M_A_DM1 E18 (18) M_B_DM1 B17
MA_DM1 MB_DM1
(17) M_A_DM0 H15 (18) M_B_DM0 B13
MA_DM0 MB_DM0

AM3_SOCKET AM3_SOCKET

1 1

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
AMD CPU Memory
Date: Wednesday, September 15, 2010 Sheet 4 of 41
A B C D E
5 4 3 2 1

CPU Control and Miscellaneous 1.5VSUS


05
R91
Layout: Keep trace to resistors 10K
(12) CPU_PWRGD C628 *180P less than 1" from CPU pins. Layout: Keep CPU_HTREF0
(9,12) LDT_STOP# C609 *180P less than 1.5" from in length.
(3,12) CPU_LDT_RST# C610 *180P

2
Q8
1.5VSUS VCC1.2 1.5VSUS MMBT3904
Pin naming for VID pins indicate CPU_THERMTRIP#_1.5 1 3 CPU_THERMTRIP# (13)
D D
"Serial VID"/"Parallel VID" connections.

39.2F

R67 44.2/F

301

301

301

*301
1K/F
R283 511/F
CPUVDDA U19D

301

301

301

1K/F
R263 10K/F

R271 *1K/F

R303
C10
VDDA_1

R278

R265

R267

R277

R244
D10
C614 VDDA_2 MISC.

R281

R289

R305

R268
(12) CLK_CPU_BCLKP_PR CPU_CLKIN_SC A8
CPU_CLKIN_SC# CLKIN_H CPU_CORE_TYPE
B8 G5 CPU_CORE_TYPE (32)
CLKIN_L CORE_TYPE
3900p NEED X5R CPU_PWRGD CPU_VID5_R
C9 D2 T106
R269 LDT_STOP# PWROK VID5 CPU_VID4_R
D8 D1 T102
169_0603F CPU_LDT_RST# LDTSTOP_L VID4 CPU_SVC
C620 C7 C1 CPU_SVC (32)
RESET_L SVC/VID3 CPU_SVD
E3 CPU_SVD (32)
CPU_PRESENT# SVD/VID2 CPU_PVEN
(12) CLK_CPU_BCLKN_PR AL3 E2 CPU_PVEN (32)
CPU_PRESENT_L PVIEN/VID1 CPU_VID0_R
E1 T104
VID0
3900p NEED X5R CPU_SIC CPU_THERMDC
AL6 AG9
CPU_SID SIC THERMDC CPU_THERMDA
AK6 AG8
1.5VSUS R264 0/J_4 CPU_SA0 SID THERMDA CPU_THERMTRIP#_1.5
AK4 AK7
CPU_ALERT# SA0 THERMTRIP_L CPU_PROCHOT#_1.5
AL4 AL7
SMDDR_VREF (3) CPU_TDI CPU_TDI AL10
ALERT_L

TDI
PROCHOT_L

TDO
AK10 CPU_TDO
CPU_PROCHOT#_1.5

CPU_TDO (3)
(12)

R279 (3) CPU_TRST# CPU_TRST# AJ10


CPU_TCK TRST_L
2K/F (3) CPU_TCK AH10
CPU_M_VREF CPU_TMS TCK
(3) CPU_TMS AL9
TMS

(3) CPU_DBREQ# CPU_DBREQ# A5 B6 CPU_DBRDY CPU_DBRDY (3)


DBREQ_L DBRDY

(32) CPU_VDD_FB CPU_VDD_FB G2 AK11 CPU_VDDIO_FB_H CPU_VDDIO_FB_H (36)


R297 C638 C639 CPU_VDD_FB# VDD_FB_H VDDIO_FB_H CPU_VDDIO_FB_L
Layout: Place within 500 (32) CPU_VDD_FB# G1
VDD_FB_L VDDIO_FB_L
AL11 CPU_VDDIO_FB_L (36)
2K/F mils of the CPU socket. G4 CPU_VDDNB_FB_H CPU_VDDNB_FB_H (32)
0.1u/10V 1000P R401 *0/J_4 VDDNB_FB_H CPU_VDDNB_FB_L
(16,26,32) CPU_VDDIO_PWRGD F3 G3 CPU_VDDNB_FB_L (32)
M_VDDIO_PWRGD VDDNB_FB_L
PVT CPU_VTT_SUS_SENSE E12 F1 CPU_PSI# R245 *0/J_4 PSI (32)
T30 VDDR_SENSE PSI_L
C PVT CPU_M_VREF F12
M_VREF HTREF1
V8 CPU_HTREF1 C
CPU_M_ZN AH11 V7 CPU_HTREF0
CPU_M_ZP M_ZN HTREF0
AJ11
1.5VSUS M_ZP
CPU_TEST25_H_BYPASSCLK_H A10 C11 CPU_TEST29_H_FBCLKOUT_H R87 Layout: Route as 80 ohms diff impedance.
C774 TEST25_H TEST29_H
C774 place near R303 CPU_TEST25_H_BYPASSCLK_L B10
TEST25_L TEST29_L
D11 CPU_TEST29_L_FBCLKOUT_L Keep trace to resistor < 1" from CPU pins.
CPU_TEST19_PLLTEST0 F10 *80.6/F_4
T28 TEST19
0.1u/10V CPU_TEST18_PLLTEST1 E9
T26 TEST18
AJ7
TEST13 CPU_TEST24_SCANCLK1
F6 AK8 T116
TEST9 TEST24 CPU_TEST23_TSTUPD
AH8 T25
CPU_TEST17_BP3 TEST23 CPU_TEST22_SCANSHIFTEN
T107 D6 AJ9 T119
CPU_TEST16_BP2 TEST17 TEST22 CPU_TEST21_SCANEN
T24 E7 AL8 T117
CPU_TEST15_BP1 TEST16 TEST21 CPU_TEST20_SCANCLK2
T22 F8 AJ8 T115
CPU_TEST14_BP0 TEST15 TEST20
T19 C5
CPU_TEST12_SCANSHIFTENB TEST14 CPU_TEST28_H_PLLCHRZ_H
T122 AH9 J10 T29
TEST12 TEST28_H CPU_TEST28_L_PLLCHRZ_L
TEST28_L
H9 T27 Layout: Route CPU_TEST28_H/L
CPU_TEST7_ANALOG_T E5 AK9 CPU_TEST27_SINGLECHAIN as differential traces and as short
T105 TEST7 TEST27 T121
CPU_TEST6_DIECRACKMON AJ5 AK5 CPU_TEST26_BURNIN_L
T108 TEST6 TEST26 T109 as possible.
CPU_TEST3_GATE0 AH7 G7 CPU_TEST10_ANALOGOUT
T111 TEST3 TEST10 T23
CPU_TEST2_DRAIN0 AJ6 D4 CPU_TEST8_DIG_T
T110 TEST2 TEST8 T103

301

301
511/F
39.2/F

Layout: Keep trace to resistors

R66 44.2/F
C18 L30

*49.9/F
RSVD1 RSVD9
less than 1" from CPU pins. C20 L31
RSVD2 RSVD10
F2 AD25
RSVD3 RSVD11
R308

R282

G24 AE24
RSVD4 RSVD12

R246

R298

R304
G25
H25
RSVD5
RSVD6
INT. MISC. RSVD13
RSVD14
AE25
AJ18
L25 AJ20
RSVD7 RSVD15
L26 AK3
RSVD8 RSVD16
Layout: Keep CPU_HTREF0
less than 1.5" from in length.

AM3_SOCKET

B B

VCC3

1.5VSUS

CPUVDDA R85
CPU Thermal
BLM21PG221SN1D(220_100M_2A)_8
1K/F

1K/F_4
VCC2.5
L24
CPUVDDA
R84 THERM_ALERT# THERM_ALERT# (14,26)
Senser VCC3
VCC3
R266

1K/F_4
3

LS0805-100M-N C264 C239 C263 C267


4.7u/6.3V_6 0.22u/6.3V_4 3300P/50V_4 MMBT3904 C575 0.1U
*10U/6.3V_8 2
Q5
3

R239
1

CPU_ALERT# MMBT3904
2 10K
Q4 sub-address:98h
U15
1

1 10 SCLK
C580 VCC SMCLK
CPU_THERMDA 2 9 SDATA
DXP1 SMDATA
2200P/50V/X7R_4 CPU_THERMDC 3 8 THERM_ALERT#
DXN1 ALERT#

(9) NB_THERMDA 4 7 SYS_SHDN_1#


VCC3 DXP2 THERM#
5 6
C579 DXN2 GND
SYS_SHDN#_3904 R93 *0_4 2200P/50V/X7R_4 G782
SYS_SHDN# (35)
(9) NB_THERMDC
R88 reserve for
1

Q6 4.7K_4 power shutdown


2

2N7002W-7-F D1
A ( if can ) *CH500H A
(26) THERM_CLK_EC 3 1 SCLK SCLK (20)
2

VCC3

D2
3

*CH501H-40PT
R90 2 PWROK_EC_3904 2 1
Q7 4.7K_4
PWROK_EC (16,26,32)
Quanta Computer Inc.
2

2N7002W-7-F Q9
1

*MMBT3904 R92 *10K/F_4


(26) THERM_DAT_EC 3 1 SDATA SDATA (20) SYS_SHDN_1#
VCC3 PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
AM3 CPU Control & Misc
Date: Wednesday, September 15, 2010 Sheet 5 of 41
5 4 3 2 1
5 4 3 2 1

CPU_CORE

U19E
CPU_CORE

U19F
Processor Power and Ground 06
B3 A3 T15 M12
VDD_1 VSS_1 VDD_86 VSS_86
C2 A7 T17 M14
VDD_2 VSS_2 VDD_87 VSS_87 NBCORE VCC1.2
C4 A9 T19 M16
VDD_3 VSS_3 VDD_88 VSS_88
D3 A11 T21 M18
VDD_4 VSS_4 VDD_89 VSS_89 U19G U19H
D5 B4 T23 M20
VDD_5 VSS_5 VDD_90 VSS_90
E4 B9 U8 M22
VDD_6 VSS_6 VDD_91 VSS_91 VLDT_HT3_RUN_B
E6 B11 U10 N4 A4 AA11 AJ1 H1
VDD_7 VSS_7 VDD_92 VSS_92 VDDNB_1 VSS_171 VLDT_A_1 VLDT_B_1 C583
F5
VDD_8 VSS_8
B14 U12
VDD_93 VSS_93
N5 A6
VDDNB_2 VSS_172
AA13 AJ2
VLDT_A_2 VLDT_B_2
H2 Layout: Place as close as
F7 B16 U14 N7 B5 AA15 AJ3 H5 possible to CPU socket.
VDD_9 VSS_9 VDD_94 VSS_94 VDDNB_3 VSS_173 VLDT_A_3 VLDT_B_3
G6 B18 U16 N9 B7 AA17 AJ4 H6
D VDD_10 VSS_10 VDD_95 VSS_95 VDDNB_4 VSS_174 VCC1.2 VLDT_A_4 VLDT_B_4 VCC1.2 10uF D
G8 B20 U18 N11 C6 AA19
VDD_11 VSS_11 VDD_96 VSS_96 VDDNB_5 VSS_175
H7 B22 U20 N13 C8 AA21
VDD_12 VSS_12 VDD_97 VSS_97 VDDNB_6 VSS_176
H11 B24 U22 N15 D7 AA23 A12 AG12
VDD_13 VSS_13 VDD_98 VSS_98 VDDNB_7 VSS_177 VDDR_1 VDDR_5
H23 B26 V9 N17 D9 AB2 B12 AH12
VDD_14 VSS_14 VDD_99 VSS_99 VDDNB_8 VSS_178 VDDR_2 VDDR_6
J8
VDD_15 VSS_15
B28 V11
VDD_100 VSS_100
N19 E8
VDDNB_9 VSS_179
AB3 C12
VDDR_3 VDDR_7
AJ12 PVT
J12 B30 V13 N21 E10 AB8 D12 AK12
VDD_16 VSS_16 VDD_101 VSS_101 VDDNB_10 VSS_180 1.5VSUS VDDR_4 VDDR_8
J14 C3 V15 N23 F9 AB10 AL12
VDD_17 VSS_17 VDD_102 VSS_102 VDDNB_11 VSS_181 VDDR_9 1.5VSUS VCC1.2
J16
VDD_18 VSS_18
D14 V17
VDD_103 VSS_103
P2 F11
VDDNB_12 VSS_182
AB12 EMI
J18 D16 V19 P3 G10 AB14 M24 C745
VDD_19 VSS_19 VDD_104 VSS_104 VDDNB_13 VSS_183 VDDIO_1
J20 D18 V21 P8 G12 AB16 M26 AF18
VDD_20 VSS_20 VDD_105 VSS_105 VDDNB_14 VSS_184 VDDIO_2 VSS_215
J22 D20 V23 P10 AB18 M28 AF20
VDD_21 VSS_21 VDD_106 VSS_106 VSS_185 VDDIO_3 VSS_216
J24 D22 W4 P12 AB20 M30 AF22
VDD_22 VSS_22 VDD_107 VSS_107 VSS_186 VDDIO_4 VSS_217 *0.1U/10V_4
K7 D24 W5 P14 AB22 P24 AF24

POWER/GND4
VDD_23 VSS_23 VDD_108 VSS_108 VSS_187 VDDIO_5 VSS_218
K9 D26 W8 P16 AC7 P26 AF26
VDD_24 VSS_24 VDD_109 VSS_109 VSS_188 VDDIO_6 VSS_219 C746
K11 D28 W10 P18 AC9 P28 AF28
VDD_25 VSS_25 VDD_110 VSS_110 VSS_189 VDDIO_7 VSS_220
K13 D30 W12 P20 AC11 P30 AG10
VDD_26 VSS_26 VDD_111 VSS_111 VSS_190 VDDIO_8 VSS_221

POWER/GND3
K15 E11 W14 P22 AC13 T24 AG11
VDD_27 VSS_27 VDD_112 VSS_112 VSS_191 VDDIO_9 VSS_222 *2200P/50V/X7R_4
K17 F4 W16 R7 AC15 T26 AH14
VDD_28 VSS_28 VDD_113 VSS_113 VSS_192 VDDIO_10 VSS_223
K19 F14 W18 R9 AC17 T28 AH16
VDD_29 VSS_29 VDD_114 VSS_114 VSS_193 VDDIO_11 VSS_224 C757
K21 F16 W20 R11 AC19 T30 AH18
VDD_30 VSS_30 VDD_115 VSS_115 VSS_194 VDDIO_12 VSS_225 1.5VSUS
K23 F18 W22 R13 AC21 V25 AH20
VDD_31 VSS_31 VDD_116 VSS_116 VSS_195 VDDIO_13 VSS_226
L4 F20 Y2 R15 AC23 V26 AH22
VDD_32 VSS_32 VDD_117 VSS_117 VSS_196 VDDIO_14 VSS_227 *220P/50V_4
L5 F22 Y3 R17 AD8 V28 AH24
VDD_33 VSS_33 VDD_118 VSS_118 VSS_197 VDDIO_15 VSS_228

180pf

180pf

180pf

180pf
L8 F24 Y7 R19 AD10 V30 AH26
VDD_34 VSS_34 VDD_119 VSS_119 VSS_198 VDDIO_16 VSS_229 C758
L10 F26 Y9 R21 AD12 Y24 AH28
VDD_35 VSS_35 VDD_120 VSS_120 VSS_199 VDDIO_17 VSS_230
L12 F28 Y11 R23 AD14 Y26 AH30
VDD_36 VSS_36 VDD_121 VSS_121 VSS_200 VDDIO_18 VSS_231
L14 F30 Y13 T8 AD16 Y28 AK2
VDD_37 VSS_37 VDD_122 VSS_122 VSS_201 VDDIO_19 VSS_232

C764

C765

C766

C767
L16 G9 Y15 T10 AD20 Y29 AK14

POWER/GND2
VDD_38 VSS_38 VDD_123 VSS_123 VSS_202 VDDIO_20 VSS_233 *220P/50V_4
L18 G11 Y17 T12 B2 AD22 AB24 AK16
POWER/GND1

VDD_39 VSS_39 VDD_124 VSS_124 NP/RSVD VSS_203 VDDIO_21 VSS_234 C756


L20 H8 Y19 T14 AD24 AB26 AK18
VDD_40 VSS_40 VDD_125 VSS_125 VSS_204 VDDIO_22 VSS_235
L22 H10 Y21 T16 AE4 AB28 AK20
VDD_41 VSS_41 VDD_126 VSS_126 VSS_205 VDDIO_23 VSS_236
M2 H12 Y23 T18 AE5 AB30 AK22
VDD_42 VSS_42 VDD_127 VSS_127 VSS_206 VDDIO_24 VSS_237
M3 H14 AA8 T20 AE11 AC24 AK24 *2200P/50V/X7R_4
VDD_43 VSS_43 VDD_128 VSS_128 VSS_207 VDDIO_25 VSS_238
M7 H16 AA10 T22 H20 AF2 AD26 AK26
VDD_44 VSS_44 VDD_129 VSS_129 NP/VSS VSS_208 VDDIO_26 VSS_239 C716
M9 H18 AA12 U4 AE7 AF3 AD28 AK28
VDD_45 VSS_45 VDD_130 VSS_130 NP/VSS VSS_209 VDDIO_27 VSS_240
M11 H24 AA14 U5 AF8 AD30 AK30
VDD_46 VSS_46 VDD_131 VSS_131 VSS_210 VDDIO_28 VSS_241
M13 H26 AA16 U7 AF10 AF30 AL5
VDD_47 VSS_47 VDD_132 VSS_132 VSS_211 VDDIO_29 VSS_242
M15 H28 AA18 U9 AF12 *0.1U/10V_4
C VDD_48 VSS_48 VDD_133 VSS_133 VSS_212 C
M17 H30 AA20 U11 AF14
VDD_49 VSS_49 VDD_134 VSS_134 VSS_213
M19 J4 AA22 U13 AF16 AM3_SOCKET
VDD_50 VSS_50 VDD_135 VSS_135 VSS_214
M21 J5 AB7 U15
VDD_51 VSS_51 VDD_136 VSS_136
M23 J7 AB9 U17
VDD_52 VSS_52 VDD_137 VSS_137
N8 J9 AB11 U19 AM3_SOCKET
VDD_53 VSS_53 VDD_138 VSS_138 1.5VSUS
N10 J11 AB13 U21
VDD_54 VSS_54 VDD_139 VSS_139
N12 J13 AB15 U23
VDD_55 VSS_55 VDD_140 VSS_140
N14 J15 AB17 V2
VDD_56 VSS_56 VDD_141 VSS_141
N16 J17 AB19 V3
VDD_57 VSS_57 VDD_142 VSS_142
N18 J19 AB21 V10
VDD_58 VSS_58 VDD_143 VSS_143
N20 J21 AB23 V12
VDD_59 VSS_59 VDD_144 VSS_144 C769 C771 C772 C773 C770 C768
N22 J23 AC4 V14
VDD_60 VSS_60 VDD_145 VSS_145
P7
VDD_61 VSS_61
K2 AC5
VDD_146 VSS_146
V16 CPU_VDDNB_RUN CPU_VDDR 0.1U/10V_4 2200P/50V/X7R_4 220P/50V_4 220P/50V_4 2200P/50V/X7R_4 0.1U/10V_4
P9 K3 AC8 V18
VDD_62 VSS_62 VDD_147 VSS_147
P11 K8 AC10 V20
VDD_63 VSS_63 VDD_148 VSS_148 NBCORE VCC1.2
P13 K10 AC12 V22
VDD_64 VSS_64 VDD_149 VSS_149
P15 K12 AC14 W7
VDD_65 VSS_65 VDD_150 VSS_150

4.7uF

4.7uF

4.7uF
P17 K14 AC16 W9
VDD_66 VSS_66 VDD_151 VSS_151

C269 0.22u

C233 0.22u

C272 0.22u

C274 0.22u

C241 0.22u

C647 0.22u
10uF

10uF

10uF
C268 0.01U
P19 K16 AC18 W11
VDD_67 VSS_67 VDD_152 VSS_152
P21 K18 AC20 W13
VDD_68 VSS_68 VDD_153 VSS_153
P23 K20 AC22 W15
VDD_69 VSS_69 VDD_154 VSS_154

C219

C218

C124

C665

C666

C664
R4 K22 AD2 W17
VDD_70 VSS_70 VDD_155 VSS_155
R5 K24 AD3 W19
VDD_71 VSS_71 VDD_156 VSS_156
R8 K26 AD7 W21
VDD_72 VSS_72 VDD_157 VSS_157
R10 K28 AD9 W23
VDD_73 VSS_73 VDD_158 VSS_158
R12 K30 AD11 Y8
VDD_74 VSS_74 VDD_159 VSS_159
R14 L7 AD23 Y10
VDD_75 VSS_75 VDD_160 VSS_160
R16 L9 AE10 Y12
VDD_76 VSS_76 VDD_161 VSS_161
R18 L11 AE12 Y14
VDD_77 VSS_77 VDD_162 VSS_162
R20 L13 AF7 Y16
VDD_78 VSS_78 VDD_163 VSS_163
R22
VDD_79 VSS_79
L15 AF9
VDD_164 VSS_164
Y18 CPU_VDDIO_SUS
T2 L17 AF11 Y20
VDD_80 VSS_80 VDD_165 VSS_165
T3
T7
VDD_81 VSS_81
L19
L21
AG4
AG5
VDD_166 VSS_166
Y22
AA4
A1 A31
VDD_82 VSS_82 VDD_167 VSS_167 1.5VSUS
T9 L23 AG7 AA5
VDD_83 VSS_83 VDD_168 VSS_168
T11 M8 AH2 AA7
VDD_84 VSS_84 VDD_169 VSS_169

4.7uF

4.7uF
T13
VDD_85 VSS_85
M10 AH3
VDD_170 VSS_170
AA9 CPU_VDDR

C351 180pf
B B
VCC1.2
AM3_SOCKET AM3_SOCKET

C313

C309

4.7uF

4.7uF

4.7uF

4.7uF
AM3
Top View
Bottom Side Decoupling 1.5VSUS

C663

C662

C584

C670
4.7uF

4.7uF

C303 180pf
1.5VSUS VCC1.2

C320

C314
Layout: Place behind the DIMMs,
evenly spaced on VTT fill.
C302 0.22u

C305 0.22u

C643 0.22u
22uF

22uF

22uF

22uF

10uF

22uF
C307 0.01U

C304 0.01U

0.01U

C271 0.01U
C352 180pf

AL1 AL31
C306

C312

C315

C300

C310

C581

C652

Layout: Place across each


CPU_CORE VDDIO-GND plane split.

VCC1.2 VCC1.2
C296 0.22u

C251 0.22u
22uF

22uF

22uF

22uF

22uF

22uF

22uF

22uF

22uF

22uF

22uF

DIMMs
4.7uF

4.7uF

4.7uF

4.7uF
C277

C280

C278

C248

C288

C291

C289

C249

C297

C298

C299

C232 0.22u

C261 0.22u
10uF

10uF

C655 0.01U
C270 180pf

C273 180pf
C227

C667

C668

C582

CPU_CORE
C237

C238
10uF

10uF

10uF

10uF

10uF

10uF

10uF

4.7U

4.7U

4.7U

C228 0.01U

C229 0.01U

C250 180pf

A A
VLDT_HT3_RUN CPU_VDDR
C281

C292

C294

C245

C244

C243

C290

C295

C247

C279

NBCORE
22uF

22uF

C234 0.01U

C260 0.01U

180pf

Quanta Computer Inc.


C231

C225

PROJECT : Shasta_(NZ2)
C240

Size Document Number Rev


DVT
AM3 CPU Power & GND
Date: Friday, July 02, 2010 Sheet 6 of 41
5 4 3 2 1
5 4 3 2 1

07
D D

U13A
HT_CADOUTP0 Y25 D24 HT_CADINP0 HT_CADOUTP[15..0]
HT_CADOUTN0 HT_RXCAD0P HT_TXCAD0P HT_CADINN0 HT_CADOUTP[15..0] (3)
HT_CADOUTP1
Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25
HT_CADINP1 HT_CADOUTN[15..0]
V22 E24 HT_CADOUTN[15..0] (3)
HT_CADOUTN1 HT_RXCAD1P HT_TXCAD1P HT_CADINN1
V23 HT_RXCAD1N HT_TXCAD1N E25
HT_CADOUTP2 V25 F24 HT_CADINP2 HT_CLKOUTP[1..0]
HT_CADOUTN2 HT_RXCAD2P HT_TXCAD2P HT_CADINN2 HT_CLKOUTP[1..0] (3)
V24 HT_RXCAD2N HT_TXCAD2N F25
HT_CADOUTP3 U24 F23 HT_CADINP3 HT_CLKOUTN[1..0]
HT_CADOUTN3 HT_RXCAD3P HT_TXCAD3P HT_CADINN3 HT_CLKOUTN[1..0] (3)
U25 HT_RXCAD3N HT_TXCAD3N F22
HT_CADOUTP4 T25 H23 HT_CADINP4 HT_CTLOUTP[1..0]
HT_CADOUTN4 HT_RXCAD4P HT_TXCAD4P HT_CADINN4 HT_CTLOUTP[1..0] (3)
T24 HT_RXCAD4N HT_TXCAD4N H22

HYPER TRANSPORT CPU I/F


HT_CADOUTP5 P22 J25 HT_CADINP5 HT_CTLOUTN[1..0]
HT_CADOUTN5 HT_RXCAD5P HT_TXCAD5P HT_CADINN5 HT_CTLOUTN[1..0] (3)
P23 J24
HT_CADOUTP6 HT_RXCAD5N HT_TXCAD5N HT_CADINP6 HT_CADINP[15..0]
P25 K24 HT_CADINP[15..0] (3)
HT_CADOUTN6 HT_RXCAD6P HT_TXCAD6P HT_CADINN6
P24 K25
HT_CADOUTP7 HT_RXCAD6N HT_TXCAD6N HT_CADINP7 HT_CADINN[15..0]
N24 K23
HT_CADOUTN7 HT_RXCAD7P HT_TXCAD7P HT_CADINN7 HT_CADINN[15..0] (3)
N25 K22
C HT_RXCAD7N HT_TXCAD7N HT_CLKINP[1..0] C
HT_CADOUTP8 HT_CADINP8 HT_CLKINP[1..0] (3)
AC24 F21
HT_CADOUTN8 HT_RXCAD8P HT_TXCAD8P HT_CADINN8 HT_CLKINN[1..0]
AC25 HT_RXCAD8N HT_TXCAD8N G21 HT_CLKINN[1..0] (3)
HT_CADOUTP9 AB25 G20 HT_CADINP9
HT_CADOUTN9 HT_RXCAD9P HT_TXCAD9P HT_CADINN9 HT_CTLINP[1..0]
AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_CTLINP[1..0] (3)
HT_CADOUTP10 AA24 J20 HT_CADINP10
HT_CADOUTN10 HT_RXCAD10P HT_TXCAD10P HT_CADINN10 HT_CTLINN[1..0]
AA25 J21 HT_CTLINN[1..0] (3)
HT_CADOUTP11 HT_RXCAD10N HT_TXCAD10N HT_CADINP11
Y22 HT_RXCAD11P HT_TXCAD11P J18
HT_CADOUTN11 Y23 K17 HT_CADINN11
HT_CADOUTP12 HT_RXCAD11N HT_TXCAD11N HT_CADINP12
W21 L19
HT_CADOUTN12 HT_RXCAD12P HT_TXCAD12P HT_CADINN12
W20 HT_RXCAD12N HT_TXCAD12N J19
HT_CADOUTP13 V21 M19 HT_CADINP13
HT_CADOUTN13 HT_RXCAD13P HT_TXCAD13P HT_CADINN13
V20 HT_RXCAD13N HT_TXCAD13N L18 signals RS880M
HT_CADOUTP14 U20 M21 HT_CADINP14
HT_CADOUTN14 HT_RXCAD14P HT_TXCAD14P HT_CADINN14
U21 P21
HT_CADOUTP15 HT_RXCAD14N HT_TXCAD14N HT_CADINP15
U19 HT_RXCAD15P HT_TXCAD15P P18 HT_TXCALP
HT_CADOUTN15 U18 M18 HT_CADINN15 R7349
HT_RXCAD15N HT_TXCAD15N
301 ohm 1%
HT_CLKOUTP0 T22 H24 HT_CLKINP0 HT_TXCALN
HT_CLKOUTN0 HT_RXCLK0P HT_TXCLK0P HT_CLKINN0
T23 HT_RXCLK0N HT_TXCLK0N H25
HT_CLKOUTP1 AB23 L21 HT_CLKINP1
HT_CLKOUTN1 HT_RXCLK1P HT_TXCLK1P HT_CLKINN1
AA22 HT_RXCLK1N HT_TXCLK1N L20 HT_RXCALP
R7350
HT_CTLOUTP0 M22 M24 HT_CTLINP0 301 ohm 1%
HT_CTLOUTN0 HT_RXCTL0P HT_TXCTL0P HT_CTLINN0
M23 HT_RXCTL0N HT_TXCTL0N M25 HT_RXCALN
HT_CTLOUTP1 R21 P19 HT_CTLINP1
HT_CTLOUTN1 HT_RXCTL1P HT_TXCTL1P HT_CTLINN1
R20 HT_RXCTL1N HT_TXCTL1N R18

R235 301/F_4 HT_RXCALP C23 B24 HT_TXCALP R238 301/F_4


HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 B25
B HT_RXCALN HT_TXCALN B
RS880M

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
RS880M-HT Link I/F
Date: W ednesday, September 15, 2010 Sheet 7 of 41
5 4 3 2 1
5 4 3 2 1

U13B
08
PEG_RXP15 D4 A5 PEG_TXP15_C C519 EV@0.1U/10V_4 PEG_TXP15
PEG_RXN15 GFX_RX0P GFX_TX0P PEG_TXN15_C C518 EV@0.1U/10V_4 PEG_TXN15 PEG_RXN[15:0] PEG_TXN[15:0]
PEG_RXP14
C4
GFX_RX0N PART 2 OF 6 GFX_TX0N
B5
PEG_TXP14_C C523 EV@0.1U/10V_4 PEG_TXP14
(19) PEG_RXN[15:0] PEG_TXN[15:0] (19)
A3 GFX_RX1P GFX_TX1P A4
PEG_RXN14 B3 B4 PEG_TXN14_C C520 EV@0.1U/10V_4 PEG_TXN14 PEG_RXP[15:0] PEG_TXP[15:0]
GFX_RX1N GFX_TX1N (19) PEG_RXP[15:0] PEG_TXP[15:0] (19)
PEG_RXP13 C2 C3 PEG_TXP13_C C524 EV@0.1U/10V_4 PEG_TXP13
PEG_RXN13 GFX_RX2P GFX_TX2P PEG_TXN13_C C522 EV@0.1U/10V_4 PEG_TXN13
C1 GFX_RX2N GFX_TX2N B2
D PEG_RXP12 E5 D1 PEG_TXP12_C C526 EV@0.1U/10V_4 PEG_TXP12 D
PEG_RXN12 GFX_RX3P GFX_TX3P PEG_TXN12_C C525 EV@0.1U/10V_4 PEG_TXN12
F5 GFX_RX3N GFX_TX3N D2
PEG_RXP11 PEG_TXP11_C C530 EV@0.1U/10V_4 PEG_TXP11

PCIE I/F GFX


G5 GFX_RX4P GFX_TX4P E2
PEG_RXN11 G6 E1 PEG_TXN11_C C527 EV@0.1U/10V_4 PEG_TXN11
PEG_RXP10 GFX_RX4N GFX_TX4N PEG_TXP10_C C531 EV@0.1U/10V_4 PEG_TXP10
H5 GFX_RX5P GFX_TX5P F4
PEG_RXN10 H6 F3 PEG_TXN10_C C529 EV@0.1U/10V_4 PEG_TXN10
PEG_RXP9 GFX_RX5N GFX_TX5N PEG_TXP9_C C534 EV@0.1U/10V_4 PEG_TXP9
J6 GFX_RX6P GFX_TX6P F1
PEG_RXN9 J5 F2 PEG_TXN9_C C532 EV@0.1U/10V_4 PEG_TXN9
PEG_RXP8 GFX_RX6N GFX_TX6N PEG_TXP8_C C537 EV@0.1U/10V_4 PEG_TXP8
J7 H4
PEG_RXN8 GFX_RX7P GFX_TX7P PEG_TXN8_C C535 EV@0.1U/10V_4 PEG_TXN8
J8 GFX_RX7N GFX_TX7N H3
PEG_RXP7 L5 H1 PEG_TXP7_C C538 EV@0.1U/10V_4 PEG_TXP7
PEG_RXN7 GFX_RX8P GFX_TX8P PEG_TXN7_C C536 EV@0.1U/10V_4 PEG_TXN7
L6 H2
PEG_RXP6 GFX_RX8N GFX_TX8N PEG_TXP6_C C541 EV@0.1U/10V_4 PEG_TXP6
M8 J2
PEG_RXN6 GFX_RX9P GFX_TX9P PEG_TXN6_C C539 EV@0.1U/10V_4 PEG_TXN6
L8 J1
PEG_RXP5 GFX_RX9N GFX_TX9N PEG_TXP5_C C545 EV@0.1U/10V_4 PEG_TXP5
P7 K4
PEG_RXN5 GFX_RX10P GFX_TX10P PEG_TXN5_C C542 EV@0.1U/10V_4 PEG_TXN5
M7 GFX_RX10N GFX_TX10N K3
PEG_RXP4 P5 K1 PEG_TXP4_C C546 EV@0.1U/10V_4 PEG_TXP4
PEG_RXN4 GFX_RX11P GFX_TX11P PEG_TXN4_C C544 EV@0.1U/10V_4 PEG_TXN4
M5 GFX_RX11N GFX_TX11N K2
PEG_RXP3 R8 M4 PEG_TXP3_C C548 EV@0.1U/10V_4 PEG_TXP3
PEG_RXN3 GFX_RX12P GFX_TX12P PEG_TXN3_C C547 EV@0.1U/10V_4 PEG_TXN3
P8 GFX_RX12N GFX_TX12N M3
PEG_RXP2 R6 M1 PEG_TXP2_C C551 EV@0.1U/10V_4 PEG_TXP2
PEG_RXN2 GFX_RX13P GFX_TX13P PEG_TXN2_C C549 EV@0.1U/10V_4 PEG_TXN2
R5 GFX_RX13N GFX_TX13N M2
PEG_RXP1 P4 N2 PEG_TXP1_C C552 EV@0.1U/10V_4 PEG_TXP1
PEG_RXN1 GFX_RX14P GFX_TX14P PEG_TXN1_C C550 EV@0.1U/10V_4 PEG_TXN1
P3 GFX_RX14N GFX_TX14N N1
PEG_RXP0 T4 P1 PEG_TXP0_C C554 EV@0.1U/10V_4 PEG_TXP0
PEG_RXN0 GFX_RX15P GFX_TX15P PEG_TXN0_C C553 EV@0.1U/10V_4 PEG_TXN0
T3 P2
GFX_RX15N GFX_TX15N
AE3 AC1
GPP_RX0P GPP_TX0P
AD4 AC2
GPP_RX0N GPP_TX0N PCIE_TXP1_C C556 0.1U/10V_4
(28) PCIE_RXP1 AE2 AB4 PCIE_TXP1 (28)
C GPP_RX1P GPP_TX1P PCIE_TXN1_C C558 0.1U/10V_4 C
AD3 AB3
LAN (28) PCIE_RXN1
AD1
GPP_RX1N
GPP_RX2P
GPP_TX1N
GPP_TX2P
AA2
PCIE_TXN1 (28)
AD2 GPP_RX2N PCIE I/F GPP GPP_TX2N AA1
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
U5 GPP_RX4P GPP_TX4P Y4
U6 Y3
GPP_RX4N GPP_TX4N
U8 GPP_RX5P GPP_TX5P V1
U7 GPP_RX5N GPP_TX5N V2

AA8 AD7 A_TXP0_C C565 0.1U/10V_X7R A_TXP0 (12)


(12) A_RXP0 SB_RX0P SB_TX0P
Y8 AE7 A_TXN0_C C564 0.1U/10V_X7R A_TXN0 (12)
(12) A_RXN0 SB_RX0N SB_TX0N
AA7 AE6 A_TXP1_C C560 0.1U/10V_X7R A_TXP1 (12)
(12) A_RXP1 SB_RX1P SB_TX1P
Y7 AD6 A_TXN1_C C559 0.1U/10V_X7R A_TXN1 (12)
(12) A_RXN1 SB_RX1N SB_TX1N
AA5 PCIE I/F SB AB6 A_TXP2_C C563 0.1U/10V_X7R A_TXP2 (12)
(12) A_RXP2 SB_RX2P SB_TX2P
AA6 AC6 A_TXN2_C C561 0.1U/10V_X7R A_TXN2 (12)
(12) A_RXN2 SB_RX2N SB_TX2N
W5 AD5 A_TXP3_C C555 0.1U/10V_X7R A_TXP3 (12)
(12) A_RXP3 SB_RX3P SB_TX3P
Y5 AE5 A_TXN3_C C557 0.1U/10V_X7R A_TXN3 (12)
(12) A_RXN3 SB_RX3N SB_TX3N
AC8 NB_PCIECALRP R11 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R14 2K/F_4
PCE_CALRN(PCE_BCALRN) AB8 VCC1.1
RS880M

B B

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
RS880M-PCIE I/F
Date: W ednesday, September 15, 2010 Sheet 8 of 41
5 4 3 2 1
5 4 3 2 1

Enables Debug Bus acess


through memory I/O pads and GPIO.
0 : Enable RS880M , Default
1 : Disable RS880M
(RX881 use DAC_VSYNC)
INT_CRT_VSYNC_NB R229

R226
3K/J_4 VCC3
+3V_AVDD_NB

+1.8V_AVDDDI_NB
F12
E12
U13C
AVDD1(NC)
AVDD2(NC) PART 3 OF 6
TXOUT_L0P(NC)
TXOUT_L0N(NC)
A22
B22
LVDS_TX_L0P
LVDS_TX_L0N
(25)
(25)
09
F14 A21 LVDS_TX_L1P (25)
AVDDDI(NC) TXOUT_L1P(NC)
*3K/J_4 G15 AVSSDI(NC) TXOUT_L1N(NC) B21 LVDS_TX_L1N (25)
+1.8V_AVDDQ_NB H15 B20 LVDS_TX_L2P (25)
AVDDQ(NC) TXOUT_L2P(NC)
H14 AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) A20 LVDS_TX_L2N (25)
TXOUT_L3P(NC) A19 LVDS_TX_L3P (25)
E17 C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2) B19 LVDS_TX_L3N (25)
F17 Y(DFT_GPIO2)

CRT/TVOUT
D F15 B18 D
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC) LVDS_TX_U0P (25)
TXOUT_U0N(NC) A18 LVDS_TX_U0N (25)
(31) INT_CRT_RED R205 *0/short_4 INT_CRT_RED_R G18 A17 LVDS_TX_U1P (25)
R204 140/F_4 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) VCC1.8
G17 REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2) B17 LVDS_TX_U1N (25)
(31) INT_CRT_GREEN R210 *0/short_4 INT_CRT_GRE_R E18 D20 LVDS_TX_U2P (25)
R209 150/F_4 GREEN(DFT_GPIO1) TXOUT_U2P(NC)
Indicates if memory Side port F18 GREENb(NC) TXOUT_U2N(NC) D21 LVDS_TX_U2N (25)
is available or not (31) INT_CRT_BLU R207 *0/short_4 INT_CRT_BLU_R E19 D18 LVDS_TX_U3P (25)
R206 150/F_4 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) L3 +1.8V_VDDA18PCIEPLL
F19 D19 LVDS_TX_U3N (25)
0: Reserved BLUEb(NC) TXOUT_U3N(NC)
1: Required setting. Select with a pull-up (31) INT_CRT_HSYNC R227 *0/short_4 INT_CRT_HSYNC_NB A11 B16 LVDS_TXCLK_LP (25) BLM18PG221SN1D _6
R230 *0/short_4 INT_CRT_VSYNC_NB DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1)
resistor on the strap (31) INT_CRT_VSYNC B11 DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) A16 LVDS_TXCLK_LN (25)
R212 *0/short_4 INT_DDCDAT_NB F8 D16 C22
( RX881 use DAC_HSYNC) (31) INT_CRT_DDCDAT
R211 *0/short_4 INT_DDCCLK_NB DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4) LVDS_TXCLK_UP (25)
(31) INT_CRT_DDCCLK E8 D17 LVDS_TXCLK_UN (25) 2.2U/6.3V_6
DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
R26 715/F_6 DAC_RSET_NB G14
INT_CRT_HSYNC_NB R220 3K/J_4 DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
VCC3 VDDLTP18(NC) A13
+1.1V_PLLVDD A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
D14

PLL PWR
PLLVDD18(NC) +1.8V_VDDLT_18_NB
B12 A15

LVTM
R225 PLLVSS(NC) VDDLT18_1(NC) L10 +1.8V_VDDA18HTPLL
VDDLT18_2(NC) B15
*3K/J_4 20mA +1.8V_VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC) BLM18PG221SN1D _6
VDDLT33_2(NC) B14
120mA +1.8V_VDDA18PCIEPLL D7
VDDA18PCIEPLL1 C106
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
D15 2.2U/6.3V_6
VSSLT2(VSS)
(10,12) A_RST#_SB 1R213 2 *0/short_4 NB_RST#_IN D8 C16
NB_PW RGD SYSRESETb VSSLT3(VSS)
(16) NB_PW RGD A10 C18
POWERGOOD VSSLT4(VSS)

PM
NB_LDT_STOP# C10 C20
NB_ALLOW _LDTSTOP LDTSTOPb VSSLT5(VSS)
C12 E20
ALLOW_LDTSTOP VSSLT6(VSS)
C22
C VSSLT7(VSS) C
(12) CLK_NB_HTREFP_PR C25 HT_REFCLKP
(12) CLK_NB_HTREFN_PR C24
HT_REFCLKN

(12) CLK_NBREFP E11 REFCLK_P/OSCIN(OSCIN)

CLOCKs
F11 E9 R12 *0/short_4 INT_LVDS_PW REN (25)
(12) CLK_NBREFN REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP)
F7 R4 *0/short_4 INT_LVDS_BRIGHT (25)
R7 4.7K/J_4 LVDS_BLON(PCE_RCALRP) R34 *0/short_4
T2 G12 INT_LVDS_BLON (25)
R6 4.7K/J_4 GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
T1 GFX_REFCLKN
U1 R13 R5 R23
GPP_REFCLKP
U2 GPP_REFCLKN 4.7K 4.7K 4.7K

(12) CLK_SBLINKP_PR V4 GPPSB_REFCLKP(SB_REFCLKP)


(12) CLK_SBLINKN_PR V3
GPPSB_REFCLKN(SB_REFCLKN)
(25) INT_EDID_CLK INT_EDID_CLK B9
INT_EDID_DATA I2C_CLK
(25) INT_EDID_DATA A9
I2C_DATA MIS. TMDS_HPD(NC)
D9 T100 PVT
A8 D10
DDC_CLK0/AUX0P(NC) HPD(NC)
PVT T101 B8
DDC_DATA0/AUX0N(NC)
B7 D12 R17 *0/short_4 SUS_STAT# (13)
DDC_CLK1/AUX1P(NC) SUS_STAT#(PWM_GPIO5)
A7 DDC_DATA1/AUX1N(NC) SUS_STAT#_R (10)
AE8 NB_THERMDA NB_THERMDA (5)
STRP_DATA THERMALDIODE_P NB_THERMDC
B10 AD8 NB_THERMDC (5)
STRP_DATA THERMALDIODE_N

T1 G11 RSVD TESTMODE D13 TEST_EN


R216 *2K/F R18
VCC3 STRP_DATA R214 150R RS880_AUX_CAL C8 1.8K/F_4
AUX_CAL(NC)
R215 *2K/F RS880M

B B

BLM18PG181SN1D(180-1.5A)_6
L6 +3V_AVDD_NB +1.1V_PLLVDD VCC1.8
VCC1.8 VCC3 VCC1.1
BLM18PG181SN1D(180-1.5A)_6 L45
BLM18PG181SN1D(180-1.5A)_6
AVDD-DAC Analog PLLVDD - Graphics PLL +1.8V_VDDLTP18_NB
VCC1.8 C37 C35 L44
R16 2.2U/6.3V_6 2.2U/6.3V_6 VDDLTP18 - LVDS or DVI/HDMI PLL
2.2K_4 C41
2.2U/6.3V_6
5

+ U1

(5,12) LDT_STOP# 2 Open 4 NB_LDT_STOP# BLM21PG221SN1D(220-100M-2A)_8


Drain +1.8V_VDDLT_18_NB
L46
- 74LVC07 VCC1.8 PLLVDD18 - Graphics PLL
3

VCC1.8 C62 VDDLT18 - LVDS or


L8 +1.8V_PLLVDD18 C577 C576 DVI/HDMI digital
R21 1K/F_4 VCC1.8 BLM18PG181SN1D(180-1.5A)_6 R35 0/J_6 +1.8V_AVDDDI_NB AVDDI-DAC Digital 4.7U/6.3V_6 2.2U/6.3V_6 0.1U/10V_4

R22 *0/short_4 NB_ALLOW _LDTSTOP


(12) ALLOW _LDTSTOP
C72 C64 C99
10U/6.3V_8 2.2U/6.3V_6 0.1U/10V_4
A A

BLM18PG181SN1D(180-1.5A)_6
+1.8V_AVDDQ_NB AVDDQ-DAC Bandgap Reference
L13

C113
2.2U/6.3V_6 Quanta Computer Inc.
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
RS880M-System I/F
Date: W ednesday, September 15, 2010 Sheet 9 of 41
5 4 3 2 1
5 4 3 2 1

U13D
10
PAR 4 OF 6
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
AE16 AA20
MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC)
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
D AB14 AA15 D
MEM_A6(NC) MEM_DQ6/DVO_D2(NC)
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20

SBD_MEM/DVO_I/F
AD15 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) AD19
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
AC22
MEM_DQ14/DVO_D10(NC)
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
AE17 MEM_BA1(NC)
AD17 Y17
MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC)
W18
MEM_DQS0N/DVO_IDCKN(NC)
W12 AD20
MEM_RASb(NC) MEM_DQS1P(NC)
Y12 AE21
MEM_CASb(NC) MEM_DQS1N(NC)
AD18 MEM_WEb(NC)
AB13 W17
MEM_CSb(NC) MEM_DM0(NC)
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
V14
MEM_ODT(NC)
IOPLLVDD18(NC) AE23 VCC1.8 15mA
V15
MEM_CKP(NC) IOPLLVDD(NC)
AE24 VCC1.1 26mA
W14 MEM_CKN(NC)
AD23
IOPLLVSS(NC)
AE12 MEM_COMPP(NC)
AD12 AE18 SPM_VREF1
MEM_COMPN(NC) MEM_VREF(NC)
RS880M
R232
*0/short_4
C C

STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO.

RS880M
1 Disable
0 Enable

B B
DFT_GPIO1: LOAD_EEPROM_STRAPS

D23
Selects Loading of STRAPS from EPROM
(9) SUS_STAT#_R A_RST#_SB (9,12)
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
*BAS316 0 : I2C Master can load strap values from EEPROM if connected, or use
R390 *3K default values if not connected

RS880M: Enables Side port memory


RS880M:HSYNC#

Selects if Memory SIDE PORT is available or not


1 = Memory Side port Not available
0 = Memory Side port available
A A
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
RS880M-Spmem/Straps
Date: W ednesday, September 15, 2010 Sheet 10 of 41
5 4 3 2 1
5 4 3 2 1

11

AE14
RS880M POWER TABLE

AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
L1
L2
L4
L7
J4
U13F PIN NAME RS880M PIN NAME RS880M

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
RS880M
VDDHT +1.1V IOPLLVDD +1.1V

VDDHTRX +1.1V AVDD +3.3V

VDDHTTX +1.2V AVDDDI +1.8V

PART 6/6
D D
GROUND VDDA18PCIE +1.8V AVDDQ +1.8V

VDDG18 +1.8V PLLVDD +1.1V

VDD18_MEM +1.8V PLLVDD18 +1.8V

VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VDDPCIE +1.1V VDDA18PCIEPLL +1.8V

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDC +1.1V VDDA18HTPLL +1.8V

VDD_MEM +1.8V/1.5V VDDLTP18 +1.8V

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDDG33 +3.3V VDDLT18 +1.8V

IOPLLVDD18 +1.8V VDDLT33 NC

VCC1.1
1.1V@0.6A VCC1.1
U13E
L7 +1.1V_VDDHT J17 A6
*0/short_8 VDDHT_1 VDDPCIE_1
C
K16
VDDHT_2 PART 5/6 VDDPCIE_2
B6
C
L16 VDDHT_3 VDDPCIE_3 C6
C66 C80 C69 C79 M16 D6 C20 C31 C19 C30 C21
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHT_4 VDDPCIE_4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6
P16 VDDHT_5 VDDPCIE_5 E6 PVT:Delete R10
1.1v@0.7A R16 VDDHT_6 VDDPCIE_6 F6
T16 VDDHT_7 VDDPCIE_7 G7
VDDPCIE_8 H8
L11 +1.1V_VDDHTRX H18 J9
*0/short_8 VDDHTRX_1 VDDPCIE_9
G19 VDDHTRX_2 VDDPCIE_10 K9
F20 VDDHTRX_3 VDDPCIE_11 M9
C108 C67 C98 C104 E21 L9
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTRX_4 VDDPCIE_12
D22 VDDHTRX_5 VDDPCIE_13 P9
B23 R9
VDDHTRX_6 VDDPCIE_14
A23 VDDHTRX_7 VDDPCIE_15 T9
L9
1.2@0.4A +1.2V_VDDHTTX VDDPCIE_16
V9
VCC_NB
VCC1.2 AE25 U9
0/J_6 VDDHTTX_1 VDDPCIE_17
AD24 VDDHTTX_2
AC23 K12
C103 C100 C96 C92 C101 VDDHTTX_3 VDDC_1
AB22 J14
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDHTTX_4 VDDC_2
AA21 U16
VDDHTTX_5 VDDC_3 C61 C39 C59 C43 C111 C65 C44 C60 C110
Y20 VDDHTTX_6 VDDC_4 J11
W19 K15 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
10U/6.3V_8
VDDHTTX_7 VDDC_5
V18 M12

POWER
VDDHTTX_8 VDDC_6
U17 L14
VDDHTTX_9 VDDC_7
T17 L11
VDDHTTX_10 VDDC_8
R17 VDDHTTX_11 VDDC_9 M13
P17 VDDHTTX_12 VDDC_10 M15
M17 VDDHTTX_13 VDDC_11 N12

L5
1.8V@0.7A +1.8V_VDDA18PCIE VDDC_12
N14
VCC1.8 J10 P11
VDDA18PCIE_1 VDDC_13 VCC1.1 VCC_NB
P10 P13
B BLM21PG221SN1D(220-100M-2A)_8 VDDA18PCIE_2 VDDC_14 B
K10 P14
C36 C45 C33 C34 C32 C46 VDDA18PCIE_3 VDDC_15 R41
M10 R12
4.7U/6.3V_6 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDA18PCIE_4 VDDC_16 *RES 0.01R 2W +-2%/7520
L10 VDDA18PCIE_5 VDDC_17 R15
W9 VDDA18PCIE_6 VDDC_18 T11 2 1
H9 VDDA18PCIE_7 VDDC_19 T15
T10 VDDA18PCIE_8 VDDC_20 U12 2P 1P
R10 T14
VDDA18PCIE_9 VDDC_21
Y9 VDDA18PCIE_10 VDDC_22 J16
AA9 VDDA18PCIE_11
AB9 VDDA18PCIE_12 VDD_MEM1(NC) AE10
AD9 AA11
VDDA18PCIE_13 VDD_MEM2(NC)
AE9 Y11
VDDA18PCIE_14 VDD_MEM3(NC)
U10 AD10
VDDA18PCIE_15 VDD_MEM4(NC)
R8 *0/short_6
25mA +1.8V_VDDG18_NB VDD_MEM5(NC) AB10
VCC3
VCC1.8 F9 AC10
VDD18_1 VDD_MEM6(NC)
G9
VDD18_2 R9 0R
AE11 VDD18_MEM1(NC) VDD33_1(NC) H11
AD11 VDD18_MEM2(NC) VDD33_2(NC) H12
C38 C29
RS880M 0.1U/10V_4 0.1U/10V_4
C24
1U/10V_4

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
RS880M-Power
Date: Friday, July 02, 2010 Sheet 11 of 41
5 4 3 2 1
5 4 3 2 1

U22A
12
PCIE_RST#_SB P1
SB800 Part 1 of 5
W2 PCI_CLK0
(26,30) PCIE_RST#_SB PCIE_RST# PCICLK0 T144
A_RST#_SB L1 W1 PCI_CLK1 PCI_CLK1 (16)

PCI CLKS
(9,10) A_RST#_SB A_RST# PCICLK1/GPO36
0_4 R116 W3 PCI_CLK2 PCI_CLK2 (16)
C699 0.1U/10V_X7R A_RXP0_C PCICLK2/GPO37 PCI_CLK3
(8) A_RXP0 AD26 W4 PCI_CLK3 (16)
3V_S5 C698 0.1U/10V_X7R A_RXN0_C A_TX0P PCICLK3/GPO38 PCI_CLK4
(8) A_RXN0 AD27 Y1 PCI_CLK4 (16)
C688 0.1U/10V_X7R A_RXP1_C A_TX0N PCICLK4/14M_OSC/GPO39
(8) A_RXP1 AC28
C689 0.1U/10V_X7R A_RXN1_C A_TX1P
(8) A_RXN1 AC29 V2 T143
C687 0.1U/10V_X7R A_RXP2_C A_TX1N PCIRST#
(8) A_RXP2 AB29

5
R117 U8 C682 0.1U/10V_X7R A_RXN2_C A_TX2P
(8) A_RXN2 AB28
33_4 A_RST#_SB C685 0.1U/10V_X7R A_RXP3_C A_TX2N
2 (8) A_RXP3 AB26 AA1 T172
D
C686 0.1U/10V_X7R A_RXN3_C A_TX3P AD0/GPIO0 D
(19,28) A_RST#_NB 4 (8) A_RXN3 AB27 AA4 T149
A_TX3N AD1/GPIO1
1 SB_GPIO_PCIE_RST# (13) AA3 T145
A_TXP0 AD2/GPIO2
(8) A_TXP0 AE24 AB1 T153
A_RX0P AD3/GPIO3

3
C341 *TC7SH08FU A_TXN0 AE23 AA5
(8) A_TXN0 A_RX0N AD4/GPIO4 T82

PCI EXPRESS INTERFACES


100p/50V_4 C335 A_TXP1 AD25 AB2
(8) A_TXP1 A_RX1P AD5/GPIO5 T157
*0.1u/10V_4 A_TXN1 AD24 AB6
(8) A_TXN1 A_RX1N AD6/GPIO6 T97
A_TXP2 AC24 AB5
(8) A_TXP2 A_RX2P AD7/GPIO7 T84
A_TXN2 AC25 AA6
(8) A_TXN2 A_RX2N AD8/GPIO8 T90
A_TXP3 AB25 AC2
(8) A_TXP3 A_RX3P AD9/GPIO9 T146
A_TXN3 AB24 AC3
(8) A_TXN3 A_RX3N AD10/GPIO10 T150
AC4 T162
R324 590/F_4 PCIE_CALRP_SB AD11/GPIO11
AD29 AC1 T169
R114 2K/F_4 PCIE_CALRN_SB PCIE_CALRP AD12/GPIO12
+1.1V_PCIE_VDDR AD28 AD1 T154
PCIE_CALRN AD13/GPIO13
AD2 T158
0.1U/10V_X7R C683 PCIE_SB_TXP0_C AD14/GPIO14
(30) PCIE_SB_TXP0 AA28 AC6 T94
0.1U/10V_X7R C684 PCIE_SB_TXN0_C GPP_TX0P AD15/GPIO15
AA29 AE2
WLAN (30) PCIE_SB_TXN0
0.1U/10V_X7R C692 PCIE_SB_TXP1_C Y29
GPP_TX0N AD16/GPIO16
AE1
T170
(30) PCIE_SB_TXP1 GPP_TX1P AD17/GPIO17 T163
0.1U/10V_X7R C691 PCIE_SB_TXN1_C Y28 AF8
TV (30) PCIE_SB_TXN1
Y26
GPP_TX1N AD18/GPIO18
AE3
T80
GPP_TX2P AD19/GPIO19 T171
Y27 AF1 T147
GPP_TX2N AD20/GPIO20
W28 AG1 T155
GPP_TX3P AD21/GPIO21
W29 AF2 T151
GPP_TX3N AD22/GPIO22
AE9 AD23 (16)
AD23/GPIO23
AA22 AD9
WLAN (30) PCIE_SB_RXP0
Y21
GPP_RX0P AD24/GPIO24
AC11
AD24 (16)
AD25 (16)
(30) PCIE_SB_RXN0 GPP_RX0N AD25/GPIO25
AA25 AF6
TV (30) PCIE_SB_RXP1
AA24
GPP_RX1P AD26/GPIO26
AF4
AD26 (16)
AD27 (16)
(30) PCIE_SB_RXN1 GPP_RX1N AD27/GPIO27
W23 AF3 WRITE_EDID_ROM (25)
GPP_RX2P AD28/GPIO28
V24 AH2 T164
GPP_RX2N AD29/GPIO29
W24 AG2 T159
GPP_RX3P AD30/GPIO30
W25 AH3 T180
GPP_RX3N AD31/GPIO31

PCI INTERFACE
AA8 T95
CBE0#
AD5 T86
CBE1#
AD8 T74
CBE2#
AA10 T87
CBE3#
AE8 T76
RP3 *0_4P2R_4 FRAME#
AB9 T81
DEVSEL#
C (9) CLK_SBLINKP_PR 4 3 M23 AJ3 T176
C
PCIE_RCLKP/NB_LNK_CLKP IRDY#
(9) CLK_SBLINKN_PR 2 1 P23 AE7 T91
RP8 *0_4P2R_4 PCIE_RCLKN/NB_LNK_CLKN TRDY#
AC5 T96
PAR
(9) CLK_NBREFP 4 3 U29 AF5 T161
NB_DISP_CLKP STOP#
(9) CLK_NBREFN 2 1 U28 AE6 T88
RP7 *0_4P2R_4 NB_DISP_CLKN PERR#
AE4 T89
SERR#
(9) CLK_NB_HTREFP_PR 4 3 T26 AE11 T72
NB_HT_CLKP REQ0#
(9) CLK_NB_HTREFN_PR 2 1 T27 AH5 T175
RP4 *0_4P2R_4 NB_HT_CLKN REQ1#/GPIO40
AH4 T93
REQ2#/CLK_REQ8#/GPIO41
(5) CLK_CPU_BCLKP_PR 4 3 V21 AC12 T77
CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42
(5) CLK_CPU_BCLKN_PR 2 1 T21 AD12 T78
RP1 *0_4P2R_4 CPU_HT_CLKN GNT0#
AJ5 T168
GNT1#/GPO44
(19) CLK_PCIE_VGAP 4 3 V23 AH6 T152
SLT_GFX_CLKP GNT2#/GPO45
(19) CLK_PCIE_VGAN 2 1 T23 AB12 T71
RP5 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46
AB11 T83
CLKRUN#
4 3*0_4P2R_4 L29 AD7
LAN (28) CLK_PCIE_LAN
(28) CLK_PCIE_LAN# 2 1 L28
GPP_CLK0P LOCK# T85
RP6 GPP_CLK0N
AJ6 T156
INTE#/GPIO32
4 3*0_4P2R_4 N29 AG6
TV (30) CLK_PCIE_TV
(30) CLK_PCIE_TV# 2 1 N28
GPP_CLK1P INTF#/GPIO33
AG4
T148
GPP_CLK1N INTG#/GPIO34 T92
RP2 AJ4 R404 8.2K_4 VCC3
INTH#/GPIO35
(30) CLK_PCIE_WLAN 4 3*0_4P2R_4 M29
GPP_CLK2P
2 1 M28
WLAN (30) CLK_PCIE_WLAN# GPP_CLK2N

CLOCK GENERATOR
T25
GPP_CLK3P LPC_CLK0 R328 22/J_4
V25 H24 PCLK_DEBUG (16,30)
GPP_CLK3N LPCCLK0 LPC_CLK1 R327 22/J_4
H25 CLK_PCI_775 (16,26)
LPCCLK1
L24 J27 LPC_LAD0 (26,30)
GPP_CLK4P LAD0 C696
L23 J26 LPC_LAD1 (26,30)
GPP_CLK4N LAD1 C701
H29

LPC
LAD2 LPC_LAD2 (26,30)
P25 H28 5.6P/50V_6 22P/50V_4
GPP_CLK5P LAD3 LPC_LAD3 (26,30)
M25 G28 LPC_LFRAME# (26,30)
GPP_CLK5N LFRAME# LDRQ0#_SB
J25 T62
LDRQ0# LDRQ1#_SB
P29 AA18 T70
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49
P28 AB19 IRQ_SERIRQ (26,30)
GPP_CLK6N SERIRQ/GPIO48
N26
GPP_CLK7P *10K/F_4 R122
N27 3V_S5
B GPP_CLK7N B
G21 ALLOW_LDTSTOP (9)
ALLOW_LDTSTP/DMA_ACTIVE#
T29 H21 CPU_PROCHOT#_1.5 (5)
GPP_CLK8P PROCHOT#
T28 K19

CPU
GPP_CLK8N LDT_PG CPU_PWRGD (5)
G22 LDT_STOP# (5,9)
LDT_STP#
J24 CPU_LDT_RST# (3,5)
SB800_CLK_PCLK_SMB LDT_RST#
T59 L25
14M_25M_48M_OSC
C1 RTC_X1
32K_X1
INTRUDER_ALERT# Left not connected
C693 27P/50V_4 25M_X1 L26 C2 RTC_X2 VCCRTC
25M_X1 32K_X2 (Southbridge has 50-kohm internal

RTC
pull-up to VBAT).
D2
RTCCLK
2

Y3 B2 INTRUDER_ALERT# R159 *1M/F_4


R323 25M_X2 INTRUDER_ALERT# R158 510/F
L27 B1 VCCRTC
25MHZ 1M/J_4 25M_X2 VDDBT_RTC_G

1
1

RTC_X1 SB820M_A12 C441

2
Y5
C694 27P/50V_4 1U/10V_8
3 2
RTC VCCRTC

4 1 RTC_X2 3VPCU D29 CH500H-40


R367
D28
32.768KHZ
CH500H-40
*20M/J_6 R364 20M/J_6 C753 C754
1U/10V_4 0.1U/10V_4

C712 C711
22P/50V_4 22P/50V_4 R434
1K/J_6

Delete G2 PAD
BAT1

1
A A

2+
-
CN SMD RTC HOUSING 2P

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
SB820M-PCIE/PCI/CPU/LPC
Date: Wednesday, September 15, 2010 Sheet 12 of 41
5 4 3 2 1
5 4 3 2 1

3V_S5

13
NC only ,Can't be install
R362 *2.2K/J_4 SB_TEST0 USBCLK/41M_25M_48M_OSC pin is CLK input
3V_S5
pin when EXT CLKGEN mode.
R375 *2.2K/J_4 SB_TEST1
It is output CLK source when INT CLKGEN mode.
R156 *2.2K/J_4 PCIE_WAKE#
U22D
R144 *2.2K/J_4 SB_TEST2 J2 A10
PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC
K1 RI#/GEVENT22#
D3 G19 USB_RCOMP_SB R133 11.8K/F_6
SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP
(26) SUSB# F1 SLP_S3#
(26) SUSC# H1 SLP_S5#

ACPI / WAKE UP EVENTS


(26) DNBSWON# F2

USB 1.1 USB MISC


D VCC3 PW R_BTN# D
SCL0/SDATA0 is 3V tolerance Clock gen/Robson/TV (16) SB_PWRGD_IN H5 PW R_GOOD SB800
AMD datasheet define it tuner R168 *0_4 SUS_STAT#_R G6 J10
(9) SUS_STAT# SUS_STAT# USB_FSD1P/GPIO186
SB_TEST0 B3 Part 4 of 5 H11
R121 2.2K/J_4 PCLK_SMB
/DDR2/DDR2 SB_TEST1 TEST0 USB_FSD1N
C4 TEST1/TMS
thermal/Accelerometer SB_TEST2 F6 H9
R118 2.2K/J_4 PDAT_SMB TEST2 USB_FSD0P/GPIO185
(26) SIO_A20GATE AD21 GA20IN/GEVENT0# USB_FSD0N J8
(26) SIO_RCIN# AE21 KBRST#/GEVENT1#
LANLINK_STATE# K2 B12
T177 LPC_PME#/GEVENT3# USB_HSD13P
(26) SIO_EXT_SMI# J29 LPC_SMI#/GEVENT23# USB_HSD13N A12
3V_S5 SCL1/SDATA1 is 3V/S5 tolerance H2
(26) SIO_EXT_SCI# GEVENT5#
AMD datasheet define it SYS_RST# J1 F11
T166 SYS_RESET#/GEVENT19# USB_HSD12P
PCIE_WAKE# H6 E11
(28) PCIE_WAKE# W AKE#/GEVENT8# USB_HSD12N
R150 2.2K/J_4 SB_SMBCLK1 IR_RX1 F3
T167 IR_RX1/GEVENT20#
R157 2.2K/J_4 SB_SMBDATA1 R151 *0/short_4 SB_THERMTRIP# J6 E14
(5) CPU_THERMTRIP# THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P USBP11+ (31)
AC19 E12
(16) NB_PWRGD_IN NB_PW RGD USB_HSD11N USBP11- (31) TOUCH CON
R154 0_4 G1 J12
3V_S5 (26) ICH_RSMRST# RSMRST# USB_HSD10P USBP10+ (30)
SCL2/SDATA2 is 3V/S5 tolerance R153 *22K J14
AMD datasheet define it
3V_S5
C421 *4.7U/6.3V_6 AD19
USB_HSD10N USBP10- (30) CARD READER
CLK_REQ4#/SATA_IS0#/GPIO64
AA16 CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P A13 USBP9+ (31)
R113 10K/F_4 SB_SCLK2 AB21 B13
R119 10K/F_4 SB_SDATA2
(12) SB_GPIO_PCIE_RST#
AC18
SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N USBP9- (31) CCD
T69 CLK_REQ0#/SATA_IS3#/GPIO60
R379 2.2K/J_4 DNBSWON# AF20 D13
T66 SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P
R164 4.7K/J_4 LPC_SMI# SB_GPIO59 AE19 C13
T67 SATA_IS5#/FANIN3/GPIO59 USB_HSD8N
(27) SPKR AF19 SPKR/GPIO66
PCLK_SMB AD22 G12

USB 2.0
VCC3 (17,18,30) PCLK_SMB SCL0/GPIO43 USB_HSD7P
PDAT_SMB AE22 G14
(17,18,30) PDAT_SMB SDA0/GPIO47 USB_HSD7N
T65 F5 SCL1/GPIO227
T61 F4 SDA1/GPIO228 USB_HSD6P G16 USBP6+ (30)
R162 4.7K/J_4 SUS_STAT#_R AH21 G18
C
(26) dGPU_PRSNT#
CRD_CLKREQ# AB18
CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N USBP6- (30) WLAN/BT C
T68 CLK_REQ1#/FANOUT4/GPIO61

GPIO
E1 IR_LED#/LLB#/GPIO184 USB_HSD5P D16 USBP5+ (31)
AJ21 C16
H4
SMARTVOLT2/SHUTDOW N#/GPIO51 USB_HSD5N USBP5- (31) Side USB Port
T174 DDR3_RST#/GEVENT7#
LPC_SMI# D5 B14
(30) LPC_SMI# GBE_LED0/GPIO183 USB_HSD4P USBP4+ (31)
D7 A14
G5
GBE_LED1/GEVENT9# USB_HSD4N USBP4- (31) Side USB Port
GBE_LED2/GEVENT10#
K3 GBE_STAT0/GEVENT11# USB_HSD3P E18 USBP3+ (31)
AA20 E16
CLK_REQG#/GPIO65/OSCIN USB_HSD3N USBP3- (31) USB Port
USB_HSD2P J16 USBP2+ (31)
OC7# H3 J18
T160
OC6# D1
BLINK/USB_OC7#/GEVENT18# USB_HSD2N USBP2- (31) USB Port
T165 USB_OC6#/IR_TX1/GEVENT6#
E4 B17

USB OC
T178 USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P USBP1+ (31)
OC4# D4 A17
T173
SB_JTAG_TDO E8
USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N USBP1- (31) USB Port
SB_JTAG_TCK USB_OC3#/AC_PRES/TDO/GEVENT15#
F7 USB_OC2#/TCK/GEVENT14# USB_HSD0P A16 USBP0+ (31)
SB_JTAG_TDI E7 B16
SB_JTAG_RST# F8
USB_OC1#/TDI/GEVENT13# USB_HSD0N USBP0- (31) USB Port
USB_OC0#/TRST#/GEVENT12#
HD audio interface is +3VS5 voltage
R393 *10K/F_4 ACZ_BCLK M3 D25 SB_SCLK2
ACZ_SDOUT AZ_BITCLK SCL2/GPIO193 SB_SDATA2
(16) ACZ_SDOUT N1 AZ_SDOUT SDA2/GPIO194 F23
ACZ_SDIN0 L2 B26 SB_GPIO195

HD AUDIO
3V_S5 AZ_SDIN0/GPIO167 SCL3_LV/GPIO195 SB_GPIO196
M2 AZ_SDIN1/GPIO168 SDA3_LV/GPIO196 E26
C443 M1 F25
CN6 AZ_SDIN2/GPIO169 EC_PW M0/EC_TIMER0/GPIO197
*10P/50V_4 M4 E22
ACZ_SYNC AZ_SDIN3/GPIO170 EC_PW M1/EC_TIMER1/GPIO198
B 1 N2 AZ_SYNC EC_PW M2/EC_TIMER2/GPIO199 F22 GPIO199 (16) B
SB_JTAG_TCK ACZ_RST# P2 E21 GPIO200 (16)
2 SB_JTAG_TDO 3V_S5 AZ_RST# EC_PW M3/EC_TIMER3/GPIO200
3 SB_JTAG_TDI
4 KSI_0/GPIO201 G24
SB_TEST1 R399 10K/F_4 GBE_COL T1 G25
5 R383 10K/F_4 GBE_CRS GBE_COL KSI_1/GPIO202
6 T4 GBE_CRS KSI_2/GPIO203 E28
SB_JTAG_RST# L6 E29 SB_GPIO195 R337 10K/F_4
7 R403 10K/F_4 GBE_MDIO GBE_MDCK KSI_3/GPIO204
8 L5 GBE_MDIO KSI_4/GPIO205 D29
T9 D28 SB_GPIO196 R333 10K/F_4
GBE_RXCLK KSI_5/GPIO206
U1 C29
*S/W JTAG DEBUG SB JTAG U3
GBE_RXD3
GBE_RXD2
KSI_6/GPIO207
KSI_7/GPIO208 C28
T2

GBE LAN
GBE_RXD1
U2 GBE_RXD0 KSO_0/GPIO209 B28

EMBEDDED CTRL
T5 GBE_RXCTL/RXDV KSO_1/GPIO210 A27
(27) ACZ_SDOUT_AUDIO ACZ_SDOUT_AUDIO R377 33/J_4 ACZ_SDOUT R366 10K/F_4 GBE_RXERR V5 B27
GBE_RXERR KSO_2/GPIO211
P5 GBE_TXCLK KSO_3/GPIO212 D26
C714 *10P/50V_4 M5 A26
GBE_TXD3 KSO_4/GPIO213
P9 GBE_TXD2 KSO_5/GPIO214 C26
ACZ_SYNC_AUDIO R378 33/J_4 ACZ_SYNC T7 A24
(27) ACZ_SYNC_AUDIO GBE_TXD1 KSO_6/GPIO215
P7 GBE_TXD0 KSO_7/GPIO216 B25
C715 *10P/50V_4 M7 A25
GBE_TXCTL/TXEN KSO_8/GPIO217
P4 GBE_PHY_PD KSO_9/GPIO218 D24
M9 GBE_PHY_RST# KSO_10/GPIO219 B24
R136 10K/F_4 GBE_PHY_INTR V7 C24
ACZ_BITCLK_AUDIO R376 33/J_4 ACZ_BCLK GBE_PHY_INTR KSO_11/GPIO220
(27) ACZ_BITCLK_AUDIO KSO_12/GPIO221 B23
SB_SMBDATA1 E23 A23
(25) SB_SMBDATA1 PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222
EMBEDDED CTRL

C713 *10P/50V_4 SB_SMBCLK1 E24 D22


(25) SB_SMBCLK1 PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223
F21 SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224 C22
G29 FC_RST#/GPO160 KSO_16/GPIO225 A22
ACZ_RST#_AUDIO R368 33/J_4 ACZ_RST# B22
(27) ACZ_RST#_AUDIO KSO_17/GPIO226
A D27 PS2KB_DAT/GPIO189
A
ACZ_SDIN0 ACZ_SDIN0 (27) F28 PS2KB_CLK/GPIO190
F29 PS2M_DAT/GPIO191
E27 PS2M_CLK/GPIO192
R402
*10K/F_4

SB820M_A12 Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
If the VDDIO_AZ_S power rail is configured for 1.5V_S5 Size Document Number Rev
DVT
then AZ_SDIN[3:0] can not be connected to 3.3-V devices. SB820M-ACPI/GPIO/USB
Date: Wednesday, September 15, 2010 Sheet 13 of 41
5 4 3 2 1
5 4 3 2 1

AH9
U22B

SB800 AH28
14
(29) SATA_TX0+ SATA_TX0P FC_CLK T129
(29) SATA_TX0- AJ9 SATA_TX0N Part 2 of 5 FC_FBCLKOUT AG28 T56
AF26
SATA HDD AJ8
FC_FBCLKIN T63
(29) SATA_RX0- SATA_RX0N
(29) SATA_RX0+ AH8 SATA_RX0P FC_OE#/GPIOD145 AF28 T55
FC_AVD#/GPIOD146 AG29 T131
D (29) SATA_TX1+ AH10 SATA_TX1P FC_W E#/GPIOD148 AG26 T60 D
(29) SATA_TX1- AJ10 SATA_TX1N FC_CE1#/GPIOD149 AF27 T57
AE29
SATA ODD (29) SATA_RX1- AG10
FC_CE2#/GPIOD150
AF29
T58
IF THERE IS NO IDE, TEST TEMPIN0 R352 10K/F_4
SATA_RX1N FC_INT1/GPIOD144 T130
(29) SATA_RX1+ AF10 AH27 T127
SATA_RX1P FC_INT2/GPIOD147 POINTS FOR DEBUG BUS TEMPIN1 R351 10K/F_4
AG12 SATA_TX2P FC_ADQ0/GPIOD128 AJ27 T126 IS MANDATORY
AF12 AJ26 MB_THRMDA_SB R353 10K/F_4
SATA_TX2N FC_ADQ1/GPIOD129 T128
FC_ADQ2/GPIOD130 AH25 T132
AJ12 SATA_RX2N FC_ADQ3/GPIOD131 AH24 T137
AH12 SATA_RX2P FC_ADQ4/GPIOD132 AG23 T135
AH23 SB_GPIO175 R360 10K/F_4
FC_ADQ5/GPIOD133 T136
AH14 SATA_TX3P FC_ADQ6/GPIOD134 AJ22 T138
AJ14 AG21 SB_GPIO176 R356 10K/F_4
SATA_TX3N FC_ADQ7/GPIOD135 T142
FC_ADQ8/GPIOD136 AF21 T64
AG14 AH22 SIDE_PORT_ID0 R355 10K/F_4
SATA_RX3N FC_ADQ9/GPIOD137 T141

FLASH
Signal Name Explanation AF14 SATA_RX3P FC_ADQ10/GPIOD138 AJ23 T139
AF23 BOARD_ID0 SIDE_PORT_ID1 R354 10K/F_4
FC_ADQ11/GPIOD139 BOARD_ID1
SB800 A11: 800-? 1% resistor to GND. AG17 SATA_TX4P FC_ADQ12/GPIOD140 AJ24
P/N:CS18062FB00(806 Ohm) AF17 AJ25 BOARD_ID2 GPIO180 R350 10K/F_4
SATA_TX4N FC_ADQ13/GPIOD141 BOARD_ID3
SATA_CALRP SB800 A12: TBD-? 1% resistor to GND. (1K ohm) FC_ADQ14/GPIOD142 AG25
AJ17 AH26 BOARD_ID4
SATA_RX4N FC_ADQ15/GPIOD143

SERIAL ATA
AH17 SATA_RX4P
SB800 A11: 931-? 1% resistor to VDDAN_11_SATA.
AJ18 SATA_TX5P
SATA_CALRN SB800 A12: TBD-? 1% resistor to VDDAN_11_SATA. AH18 SATA_TX5N FANOUT0/GPIO52 W5
FANOUT1/GPIO53 W6
AH19 Y9 BOOT_BLOCK_RE
SATA_RX5N FANOUT2/GPIO54
AJ19 SATA_RX5P
W7 WWAN_DET#
+1.1V_AVDD_SATA FANIN0/GPIO56 T79
C V9 CPPE_NC1# C
FANIN1/GPIO57 T75
R132 1K/F_4 SATA_CALRP AB14 W8 CRD_REQ1#
SATA_CALRP FANIN2/GPIO58 T73
R129 931/F_4 SATA_CALRN AA14 SATA_CALRN TEMPIN0
TEMPIN0/GPIO171 B6
A6 TEMPIN1
TEMPIN1/GPIO172 MB_THRMDA_SB
(30) SATA_ACT# AD11 SATA_ACT#/GPIO67 TEMPIN2/GPIO173 A5
B5 THERM_ALERT#
TEMPIN3/TALERT#/GPIO174 THERM_ALERT# (5,26)
VCC3 R149 10K/F_4 C7
TEMP_COMM TEMP_COMM R134 *0/short_4
PLACE SATA_CAL
A3 SB_GPIO175

HW MONITOR
RES VERY CLOSE C708 *22P/50V_4 SATA_X1 AD16
VIN0/GPIO175
B4 SB_GPIO176
SATA_X1 VIN1/GPIO176
TO BALL OF SB820 VIN2/GPIO177 A4 SIDE_PORT_ID0
2

Y4 C5 SIDE_PORT_ID1
R361 VIN3/GPIO178 R349 *0_4 SB_BIOS_WP#
VIN4/GPIO179 A7
*25MHZ *1M/J_4 B7 GPIO180 VCC3 R112 *10K/F_4 BOARD_ID0 R110 10K/F_4
VIN5/GPIO180 CLR_BIOS_DATA
B8
1

VIN6/GBE_STAT3/GPIO181 CLR_PASSWD
AC16 SATA_X2 VIN7/GBE_LED3/GPIO182 A8
SATA_X2 R344 *10K/F_4 BOARD_ID1 R343 10K/F_4
C710 *22P/50V_4

R339 *10K/F_4 BOARD_ID2 R342 10K/F_4


SB_SO J5 G27
SB_SI SPI_DI/GPIO164 NC1
E2 Y2

SPI ROM
SB_SCK SPI_DO/GPIO163 NC2 R346 *10K/F_4 BOARD_ID3 R345 10K/F_4
K4 SPI_CLK/GPIO162
SB_SCE# K9 SPI_CS1#/GPIO165
T179 G2 ROM_RST#/GPIO161 R338 *10K/F_4 BOARD_ID4 R341 *10K/F_4

SB820M_A12
B B

ID4 ID3 ID2 ID1 ID0


8Mbit , SPI
0 UMA
3V_S5

1 Discrete
3V_S5

R174 R169
10K_4 *1K/F_4 R167
10K_4

U9 R420 R421
SB_SCE# 1 8 10K/F_4 10K/F_4
SB_SCK R175 47R_4 SB_SCK_R CE# VDD JP2
6 SCK
SB_SI R177 47R_4 SB_SI_R 5
SB_SO R173 15R_4 SB_SO_R SI C452 CLR_BIOS_DATA
2 SO HOLD# 7 1 2
0.1U/25V/4 CLR_PASSWD 3 4
SB_BIOS_WP# 3 4 BOOT_BLOCK_RE 5 6
W P# VSS
VCCRTC 7 8
W25Q16BVSSIG

CONN RCPT 4x2


R419
10K/F_4

A R180 5% *0 A
NI 0402 VCC3
JP1
SB_SCE# 1 2 SB_SCE#_R
SB_SI_R 3
SB_SO_R 5 6
SB_SCK_R 7 8
3V_S5
Quanta Computer Inc.
*PO@4P*2_4 Wall_2.54MM_ST_Black
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
SB820M-SATA/IDE/HWM/SPI
Date: Wednesday, September 15, 2010 Sheet 14 of 41
5 4 3 2 1
5 4 3 2 1

15
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
PVT
VDD-- S/B CORE power
VCC1.1_SB
VDDQ--3.3V I/O power U22C
131mA SB800 Part 3 of 5 510mA
VCC3 R161 *0/short_6 +3V_VDDIO_PCIGP AH1 N13 +1.1V_VDDCR R100 *0/short_8
VDDIO_33_PCIGP_1 VDDCR_11_1 U22E
V6 VDDIO_33_PCIGP_2 VDDCR_11_2 R15

1
Y19 N17

CORE S0
C437 C419 C412 C413 VDDIO_33_PCIGP_3 VDDCR_11_3 C386 C387 C379 C385 C372
AE5 VDDIO_33_PCIGP_4 VDDCR_11_4 U13 SB800
AC21 U17 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 Y14 AJ2

2
22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDIO_33_PCIGP_5 VDDCR_11_5 VSSIO_SATA_1 VSS_1
AA2 V12 Y16 A28

PCI/GPIO I/O
D VDDIO_33_PCIGP_6 VDDCR_11_6 VSSIO_SATA_2 VSS_2 D
AB4 VDDIO_33_PCIGP_7 VDDCR_11_7 V18 AB16 VSSIO_SATA_3 VSS_3 A2
AC8 VDDIO_33_PCIGP_8 VDDCR_11_8 W 12 PVT AC14 VSSIO_SATA_4 VSS_4 E5
AA7 VDDIO_33_PCIGP_9 VDDCR_11_9 W 18 AE12 VSSIO_SATA_5 VSS_5 D23
AA9 VCC1.1_SB AE14 E25
VDDIO_33_PCIGP_10 L33 420A50T _8 VSSIO_SATA_6 VSS_6
AF7 VDDIO_33_PCIGP_11 xx mA+1.1V_VDDAN_CLK AF9 VSSIO_SATA_7 VSS_7 E6
AA19 VDDIO_33_PCIGP_12 VDDAN_11_CLK_1 K28 AF11 VSSIO_SATA_8 VSS_8 F24
VDDAN_11_CLK_2 K29 AF13 VSSIO_SATA_9 VSS_9 N15

1
VDDAN_11_CLK_3 J28 AF16 VSSIO_SATA_10 VSS_10 R13
K26 C346 C340 C330 C322 C321 AG8 R17

CLKGEN I/O
R98 *0/short_6 VDDAN_11_CLK_4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 22U/6.3V_8 VSSIO_SATA_11 VSS_11
J21 AH7 T10

2
VDDAN_11_CLK_5 VSSIO_SATA_12 VSS_12
AF22 J20 AH11 P10

FLASH I/O
VCC1.8 VDDIO_18_FC_1 VDDAN_11_CLK_6 VSSIO_SATA_13 VSS_13
AE25 VDDIO_18_FC_2 VDDAN_11_CLK_7 K21 AH13 VSSIO_SATA_14 VSS_14 V11

1
C318 C342 C325 AF24 J22 AH16 U15
R108 VDDIO_18_FC_3 VDDAN_11_CLK_8 VSSIO_SATA_15 VSS_15
AC22 VDDIO_18_FC_4 AJ7 VSSIO_SATA_16 VSS_16 M18
4.7uF *0 AJ11 V19

2
0.1U/10V_4 0.1U/10V_4 VSSIO_SATA_17 VSS_17
VDDRF_GBE_S V1 AJ13 VSSIO_SATA_18 VSS_18 M11
AJ16 L12
POWER VDDIO_33_GBE_S M10
VSSIO_SATA_19 VSS_19
VSS_20 L18

L30
43mA A9 VSSIO_USB_1 VSS_21 J7
AE28 B10 P3

GBE LAN
VCC3 VDDPL_33_PCIE VSSIO_USB_2 VSS_22
PVT BLM18PG221SN1D(220_1.4A)_6 K11 VSSIO_USB_3 VSS_23 V4
C317 C326 SB820 without GBE: Connected to GND plane. B9 AD6

PCI EXPRESS
2.2U/6.3V_6 *0.1U/10V_4 VSSIO_USB_4 VSS_24
U26 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L7 D10 VSSIO_USB_5 VSS_25 AD4
+1.1V_PCIE_VDDR V22 L9 D12 AB7
L31 VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 VSSIO_USB_6 VSS_26
600mA V26 VDDAN_11_PCIE_3 D14 VSSIO_USB_7 VSS_27 AC9
VCC1.1_SB V27 VDDAN_11_PCIE_4 D17 VSSIO_USB_8 VSS_28 V8
V28 VDDAN_11_PCIE_5 VDDIO_GBE_S_1 M6 E9 VSSIO_USB_9 VSS_29 W9
1

1
420A50T _8 V29 P8 F9 W 10
C323 C336 C327 C331 VDDAN_11_PCIE_6 VDDIO_GBE_S_2 VSSIO_USB_10 VSS_30
W 22 VDDAN_11_PCIE_7 F12 VSSIO_USB_11 VSS_31 AJ28
C W 26 F14 B29 C
2

22U/6.3V_8 1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDAN_11_PCIE_8 VSSIO_USB_12 VSS_32


F16 VSSIO_USB_13 VSS_33 U4
C9 VSSIO_USB_14 VSS_34 Y18

L40 +3V_VDDPL_SATA
93mA G11 VSSIO_USB_15 VSS_35 Y10
32mA

GROUND
VCC3 AD14 VDDPL_33_SATA F18 VSSIO_USB_16 VSS_36 Y12
BLM18PG221SN1D(220_1.4A)_6 A21 +3V_VDDIO R120 *0/short_6 3V_S5 D9 Y11
VDDIO_33_S_1 VSSIO_USB_17 VSS_37
1

AJ20 VDDAN_11_SATA_1 VDDIO_33_S_2 D21 H12 VSSIO_USB_18 VSS_38 AA11

1
C405 C380 AF18 B21 H14 AA12

SERIAL ATA
VDDAN_11_SATA_4 VDDIO_33_S_3 VSSIO_USB_19 VSS_39
PVT AH20 K10 C388 C339 C390 H16 G4

3.3V_S5 I/O
2

22U/6.3V_8 *0.1U/10V_4 VDDAN_11_SATA_2 VDDIO_33_S_4 *0.1U/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 VSSIO_USB_20 VSS_40


AG19 L10 H18 J4

2
+1.1V_AVDD_SATA VDDAN_11_SATA_3 VDDIO_33_S_5 VSSIO_USB_21 VSS_41
AE18 VDDAN_11_SATA_5 VDDIO_33_S_6 J9 J11 VSSIO_USB_22 VSS_42 G8
L35 567mA AD18 T6 J19 G9
VDDAN_11_SATA_6 VDDIO_33_S_7 VSSIO_USB_23 VSS_43
VCC1.1_SB AE16 VDDAN_11_SATA_7 VDDIO_33_S_8 T8 K12 VSSIO_USB_24 VSS_44 M12
K14 VSSIO_USB_25 VSS_45 AF25
1

420A50T _8 K16 H7
C344 C337 C371 C355 C338 VSSIO_USB_26 VSS_46
113mA K18 AH29

CORE S5
+1.1V_VDDCR_11 R107 *0/short_6 VSSIO_USB_27 VSS_47
F26 1.1V_S5 H19 V10
2

22U/6.3V_8 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 VDDCR_11_S_1 VSSIO_USB_28 VSS_48


A18 VDDAN_33_USB_S_1 VDDCR_11_S_2 G26 VSS_49 P6

1
A19 VDDAN_33_USB_S_2 xx mA C333 C332 VSS_50 N4
A20 VDDAN_33_USB_S_3 VDDIO_AZ_S M8 +VDDIO_AZ Y4 EFUSE VSS_51 L4
B18 197mA 1U/10V_4 1U/10V_4 L8

2
+3.3V_VDDAN_USB VDDAN_33_USB_S_4 VSS_52
B19 VDDAN_33_USB_S_5 VDDCR_11_USB_S_1 A11 D8 VSSAN_HW M
658mA B20 B11

USB I/O
VDDAN_33_USB_S_6 VDDCR_11_USB_S_2 +1.1V_USB_PHY_R
3V_S5 L58 C18 M19 M20
BLM21PG221SN1D(220_2A)_8 VDDAN_33_USB_S_7 VSSXL VSSPL_SYS
C20 VDDAN_33_USB_S_8
1

C704 C703 C349 C347


D18 VDDAN_33_USB_S_9 VDDPL_33_SYS M21 +3V_VDDPL 47mA
For support USB D19 VDDAN_33_USB_S_10 P21 VSSIO_PCIECLK_1 VSSIO_PCIECLK_14 H23
wakeup-->3V_S5 D20 L22 +1.1V_VDDPL 62mA P20 H26
2

10U/6.3V_8 10U/6.3V_8 1U/10V_4 1U/10V_4 VDDAN_33_USB_S_11 VDDPL_11_SYS_S VSSIO_PCIECLK_2 VSSIO_PCIECLK_15


E19 VDDAN_33_USB_S_12 PLL M22 VSSIO_PCIECLK_3 VSSIO_PCIECLK_16 AA21
B VDDPL_33_USB_S F19 +3.3V_VDDAN_USB 17mA M24 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17 AA23 B
M26 VSSIO_PCIECLK_5 VSSIO_PCIECLK_18 AB23

L38 +1.1V_VDDAN_USB
xx mA C11 VDDAN_11_USB_S_1 VDDAN_33_HW M_S D6 +3V_HWM_VDDAN 5mA P22 VSSIO_PCIECLK_6 VSSIO_PCIECLK_19 AD23
1.1V_S5 D11 VDDAN_11_USB_S_2 P24 VSSIO_PCIECLK_7 VSSIO_PCIECLK_20 AA26
BLM18PG221SN1D(220_1.4A)_6 L20 L37 3V_S5 P26 AC26
VDDXL_33_S BLM18PG221SN1D(220_1.4A)_6 VSSIO_PCIECLK_8 VSSIO_PCIECLK_21
T20 VSSIO_PCIECLK_9 VSSIO_PCIECLK_22 Y20

1
C384 C382 T22 W 21
C367 C374 VSSIO_PCIECLK_10 VSSIO_PCIECLK_23
If the VDDIO_AZ_S T24 VSSIO_PCIECLK_11 VSSIO_PCIECLK_24 W 20
power rail 2.2U/6.3V_6 0.1U/10V_4 SB820M_A12 *0.1U/10V_4 2.2U/6.3V_6 V20 AE26

2
VSSIO_PCIECLK_12 VSSIO_PCIECLK_25
is configured for J23 VSSIO_PCIECLK_13 VSSIO_PCIECLK_26 L21
VSSIO_PCIECLK_27 K20
1.5V_S5
then AZ_SDIN[3:0] Part 5 of 5
can not be +3V_VDDPL
L66 +1.1V_USB_PHY_R VCC3 +3.3V_VDDAN_USB
connected to 3.3-V +VDDIO_AZ 1.2V_S5_USB
0_6 SB820M_A12
devices. CLOSE PIN F19
1.1V_S5 L36 L29
3V_S5 R148 *0/short_6 *0_6 BLM18PG221SN1D(220_1.4A)_6
C348 C702
1

1
0.1u/10V_4 2.2u/6.3V_6
C377 C378 C373 C311 C345
1

0.1U/10V_4 0.1U/10V_4 10U/6.3V_8 *0.1U/10V_4 2.2U/6.3V_6


2

2
C409
2.2U/6.3V_6
2

3V_S5 +3V_HWM_VDDAN 1.1V_S5 +1.1V_VDDPL


A A

L39 L32
BLM18PG221SN1D(220_1.4A)_6 BLM18PG221SN1D(220_1.4A)_6
1

C408 C406 C328 C324


0.1u/10V_4 2.2u/6.3V_6 *0.1U/10V_4 2.2U/6.3V_6
Quanta Computer Inc.
2

PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
SB820M-PWR/DECOUPLING
Date: Friday, July 02, 2010 Sheet 15 of 41
5 4 3 2 1
5 4 3 2 1

REQUIRED STRAPS
OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS. 16
SB820M is
For
supported Gen1 internal
mode only. clock GEN.
D 3V_S5 VCC3 VCC3 VCC3 VCC3 3V_S5 3V_S5 3V_S5 D

R398 R370 R373 R391 R380 R331 R325 R335


*10K/F_4 *10K/F_4 *10K/F_4 *10K/F_4 10K/F_4 *10K/F_4 10K/F_4 2.2K/F_4

(13) GPIO200
(13) GPIO199
(12,26) CLK_PCI_775
(12,30) PCLK_DEBUG
(12) PCI_CLK4
(12) PCI_CLK3
(12) PCI_CLK2
(12) PCI_CLK1
(13) ACZ_SDOUT

R111 R336
R394 R371 R374 R392 R381 R332 R326 2.2K_4 *2.2K_4
10K/F_4 10K/F_4 10K/F_4 10K/F_4 *10K/F_4 10K/F_4 *10K/F_4

AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199


VCC1.8 VCC1.8
C LOW POWER ALLOW Watchdog USE non_Fusion EC INT. CLKGEN H, H=Reserved C
PULL
HIGH MODE PCIE Gen2 Timer Enable DEBUG CLOCK MODE ENABLED ENABLED DEFAULT
H, L=SPI ROM
STRAPS R15 C562 0.1U/10V_4
DEFAULT DEFAULT 300/J_4

5
NB_PWRGD_IN 1
(13) NB_PWRGD_IN
PULL PERFORMANCE FORCE Watchdog IGNORE Fusion EC EXT. CLKGEN L,H=LPC ROM 4 R218 33/J_4 NB_PWRGD
NB_PWRGD (9)
SB_PWRGD_IN 2
LOW MODE PCIE Gen1 Timer Disable DEBUG CLOCK MODE DISABLED ENABLE
L, L=FWH ROM

3
STRAPS U12
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT TC7SZ08FU

internal have
pull Hi 10K
R217 *0_4
DEBUG STRAPS
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]

B
(12) AD23 B
(12) AD24
(12) AD25
(12) AD26
(12) AD27 NB_PWRGD_IN:
RS880/RX881 = 1.8V;
1

Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)
R411 R414 R140 R155 R137
*2.2K/J_4 *2.2K/J_4 *2.2K/J_4 *2.2K/J_4 *2.2K/J_4
3V_S5 R160 10K/F_4 R152 *0/short_4 SB_PWRGD_IN
SB_PWRGD_IN (13)
2

C442
*2.2U/6.3V_6 NB/SB POWER GOOD CIRCUIT

PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 (5,26,32) CPU_VDDIO_PWRGD 2

3
USE PCI DISABLE ILA USE FC DISABLE I2C DISABLE PCI
PULL PLL AUTORUN PLL ROM MEM BOOT (5,26,32) PWROK_EC 1
HIGH D15
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT BAT54A

PULL BYPASS ENABLE ILA BYPASS FC ENABLE I2C ROM ENABLE PCI
LOW PCI PLL AUTORUN PLL use REQ3# as SDA MEM BOOT
A use GNT3# as SCL A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
SB820M-STRAPS/PWRGD
Date: Wednesday, September 15, 2010 Sheet 16 of 41
5 4 3 2 1
5 4 3 2 1

CHANNEL A DIMM 0
(4) M_A_A[15:0]
M_A_A0
M_A_A1
98
97
JDIM2A

A0 DQ0 5
7
M_A_DQ0
M_A_DQ1
M_A_DQ[63..0] (4)
1.5VSUS

75
76
JDIM2B

VDD1 VSS16 44
48
1.5VSUS

R145
C417
C423
17
M_A_A2 A1 DQ1 M_A_DQ2 VDD2 VSS17 2.2U/6.3V_6 0.1uF 10% 16V X7R 0402
96 A2 DQ2 15 81 VDD3 VSS18 49
M_A_A3 95 17 M_A_DQ3 82 54
M_A_A4 A3 DQ3 M_A_DQ4 VDD4 VSS19
92 A4 DQ4 4 87 VDD5 VSS20 55
D M_A_A5 91 6 M_A_DQ5 C432C459C427C454 88 60 1K 1% 1/16W 0402 D
M_A_A6 A5 DQ5 M_A_DQ6 VDD6 VSS21
90 A6 DQ6 16 93 VDD7 VSS22 61

1uF 10% 6.3V X5R 0402

1uF 10% 6.3V X5R 0402

1uF 10% 6.3V X5R 0402

1uF 10% 6.3V X5R 0402


M_A_A7 86 18 M_A_DQ7 94 65
M_A_A8 A7 DQ7 M_A_DQ8 VDD8 VSS23 R147 VREF_DQ_DDRA
89 A8 DQ8 21 99 VDD9 VSS24 66
M_A_A9 85 23 M_A_DQ9 100 71
M_A_A10 A9 DQ9 M_A_DQ10 VDD10 VSS25 0 5% 1/16W 0402
107 A10/AP DQ10 33 105 VDD11 VSS26 72
M_A_A11 M_A_DQ11 R146 C415 C426 C425 C424

PC2100 DDR3 SDRAM SO-DIMM


84 A11 DQ11 35 106 VDD12 VSS27 127
M_A_A12 83 22 M_A_DQ12 111 128
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD13 VSS28
119 A13 DQ13 24 112 VDD14 VSS29 133

0.1uF 10% 16V X7R 0402

0.1uF 10% 16V X7R 0402

0.01U

1000P/50V/4
M_A_A14 80 34 M_A_DQ14 117 134
M_A_A15 A14 DQ14 M_A_DQ15 VDD15 VSS30 1K 1% 1/16W 0402
78 A15 DQ15 36 118 VDD16 VSS31 138
M_A_DQ16

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 123 VDD17 VSS32 139
(4) M_BA_A0 M_BA_A0 109 41 M_A_DQ17 124 144
M_BA_A1 BA0 DQ17 M_A_DQ18 VDD18 VSS33
(4) M_BA_A1 108 BA1 DQ18 51 VSS34 145
(4) M_BA_A2 M_BA_A2 79 53 M_A_DQ19 VCC3 199 150
M_CS#_A0 BA2 DQ19 M_A_DQ20 VDDSPD VSS35
(4) M_CS#_A0 114 S0# DQ20 40 VSS36 151
(4) M_CS#_A1 M_CS#_A1 121 42 M_A_DQ21 77 155
M_CLK_DDR_A0 S1# DQ21 M_A_DQ22 NC1 VSS37
(4) M_CLK_DDR_A0 101 CK0 DQ22 50 122 NC2 VSS38 156
(4) M_CLK_DDR#_A0 M_CLK_DDR#_A0 103 52 M_A_DQ23 125 161
M_CLK_DDR_A1 CK0# DQ23 M_A_DQ24 NCTEST VSS39
(4) M_CLK_DDR_A1 102 CK1 DQ24 57 VSS40 162
(4) M_CLK_DDR#_A1 M_CLK_DDR#_A1 104 59 M_A_DQ25 (4) MEM_MA_EVENT_L MEM_MA_EVENT_L 198 167
M_CKE_A0 CK1# DQ25 M_A_DQ26 M_A_RST# EVENT# VSS41 1.5VSUS
(4) M_CKE_A0 73 CKE0 DQ26 67 (4) M_A_RST# 30 RESET# VSS42 168
(4) M_CKE_A1 M_CKE_A1 74 69 M_A_DQ27 172
M_A_CAS# CKE1 DQ27 M_A_DQ28 VSS43
(4) M_A_CAS# 115 CAS# DQ28 56 VSS44 173
(4) M_A_RAS# M_A_RAS# 110 58 M_A_DQ29 VREF_DQ_DDRA 1 178
M_A_WE# RAS# DQ29 M_A_DQ30 VREF_CA_DDRA VREF_DQ VSS45 C453
(4) M_A_WE# 113 WE# DQ30 68 126 VREF_CA VSS46 179
SA0_A_0 197 70 M_A_DQ31 184 R165 C461
SA1_A_0 SA0 DQ31 M_A_DQ32 VSS47 2.2U/6.3V_6 0.1uF 10% 16V X7R 0402
C 201 SA1 DQ32 129 VSS48 185 C
(13,18,30) PCLK_SMB 202 131 M_A_DQ33 2 189
SCL DQ33 M_A_DQ34 VCC3 VSS1 VSS49
(13,18,30) PDAT_SMB 200 SDA DQ34 141 3 VSS2 VSS50 190
143 M_A_DQ35 8 195

(204P)
M_ODT_A0 DQ35 M_A_DQ36 VSS3 VSS51 1K 1% 1/16W 0402
(4) M_ODT_A0 116 ODT0 DQ36 130 9 VSS4 VSS52 196
(4) M_ODT_A1 M_ODT_A1 120 132 M_A_DQ37 13
ODT1 DQ37 M_A_DQ38 VSS5 R171 VREF_CA_DDRA
DQ38 140 14 VSS6
(4) M_A_DM0 M_A_DM0 11 142 M_A_DQ39 C435 C439 19
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS7 SMDDR_VTERM 0 5% 1/16W 0402
(4) M_A_DM1 28 DM1 DQ40 147 20 VSS8
(4) M_A_DM2 M_A_DM2 46 149 M_A_DQ41 25 R166 C447 C446 C445 C444
(204P)

DM2 DQ41 VSS9

0.1uF 10% 16V X7R 0402

0.1uF 10% 16V X7R 0402


(4) M_A_DM3 M_A_DM3 63 157 M_A_DQ42 26 203
M_A_DM4 DM3 DQ42 M_A_DQ43 VSS10 VTT1
(4) M_A_DM4 136 DM4 DQ43 159 31 VSS11 VTT2 204

0.1uF 10% 16V X7R 0402

0.1uF 10% 16V X7R 0402

0.01U

1000P/50V/4
(4) M_A_DM5 M_A_DM5 153 146 M_A_DQ44 32
M_A_DM6 DM5 DQ44 M_A_DQ45 VSS12 1K 1% 1/16W 0402
(4) M_A_DM6 170 DM6 DQ45 148 37 VSS13 GND 205
(4) M_A_DM7 M_A_DM7 187 158 M_A_DQ46 38 206
DM7 DQ46 M_A_DQ47 VSS14 GND
DQ47 160 43 VSS15
(4) M_A_DQS0 M_A_DQS0 12 163 M_A_DQ48
M_A_DQS1 DQS0 DQ48 M_A_DQ49
(4) M_A_DQS1 29 DQS1 DQ49 165
(4) M_A_DQS2 M_A_DQS2 47 175 M_A_DQ50
M_A_DQS3 DQS2 DQ50 M_A_DQ51 DDR3-DIMM0_H=5.2_Standard
(4) M_A_DQS3 64 DQS3 DQ51 177
(4) M_A_DQS4 M_A_DQS4 137 164 M_A_DQ52
M_A_DQS5 DQS4 DQ52 M_A_DQ53
(4) M_A_DQS5 154 DQS5 DQ53 166
(4) M_A_DQS6 M_A_DQS6 171 174 M_A_DQ54
M_A_DQS7 DQS6 DQ54 M_A_DQ55
(4) M_A_DQS7 188 DQS7 DQ55 176
(4) M_A_DQS#0 M_A_DQS#0 10 181 M_A_DQ56
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57
(4) M_A_DQS#1 27 DQS#1 DQ57 183
(4) M_A_DQS#2 M_A_DQS#2 45 191 M_A_DQ58
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59
B (4) M_A_DQS#3 62 DQS#3 DQ59 193 B
(4) M_A_DQS#4 M_A_DQS#4 135 180 M_A_DQ60
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61
152 182
(4)
(4)
M_A_DQS#5
M_A_DQS#6 M_A_DQS#6 169
DQS#5 DQ61
192 M_A_DQ62 Place these Caps near So-Dimm0.
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63 1.5VSUS
(4) M_A_DQS#7 186 DQS#7 DQ63 194
VCC3
C455 C458 C456 C431 C434 C457 C428 C430 C460 C429 C433 C469

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

*330U/2V_7343
DDR3-DIMM0_H=5.2_Standard
R170 *10K/F_4 MEM_MA_EVENT_L +

VCC3 SMDDR_VTERM

C438 C422 C462 C465 C440 C436 C448 C420 C451


SPD SA0 0
2.2U/6.3V_6 0.1U/16V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6

SPD SA1 0
A A

R139 0 5% 1/16W 0402 SA1_A_0


R138 0 5% 1/16W 0402 SA0_A_0
Quanta Computer Inc.
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
DDR3 CHA DIMM 0
Date: Wednesday, September 15, 2010 Sheet 17 of 41
5 4 3 2 1
5 4 3 2 1

18
1.5VSUS
CHANNEL B DIMM 0 M_B_DQ[63:0] (4)

(4) M_B_A[15:0] 1.5VSUS


JDIM1A C350
M_B_A0 98 5 M_B_DQ0 R123 C356
M_B_A1 A0 DQ0 M_B_DQ1 2.2U/6.3V_6 0.1uF 10% 16V X7R 0402
97 A1 DQ1 7 JDIM1B
M_B_A2 96 15 M_B_DQ2
M_B_A3 A2 DQ2 M_B_DQ3
95 A3 DQ3 17 75 VDD1 VSS16 44
M_B_A4 92 4 M_B_DQ4 76 48
M_B_A5 A4 DQ4 M_B_DQ5 VDD2 VSS17 1K 1% 1/16W 0402
91 A5 DQ5 6 81 VDD3 VSS18 49
D M_B_A6 90 16 M_B_DQ6 82 54 D
M_B_A7 A6 DQ6 M_B_DQ7 VDD4 VSS19 R125 VREF_DQ_DDRB
86 A7 DQ7 18 87 VDD5 VSS20 55
M_B_A8 89 21 M_B_DQ8 C397C398C366C364 88 60 0 5% 1/16W 0402
M_B_A9 A8 DQ8 M_B_DQ9 VDD6 VSS21
85 A9 DQ9 23 93 VDD7 VSS22 61

1uF 10% 6.3V X5R 0402

1uF 10% 6.3V X5R 0402

1uF 10% 6.3V X5R 0402

1uF 10% 6.3V X5R 0402


M_B_A10 107 33 M_B_DQ10 94 65 R124 C343 C359 C358 C357
M_B_A11 84 A10/AP DQ10 M_B_DQ11 VDD8 VSS23
A11 DQ11 35 99 VDD9 VSS24 66

0.1uF 10% 16V X7R 0402

0.1uF 10% 16V X7R 0402


M_B_A12 83 22 M_B_DQ12 100 71
A12/BC# DQ12 VDD10 VSS25

0.01U

1000P/50V/4
M_B_A13 119 24 M_B_DQ13 105 72
M_B_A14 80 A13 DQ13 M_B_DQ14 VDD11 VSS26 1K 1% 1/16W 0402

PC2100 DDR3 SDRAM SO-DIMM


A14 DQ14 34 106 VDD12 VSS27 127
M_B_A15 78 36 M_B_DQ15 111 128
A15 DQ15 M_B_DQ16 VDD13 VSS28

PC2100 DDR3 SDRAM SO-DIMM


DQ16 39 112 VDD14 VSS29 133
(4) M_BA_B0 M_BA_B0 109 41 M_B_DQ17 117 134
M_BA_B1 BA0 DQ17 M_B_DQ18 VDD15 VSS30
(4) M_BA_B1 108 BA1 DQ18 51 118 VDD16 VSS31 138
(4) M_BA_B2 M_BA_B2 79 53 M_B_DQ19 123 139
M_CS#_B0 BA2 DQ19 M_B_DQ20 VDD17 VSS32
(4) M_CS#_B0 114 S0# DQ20 40 124 VDD18 VSS33 144
(4) M_CS#_B1 M_CS#_B1 121 42 M_B_DQ21 145
M_CLK_DDR_B0 S1# DQ21 M_B_DQ22 VSS34
(4) M_CLK_DDR_B0 101 CK0 DQ22 50 VCC3 199 VDDSPD VSS35 150
(4) M_CLK_DDR#_B0 M_CLK_DDR#_B0 103 52 M_B_DQ23 151
M_CLK_DDR_B1 CK0# DQ23 M_B_DQ24 VSS36
(4) M_CLK_DDR_B1 102 CK1 DQ24 57 77 NC1 VSS37 155
(4) M_CLK_DDR#_B1 M_CLK_DDR#_B1 104 59 M_B_DQ25 122 156
M_CKE_B0 CK1# DQ25 M_B_DQ26 NC2 VSS38 1.5VSUS
(4) M_CKE_B0 73 CKE0 DQ26 67 125 NCTEST VSS39 161
(4) M_CKE_B1 M_CKE_B1 74 69 M_B_DQ27 162
M_B_CAS# CKE1 DQ27 M_B_DQ28 MEM_MB_EVENT_L 198 VSS40
(4) M_B_CAS# 115 CAS# DQ28 56 (4) MEM_MB_EVENT_L EVENT# VSS41 167
(4) M_B_RAS# M_B_RAS# 110 58 M_B_DQ29 (4) M_B_RST# M_B_RST# 30 168
M_B_WE# RAS# DQ29 M_B_DQ30 RESET# VSS42 C414
(4) M_B_WE# 113 WE# DQ30 68 VSS43 172
SA0_B_0 197 70 M_B_DQ31 173 R141 C393
SA1_B_0 SA0 DQ31 M_B_DQ36 VREF_DQ_DDRB VSS44 2.2U/6.3V_6 0.1uF 10% 16V X7R 0402
201 SA1 DQ32 129 1 VREF_DQ VSS45 178
C (13,17,30) PCLK_SMB 202 131 M_B_DQ33 VREF_CA_DDRB 126 179 C
SCL DQ33 M_B_DQ34 VREF_CA VSS46
(13,17,30) PDAT_SMB 200 SDA DQ34 141 VSS47 184
143 M_B_DQ35 185
M_ODT_B0 116 DQ35 M_B_DQ32 VSS48 1K 1% 1/16W 0402
(4) M_ODT_B0 ODT0 DQ36 130 2 VSS1 VSS49 189
M_ODT_B1 120 132 M_B_DQ37 VCC3 3 190
(4) M_ODT_B1 ODT1 DQ37 VSS2 VSS50
140 M_B_DQ38 8 195 R143 VREF_CA_DDRB

(204P)
M_B_DM0 DQ38 M_B_DQ39 VSS3 VSS51 0 5% 1/16W 0402
(4) M_B_DM0 11 DM0 DQ39 142 9 VSS4 VSS52 196
(4) M_B_DM1 M_B_DM1 28 147 M_B_DQ41 13
M_B_DM2 DM1 DQ40 M_B_DQ43 VSS5 R142 C411 C396 C395 C394
(4) M_B_DM2 46 149 14
(204P)

M_B_DM3 DM2 DQ41 M_B_DQ40 C353 C368 VSS6


(4) M_B_DM3 63 DM3 DQ42 157 19 VSS7 SMDDR_VTERM

0.1uF 10% 16V X7R 0402

0.1uF 10% 16V X7R 0402


(4) M_B_DM4 M_B_DM4 136 159 M_B_DQ42 20
DM4 DQ43 VSS8

0.01U

1000P/50V/4
(4) M_B_DM5 M_B_DM5 153 146 M_B_DQ44 25
DM5 DQ44 VSS9

0.1uF 10% 16V X7R 0402

0.1uF 10% 16V X7R 0402


(4) M_B_DM6 M_B_DM6 170 148 M_B_DQ45 26 203 1K 1% 1/16W 0402
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS10 VTT1
(4) M_B_DM7 187 DM7 DQ46 158 31 VSS11 VTT2 204
160 M_B_DQ47 32
M_B_DQS0 DQ47 M_B_DQ48 VSS12
(4) M_B_DQS0 12 DQS0 DQ48 163 37 VSS13 GND 205
(4) M_B_DQS1 M_B_DQS1 29 165 M_B_DQ49 38 206
M_B_DQS2 DQS1 DQ49 M_B_DQ50 VSS14 GND
(4) M_B_DQS2 47 DQS2 DQ50 175 43 VSS15
(4) M_B_DQS3 M_B_DQS3 64 177 M_B_DQ51
M_B_DQS4 DQS3 DQ51 M_B_DQ52
(4) M_B_DQS4 137 DQS4 DQ52 164
(4) M_B_DQS5 M_B_DQS5 154 166 M_B_DQ53
M_B_DQS6 DQS5 DQ53 M_B_DQ54 DDR3-DIMM0_H=9.2_Standard
(4) M_B_DQS6 171 DQS6 DQ54 174
(4) M_B_DQS7 M_B_DQS7 188 176 M_B_DQ55
M_B_DQS#0 DQS7 DQ55 M_B_DQ56
(4) M_B_DQS#0 10 DQS#0 DQ56 181
(4) M_B_DQS#1 M_B_DQS#1 27 183 M_B_DQ57
M_B_DQS#2 DQS#1 DQ57 M_B_DQ58
(4) M_B_DQS#2 45 DQS#2 DQ58 191
(4) M_B_DQS#3 M_B_DQS#3 62 193 M_B_DQ59
M_B_DQS#4 DQS#3 DQ59 M_B_DQ60
B (4) M_B_DQS#4 135 DQS#4 DQ60 180 B
M_B_DQS#5 152 182 M_B_DQ61
(4)
(4)
M_B_DQS#5
M_B_DQS#6 M_B_DQS#6 169
DQS#5 DQ61
192 M_B_DQ62 Place these Caps near So-Dimm0.
M_B_DQS#7 DQS#6 DQ62 M_B_DQ63 1.5VSUS
(4) M_B_DQS#7 186 DQS#7 DQ63 194
VCC3

C402 C361 C401 C360 C403 C392 C399 C362 C365 C363 C400 C316

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

10U/6.3V_6

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

0.1U/16V_4

*330U/2V_7343
DDR3-DIMM0_H=9.2_Standard R135 *10K/F_4 MEM_MB_EVENT_L
+

VCC3 SMDDR_VTERM

SPD SA0 1
C354 C369 C407 C375 C370 C410 C391 C416 C389

2.2U/6.3V_6 0.1U/16V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6


SPD SA1 0

A A

VCC3 R126 0 5% 1/16W 0402 SA0_B_0


R127 0 5% 1/16W 0402 SA1_B_0

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
DDR3 CHB DIMM 1
Date: Wednesday, September 15, 2010 Sheet 18 of 41
5 4 3 2 1
5 4 3 2 1

U16A

+1.8V_DPE_VDD18 AG15
U16G

DP E/F POWER

DPE_VDD18#1
DP A/B POWER

DPA_VDD18#1 AE11 +1.8V_DPA_VDD18


19
AG16 DPE_VDD18#2 DPA_VDD18#2 AF11

2.5GT/s bit rate


PEG_TXP0 AF30 AH30 PEG_RXP0_C C97 0.1U/10V_4 +1.0V_DPE_VDD10 AG20 AF6 +1.0V_DPB_VDD10
(8) PEG_TXP0 PCIE_RX0P PCIE_TX0P PEG_RXP0 (8) DPE_VDD10#1 DPA_VDD10#1
PEG_TXN0 AE31 AG31 PEG_RXN0_C C81 0.1U/10V_4 AG21 AF7
(8) PEG_TXN0 PCIE_RX0N PCIE_TX0N PEG_RXN0 (8) DPE_VDD10#2 DPA_VDD10#2
D D

PCI EXPRESS INTERFACE


PEG_TXP1 AE29 AG29 PEG_RXP1_C C47 0.1U/10V_4 AG14 AE1
(8) PEG_TXP1 PEG_TXN1 PCIE_RX1P PCIE_TX1P PEG_RXN1_C PEG_RXP1 (8) DPE_VSSR#1 DPA_VSSR#1
AD28 AF28 C48 0.1U/10V_4 AH14 AE3
(8) PEG_TXN1 PCIE_RX1N PCIE_TX1N PEG_RXN1 (8) DPE_VSSR#2 DPA_VSSR#2
AM14 DPE_VSSR#3 DPA_VSSR#3 AG1
AM16 DPE_VSSR#4 DPA_VSSR#4 AG6
PEG_TXP2 AD30 AF27 PEG_RXP2_C C109 0.1U/10V_4 AM18 AH5
(8) PEG_TXP2 PCIE_RX2P PCIE_TX2P PEG_RXP2 (8) DPE_VSSR#5 DPA_VSSR#5
PEG_TXN2 AC31 AF26 PEG_RXN2_C C107 0.1U/10V_4
(8) PEG_TXN2 PCIE_RX2N PCIE_TX2N PEG_RXN2 (8)
VCC1.0_VGA
PEG_TXP3 AC29 AD27 PEG_RXP3_C C105 0.1U/10V_4 +1.8V_DPE_VDD18 AF16 AE13 +1.8V_DPA_VDD18 (Park-S3:110mA@1.0V)
(8) PEG_TXP3 PCIE_RX3P PCIE_TX3P PEG_RXP3 (8) DPF_VDD18#1 DPB_VDD18#1
PEG_TXN3 AB28 AD26 PEG_RXN3_C C102 0.1U/10V_4 AG17 AF13
(8) PEG_TXN3 PCIE_RX3N PCIE_TX3N PEG_RXN3 (8) DPF_VDD18#2 DPB_VDD18#2 (M9X-S2/S3:200mA@1.1V)
BLM18PG181SN1D(180-1.5A)_6
PEG_TXP4 AB30 AC25 PEG_RXP4_C C49 0.1U/10V_4 +1.0V_DPB_VDD10 L51
(8) PEG_TXP4 PCIE_RX4P PCIE_TX4P PEG_RXP4 (8)
PEG_TXN4 AA31 AB25 PEG_RXN4_C C50 0.1U/10V_4 AF22 AF8
(8) PEG_TXN4 PCIE_RX4N PCIE_TX4N PEG_RXN4 (8) +1.0V_DPE_VDD10 DPF_VDD10#1 DPB_VDD10#1
AG22 DPF_VDD10#2 DPB_VDD10#2 AF9
C616 C623 C615
PEG_TXP5 AA29 Y23 PEG_RXP5_C C82 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8 1U/10V_4
(8) PEG_TXP5 PCIE_RX5P PCIE_TX5P PEG_RXP5 (8)
PEG_TXN5 Y28 Y24 PEG_RXN5_C C83 0.1U/10V_4 AF23 AF10
(8) PEG_TXN5 PCIE_RX5N PCIE_TX5N PEG_RXN5 (8) DPF_VSSR#1 DPB_VSSR#1
AG23 DPF_VSSR#2 DPB_VSSR#2 AG9
AM20 DPF_VSSR#3 DPB_VSSR#3 AH8
PEG_TXP6 Y30 AB27 PEG_RXP6_C C51 0.1U/10V_4 AM22 AM6
(8) PEG_TXP6 PCIE_RX6P PCIE_TX6P PEG_RXP6 (8) DPF_VSSR#4 DPB_VSSR#4
PEG_TXN6 W 31 AB26 PEG_RXN6_C C52 0.1U/10V_4 AM24 AM8
(8) PEG_TXN6 PCIE_RX6N PCIE_TX6N PEG_RXN6 (8) DPF_VSSR#5 DPB_VSSR#5

PEG_TXP7 W 29 Y27 PEG_RXP7_C C53 0.1U/10V_4


(8) PEG_TXP7 PCIE_RX7P PCIE_TX7P PEG_RXP7 (8)
PEG_TXN7 V28 Y26 PEG_RXN7_C C54 0.1U/10V_4
(8) PEG_TXN7 PCIE_RX7N PCIE_TX7N PEG_RXN7 (8)
R58 150/F_4 AF17 AE10 R61 150/F_4
DPEF_CALR DPAB_CALR
C PEG_TXP8 V30 W 24 PEG_RXP8_C C85 0.1U/10V_4 C
(8) PEG_TXP8 PCIE_RX8P PCIE_TX8P PEG_RXP8 (8)
PEG_TXN8 U31 W 23 PEG_RXN8_C C84 0.1U/10V_4
(8) PEG_TXN8 PCIE_RX8N PCIE_TX8N PEG_RXN8 (8)
+1.8V_DPE_PVDD AG18 DP PLL POWER AG8 +1.8V_DPA_PVDD
+1.8V_DPE_PVDD DPE_PVDD DPA_PVDD +1.8V_DPA_PVDD
AF19 DPE_PVSS DPA_PVSS AG7
PEG_TXP9 U29 V27 PEG_RXP9_C C86 0.1U/10V_4
(8) PEG_TXP9 PCIE_RX9P PCIE_TX9P PEG_RXP9 (8)
PEG_TXN9 T28 U26 PEG_RXN9_C C87 0.1U/10V_4
(8) PEG_TXN9 PCIE_RX9N PCIE_TX9N PEG_RXN9 (8)
+1.8V_DPF_PVDD AG19 AG10 +1.8V_DPA_PVDD
+1.8V_DPF_PVDD DPF_PVDD DPB_PVDD +1.8V_DPA_PVDD
PEG_TXP10 T30 U24 PEG_RXP10_C C25 0.1U/10V_4 AF20 AG11
(8) PEG_TXP10 PCIE_RX10P PCIE_TX10P PEG_RXP10 (8) DPF_PVSS DPB_PVSS
PEG_TXN10 R31 U23 PEG_RXN10_C C26 0.1U/10V_4
(8) PEG_TXN10 PCIE_RX10N PCIE_TX10N PEG_RXN10 (8)

PEG_TXP11 PEG_RXP11_C C88 0.1U/10V_4 Cedar


(8) PEG_TXP11 R29 PCIE_RX11P PCIE_TX11P T26 PEG_RXP11 (8)
PEG_TXN11 P28 T27 PEG_RXN11_C C89 0.1U/10V_4
(8) PEG_TXN11 PCIE_RX11N PCIE_TX11N PEG_RXN11 (8)

PEG_TXP12 P30 T24 PEG_RXP12_C C56 0.1U/10V_4


(8) PEG_TXP12 PCIE_RX12P PCIE_TX12P PEG_RXP12 (8)
PEG_TXN12 N31 T23 PEG_RXN12_C C55 0.1U/10V_4
(8) PEG_TXN12 PCIE_RX12N PCIE_TX12N PEG_RXN12 (8)

PEG_TXP13 N29 P27 PEG_RXP13_C C57 0.1U/10V_4


(8) PEG_TXP13 PCIE_RX13P PCIE_TX13P PEG_RXP13 (8)
PEG_TXN13 M28 P26 PEG_RXN13_C C58 0.1U/10V_4 (Park-S3:110mA@1.0V)
(8) PEG_TXN13 PCIE_RX13N PCIE_TX13N PEG_RXN13 (8) +1.0V_DPE_VDD10 +1.8V_DPA_VDD18
(M9X-S2/S3:200mA@1.1V)
1.8V(130mA)
PEG_TXP14 M30 P24 PEG_RXP14_C C28 0.1U/10V_4 +1.0V_DPE_VDD10 L15 +1.8V_DPA_VDD18 L20
(8) PEG_TXP14 PCIE_RX14P PCIE_TX14P PEG_RXP14 (8) VCC1.0_VGA VCC1.8_VGA
PEG_TXN14 L31 P23 PEG_RXN14_C C27 0.1U/10V_4
(8) PEG_TXN14 PCIE_RX14N PCIE_TX14N PEG_RXN14 (8)
BLM18PG181SN1D(180-1.5A)_6 C208 C199 BLM18PG181SN1D(180-1.5A)_6
C140 C139 C148 0.1U/10V_4 1U/10V_4 C212
PEG_TXP15 L29 M27 PEG_RXP15_C C90 0.1U/10V_4 0.1U/10V_4 1U/10V_4 10U/6.3V_6 10U/6.3V_8
(8) PEG_TXP15 PCIE_RX15P PCIE_TX15P PEG_RXP15 (8)
PEG_TXN15 K30 N26 PEG_RXN15_C C91 0.1U/10V_4
B (8) PEG_TXN15 PCIE_RX15N PCIE_TX15N PEG_RXN15 (8) B

+1.8V_DPA_PVDD
CLOCK 1.8V(20mA)
CLK_PCIE_VGAP AK30 1.8V(130mA) +1.8V_DPA_PVDD L23 VCC1.8_VGA
(12) CLK_PCIE_VGAP PCIE_REFCLKP
CLK_PCIE_VGAN AK32 +1.8V_DPE_VDD18 L48
(12) CLK_PCIE_VGAN PCIE_REFCLKN VCC1.8_VGA
C607 C608 C216 C209 BLM18PG181SN1D(180-1.5A)_6
C177 0.1U/10V_4 1U/10V_4 C223
CALIBRATION 0.1U/10V_4 1U/10V_4 10U/6.3V_8 BLM18PG181SN1D(180-1.5A)_6 10U/6.3V_8
Y22 M72_PCIE_CALRP R49 1.27K/F_4
PCIE_CALRP
R302 1K/F_4 N10 AA22 M72_PCIE_CALRN R47 2K/F_4 VCC1.0_VGA
PW RGOOD PCIE_CALRN

AL27 +1.8V_DPF_PVDD +1.8V_DPE_PVDD


(12,28) A_RST#_NB PERSTB
1.8V(20mA) 1.8V(20mA)
+1.8V_DPF_PVDD L18 VCC1.8_VGA +1.8V_DPE_PVDD L19 VCC1.8_VGA
Cedar
100MHz (+/-300ppm) input frequency, C189 C211 BLM18PG181SN1D(180-1.5A)_6 C180 C204 BLM18PG181SN1D(180-1.5A)_6
0-0.7V single-ended swing 0.1U/10V_4 1U/10V_4 C210 0.1U/10V_4 1U/10V_4 C213
10U/6.3V_8 10U/6.3V_8

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
CEDAR-S3_PCIE Interface
Date: Wednesday, September 15, 2010 Sheet 19 of 41
5 4 3 2 1
5 4 3 2 1

MEM_ID[3:0]
0000
Vendor
Samsung- E die
Type
64*16-800MHZ
Vendor P/N
K4W1G1646E-HC12 T7 AE9
U16B

M93-S3/M92-S2
DVCNTL_0/ DVPDATA_18
TXCAP_DPA3P
TXCAM_DPA3N
AF2
AF4 +1.8V_AVDD_Q +A2VDD
20
0001 Hynix - Orion 64*16-800MHZ H5TQ1G63BFR-12C T6 L9
DVCNTL_1 / NC 1.8V(70mA) 3.3V(65mA)
0010 Reserved T11 N9
DVCNTL_2 / NC TX0P_DPA2P
AG3
0011 Reserved AE8 DPA AG5 +1.8V_AVDD_Q L14 +A2VDD L47 +3V_DELAY
T4 DVDATA_12 / DVPDATA_16 TX0M_DPA2N VCC1.8_VGA
0100 Reserved T15 AD9
DVDATA_11 / DVPDATA_20
0101 Reserved AC10 AH3 BLM18PG181SN1D(180-1.5A)_6 BLM18PG181SN1D(180-1.5A)_6
T5 DVDATA_10 / DVPDATA_22 TX1P_DPA1P
0110 Reserved T13 AD7
DVDATA_9 / DVPDATA_12 TX1M_DPA1N
AH1
0111 Reserved AC8 C130 C129 C132 C606 C605 C604
T20 DVDATA_8 / DVPDATA_14
1000 Reserved AC7 AK3 0.1U/10V_4 1U/10V_4 10U/6.3V_6 0.1U/10V_4 1U/10V_4 10U/6.3V_8
T14 DVDATA_7 / DVPCNTL_0 TX2P_DPA0P
1001 Reserved T2 AB9
DVDATA_6 / DVPDATA_8 TX2M_DPA0N
AK1
1010 Reserved T17 AB8
DVDATA_5 / DVPDATA_6
D 1011 Reserved +VDDR4 T8 AB7
DVDATA_4 DVPDATA_4 TXCBP_DPB3P
AK5 D
1100 Reserved Memory ID TXCBM_DPB3N
AM3
1101 Reserved R299
DVO
1110 Reserved *10K/F_4 MEM_ID3 AB4 AK6
R295 *10K/F_4 MEM_ID2 DVDATA_3 / DVPDATA_19 TX3P_DPB2P +1.8V_A2VDD_Q
1111 Reserved AB2
DVDATA_2 / DVPDATA_21 TX3M_DPB2N
AM5
R78 *10K/F_4 MEM_ID1 Y8 DPB 1.8V(70mA)
R82 10K/F_4 MEM_ID0 DVDATA_1 / DVPDATA_2
Y7 AJ7
DVDATA_0 / DVPDATA_0 TX4P_DPB1P +1.8V_A2VDD_Q L26
AH6 VCC1.8_VGA
TX4M_DPB1N
BLM18PG181SN1D(180-1.5A)_6 1.8V(200mA DPC_PVDD) AK8 BLM18PG181SN1D(180-1.5A)_6
+1.8V_DPC_PVDD TX5P_DPB0P
VCC1.8_VGA AL7
L52 TX5M_DPB0N C235 C176 C236
PWRCNTL1 PWRCNTL0 V-CORE C629 C626 C618 M93-S3/M92-S2 0.1U/10V_4 1U/10V_4 10U/6.3V_8
10U/6.3V_8 1U/10V_4 0.1U/10V_4 W6
DPC_PVDD / DVPDATA_11
H 0 0 1V V6
DPC_PVSS / GND M92-S2/M93-S3
V4
BLM18PG181SN1D(180-1.5A)_6 DVPDATA_3/TXCCP_DPC3P
1.8V(130mA DPC_VDD18) DVPCNTL_2/TXCCM_DPC3N
U5
0 1 0.95V VCC1.8_VGA +1.8V_DPC_VDD18 AC6
M L25 AC5
DPC_VDD18#1/DVPDAT10
W3
C230 C224 C221 DPC_VDD18#2/DVPDAT23 DVPDATA_7 / TX0P_DPC2P +VDDD1
TBD 1 DVPDATA_1 / TX0M_DPC2N
V2
0 0.95V 10U/6.3V_8 1U/10V_4 0.1U/10V_4 1.8V(45mA VDD1DI)
Y4
DVPCNTL_MV1 / TX1P_DPC1P +VDDD1 L16
L 1 1 0.9V AA5
DPC_VDD10#1/DVPDAT15 DVPDATA_9 / TX1M_DPC1N
W5 VCC1.8_VGA
BLM18PG181SN1D(180-1.5A)_6 1.1V(110mA DPC_VDD10) AA6
+1.1V_DPC_VDD10 DPC_VDD10#2/DVPDAT17 BLM18PG181SN1D(180-1.5A)_6
VCC1.0_VGA AA3
L54 DVPDATA_13 / TX2P_DPC0P
DVPCNTL_1 / TX2M_DPC0N
Y2 For M93-S3: Use 150 Ohms Pull Down
C630 C619 C627 C174 C152 C191
10U/6.3V_8 1U/10V_4 0.1U/10V_4
For M92-S2: Use 0R to VDDR4
U1 AA12 R77 *150/F_4 0.1U/10V_4 1U/10V_4 10U/6.3V_6
DPC_VSSR#1 / DVPCLK VDDR4 / DPCD_CALR For Park-S3: NC
W1
DPC_VSSR#2 / DVPDAT5
U3
DPC_VSSR#3 / GND
Y6
DPC_VSSR#4 / GND
AA1
DPC_VSSR#5/ DVPCNTL_MV0 DPC

R1
SCL Delete R237,R241,R243 0 ohm. VBIOS ROM
R3
SDA I2C
C
R236 150/F_4 C
AM26 EXT_CRT_RED_R
R EXT_CRT_RED (31) +3V_DELAY
GENERAL PURPOSE I/O AK26
GPIO0 RB R240 150/F_4
(21) GPIO0 U6
GPIO1 GPIO_0 EXT_CRT_GRE_R
(21) GPIO11 (21) GPIO1 U10 AL25 EXT_CRT_GRE (31)
GPIO2 GPIO_1 G
(21) GPIO2 T10 AJ25
GPIO3 GPIO_2 GB R242 150/F_4 C755 0.1U/10V_4
T9 U8
GPIO4 GPIO_3_SMBDATA EXT_CRT_BLU_R
T18 U7 AH24 EXT_CRT_BLU (31) U33
GPIO5 GPIO_4_SMBCLK B
(21) GPIO5 T9 AG25
GPIO_5_AC_BATT BB GPIO22
T8
GPIO_6 DAC1 1
CE# VDD
8
(25) EXT_LVDS_BLON R62 *0/short_4 EXT_LVDS_BLON# T7 AH26 GPIO8 2 7
GPIO_7_BLON HSYNC EXT_CRT_HSYNC (21,31) SO HOLD#
(21) GPIO8 GPIO8 P10 AJ27 3 6 GPIO10
GPIO_8_ROMSO VSYNC EXT_CRT_VSYNC (21,31) WP# SCK
GPIO9 P4 4 5 GPIO9
(21) GPIO9 GPIO_9_ROMSI VSS SI
GPIO10 P2
T113 GPIO_10_ROMSCK
GPIO11 N6 AD22 R260 499/F_4 W25X10BVSNIG
GPIO12 GPIO_11 RSET
(21) GPIO12 N5
GPIO13 GPIO_12 +1.8V_AVDD_Q
(21) GPIO13 N3 AG24 +1.8V_AVDD_Q
T16 HDMI_HP2 GPIO_13 AVDD
Y9 AE22
GFX_CORE_CNTRL0 GPIO_14_HPD2 AVSSQ
(37) GFX_CORE_CNTRL0 T118 N1
OSC_SPREAD GPIO_15_PWRCNTL_0 +VDDD1
M4 AE23 +VDDD1
VGA_ALERT GPIO_16_SSIN VDD1DI
R6 AD23
HPD3 GPIO_17_THERMAL_INT VSS1DI
T21 W10
VGA_TEMP_FAIL GPIO_18_HPD3
(26) VGA_TEMP_FAIL M2
GPIO_19_CTF M92-S2/M93-S3
GFX_CORE_CNTRL1 P8 AM12
+3V_DELAY (37) GFX_CORE_CNTRL1 GPIO_20_PWRCNTL_1 R2 / NC C574 27P/50V_4
HPD3 P7 AK12 EVGA-XTALI
+3V_DELAY T3 GPIO_21_BB_EN R2B / NC
GPIO22 N8
(21) GPIO22 GPIO_22_ROMCSB

1
R73 *10K/F_4 GPIO24_TRSTB GPIO_23_CLKREQb N7 AL11
GPIO_23_CLKREQB G2 / NC Y2 R223
R74 *10K/F_4 GPIO25_TDI G2B / NC
AJ11
27MHZ 10M/J_6
For Int Clk 27Mhz
R300
CL=20PF
AK10

2
R291 *10K/F_4 GPIO26_TCK GPIO24_TRSTB B2 / NC
*10K/F_4 T12 L6 AL9
GPIO25_TDI JTAG_TRSTB B2B / NC C573 EVGA-XTALO
T10 L5
R274 *10K/F_4 GPIO27_TMS GPIO26_TCK JTAG_TDI 27P/50V_4
T120 L3
GPIO27_TMS JTAG_TCK
T112 L1 AH12
R273 *10K/F_4 GPIO28_TDO TESTEN GPIO28_TDO JTAG_TMS C / NC
TESTEN (23) T114 K4
JTAG_TDO DAC2 Y / NC
AM10
TESTEN AF24 AJ9
TESTEN COMP / NC
B AB13 B
R301 GENERICA DAC2_HSY
W8 AL13 DAC2_HSY (21)
GENERICC GENERICB H2SYNC DAC2_VSY
10K/F_4 (21) GENERICC W9 AJ13 DAC2_VSY (21)
GENERICC V2SYNC
W7
GENERICD
AD10
GENERICE_HPD4 +VDDD1
AD19 +VDDD1
*100K/F_4 R64 VDD2DI / NC
AC14 AC19
R69 *10K/F_4 EXT_LVDS_BLON HPD1 VSS2DI / NC
+3V_DELAY VCC1.8_VGA
1.8V+R6043(249R)=1.8V/3=0.6V
Thermal Sensor 781-1_3V R307 200/F_6
AE20 +A2VDD +3V_DELAY
R72 *10K/F_4 GPIO_23_CLKREQb R284 499/F_4 A2VDD / NC
+3V_DELAY U18
AE17 +1.8V_A2VDD_Q +1.8V_A2VDD_Q C646 0.1U/10V_4
R280 249/F_4 +0.6V_M92_VREFG A2VDDQ / NC R312 *0/short_4 MB_CLK2
AC16 (5) SCLK 8 1
VREFG SMCLK VCC VGATHRM+
AE19
A2VSSQ R309 *0/short_4 MB_DATA2
(5) SDATA 7 2
SMDATA DXP C642
BLM18PG181SN1D(180-1.5A)_6 1.8V(75mA DPLL_PVDD) C622 0.1U/10V_4
R2SET / NC
AG13 R59 715/F_4
+3V_DELAY
R311 10K/F_4 VGA_ALERT 6
-ALT DXN
3 2200P/50V_4 w/s 10 / 10
VCC1.8_VGA
L49 5 4 VGATHRM-
C613 DDC/AUX GND -OVT
C611 C612 AE6 G781-1P8@EV
*10U/6.3V_8 1U/10V_4 0.1U/10V_4 PLL/CLOCK DDC1CLK -VGATHRM
AE5 +3V_DELAY
+1.8V_DPLL_PVDD DDC1DATA R306 10K/F_4
AF14
DPLL_PVDD I2C ADDRESS: 9AH
AE14 AD2
DPLL_PVSS AUX1P
AD4
BLM18PG181SN1D(180-1.5A)_6 AUX1N
VCC1.0_VGA L50 +1.0V_DPLL_VDDC AD14 AC11
DPLL_VDDC DDC2CLK
AC13
C625 C624 C200 DDC2DATA
1.0V(125mA DPLL_VDDC)
*10U/6.3V_8 1U/10V_4 0.1U/10V_4 EVGA-XTALI AM28 AD13
EVGA-XTALO XTALIN AUX2P
AK28 AD11
R43 0/J_4 AC22 XTALOUT AUX2N
R50 0/J_4 AB22 NC#2/XO_IN
AE16
NC#1/XO_IN2 DDCCLK_AUX5P
AD16
Can change to short pad when MV DDCDATA_AUX5N
BLM18PG181SN1D(180-1.5A)_6 1.8V(20mA TSVDD) AC1 EXT_DDCCLK (31)
VGATHRM+ DDC6CLK
VCC1.8_VGA T4
DPLUS DDC6DATA
AC3 EXT_DDCDAT (31) CRT
A
L28 VGATHRM- T2 THERMAL A
DMINUS
AD20 EXT_EDIDCLK (25)
C265 C242 C160 NC/DDCCLK_AUX3P
NC/DDCDATA_AUX3N
AC20 EXT_EDIDDAT (25) LVDS
R5
*10U/6.3V_8 1U/10V_4 0.1U/10V_4 +1.8V_TSVDD TS_FDO
AD17
TSVDD
AC17
TSVSS

Cedar
Quanta Computer Inc.
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
CEDAR-S3_Main
Date: Wednesday, September 15, 2010 Sheet 20 of 41
5 4 3 2 1
5 4 3 2 1

AA27
AB24
U16E

PCIE_VSS#1 GND#1 A3
A30
U16F

LVDS CONTROL AB11


R86

*0/short_4
10K/F_4

R89
CONFIGURATION STRAPS
21
RECOMMENDED SETTINGS
PCIE_VSS#2 GND#2 VARY_BL EXT_BKLT_CTRL (25)
AB32 AA13 AB12 *0/short_4 R76 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 0= DO NOT INSTALL RESISTOR
PCIE_VSS#3 GND#3 / EVDDQ#2 DIGON EXT_DISP_ON (25)
AC24 AA16 1 = INSTALL 10K RESISTOR
PCIE_VSS#4 GND#4 THEY MUST NOT CONFLICT DURING RESET
AC26 AB10 X = DESIGN DEPENDANT
PCIE_VSS#5 GND#5
AC27 AB15 NA = NOT APPLICABLE
PCIE_VSS#6 GND#6 / EVDDQ#3
AD25 PCIE_VSS#7 GND#7 AB6
AD32 AC9 AH20 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
D PCIE_VSS#8 GND#8 TXCLK_UP_DPF3P EXT_TXUCLKOUTP (25) D
AE27 PCIE_VSS#9 GND#9 AD6 TXCLK_UN_DPF3N AJ19 EXT_TXUCLKOUTN (25)
AF32 PCIE_VSS#10 GND#10 AD8 Transmitter Power Savings Enable
AG27 AE7 AL21 TX_PWRS_ENB GPIO0 0: 50% Tx output swing for mobile mode
AH32
PCIE_VSS#11
PCIE_VSS#12
GND#11
GND#12 AG12
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N AK20
EXT_TXUOUTP0 (25)
EXT_TXUOUTN0 (25)
1: full Tx output swing (Default setting for Desktop) 1
K28 PCIE_VSS#13 GND#13 AH10
K32 AH28 AH22 EXT_TXUOUTP1 (25)
PCI Express Transmitter De-emphasis Enable
PCIE_VSS#14 GND#14 TXOUT_U1P_DPF1P TX_DEEMPH_EN GPIO1 0: Tx de-emphasis disabled for mobile mode
L27 B10 AJ21
M32
PCIE_VSS#15
PCIE_VSS#16
GND#15
GND#16 B12
TXOUT_U1N_DPF1N EXT_TXUOUTN1 (25) 1: Tx de-emphasis enabled (Default setting for Desktop) 1
N25 PCIE_VSS#17 GND#17 B14 TXOUT_U2P_DPF0P AL23 EXT_TXUOUTP2 (25)
N27 PCIE_VSS#18 GND#18 B16 TXOUT_U2N_DPF0N AK22 EXT_TXUOUTN2 (25) PCIE Gen2 Enable
P25 B18 BIF_GEN2_EN_A GPIO2 0 : Advertises the PCIE device as 2.5 GT/s capable at power-on
P32
PCIE_VSS#19
PCIE_VSS#20
GND#19
GND#20 B20 TXOUT_U3P AK24 EXT_TXUOUTP3 (25)
1 : Advertises the PCIE device as 5.0 GT/s capable at power-on 0
R27 PCIE_VSS#21 GND#21 B22 TXOUT_U3N AJ23 EXT_TXUOUTN3 (25)
T25 PCIE_VSS#22 GND#22 B24 VGA Control
T32 B26 0 : VGA controller capacity enabled
U25
PCIE_VSS#23
PCIE_VSS#24
GND#23
GND#24 B6 LVTMDP BIF_VGA_DIS GPIO9 1 : VGA controller capacity disabled
(for multi-GPU)
0
U27 PCIE_VSS#25 GND#25 B8
V32 PCIE_VSS#26 GND#26 C1 TXCLK_LP_DPE3P AL15 EXT_TXLCLKOUTP (25)
W 25 PCIE_VSS#27 GND#27 C32 TXCLK_LN_DPE3N AK14 EXT_TXLCLKOUTN (25) SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
W 26 E28 If GPIO22 = 0, defines memory aperture size
PCIE_VSS#28 GND#28 If GPIO22 = 1, defines ROM type
W 27 F10 AH16
Y25
PCIE_VSS#29
PCIE_VSS#30
GND#29
GND#30 F12
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N AJ15
EXT_TXLOUTP0 (25)
EXT_TXLOUTN0 (25)
ROMIDCFG(2:0) GPIO[13:11] 000 - 128MB
001 - 256MB
001
Y32 PCIE_VSS#31 GND#31 F14 010 - 64MB
GND#32 F16 TXOUT_L1P_DPE1P AL17 EXT_TXLOUTP1 (25) 011 - 32MB
GND#33 F18 TXOUT_L1N_DPE1N AK16 EXT_TXLOUTN1 (25)
F2 Enable external BIOS ROM device
GND#34
GND#35 F20 TXOUT_L2P_DPE0P AH18 EXT_TXLOUTP2 (25)
BIOS_ROM_EN GPIO22 0 : Disabled
1 : Enabled
0
M6 GND#56 GND#36 F22 TXOUT_L2N_DPE0N AJ17 EXT_TXLOUTN2 (25)
N11 GND#57 GND#37 F24
C N12 F26 AL19 00 - No audio function C
GND#58 GND#38 TXOUT_L3P EXT_TXLOUTP3 (25) 01 - Audio for DP only
N13 GND#59 GND#39 F6 TXOUT_L3N AK18 EXT_TXLOUTN3 (25)
AUD[1] HSYNC 10 - Audio for DP and HDMI if dongle is detected
N16 F8
N18
GND#60
GND#61 GND GND#40
GND#41 G10 AUD[2] VSYNC 11 - Audio for both DP and HDMI
HDMI must only be enabled on systems that are legally entitled. It is the
00
N21 GND#62 GND#42 G27 responsibility of the system designer to ensure that the system is entitled to
P6 GND#63 GND#43 G31 support this feature.
P9 G8 Cedar
GND#64 GND#44
R12 H14 VIP Device Strap Disable
R15
GND#65
GND#66
GND#45
GND#46 H17 VIP_DEVICE_STRAP_DIS V2SYNC 0: Slave VIP host port devices present
1: No slave VIP host port devices reporting presence
1
R17 GND#67 GND#47 H2
R20 GND#68 GND#48 H20
T13 GND#69 GND#49 H6
T16 J27 SMS_EN_HARD H2SYNC Reserved
T18
GND#70
GND#71
GND#50
GND#51 J31 +3V_DELAY 0
T21 GND#72 GND#52 K11
T6 GND#73 GND#53 K2
U15 GND#74 GND#54 K22
U17 K6 GPIO9 R276 *10K/F_4
GND#75 GND#55 (20) GPIO9
U20 GND#76 GND#85 T11
U9 R11 GPIO13 R275 *10K/F_4
GND#77 GND#86 (20) GPIO13
V13 GND#78
V16 GPIO12 R294 *10K/F_4 R63 *10K/F_4 GPIO22
GND#79 (20) GPIO12
V18 GND#80
Y10 GPIO11 R293 10K/F_4 GPIO22(ROMCS#)
GND#81 (20) GPIO11
Y15 GND#82 PD without external VBIOS ROM
Y17 GND#83 VSS_MECH#1 A32
Y20 GND#84 VSS_MECH#2 AM1
VSS_MECH#3 AM32

B B

Cedar
+3V_DELAY

Power Up/Down Sequence Memory Aperture size


GPIO0 R272 10K/F_4
GPIO9 GPIO13 GPIO12 GPIO11 (20) GPIO0
GPIO1 R79 10K/F_4
(20) GPIO1
BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0 GPIO2 R68 10K/F_4
(20) GPIO2
0 128M 0 0 0 (20) GPIO8 GPIO8 R75 *10K/F_4

+VGA_CORE VDDC R234 *10K/F_4


0 256M 0 0 1 (20,31) EXT_CRT_HSYNC
R233 *10K/F_4
(20,31) EXT_CRT_VSYNC
0 64M 0 1 0 (20) GENERICC R83 *10K/F_4
+VGA_CORE VDDCI R261 10K/F_4
0 32M 0 1 1 (20) DAC2_VSY
R262 *10K/F_4
(20) DAC2_HSY

+1.5V_VGA VDDR1 0 512M 1 0 0 (20) GPIO22


GPIO22 R71 10K/F_4

GPIO5 R70 *10K/F_4


A 0 1G 1 0 1 (20) GPIO5
A

+3.3V_Delay VDDR3
0 2G 1 1 0
+1.8V_VGA VDDR4 0 4G 1 1 1 Quanta Computer Inc.
+1.8V_VGA VDD_CT
It is a shared pin strap with CONFIG[2:0] if BIOS_ROM_EN is set to 0. PROJECT : Shasta_(NZ2)
20ms 20ms Size Document Number Rev
DVT
CEDAR-S3_GND / LVDS/ Straps
Date: Wednesday, September 15, 2010 Sheet 21 of 41
5 4 3 2 1
5 4 3 2 1

1.5V ( DDR3, MVDDQ = 1.5V@2.0A)


U16D

MEM I/O
PCIE
PCIE_VDDR--PCI-E I/O power. 1.8 V ± 5%

1.8V(500mA)
22
VCC1.5_VGA
H13 VDDR1#1 PCIE_VDDR#1 AB23 VCC1.8_VGA
H16 VDDR1#2 PCIE_VDDR#2 AC23
H19 VDDR1#3 PCIE_VDDR#3 AD24
C133 C206 C159 C205 C141 C194 J10 AE24 C120 C131 C114 C112 C119 C137 C118 C121
2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 VDDR1#4 PCIE_VDDR#4 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6
J23 VDDR1#5 PCIE_VDDR#5 AE25
D
J24 VDDR1#6 PCIE_VDDR#6 AE26 D
J9 VDDR1#7 PCIE_VDDR#7 AF25
K10 VDDR1#8 PCIE_VDDR#8 AG26
K23 VDDR1#9
K24 VDDR1#10
K9 VDDR1#11 PCIE_VDDC#1 L23
C142 C122 C168 C151 C179 C128 C201 C147 C169 C178 L11 L24 VCC1.0_VGA
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 VDDR1#12 PCIE_VDDC#2
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 L12 VDDR1#13 PCIE_VDDC#3 L25 1.0V(2.0A)
L13 VDDR1#14 PCIE_VDDC#4 L26
L20 VDDR1#15 PCIE_VDDC#5 M22
L21 VDDR1#16 PCIE_VDDC#6 N22
L22 N23 C136 C154 C149 C134 C135 C138 C125 C126
+1.8V_VDD_CT VDDR1#17 PCIE_VDDC#7 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6
1.8V(110mA VDD_CT) PCIE_VDDC#8 N24
PCIE_VDDC#9 R22
L22 BLM18PG181SN1D(180-1.5A)_6 +1.8V_VDD_CT T22
VCC1.8_VGA LEVEL PCIE_VDDC#10
PCIE_VDDC#11 U22
TRANSLATION V22
C226 C220 C155 C146 C215 PCIE_VDDC#12 VGA_CORE
AA20 VDD_CT#1 VDDC+VDDCI
Gated 3.3V 10U/6.3V_6 1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 AA21 0.85~1.1V(15A peak )( Ripple < 87.2mV)
VDD_CT#2
60mA by AB20 VDD_CT#3 VDDC#1 AA15
+3V_DELAY AB21 CORE N15
VDDC VDD_CT#4 VDDC#2
VDDC#3 N17
VCC3 R65 *0/short_4 +3V_DELAY M93-S3/M92-S2 R13 C653 C285 C157 C197 C158 C654 C170 C144 C645
VDDC#4

POWER
R16 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6
VDDC#5
AA17 VDDR3#1 VDDC#6 R18
C156 C192 C172 C266 AA18 I/O Y21
1U/10V_4 1U/10V_4 1U/10V_4 VDDR3#2 VDDC#7
10U/6.3V_6 AB17 T12
VDDR3#3 VDDC#8
AB18 VDDR3#4 VDDC#9 T15
VDDC#10 T17
V12 VDDR4#1 / VDDR5 VDDC#11 T20
C Y12 U13 C656 C182 C657 C181 C284 C196 C171 C
+VDDR4 VDDR4#2 VDDC#12 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
U12 VDDR4#3 / VDDR5 VDDC#13 U16
VDDC#14 U18
VCC1.8_VGA L27 +VDDR4 AA11 V21
C202 NC#1 / VDDR4 VDDC#15
Y11 DVCLK / VDDR4 VDDC#16 V15
BLM18PG181SN1D(180-1.5A)_6 C262 C246 V17
10U/6.3V_6 1U/10V_4 0.1U/10V_4 VDDC#17
1.8V(170mA VDDR4) V11 NC#3 / VDDR5 VDDC#18 V20
U11 NC / VDDR5 VDDC#20 Y13
Y16 C150 C195 C175 C286 C287 C198
VDDC#21 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
VDDC#22 Y18
VDDC#23 /BIF_VDDC R21
VDDC#19/BIF_VDDC U21
MEM CLK
L17 VDDRHA
L16 ISOLATED
VSSRHA CORE I/O C282 C649 C276 C644 C275 C648
1.8V(40mA PCIE_PVDD) M13 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
PLL VDDCI#1
VDDCI#2 M15
L12 BLM18PG181SN1D(180-1.5A)_6 +PCIE_PVDD AM30 M16
VCC1.8_VGA PCIE_PVDD VDDCI#3
VDDCI#4 M17
VDDCI#5 M18
C117 C115 C116 MPV18 L8 M20
10U/6.3V_6 1U/10V_4 0.1U/10V_4 MPV18 VDDCI#6
VDDCI#7 M21 0.95V~1.1V(2A VDDCI)
VDDCI#8 N20 VGA_CORE
1.0V_VGA(100mA SPV10) SPV18 H7 SPV18
L56 BLM18PG181SN1D(180-1.5A)_6 +1.0V_VGA_SPV10 H8 C167 C145 C153 C93 C23 C68 Delete L4
VCC1.0_VGA SPV10 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6
B
1.8V(75mA MPV18) J7 SPVSS B
C661 C660 C659
L21 BLM18PG181SN1D(180-1.5A)_6 MPV18 10U/6.3V_6 0.1U/10V_4 1U/10V_4
VCC1.8_VGA
BACK BIAS
C217 C222 L17 M11
VGA_CORE BBP#1
1U/10V_4 0.1U/10V_4 M12
BLM18PG181SN1D(180-1.5A)_6 C193 BBP#2
C207
1U/10V_4 0.1U/10V_4
1.8V(90mA SPV18) Cedar
VDDCI--Isolated (clean) VDDC--Dedicated core
L55 BLM18PG181SN1D(180-1.5A)_6 SPV18 core power for the l/O power, provides power
VCC1.8_VGA
logic. Voltage level to the internal
C651 C650 should match that of logic. 0.9 V - 1.2 V
1U/10V_4 0.1U/10V_4 VDDC. POWER Same as VDDC (± 5%)

PCIE_VDDC--PCI-E
Digital Power
VDDRH_1 & VDDRH_2 --Dedicated power Supply (Either 1.0
pins for memory clock pads for each V or 1.1 V) 1.0 V
channel. Should have the same -5% to 1.1 V +5%
voltage level as VDDR1.

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
CEDAR-S3_Power_and_NC
Date: Friday, July 02, 2010 Sheet 22 of 41
5 4 3 2 1
5 4 3 2 1

(24) VMA_ODT0
(24) VMA_ODT1

(24) VMA_RAS0#
VMA_ODT0
VMA_ODT1

VMA_RAS0#
VMA_RAS1#
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
K27
J29
H30
H32
U16C

DQA_0
DQA_1
DQA_2
MAA_0
MAA_1
MAA_2
K17
J20
H23
G23
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
23
(24) VMA_RAS1# DQA_3 MAA_3
VMA_DQ4 G29 G24 VMA_MA4
VMA_CAS0# VMA_DQ5 DQA_4 MAA_4 VMA_MA5
(24) VMA_CAS0# F28 DQA_5 MAA_5 H24
(24) VMA_CAS1# VMA_CAS1# VMA_DQ6 F32 J19 VMA_MA6
VMA_DQ7 DQA_6 MAA_6 VMA_MA7

MEMORY INTERFACE
F30 DQA_7 MAA_7 K19
(24) VMA_WE0# VMA_WE0# VMA_DQ8 C30 J14 VMA_MA8
VMA_WE1# VMA_DQ9 DQA_8 MAA_8 VMA_MA9
D (24) VMA_WE1# F27 DQA_9 MAA_9 K14 D
VMA_DQ10 A28 J11 VMA_MA10
VMA_CS0# VMA_DQ11 DQA_10 MAA_10 VMA_MA11
(24) VMA_CS0# C28 DQA_11 MAA_11 J13
VMA_DQ12 E27 H11 VMA_MA12
VMA_CS1# VMA_DQ13 DQA_12 MAA_12 VMA_BA2
(24) VMA_CS1# G26 DQA_13 MAA_13/BA2 G11
VMA_DQ14 D26 J16 VMA_BA0
VMA_DQ15 DQA_14 MAA_14/BA0 VMA_BA1
F25 DQA_15 MAA_15/BA1 L15
VMA_DQ16 A25
VMA_CKE0 VMA_DQ17 DQA_16 VMA_DM0
(24) VMA_CKE0 C25 DQA_17 DQMA_0 E32
(24) VMA_CKE1 VMA_CKE1 VMA_DQ18 E25 E30 VMA_DM1
VMA_DQ19 DQA_18 DQMA_1 VMA_DM2
D24 DQA_19 DQMA_2 A21
(24) VMA_CLKP0 VMA_CLKP0 VMA_DQ20 E23 C21 VMA_DM3
VMA_CLKN0 VMA_DQ21 DQA_20 DQMA_3 VMA_DM4
(24) VMA_CLKN0 F23 DQA_21 DQMA_4 E13
VMA_DQ22 D22 D12 VMA_DM5
VMA_CLKP1 VMA_DQ23 DQA_22 DQMA_5 VMA_DM6
(24) VMA_CLKP1 F21 DQA_23 DQMA_6 E3
(24) VMA_CLKN1 VMA_CLKN1 VMA_DQ24 E21 F4 VMA_DM7
VMA_DQ25 DQA_24 DQMA_7
D20 DQA_25
VMA_WDQS[7..0] VMA_DQ26 F19 H28 VMA_RDQS0
(24) VMA_WDQS[7..0] DQA_26 RDQSA_0
VMA_DQ27 A19 C27 VMA_RDQS1
VMA_RDQS[7..0] VMA_DQ28 DQA_27 RDQSA_1 VMA_RDQS2
(24) VMA_RDQS[7..0] D18 DQA_28 RDQSA_2 A23
VMA_DQ29 F17 E19 VMA_RDQS3
VMA_DM[7..0] VMA_DQ30 DQA_29 RDQSA_3 VMA_RDQS4
(24) VMA_DM[7..0] A17 DQA_30 RDQSA_4 E15
VMA_DQ31 C17 D10 VMA_RDQS5
VMA_DQ[63..0] VMA_DQ32 DQA_31 RDQSA_5 VMA_RDQS6
(24) VMA_DQ[63..0] E17 DQA_32 RDQSA_6 D6
VMA_DQ33 D16 G5 VMA_RDQS7
VMA_MA[13..0] VMA_DQ34 DQA_33 RDQSA_7
(24) VMA_MA[13..0] F15 DQA_34
VMA_DQ35 A15 H27 VMA_WDQS0
VMA_DQ36 DQA_35 W DQSA_0 VMA_WDQS1
D14 DQA_36 W DQSA_1 A27
VMA_DQ37 F13 C23 VMA_WDQS2
VMA_BA0 VMA_DQ38 DQA_37 W DQSA_2 VMA_WDQS3
(24) VMA_BA0 A13 DQA_38 W DQSA_3 C19
C (24) VMA_BA1 VMA_BA1 VMA_DQ39 C13 C15 VMA_WDQS4 C
VMA_BA2 VMA_DQ40 DQA_39 W DQSA_4 VMA_WDQS5
(24) VMA_BA2 E11 DQA_40 W DQSA_5 E9
VMA_DQ41 A11 C5 VMA_WDQS6
VMA_DQ42 DQA_41 W DQSA_6 VMA_WDQS7
C11 DQA_42 W DQSA_7 H4
support 1Gbit VMA_DQ43 F11
VMA_DQ44 DQA_43 VMA_ODT0
VRAM ( 64M X 16 ) A9 DQA_44 ODTA0 L18
VMA_DQ45 C9 K16 VMA_ODT1
VMA_DQ46 DQA_45 ODTA1
F9 DQA_46
VMA_DQ47 D8 H26 VMA_CLKP0
VMA_DQ48 DQA_47 CLKA0 VMA_CLKN0
E7 DQA_48 CLKA0B H25
VMA_DQ49 A7
VMA_DQ50 DQA_49 VMA_CLKP1
C7 DQA_50 CLKA1 G9
VMA_DQ51 F7 H9 VMA_CLKN1
VMA_DQ52 DQA_51 CLKA1B
A5 DQA_52
VMA_DQ53 E5 G22 VMA_RAS0#
VMA_DQ54 DQA_53 RASA0B VMA_RAS1#
C3 DQA_54 RASA1B G17
VMA_DQ55 E1
VMA_DQ56 DQA_55 VMA_CAS0#
G7 DQA_56 CASA0B G19
VCC1.5_VGA VMA_DQ57 G6 G16 VMA_CAS1#
VMA_DQ58 DQA_57 CASA1B
G1 DQA_58
VMA_DQ59 G3 H22 VMA_CS0#
VMA_DQ60 DQA_59 CSA0B_0
J6 DQA_60 CSA0B_1 J22
R24 PLACE MVREFD DIVIDERS VMA_DQ61 J1 DQA_61
VMA_DQ62 J3 G13 VMA_CS1#
40.2/F_4
Rd AND CAPS CLOSE TO ASIC
VMA_DQ63 J5
DQA_62 CSA1B_0
K13
DQA_63 CSA1B_1
MVREFD K26 K20 VMA_CKE0
MVREFDA CKEA0 VMA_CKE1
J26 MVREFSA CKEA1 J17
VCC1.5_VGA VCC1.5_VGA
R42 243/F_4 J25 G25 VMA_WE0#
B
C94 R27 TESTEN MEM_CALRN0 W EA0B VMA_WE1# B
(20) TESTEN K7 NC/TESTEN#2 W EA1B H10 For PARK-S3 only
0.1U/10V_4 100/F_4
Re R25 R60 150/F_4 J8 AB16
For M9X-S2/S3 with
MEM_CALRP1/DPC_CALR PX_EN
Rd K25 MEM_CALRP0 RSVD#2 G14 DDR3: this pin is
40.2/F_4 R44 243/F_4 G20 VMA_MA13
DRAM_RST L10 RSVD#3 not in use.
MVREFS DRAM_RST
CLKTESTA K8
CLKTESTB CLKTESTA
L7 CLKTESTB
C95 R28
Cedar
0.1U/10V_4 100/F_4
Re Designator M9X-S2 and M93-S3 Park-S3
C637 C621
0.1U/10V_4 0.1U/10V_4
Ra DNI 10K
Do not Install for
M9X-S2/S3 R290 R292
Install 240 Ohms 51.1/F_4 51.1/F_4 Rb 0R/Short 680R
0.5% Resistor
R314
Rc
for PARK-S3
DRAM_RST R313 51.1/F_4DRAM_RST_M Rc
DRAM_RST_M (24)
2.2K DNI
10_4
route 50ohms Rb
single-ended/100ohms diff
R310 C658 Ca 2.2nF 68pF
DIVIDER RESISTORS M93 PARK 5.1K_1% 100P/50V/X7R
A and keep short Ra Ca A

MVREF TO 1.8V (Rd) 100R 40.2R

MVREF TO GND (Re) 100R 100R


Quanta Computer Inc.
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
CEDAR-S3/MEM_Interface
Date: Wednesday, September 15, 2010 Sheet 23 of 41
5 4 3 2 1
5 4 3 2 1

(23) VMA_MA[13..0]
(23) VMA_DM[7..0]

VREFC_VMA1
U2
VMA_MA[13..0]
(23) VMA_DQ[63..0]
(23) VMA_WDQS[7..0]
(23) VMA_RDQS[7..0]

VMA_DQ20 VREFC_VMA2
U14
512MB DDR3
VMA_DQ27 VREFC_VMA3
U5

VMA_DQ38 VREFC_VMA4
U17

VMA_DQ48
24
M9 E4 M9 E4 M9 E4 M9 E4
VREFD_VMA1 VREFCA DQL0 VMA_DQ18 VREFD_VMA2 VREFCA DQL0 VMA_DQ31 VREFD_VMA3 VREFCA DQL0 VMA_DQ32 VREFD_VMA4 VREFCA DQL0 VMA_DQ52
H2 VREFDQ DQL1 F8 H2 VREFDQ DQL1 F8 H2 VREFDQ DQL1 F8 H2 VREFDQ DQL1 F8
F3 VMA_DQ22 F3 VMA_DQ25 F3 VMA_DQ36 F3 VMA_DQ53
VMA_MA0 DQL2 VMA_DQ17 VMA_MA0 DQL2 VMA_DQ29 VMA_MA0 DQL2 VMA_DQ34 VMA_MA0 DQL2 VMA_DQ54
N4 F9 N4 F9 N4 F9 N4 F9
VMA_MA1 A0 DQL3 VMA_DQ23 VMA_MA1 A0 DQL3 VMA_DQ30 VMA_MA1 A0 DQL3 VMA_DQ39 VMA_MA1 A0 DQL3 VMA_DQ49
P8 H4 P8 H4 P8 H4 P8 H4
VMA_MA2 A1 DQL4 VMA_DQ16 VMA_MA2 A1 DQL4 VMA_DQ28 VMA_MA2 A1 DQL4 VMA_DQ33 VMA_MA2 A1 DQL4 VMA_DQ51
P4 A2 DQL5 H9 P4 A2 DQL5 H9 P4 A2 DQL5 H9 P4 A2 DQL5 H9
VMA_MA3 N3 G3 VMA_DQ21 VMA_MA3 N3 G3 VMA_DQ24 VMA_MA3 N3 G3 VMA_DQ37 VMA_MA3 N3 G3 VMA_DQ50
VMA_MA4 A3 DQL6 VMA_DQ19 VMA_MA4 A3 DQL6 VMA_DQ26 VMA_MA4 A3 DQL6 VMA_DQ35 VMA_MA4 A3 DQL6 VMA_DQ55
P9 A4 DQL7 H8 P9 A4 DQL7 H8 P9 A4 DQL7 H8 P9 A4 DQL7 H8
D VMA_MA5 VMA_MA5 VMA_MA5 VMA_MA5 D
P3 A5 P3 A5 P3 A5 P3 A5
VMA_MA6 R9 VMA_MA6 R9 VMA_MA6 R9 VMA_MA6 R9
VMA_MA7 A6 VMA_DQ0 VMA_MA7 A6 VMA_DQ15 VMA_MA7 A6 VMA_DQ43 VMA_MA7 A6 VMA_DQ60
R3 A7 DQU0 D8 R3 A7 DQU0 D8 R3 A7 DQU0 D8 R3 A7 DQU0 D8
VMA_MA8 T9 C4 VMA_DQ5 VMA_MA8 T9 C4 VMA_DQ10 VMA_MA8 T9 C4 VMA_DQ44 VMA_MA8 T9 C4 VMA_DQ58
VMA_MA9 A8 DQU1 VMA_DQ1 VMA_MA9 A8 DQU1 VMA_DQ13 VMA_MA9 A8 DQU1 VMA_DQ40 VMA_MA9 A8 DQU1 VMA_DQ63
R4 C9 R4 C9 R4 C9 R4 C9
VMA_MA10 A9 DQU2 VMA_DQ4 VMA_MA10 A9 DQU2 VMA_DQ9 VMA_MA10 A9 DQU2 VMA_DQ47 VMA_MA10 A9 DQU2 VMA_DQ56
L8 A10/AP DQU3 C3 L8 A10/AP DQU3 C3 L8 A10/AP DQU3 C3 L8 A10/AP DQU3 C3
VMA_MA11 R8 A8 VMA_DQ2 VMA_MA11 R8 A8 VMA_DQ12 VMA_MA11 R8 A8 VMA_DQ42 VMA_MA11 R8 A8 VMA_DQ61
VMA_MA12 A11 DQU4 VMA_DQ7 VMA_MA12 A11 DQU4 VMA_DQ8 VMA_MA12 A11 DQU4 VMA_DQ45 VMA_MA12 A11 DQU4 VMA_DQ57
N8 A12/BC DQU5 A3 N8 A12/BC DQU5 A3 N8 A12/BC DQU5 A3 N8 A12/BC DQU5 A3
VMA_MA13 T4 B9 VMA_DQ3 VMA_MA13 T4 B9 VMA_DQ14 VMA_MA13 T4 B9 VMA_DQ41 VMA_MA13 T4 B9 VMA_DQ62
A13 DQU6 VMA_DQ6 A13 DQU6 VMA_DQ11 A13 DQU6 VMA_DQ46 A13 DQU6 VMA_DQ59
T8 A4 T8 A4 T8 A4 T8 A4
A14 DQU7 A14 DQU7 A14 DQU7 A14 DQU7
M8 A15/BA3 M8 A15/BA3 M8 A15/BA3 M8 A15/BA3
VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA

M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3 VMA_BA0 M3 B3


(23) VMA_BA0 BA0 VDD#B3 VMA_BA1 BA0 VDD#B3 VMA_BA1 BA0 VDD#B3 VMA_BA1 BA0 VDD#B3
(23) VMA_BA1 N9 D10 N9 D10 N9 D10 N9 D10
BA1 VDD#D10 VMA_BA2 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10 VMA_BA2 BA1 VDD#D10
(23) VMA_BA2 M4 G8 M4 G8 M4 G8 M4 G8
BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8 BA2 VDD#G8
VDD#K3 K3 VDD#K3 K3 VDD#K3 K3 VDD#K3 K3
K9 K9 K9 K9
VDD#K9 VDD#K9 VDD#K9 VDD#K9
VDD#N2 N2 VDD#N2 N2 VDD#N2 N2 VDD#N2 N2
J8 N10 VMA_CLKP0 J8 N10 J8 N10 VMA_CLKP1 J8 N10
(23) VMA_CLKP0 CK VDD#N10 CK VDD#N10 (23) VMA_CLKP1 CK VDD#N10 CK VDD#N10
K8 R2 VMA_CLKN0 K8 R2 K8 R2 VMA_CLKN1 K8 R2
(23) VMA_CLKN0 CK VDD#R2 VMA_CKE0 CK VDD#R2 (23) VMA_CLKN1 CK VDD#R2 VMA_CKE1 CK VDD#R2
(23) VMA_CKE0 K10 R10 K10 R10 (23) VMA_CKE1 K10 R10 K10 R10
CKE/CKE0 VDD#R10 VCC1.5_VGA CKE/CKE0 VDD#R10 VCC1.5_VGA CKE/CKE0 VDD#R10 VCC1.5_VGA CKE/CKE0 VDD#R10 VCC1.5_VGA

K2 A2 VMA_ODT0 K2 A2 K2 A2 VMA_ODT1 K2 A2
(23) VMA_ODT0 ODT/ODT0 VDDQ#A2 ODT/ODT0 VDDQ#A2 (23) VMA_ODT1 ODT/ODT0 VDDQ#A2 ODT/ODT0 VDDQ#A2
L3 A9 VMA_CS0# L3 A9 L3 A9 VMA_CS1# L3 A9
(23) VMA_CS0# CS /CS0 VDDQ#A9 VMA_RAS0# CS /CS0 VDDQ#A9 (23) VMA_CS1# CS /CS0 VDDQ#A9 VMA_RAS1# CS /CS0 VDDQ#A9
(23) VMA_RAS0# J4 C2 J4 C2 (23) VMA_RAS1# J4 C2 J4 C2
RAS VDDQ#C2 VMA_CAS0# RAS VDDQ#C2 RAS VDDQ#C2 VMA_CAS1# RAS VDDQ#C2
(23) VMA_CAS0# K4 C10 K4 C10 (23) VMA_CAS1# K4 C10 K4 C10
CAS VDDQ#C10 VMA_WE0# CAS VDDQ#C10 CAS VDDQ#C10 VMA_WE1# CAS VDDQ#C10
(23) VMA_WE0# L4 WE VDDQ#D3 D3 L4 WE VDDQ#D3 D3 (23) VMA_WE1# L4 WE VDDQ#D3 D3 L4 WE VDDQ#D3 D3
VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10 VDDQ#E10 E10
F2 F2 F2 F2
VMA_RDQS2 VDDQ#F2 VMA_RDQS3 VDDQ#F2 VMA_RDQS4 VDDQ#F2 VMA_RDQS6 VDDQ#F2
F4 H3 F4 H3 F4 H3 F4 H3
C VMA_RDQS0 DQSL VDDQ#H3 VMA_RDQS1 DQSL VDDQ#H3 VMA_RDQS5 DQSL VDDQ#H3 VMA_RDQS7 DQSL VDDQ#H3 C
C8 DQSU VDDQ#H10 H10 C8 DQSU VDDQ#H10 H10 C8 DQSU VDDQ#H10 H10 C8 DQSU VDDQ#H10 H10

VMA_DM2 E8 A10 VMA_DM3 E8 A10 VMA_DM4 E8 A10 VMA_DM6 E8 A10


VMA_DM0 DML VSS#A10 VMA_DM1 DML VSS#A10 VMA_DM5 DML VSS#A10 VMA_DM7 DML VSS#A10
D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4 D4 DMU VSS#B4 B4
E2 E2 E2 E2
VSS#E2 VSS#E2 VSS#E2 VSS#E2
VSS#G9 G9 VSS#G9 G9 VSS#G9 G9 VSS#G9 G9
VMA_WDQS2 G4 J3 VMA_WDQS3 G4 J3 VMA_WDQS4 G4 J3 VMA_WDQS6 G4 J3
VMA_WDQS0 DQSL VSS#J3 VMA_WDQS1 DQSL VSS#J3 VMA_WDQS5 DQSL VSS#J3 VMA_WDQS7 DQSL VSS#J3
B8 DQSU VSS#J9 J9 B8 DQSU VSS#J9 J9 B8 DQSU VSS#J9 J9 B8 DQSU VSS#J9 J9
M2 M2 M2 M2
VSS#M2 VSS#M2 VSS#M2 VSS#M2
VSS#M10 M10 VSS#M10 M10 VSS#M10 M10 VSS#M10 M10
P2 P2 P2 P2
VSS#P2 DRAM_RST_M T3 VSS#P2 DRAM_RST_M T3 VSS#P2 DRAM_RST_M T3 VSS#P2
(23) DRAM_RST_M T3 RESET VSS#P10 P10 RESET VSS#P10 P10 RESET VSS#P10 P10 RESET VSS#P10 P10
T2 T2 T2 T2
VMA_ZQ1 VSS#T2 VMA_ZQ2 VSS#T2 VMA_ZQ3 VSS#T2 VMA_ZQ4 VSS#T2
L9 T10 L9 T10 L9 T10 L9 T10
ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10 ZQ/ZQ0 VSS#T10
Should be 240 Should be 240 Should be 240 Should be 240
Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2 Ohms +-1% A1 B2
NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2 NC VSSQ#B2
T1 B10 T1 B10 T1 B10 T1 B10
R31 NC VSSQ#B10 R249 NC VSSQ#B10 R55 NC VSSQ#B10 R296 NC VSSQ#B10
A11 NC VSSQ#D2 D2 A11 NC VSSQ#D2 D2 A11 NC VSSQ#D2 D2 A11 NC VSSQ#D2 D2
243/F_4 T11 D9 243/F_4 T11 D9 243/F_4 T11 D9 243/F_4 T11 D9
NC VSSQ#D9 NC VSSQ#D9 NC VSSQ#D9 NC VSSQ#D9
E3 E3 E3 E3
VSSQ#E3 VSSQ#E3 VSSQ#E3 VSSQ#E3
J2 E9 J2 E9 J2 E9 J2 E9
NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9 NC/ODT1 VSSQ#E9
L2 F10 L2 F10 L2 F10 L2 F10
NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10 NC/CS1 VSSQ#F10
J10 G2 J10 G2 J10 G2 J10 G2
NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2 NC/CE1 VSSQ#G2
L10 G10 L10 G10 L10 G10 L10 G10
NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10 NC/ZQ1 VSSQ#G10
100-BALL 100-BALL 100-BALL 100-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12 K4W1G1646E-HC12

B VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA VCC1.5_VGA B

R33 R52 R247 R222 R57 R80 R285 R258


4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4 4.99K/F_4

VREFC_VMA1 VREFD_VMA1 VREFC_VMA2 VREFD_VMA2 VREFC_VMA3 VREFD_VMA3 VREFC_VMA4 VREFD_VMA4

R32 R53 R248 R221 R56 R81 R286 R259


4.99K/F_4 C75 4.99K/F_4 C163 4.99K/F_4 C587 4.99K/F_4 C570 4.99K/F_4 C188 4.99K/F_4 C252 4.99K/F_4 C631 4.99K/F_4 C601
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

VCC1.5_VGA
VMA_CLKP0 VCC1.5_VGA

R29
56.2/F_4
C253 C258 C633 C632 C600 C254 C257 C634 C603 C602 C599 C184 C598 C187 C185 C186
C63
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VMA_CLK0_COMM

R30 0.01U/25V_4 VCC1.5_VGA VCC1.5_VGA


56.2/F_4

A VMA_CLKN0 A
VMA_CLKP1 C586 C585 C588 C73 C76 C77 C74 C589 C571 C569 C568 C572 C162 C161 C165 C164
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4

R288
56.2/F_4
VCC1.5_VGA VCC1.5_VGA
C255
VMA_CLK1_COMM Quanta Computer Inc.
R287 0.01U/25V_4 C166 C70 C566 C590 C567 C259 C256 C635 C71 C636 C183 C593 PROJECT : Shasta_(NZ2)
56.2/F_4 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 Size Document Number Rev
DVT
CEDAR_VRAM (DDR3 BGA96)
VMA_CLKN1 Date: Wednesday, September 15, 2010 Sheet 24 of 41
5 4 3 2 1
1 2 3 4 5 6 7 8

(9) LVDS_TXCLK_UN
(9) LVDS_TXCLK_UP
*IV@0X2 3
1
4
2
RN18 TXUCLKOUT-
TXUCLKOUT+
LCD CONNECTOR
PVT
25
(9) LVDS_TX_U0P *IV@0X2 3 4 RN17 TXUOUT0+ Hi:write protection CON1
(9) LVDS_TX_U0N 1 2 TXUOUT0- L43 LCD_VCC
Lo:can write data 1 2
*IV@0X2 3 RN16 TXUOUT1+ 3 4 PBY321611T-601Y-N_2A
(9) LVDS_TX_U1P 4
TXUOUT1- LCD_EDIDDATA 5 6
(9) LVDS_TX_U1N 1 2
LCD_EDIDCLK 7 8
*IV@0X2 3 RN19 TXUOUT2+ 9 10
(9) LVDS_TX_U2N 4
TXUOUT2- TXLCLKOUT+ 11 12 TXUOUT1-
(9) LVDS_TX_U2P 1 2
TXLCLKOUT- 13 14 TXUOUT1+
15 16

C12

C11
(9) LVDS_TX_U3N *IV@0X2 3 4 RN20 TXUOUT3+

1
A
TXUOUT3- TXLOUT0+ 17 18 TXUOUT0- A
(9) LVDS_TX_U3P 1 2
TXLOUT0- 19 20 TXUOUT0+
21 22

2
23 24

330P

330P
TXLOUT1+ TXUCLKOUT+
TXLOUT1- 25 26 TXUCLKOUT-
27 28
EMI TXLOUT2+ 29 30 TXUOUT2+
EV@0X2 RN8 TXLOUT2- 31 32 TXUOUT2-
(21) EXT_TXUCLKOUTP 2 1
33 34
(21) EXT_TXUCLKOUTN 4 3
TXLOUT3+ 35 36 TXUOUT3+
EV@0X2 RN7 TXLOUT3- 37 38 TXUOUT3-
2 1 PVT

41

42
(21) EXT_TXUOUTN0 39 40
(21) EXT_TXUOUTP0 4 3

41

42
(21) EXT_TXUOUTN1 EV@0X2 2 1 RN6
(21) EXT_TXUOUTP1 4 3

(21) EXT_TXUOUTP2 EV@0X2 2 1 RN9


(21) EXT_TXUOUTN2 4 3
ACES_50238-04071-001_LVDS
(21) EXT_TXUOUTP3 EV@0X2 2 1 RN10
(21) EXT_TXUOUTN3 4 3
PN:DFWF40MS017
TO INVERTER POWER
PANEL VCC CONTROL CN14
VIN_LCD
F2
1 2 1 VIN
VCC5 2 3A RC1206
LCD_VCC 3
Q13 4
5 DISPON C450 C466 C479 C467
(9) LVDS_TXCLK_LN *IV@0X2 3 4 RN11 TXLCLKOUT- C533 0.1U 6 1 6 LCD_VADJ 10U_1206 0.1U_0603 0.1U 10U_1206
TXLCLKOUT+ IN OUT CH61004M291
(9) LVDS_TXCLK_LP 1 2 7
4 2 8
*IV@0X2 3 TXLOUT2- IN GND
(9) LVDS_TX_L2N 4 RN14 C528 C13 11 9
(9) LVDS_TX_L2P 1 2 TXLOUT2+ EV@0_4 R2 DIGON_R 3 5 del R49.08/29 12 10
(21) EXT_DISP_ON ON/OFF GND
B 10U/10V 0.1U B
(9) LVDS_TX_L0N *IV@0X2 3 4 RN12 TXLOUT0- *IV@0_4 R3
(9) INT_LVDS_PWREN
(9) LVDS_TX_L0P 1 2 TXLOUT0+ AAT4280IGU-2-T1
R1 C15
(9) LVDS_TX_L1N *IV@0X2 3 4 RN13 TXLOUT1- 10K *0.1u/10V_4
(9) LVDS_TX_L1P 1 2 TXLOUT1+ LCD_VADJ

(9) LVDS_TX_L3N *IV@0X2 3 4 RN15 TXLOUT3- R405 0_4


(26) VADJ
(9) LVDS_TX_L3P 1 2 TXLOUT3+

C720 *0.1u/10V_4
PANEL BACKLIGHT CONTROL VCC3 (9) INT_LVDS_BRIGHT
R384 *0_4

R397 *0_4
(21) EXT_BKLT_CTRL

(21) EXT_TXLCLKOUTP EV@0X2 2 1 RN1 R163


(21) EXT_TXLCLKOUTN 4 3 10K

EV@0X2 2 1 RN2 C717 0.1U


(21) EXT_TXLOUTP0 VCC3
(21) EXT_TXLOUTN0 4 3

5
EV@0X2 2 1 RN3
(21) EXT_TXLOUTP1
4 3 1SS355 D16 2
(21) EXT_TXLOUTN1 (26) BLON_EC
4 DISPON
EV@0X2 2 1 RN4 *IV@0_4 R369 1
(21) EXT_TXLOUTP2 (9) INT_LVDS_BLON
4 3 U23
(21) EXT_TXLOUTN2
EV@0_4 R365 TC7SH08FU
(20) EXT_LVDS_BLON

3
EV@0X2 2 1 RN5
(21) EXT_TXLOUTP3
4 3 0_4 R363
(21) EXT_TXLOUTN3 (26) BLON_DET

10K
VCC3 R372
A:(8/20) Remove switch IC, Modify ckt to original ckt
C C

R46
4.7K/J_4

R45 LCD_EDIDCLK
(20) EXT_EDIDCLK
EV@0_4
(9) INT_EDID_CLK R40
*IV@0_4

VCC3 EEPROM IIC Selection


PANEL EDID DATA
VCC3
VCC3
R51
4.7K/J_4
Address:A8/A9
C203 0.1U_4
DTC144EU R36
10K_4 U4
Q1
R54 EV@0_4 LCD_EDIDDATA 8 1
(20) EXT_EDIDDAT VCC A0
1 3 7 2
R48 *IV@0_4 G1 WC# A1 WRITE_EDID_ROM
(9) INT_EDID_DATA 6 3
1

SCL A3
5 4
SDA GND
*SHORT_PAD 24LC02
2

WRITE_EDID_ROM
VCC3 VCC3
EMI CAP
VCC3 VCC3
VCC5 C40 *0.1u/10V_4
U3 VCC3
CN2
C127 16 8 R20 R19 VCC5 PVT
VCC GND 4.7K_4 4.7K_4 C8 0.1u/10V_4
D LCD_VCC D
R38 R39 0.22u_4 EEPROM_SCL 1
2
2

2.2K/J_4 2.2K/J_4 LCD_EDIDCLK 2 EEPROM_SDA


LCD_EDIDDATA 5 IA0 3
4EEPROM_SCL C10 *100p/50V_4
SB_SMBCLK1 3 IB0 YA 4 LCD_EDIDDATA
(13) SB_SMBCLK1 1 11
Q2 B-22 IC0
14 7EEPROM_SDA *EDID CONNECTOR
2

2N7002E ID0 YB 85205-04xx-4p-l


SB_SMBCLK1_R 3 9 C173
1

SB_SMBDATA1 SB_SMBDATA1_R IA1 YC C190 C123 *100p/50V_4


(13) SB_SMBDATA1 3 1 6
Q3 IB1
10 12
2N7002E IC1 YD 1000P LCD_EDIDCLK
13
Quanta Computer Inc.
2

ID1 1000P

WRITE_EDID_ROM 1 15
(12) WRITE_EDID_ROM S OE C718 *100p/50V_4 PROJECT : Shasta_(NZ2)
SN74CBT3257CPWR LCD_VADJ Size Document Number Rev
R37 2.2K_4 DVT
VCC3 Panel (LVDS)
Date: Wednesday, September 15, 2010 Sheet 25 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1

26
3VPCU

3VPCU_EC 3VPCU PWRBTN# R104 10K_4

120ohm-300mA L59 120ohm-300mA 3VPCU


L34
C707 C706 L57 120ohm-300mA 3VPCU HWPG R131 *10K_4
C676 C700 C334 C697 C329 C705 C690
1000P/50V/4 0.1U/25V/4
0.1U/25V/4 0.1U/25V/4 0.1U/25V/4 0.1U/25V/4 EC_ACIN R316 10K_4
0.1U/25V/4 0.1U/25V/4 0.1U/25V/4
WL_EN R322 10K_4
BLON_DET (25)
VRON_DELAY (34,38)
D D
THERM_CLK_EC R340 4.7K_4
AMP_MUTE# (27)
THERM_DAT_EC R334 4.7K_4
PWROK_EC (5,16,32) EJECT#_SW R319 10K_4
SUSC# SUSC# (13)

ICH_RSMRST# (13)
VRON (32) PVT
VCC3 VCCRTC
MAINON_1 (38,39,40)
MAINON_2 (36,37,38,40)
C674 R321 3VPCU_EC CIR_TX1 (30) dGPU_PRSNT_EC# R347 *10K_4 3VPCU
CLK_PCI_775 CIR_RX1 (30)
R432 VGA: Mount R432
*10P/50V/4 *22/J_4 SUSON (36,40) 10K_4
C679 UMA:Mount R347
3VPCU
R315 10K/J_4 LPCRST# 0.1U/25V/4 HWPG

114
121

127
U21 SUSC#

11
26
50
92

74

84
83
82

19
20

99
98
97
96
95
94
93
3
IT8512
10 110 THERM_CLK_EC C677 C376

EGCLK/WUI27/GPE3
EGCS#/WUI26/GPE2
EGAD/WUI25/GPE1

L80HLAT/BAO/WUI24/GPE0
L80LLAT/WUI7/GPE7

HMOSI/GPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/WUI19/GPH3/ID3
CTX1/WUI18/GPH2/SMDAT3/ID2
CRX1/WUI17/SMCLK3/GPH1/ID1
CLKRUN#/WUI16/GPH0/ID0
VCC

AVCC
VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY
(12,30) LPC_LAD0 LAD0 SMCLK0/GPB3 THERM_CLK_EC (5)
9 111 THERM_DAT_EC THERM_DAT_EC (5)
(12,30) LPC_LAD1 LAD1 SMDAT0/GPB4
8 115 *39P/50V/4 *39P/50V/4

SM BUS
(12,30) LPC_LAD2 LAD2 SMCLK1/GPC1
(12,30) LPC_LAD3 7 116
R320 LPCRST# LAD3 SMDAT1/GPC2 1SS355 D8
(12,30) PCIE_RST#_SB 22 117 DNBSWON# (13)
*0_4 CLK_PCI_775 LPCRST#/WUI4/GPD2 SMCLK2/WUI22/GPF6 VCC3
(12,16) CLK_PCI_775 13 118
LPCCLK SMDAT2/WUI23/GPF7
(12,30) LPC_LFRAME# 6
LFRAME#
PVT
85 Board_Ver R396 4.7K_4
R317 *10K 5% 1/16W 0402 LPCPD# PS2CLK0/TMB0/GPF0 R130
3VPCU 17 86
LPCPD#/WUI6/GPE6 PS2DAT0/TMB1/GPF1

PS/2
89
D7 1SS355 PS2CLK2/WUI20/GPF4
(13) SIO_A20GATE 126 90
GA20/GPB5 PS2DAT2/WUI21/GPF5 10K/J_4
(12,30) IRQ_SERIRQ 5
D3 1SS355 SERIRQ HWPG
(13) SIO_EXT_SMI# 15
D4 1SS355 ECSMI#/GPD4
(13) SIO_EXT_SCI# 23
ECSCI#/GPD3 LPC
PCURST# 14 (35) HWPG_3/5V D11 1SS355
D6 1SS355 WRST#
(13) SIO_RCIN# 4
KBRST#/GPB6 GPIO
16 (5,16,32) CPU_VDDIO_PWRGD D13 1SS355
T123 PWUREQ#/BBO/GPC7
C 24 VADJ (25) (37) VCC1.1_1.0_VGA_PWRGD D9 1SS355 C
PWM0/GPA0
25 FAN1# (29)
PWM1/GPA1 D12 1SS355
28 CCD_POWER_ON# (31) (36) HWPG_1.5V
CIR_RX0 PWM2/GPA2
(30) CIR_RX0 119 29 LAN_WOL_EN_EC (40)
CRX0/GPC0 PWM3/GPA3 D10 1SS355
123
CTX0/TMA0/GPB2 CIR PWM4/GPA4
30 (34) HWPG_1.1V
T124 31 EJECT#_SW EJECT#_SW (30)
PWM5/GPA5 D14 1SS355
(37) dGPU_PWROK
80
DAC4/DCD0#GPJ4 PWM PWM7/GPA7
34 WL_EN (30)
104
DSR0#GPG6
33 47 FAN1SIG (29)
GINT/CTS0#//GPD5 TACH0/GPD6
88 48

(30) PWRLED0#
81
87
109
PS2DAT1/RTS0#/GPF3
DAC5/RIG0#/GPJ5
PS2CLK1/DTR0#/GPF2
TXD/SOUT0/GPB1
UART port IT8512NX TACH1/TMA1/GPD7

TMR0/WUI2/GPC4
TMR1/WUI3/GPC6
120
124
2ND_FAN_TACH

BLON_EC (25)
(29)

(30) PWRLED1# 108


RXD/SIN0/GPB0
PWRLED0# :Indicate S3,S4,S5
125 PWRBTN# (30)
3VPCU PWRLED1# :Indicate S0 PWRSW/GPE4 SUSB# 3VPCU
18 SUSB# (13)
RI1#/WUI0/GPD0 EC_ACIN
WAKE UP RI2#/WUI1/GPD1
21

R318 35 -PCUHOLD
WUI5/GPE5
470K_4 112 S5_PWR_ON (34,38,40)
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 R128
10K_4 R102
PCURST# 8512_SCK 105 10K_4
8512_SCE# FSCK
101
FSCE# GPI for Input only
8512_SI 102 EXTERNAL SERIAL FLASH U6
C678 8512_SO FMOSI 8512_SCE#
103 1 8
FMISO HWPG 8512_SCK R105 47R_4 CE# VDD
0.1U/25V/4 66 6
ADC0/GPI0 8512_SI R106 47R_4 SCK
56 67 ADP-ID (39) 5
KSO16/SMOSI/GPC3 ADC1/GPI1 dGPU_PRSNT_EC# D17 8512_SO SI
(30) IR_ACTIVE_LED# 57
KSO17/SMISO/GPC5 ADC2/GPI2
68 dGPU_PRSNT# (13) PVT:Add D17 R115 15R_4 2
SO HOLD#
7 C319
BIOS_WP# 32 69 CIR_ED1 *1SS355 CIR_ED1 (30) 0.1U/25V/4
PWM6/SSCK/GPA6 ADC3/GPI3 BIOS_WP#
100 70 3 4
SSCE0#/GPG2 ADC4/WUI28/GPI4 WP# VSS
107 71
SBUSY/GPG1/ID7 ADC5/WUI29/GPI5 W25X10BVSNIG
SPI Device ADC6/WUI30/GPI6
72 THERM_ALERT# (5,14)
106
GPG0 A/D D/A ADC7/WUI31/GPI7
73 VGA_TEMP_FAIL (20)
B B
MY0 36
MY1 KSO0/PD0
37
MY2 KSO1/PD1
38
MY3 KSO2/PD2
39 76
MY4 KSO3/PD3 DAC0/GPJ0
40
KSO4/PD4 KBMX DAC1/GPJ1
77
MY5 41 78
MY6 KSO5/PD5 DAC2/GPJ2
42 79
MY7 KSO6/PD6 DAC3/GPJ3
43
MY8 KSO7/PD7
44
MY9 KSO8/ACK#
45
MY10 KSO9/BUSY
46
MY11 KSO10/PE PMUX2
51 2
KSI3/SLIN#

KSO11/ERR# CK32KE
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

MY12 52 CLOCK 128 PMUX1


MY13 KSO12/SLCT CK32K 3VPCU
VCORE

53
KSO13
AVSS

MY14 54 1 4
KSI4
KSI5
KSI6
KSI7

VSS

VSS
VSS
VSS
VSS
VSS

MY15 KSO14
55 2 3
KSO15
Y1
58
59
60
61
62
63
64
65

27
49
91
113
122

75

12

1
32.768KHZ
C681 C680
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

10P/50V/4 10P/50V/4 PWRBTN# 2 Q10


C675 DTA124EU
R348
0R_4 0.1U

3
PVT SUSB# -PCUHOLD
D5 1SS355

*88502-2401-24P-L
24 MX2
24 MX4 R103
23
23 MX1
22
22 MX7 100K
21
21 MX3
20
20 MX0
19
19 MX6
18
18 MX5
17
17 MY4
16
16 MY1
A 15 A
15 MY3
14
14 MY5
13
13 MY6
12
12 MY7
11
11 MY8
10
10 MY9
9
9 MY10
8
8 MY14
7
7 MY11
6
6 MY2
5
5
4
4 MY0
MY12
Quanta Computer Inc.
3
3 MY13
2 PROJECT : Shasta_(NZ2)
2 MY15
1
1 Size Document Number Rev
CON3 DVT
EC ITE 8512N/FLASH
Date: Wednesday, September 15, 2010 Sheet 26 of 41
5 4 3 2 1
5 4 3 2 1

Codec ALC269QAFP-VB5-GR 27
Sonic Focus support. AR22 *0_4 AR28 *0_4 AR1 0_4

VCC5 +5VA VCC5 VCC5


0V : Power down Class D SPK amplifer
3.3V : Power up Class D SPK amplifer
AL9
AR27 0_4 AR32 0_4 AR20 0_4

*AZ2015-01H_ESD
TI201209U220/0805

1
AC27 AC29 AC28 AC30
Place close to Codec
AD5 0.1U/10V/X5R/4 0.1U/10V/X5R/4 4.7U/10V/X5R/8

2
Tied at one point only under the 4.7U/10V/X5R/8 AR21 0_4 AR29 0_4 AR26 0_4

D
ALC269 or near the ALC269 D

2
AMP_GND AMP_GND
ADOGND
ADOGND AMP_GND ADOGND AMP_GND ADOGND
HPOUT-CRO Place next to pin 39 Place next to pin 46 digital_ground digital_ground
HPOUT-CLO

MIC1-VREFO-L

MIC1-VREFO-R
AC19
2.2U/6.3V/X5R/6
ADOGND

AC14
ALG_VREF
AC21
Demodulation Filter

10U/6.3V/X5R/8
2.2U/6.3V/X5R/6 AC7
AC10 HPOUT-CLO AR17 75/F_4 HPOUT-CL AL5 0_6 HPOUT_L
0.1U/10V/X5R/4 10U/6.3V/X5R/8 HPOUT_L (30)
HPOUT-CRO AR24 75/F_4 HPOUT-CR AL6 0_6 HPOUT_R
HPOUT_R (30)

CPVEE
HPOUT_JD#
HPOUT_JD# (30)

CPN
CBP
+5VA
ADOGND

AU1
ALC269Q-VB5-GR AC4 AC2
36

35

34

33

32

31

30

29

28

27

26

25
0.1U/10V/X5R/4 10U/6.3V/X5R/8

MIC2-VREFO

VREF
CBN

HP-OUT-R

MIC1-VREFO-R
HP-OUT-L

MIC1-VREFO-L

AVSS1

AVDD1
CBP

CPVEE

LDO-CAP
+5VA
ADOGND 37 24 LINEOUT_R ADOGND
AVSS2 LINE1-R
Place next to pin 25
Spilt by DGND 38 23 LINEOUT_L
AVDD2 LINE1-L
VCC5 39 22 MIC1_CRI
PVDD1 MIC1-R
C C
AC26 AC25 PVT L_SPK+ 40 21 MIC1_CLI
SPK-L+ MIC1-L MIC1-VREFO-R AD4 1SS355 100mA 80V
10U/10V/X5R/8 0.1U/10V/X5R/4 L_SPK- 41 20 I DSM
SPK-L- MONO-OUT AR5 MIC_VREF_RO
42 19 AU1.19 20K/F_4 ADOGND MIC1-VREFO-L AD3 1SS355 80V
PVSS1 (Vista Premium Version) JDREF I DSM 100mA MIC_VREF_LO
43 18 AU1.18 T98
ADOGND AMP_GND PVSS2 Sense B
R_SPK- 44 17 AR9 AR10
SPK-R- MIC2-R 2.2K/F_4 2.2K/F_4
Place next to pin 38
R_SPK+ 45 16
SPK-R+ MIC2-L
46 15 MIC1_CLI AC6 4.7U/6.3V/X5R/6 MIC1_CL AR3 1K/F_4 MIC1_CL2O AL2 0_6 MIC1_L2 MIC1_L2 (30)
VCC5 PVDD2 LINE2-R
PVT MIC1_CRI AC5 4.7U/6.3V/X5R/6 MIC1_CR AR2 1K/F_4 MIC1_CR2O AL1 0_6 MIC1_R2 MIC1_R2 (30)
GPIO0/DMIC-DATA

47 14 Placement near Audio Codec


EAPD LINE2-L
GPIO1/DMIC-CLK

T99 EAPD#
PVT:Delete AL7,AL8 48 13 SENSEA HPOUT_JD# MIC1_JD# MIC1_JD# (30)
SPDIFO Sense A
SDATA-OUT

AR8 39.2K/F/4
SDATA-IN

49 MIC1_JD#
DVDD-IO

PCBEEP

PGND
RESET#
BIT-CLK

AR7 20K/F/4
DVDD1

DVSS2

SYNC

LINEOUT_JD#
Max. 100mVrms input for Mic-IN
PD#

AMP_GND AR6 10K/F_4


1

10

11

12

ANALOG
VCC3 DIGITAL
1.6Vrms
PCBEEP BEEP_1 AR13 47K_4
SPKR (13)
AC8
1u/10V/X5R/6 AC9 AR12
2K_4
100p/50V/NPO/6
AC24 AC23 VCC3
ACZ_SDIN
ACZ_BIT_CK_IN

Place next to pin 1


10U/10V/X5R/8 0.1U/10V/X5R/4
+AZA_VDD AR23 0_6

ACZ_RST#_AUDIO
ACZ_RST#_AUDIO (13)
AC11 *10P/50V/COG/4 AC15 AC12
DMIC_DIN 0.1U/10V/X5R/4 10U/10V/X5R/8
(31) DMIC_DAT
AR25 *0/short_4
ACZ_SYNC_AUDIO (13)
B DMIC_CIN AR15 33_4 ACZ_SDIN0 (13) CON4 B
(31) DMIC_CLK
AR19 *0/short_4
AC17 10P/50V/COG/4 AC3 22u/6.3V/X5R/12 1
LINEOUT_L AR11 75/F_4 LINEOUT_L1 AL3 BLM15AG601SN1D LINEOUT_L2 3
PD# LINEOUT_R AR16 75/F_4 LINEOUT_R1 AL4 BLM15AG601SN1D LINEOUT_R2 2
ACZ_SDOUT_AUDIO (13)
AC20 AC22 Place next to pin 9 5
*100P/50V_4 *100P/50V_4 AC16 22u/6.3V/X5R/12 4
EMI AR18 0_4
ACZ_BITCLK_AUDIO (13)

1
LINEOUT_JD# LINE OUT

3
AC18 AQ5 AQ4 AC13 AC1 Normal open Type
10P/50V/COG/4 *2N7002E *2N7002E AR4 AR14 AD2
0V : Power down Class D SPK amplifer *22K *22K AD1 1000P/50V/X7R/6 1000P/50V/X7R/6 PN:DFTJ05FS018
2 2 *PESD5V0U1BB *PESD5V0U1BB
3.3V : Power up Class D SPK amplifer

2
digital_ground AR34 AR33

*1K/F *1K/F

1
ADOGND ADOGND
ADOGND ADOGND

ADOGND ADOGND
PVT PD_MUTE

AMP_MUTE# D702 *1SS355


(26) AMP_MUTE#
PD#
INT SPEAKER
ACZ_RST#_AUDIO D703 *1SS355 PVT
AR35
*4.7K R_SPK+ AL12 8.2UH R_SPK+_1
VCC3 AC36
*1000P/50V/X7R/6
AC41 *0.1U/10V/X5R/4
BUZZER AMP_GND
AC31

1U/16V/XR7/12
5

AU2 AC35
2 5VPCU R412 *33 1% 1/16W 0402 *1000P/50V/X7R/6
4 BZ1 ACN1
1 3VPCU R433 *33 1% 1/16W 0402 1 R_SPK- AL11 8.2UH R_SPK-_1
1
3
2
3

*TC7SH08FU R436 *0 1% 1/10W 0603 2


L_SPK- A1 8.2UH L_SPK-_1 35
4
A 46 A
VCC3 *BZ 3.6V 90DB 8.5*8.5MM AC32 Speak CNN
3

Q19 DNGJ4B20000 *1000P/50V/X7R/6


R435 *2.7K 1% 1/16W 0402 2 C543 AC33
(13) SPKR AMP_GND
AR30 AMP_GND
10K/F_4 *TR NPN MMBT3904 40V 0.2A *0.1uF 10% 16V X7R 0402 1U/16V/XR7/12
1

AC34
1SS355 VCC3 *1000P/50V/X7R/6
D704
AC42 0.1U/10V/X5R/4 L_SPK+ AL10 8.2UH L_SPK+_1
5

1SS355
ACZ_RST#_AUDIO D705 1
4 Place next to pin 46
2 Quanta Computer Inc.
AU3 SN741G32
PROJECT : Shasta_(NZ2)
3

Size Document Number Rev


Audio Codec ALC269 DVT

Date: Wednesday, September 15, 2010 Sheet 27 of 41


5 4 3 2 1
5 4 3 2 1

LAN
3V_LAN
R418

2.49K_4
RSET
28

3V_LAN
3V_LAN

3V_LAN

3V_LAN
GPO
VDD10

VDD10
LAN_LED0#

LED1/EESK
More Detail Layout

25MCLKX2
25MCLKX1
R400 1K_4 GPO
Pls. Refer to Layout Guide
R417 10K_4 SMBDATA
3V_LAN
RJ45 CONN(+LAN Transformer+ISN soluation)
R385 10K_4 EEDI/SDA
D D

48
47
46
45
44
43
42
41
40
39
38
37
R23 For Enable Switch Regulator. C500 *1500p/50V_6

AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10
LED0
DVDD3
RSET

GPO/SMBALERT
LED1/EESK
R24 For Disable Switch
Using EFuse only without ASF function. R382 C499 *1500p/50V_6
Regulator.
CN20
LAN_LED0# R190 510_6 13
MDI0+ REGOUT 0_6 Y-
1 36
MDI0- MDIP0 REGOUT AVDD33_REG VCC3
2 35 3V_LAN 14
VDD10 MDIN0 VDDREG AVDD33_REG Y+
3 34
MDI1+ AVDD10 VDDREG ENSWREG R395 *0_6 MDI3-
4 33 10
MDI1- MDIP1 ENSWREG EEDI/SDA NC/3-
5 32
VDD10 MDIN1 EEDI/SDA LED3/EEDO MDI3+
6 31 9
3V_LAN MDI2+ 7
AVDD10
MDIP2
RTL8111E LED3/EEDO
EECS/SCL
30 EECS/SCL R389 NC/3+
MDI2- 8 29 VDD10 1K_4 MDI2- 8
VDD10 MDIN2 DVDD10 PCIE_WAKE#_LAN NC/2-
9 28
MDI3+ AVDD10 LANWAKEB 3V_LAN MDI2+
10 27 7
MDI3- MDIP3 DVDD33 ISOLATE# NC/2+
11 26
CLKREQB R416 10K_4 3V_LAN MDIN3 ISOLATEB C517 1500P/3KV_1808 TCT1 TCT1
12 25 A_RST#_NB (12,19) 6
AVDD33 PERSTB NC/6

REFCLK_N
REFCLK_P
SMBDATA
PCIE_WAKE#_LAN TCT2

CLKREQB
R387 *10K_4 PVT R388 C516 1500P/3KV_1808 5

SMBCLK
NC/5

DVDD10

EVDD10
15K/F_4

HSON
HSOP
MDI1- 4

HSIN
HSIP

GND
EECS/SCL R386 10K_4 RX-/1-
49 18
PAD MDI1+ NC1
3
U26 RX+/1+
17

13
14
15
16
17
18
19
20
21
22
23
24
MDI0- NC
2
TX-/0-
16
VDD10 MDI0+ GND
1
TX+/0+
15
SMBDATA LAN_LINK# R191 510_6 GLED- GND
11
CLKREQB R415 0R_4 CLKREQB_R R192 *0_6 GLED+ G-
3V_LAN 12
LED3/EEDO R199 0_6 G+
(8) PCIE_TXP1
(8) PCIE_TXN1
R194 *0_6 C510 C505 RJ45-CONN
(12) CLK_PCIE_LAN
(12) CLK_PCIE_LAN#
EVDD10
X'tal 25MHz *1500p/50V_6 *1500p/50V_6

C722 0.1u/10V_4_X7R PCIE_RXP1_C


Delete R412 0
C (8) PCIE_RXP1 C
(8) PCIE_RXN1 C719 0.1u/10V_4_X7R PCIE_RXN1_C
33P/50V_4 C721 25MCLKX1

1
Y6
PVT 25MHz/20pF/30ppm
LED1/EESK D19 1 2 *1SS355 LAN_LINK#

2
3V_LAN 33P/50V_4 C729 25MCLKX2 R193 0_6

BG625000486 R198 *0_6


2

XTL-5_3X3_2-3_8-1_2H

(13) PCIE_WAKE# 3 1 PCIE_WAKE#_LAN

Q49
PDTC144EU

R422 *0R_4

EVDD10/AVDD33_REG trace width >60mils


3V_LAN R176 0_6 AVDD33_REG

C486 C476 C470 C471 C485 C484


C473 C463
B
0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 4.7u/10V_6 For ESD B

Near pin 12,27,39,42,47,48


Close LAN chip pin 34,35
U29
MDI0+ 1 10 MDI0+
MDI0- 1 10 MDI0-
2 9
2 9
EVDD10 trace width >60mils C35,C36 close to U3-PIN21 MDI1+
3
4
GND_3/8
7 MDI1+
R178 0_6 MDI1- 4 7 MDI1-
EVDD10 5 6
5 6
*RClamp0524P

C477 C478
0.1U_4 1u_4

EVDD10/N780946/REGOUT trace width >60mils L41 U30


VDD10 R172 0_6 REGOUT MDI2+ 1 10 MDI2+
4.7uH/850mA MDI2- 1 10 MDI2-
2 9
2 9
3
MDI3+ GND_3/8 MDI3+
4 7
MDI3- 4 7 MDI3-
5 6
5 6
C489 C487 C482 C488 C480 C483 C472 *RClamp0524P
C468 C464
0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 0.1U_4 4.7u/10V_6

Near pin 3,6,9,13,29,41,45


Close LAN chip pin 36
A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
RTL8111E/RJ45
Date: Wednesday, September 15, 2010 Sheet 28 of 41
5 4 3 2 1
1 2 3 4 5 6 7 8

1st 2.5"/3/5" SATA HDD


Wire Type
FAN CONN
VCC12
29

2
R359
3.3K CN13
(26) FAN1# 1
FAN1_SENSE

1
FAN1_SENSE 2
CAP. Close connect side CN24
3
1 VCC12

2
C741 0.01u/16V_4 SATA_TX0+_C GND 4
(14) SATA_TX0+ 2
C742 0.01u/16V_4 SATA_TX0-_C TXP R358 FAN CONN
(14) SATA_TX0- 3 4
A TXN GND 15K C709
A

7 2.2u/25V_8
C744 0.01U_4 SATA_RXN0_C GND
5

1
(14) SATA_RX0- RXN
C743 0.01U_4 SATA_RXP0_C 6 8 (26) FAN1SIG FAN1SIG
(14) SATA_RX0+ RXP G1
9

2
G2
VCC12 VCC5 SATA_7P R357
PVT PVT 6.2K

1
1
2
C752 3
+ C749 C747 4
C760 C748 C751 C750
*100U/16V 0.1U_4 10U_12 100p/50V_4
10U_6 0.1U_4 10U_6
C759
100p/50V_4
CN25
50322-0044l-001-4p-l
2nd FAN CONN
PVT
VCC12 VCC5

R638 R639
0_8 *0_8

CN28
C671 2.2u/25V_8
1
2
3 R640 10K_4 VCC3

2ND_FAN_TACH (26)

B B

SATA CD-ROM HOLE EMI CAP PVT


H13 H12 H9 H8 H5 H10 H16 H17 H4

OnBoard Type CN16


X11 X11 X11 X11 X11 X11 X11 X11 X11
VCC3 VCC3 VCC3 VCC3 VCC3 VCC3 VCC3

14
GND14
1 C14 C16 C78 C293 C308 C503 C695

1
C728 0.01u/16V_4 SATA_TX1+_C GND1
(14) SATA_TX1+ 2 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
C726 0.01u/16V_4 SATA_TX1-_C RXP
(14) SATA_TX1- 3
RXN
4
C725 0.01U_4 SATA_RXN1_C GND2
(14) SATA_RX1- 5
C727 0.01U_4 SATA_RXP1_C TXN VCC5 VCC5 VCC5 VCC5 VCC5 VCC5 VCC5
(14) SATA_RX1+ 6
TXP
7
GND3 H28 H24 H27 H31 H34 H37 H20 H29 H30
VCC5 X11 X11 X11 X11 X11 X11 X11 X11 X11
R183 1K_4 8 C481 C404 C301 C214 C42 C4 C1
F3 DP
9 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
5VSATA_ODD +5V
1 2 10
+5V
(30) EJECT#_HW 11
RSVD
12
1

1
3A GND VIN VIN VIN VIN VIN VIN VIN VIN
13
RC1206 GND
15
C498 C502 C512 GND15 C383 C506 C511 C17 C381 C283 C143 C418
C C
0.1U/25V/4 10U/6.3V/6 *100U/6.3V/3528 0.1U/25V 0.1U/25V 0.1U/25V 0.1U/25V 0.1U/25V 0.1U/25V 0.1U/25V 0.1U/25V
VCC5 H19 H18 H7 H6 H1 H14 H21 H22 H2 H23
X11 X11 X11 X11 X11 X11 X11 X11 X11 X11
C507 10U/6.3V_8

120 mils C490 0.1U/10V_4

C495 0.1U/10V_4
1

1
C501 0.1U/10V_4

C496 0.1U/10V_4

H11 H3 H15 H36 H45 H46 H47 H48 H49 H50


X11 X11 X11 X11 X11 X11 X11 X11 X11 X11
1

1
PVT
H39 H40 H41 H42 H43 H44 H51 H52
X11 X11 X11 X11 X11 X11 X11 X11
1

H25 H26 H32 H33 H35


1 9 1 9 1 9 1 9 1 9
D 2 8 2 8 2 8 2 8 2 8 D
3 7 3 7 3 7 3 7 3 7
4
5
6

4
5
6

4
5
6

4
5
6

4
5
6

H38
1 9
2 8
3 7 Quanta Computer Inc.
PROJECT : Shasta_(NZ2)
4
5
6

Size Document Number Rev


DVT
SATA HDD/ODD/FAN/HOLE
Date: Wednesday, September 15, 2010 Sheet 29 of 41
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Wireless + BT
+3.3V: 1000mA
LPC HEADER
30
+3.3Vaux:330mA VCC1.5 VCC3
+1.5V:500mA VCC3

CN10
51 52 C595 C591 C617
Reserved +3.3V
PVT 49
Reserved GND
50
47 48 10U/6.3V_6 *4.7U/10V_6 0.1U/16V_4
Reserved +1.5V VCC3 VCC3
45 46
A Reserved LED_WPAN# A
43 44
R270 0/J_8 Reserved LED_WLAN# R257 *10K/J_4
VCC3 41 42 VCC3
NC LED_WWAN# VCC3
39 40
NC GND
37 38 USBP6+ (13)
Reserved USB_D+ CN4
35 36 USBP6- (13)
GND USB_D-
(12) PCIE_SB_TXP0 33 34 1 2 IRQ_SERIRQ (12,26)
PETp0 GND PDAT_SMB C597 C594 A_LFRAME#_R A_LAD1_R
(12) PCIE_SB_TXN0 31 32 3 4
PETn0 SMB_DATA PCLK_SMB A_LAD3_R
29 30 5 6
GND SMB_CLK 0.1U/16V_4 0.1U/16V_4 A_LAD2_R
27 28 8
GND +1.5V A_LAD0_R LPC_SMI#
(12) PCIE_SB_RXP0 25 26 9 10 LPC_SMI# (13)
PERp0 GND PCIE_RST#_SB PCLK_DEBUG
(12) PCIE_SB_RXN0 23 24 11 12
PERn0 +3.3Vaux PCIE_RST#_SB
21 22 PCIE_RST#_SB (12,26) 13 14
PCLK_DEBUG GND PERST#
(12,16) PCLK_DEBUG 19 20 WL_EN (26)
NC W_DISABLE# VCC1.5 *7P*2/_2.54MM_ST_Omit7
17 18 Wifi ON/OFF control
NC GND R256 *10K/J_4 PROTO
VCC3
15 16 A_LAD0_R R254 *0/short_4
GND NC LPC_LAD0 (12,26)
13 14 A_LAD1_R R253 *0/short_4
(12) CLK_PCIE_WLAN REFCLK+ NC LPC_LAD1 (12,26)
11 12 A_LAD2_R R252 *0/short_4 C596 C592
(12) CLK_PCIE_WLAN# REFCLK- NC LPC_LAD2 (12,26)
9 10 A_LAD3_R R251 *0/short_4
GND NC LPC_LAD3 (12,26)
7 8 A_LFRAME#_R R250 *0/short_4 LPC_LFRAME# (12,26) 0.1U/16V_4 10U/6.3V_6
CLKREQ# NC
5 6
Reserved +1.5V
3 4
Reserved GND
1 2
WAKE# +3.3V
80003-6021

H=8.0

VCC3_TV VCC1.5 VCC3_TV


3.3V 1.5V
TV Peak 2.75A Peak 500mA
VCC3 PBY201209T-300Y-N VCC3_TV

L53
Average: 1.1A Average: 375mA
B B
CN11
51 52 C640 C641
Reserved +3.3V C673 C669 C672
49 50
Reserved GND 10U/6.3V_6 0.1U/16V_4 10U/6.3V_6 0.1U_4 10U/6.3V_6
47 48
Reserved +1.5V
45 46
Reserved LED_WPAN#
43 44
Reserved LED_WLAN#
41 42
NC LED_WWAN#
39 40
NC GND
37 38
Reserved USB_D+
35 36
GND USB_D-
(12) PCIE_SB_TXP1 33 34
PETp0 GND PDAT_SMB
(12) PCIE_SB_TXN1 31 32 PDAT_SMB (13,17,18)
PETn0 SMB_DATA PCLK_SMB
29 30 PCLK_SMB (13,17,18)
B-18 GND SMB_CLK
27 28
GND +1.5V
(12) PCIE_SB_RXP1 25 26
PERp0 GND
(12) PCIE_SB_RXN1 23 24
PERn0 +3.3Vaux PCIE_RST#_SB
21 22
GND PERST#
19 20
NC W_DISABLE#
17 18
NC GND
15 16
GND NC
(12) CLK_PCIE_TV 13 14
REFCLK+ NC
(12) CLK_PCIE_TV# 11 12
REFCLK- NC
9 10
GND NC
7 8
CLKREQ# NC
5 6
Reserved +1.5V
3 4
Reserved GND
1 2
WAKE# +3.3V
80003-6021
H=8.0
USBP10+
USBP10-
Card Reader /HP/MIC/IR C778 C777
Power Button connector
C For REV F *5.6P_4 *5.6P_4 ODD EJECT CONN PVT C

CN26
CN19
(27) MIC1_JD# 5V_S5
(27) MIC1_R2 HPOUT_R (27) (26) EJECT#_SW 1
29 30 C540
(27) MIC1_L2 HPOUT_L (27) 2
27 28
25 26 HPOUT_JD# (27)
ADOGND 23 24 ADOGND
RX1B CIR_RX0 (26) C513 C509 0.1u/10V_4 1 *88511-0841
C508 C504 21 22 *1000P/50V/X7R *1000P/50V/X7R
(14) SATA_ACT# VCC3 (26) PWRLED0# 2
*1000P/50V/X7R 19 20
VCC5 (26) PWRLED1# 3
*1000P/50V/X7R 17 18 5VPCU VCC5 CN27
(26) IR_ACTIVE_LED# (26) PWRBTN# 4 6
15 16
5VPCU 5 7
ADOGND ADOGND 13 14 ADOGND ADOGND
(29) EJECT#_HW 1
11 12 C492 2
9 10 C493
7 8 *0.1U/10V_4
*0.1U/10V_4 CON2
5 6 USBP10+
3 4 USBP10+ (13)
USBP10-
1 2 USBP10- (13)
50238-03071-001

VCC3 VCC5

IR Blaster VCC5 VCC5 VCC5 VCC3 VCC5

IR Blaster CONN
1.8K 1% 1/16W 0402

100K 5% 1/16W 0402

R182
1.8K 1% 1/16W 0402

R189
R179 R196
VCC5 4.7K/J_4 D20
10K 1% 1/16W 0402 1SS355
C491
1
0.1uF 10% 25V X5V 0402 R195 100/F_4 3
(26) CIR_TX1
5

U11 1 U10 R186 R197 1K/F_4 2


(26) CIR_ED1
R185 3 - VCC 5

1
D 1K 1% 1/16W 0402 V+ 4 2 4 CIR_RX1 C514 C515 4 D
CIR_RX1 (26)

*BC00SM24Z00

*BC00SM24Z00
1 + V-
GND Learing Receiver in D22 D21 1000P/50V_6 1000P/50V_6 CN23
R187 IC G1214TAU OP 5P IC NOT GATE NL17SZ14DFT2G
2

12K 1% 1/10W 0603 R184


Normal Open Type

2
18K 1% 1/16W 0402

RX1B R181 100K 5% 1/16W 0402


C494 10nf
Quanta Computer Inc.
3

Q11
2
R188
PROJECT : Shasta_(NZ2)
1

Size Document Number Rev


100 1% 1/16W 0402 DVT
MINI PCIE (WLAN/TV/IR/IO)
TR NPN MMBT3904 40V 0.2A Date: Friday, September 17, 2010 Sheet 30 of 41
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

USB PORT X4
5VSUS
40 mils 2
F5
POLY_SW 6V/1.1A
1 USBVCC0
USBVCC0
C740
31
USBVCC0 CN17 USBVCC0
40 mils 0.1U/25V/4

*AZ2015-01H_ESD
PVT:Delete R406,R407 USBVCC2 CN22

1
USBVCC0 1 4 PVT:Delete R424,R425
USBP0-R V GND USBVCC2
(13) USBP0- 4 3 2 5 1 4
USBP0+R D- GND C730 + C734 D24 USBP3-R V GND
(13) USBP0+ 1 2 3 6 (13) USBP3- 4 3 2 5
D+ GND USBP3+R D- GND
330U/6.3V_R6_17 (13) USBP3+ 1 2 3 6
L61 0.1U/25V/4 D+ GND
90ohm-100mA L65

2
90ohm-100mA
A A
PVT C475 C474
U27
C737 C738
U32
1.5pF/50V_4 1.5pF/50V_4 1 6
Z1 Z4 USBVCC0 *0.1U/10V_4 *0.1U/10V_4
2 5 1 6
VB GND Z1 Z4 USBVCC2
3 4 2 5
Z2 Z3 VB GND
3 4
Z2 Z3
IP4220CZ6
Pin2,Pin5 Swap IP4220CZ6
Pin2,Pin5 Swap

C739

PVT:Delete R413,R410

USBVCC0
0.1U/25V/4 SIDE USB PORT X2 F4
PVT:Delete R422,R423 CN21 CN15 USBVCC4 EXC24CG900U POLY_SW 6V/1.1A
1 2 1 5VSUS
USBVCC0 VBUS USBP4-_C USBP4-
1 4 2 1 2 USBP4- (13)
USBP1-R V GND D- USBP4+_C USBP4+
(13) USBP1- 4 3 2 5 3 4 3 USBP4+ (13)
USBP1+R D- GND D+
(13) USBP1+ 1 2 3 6 4
D+ GND GND L63 EXC24CG900U
5
L64 GND USBP5+_C USBP5+
6 1 2 USBP5+ (13)
90ohm-100mA D+ USBP5-_C USBP5-
7 4 3 USBP5- (13)
D- USBVCC4
8
C735 C736 VBUS L60
U31
Two Side USB PVT:Delete R401,R396
*0.1U/10V_4 *0.1U/10V_4 1 6 C449
Z1 Z4 USBVCC0
2 5
VB GND 0.1U/25V/4
3 4
Z2 Z3
USBP4-_C
IP4220CZ6
Pin2,Pin5 Swap USBP4+_C
U25
1 6
F6 USBVCC2 Z1 Z4 USBVCC4
2 5
POLY_SW 6V/1.1A USBP5+_C VB GND
B
40 mils 2 1 USBVCC2
3
Z2 Z3
4 B
5VSUS U24
USBP5-_C
IP4220CZ6
1 6
Z1 Z4 USBVCC4
PVT:Delete R408,R409 USBVCC2 CN18 USBVCC2
40 mils 2
3
VB GND
5
4
Z2 Z3

*AZ2015-01H_ESD
1
USBVCC2 1 4
USBP2-R V GND IP4220CZ6
(13) USBP2- 4 3 2 5
USBP2+R D- GND C731 + C733 D25
(13) USBP2+ 1 2 3
D+ GND
6 For REV F C780 C779 C782 C781
Pin2,Pin5 Swap
330U/6.3V_R6_17
L62 0.1U/25V/4 *5.6P_4 *5.6P_4 *5.6P_4 *5.6P_4
90ohm-100mA USBVCC4
40 mils

*AZ2015-01H_ESD
1
PVT C723 C724
U28
1.5pF/50V_4 1.5pF/50V_4 1 6 C497 + C732 D18
Z1 Z4 USBVCC2
2 5 330U/6.3V_R6_17
VB GND 0.1U/25V/4
3 4
Z2 Z3

2
IP4220CZ6
Pin2,Pin5 Swap

PVT
LED STATUS FOR DEBUG WEB CAM MODULE VCC5 VCC3
For REV F USB_9_FB
PR:Delete LED2,LED3,LED4,LED5,LED6,LED7,R426,R427,R428,R429,R430,R431,Q14,Q15,Q16,Q17,Q18 C763
BLM15AG121SN1D USB_9_FB#
(27) DMIC_DAT L1
(27) DMIC_CLK L2 PVT:Add C6,C7
C776 C775
C6 BLM15AG121SN1D 5P_4 5P_4
*1000P/50V/4 C7
PVT 33P 33P
VCC5
C FOR EMI CN7
C
L42
(13) USBP9+ 4 3 USB_9_FB 1
CCD_PWR 1 2 USB_9_FB# 2
(13) USBP9-
R200 CCD_PWR 3
MCM2012B900GBE 4
CCD_PWR C5 5 7
*0/short_8 0.1u/10V_4 6 8
Q12
*AO3403 C521 10U/10V/8 PVT

+
C2 1000P/50V/4
1 3
PVT:Delete R202,R203
FOR EMI
2 C3 0.1U/25V/4

CCD_POWER_ON# (26)

5VSUS

UMA CRT FOR DEBUG Discrete CRT for Debug Touch Panel connector
PVT
R201
0_8
VCC5
VCC5 CN8
1
VBUS
7 2 USBP11- (13)
C578 GND D-
C18 6 3
GND D+ USBP11+ (13)
*0.1U/10V_4
*0.1U/10V_4 CN3 4
CN1 GND C9
1
D 1 (20) EXT_CRT_RED 2 5 D
GND 0.1Uu/10V_4
(9) INT_CRT_RED 2 (20) EXT_CRT_GRE 3
(9) INT_CRT_GREEN 3 (20) EXT_CRT_BLU 4
(9) INT_CRT_BLU 4 5 DFWF05MR017
5 (20,21) EXT_CRT_VSYNC 6
(9) INT_CRT_VSYNC 6 (20,21) EXT_CRT_HSYNC 7
(9) INT_CRT_HSYNC 7 (20) EXT_DDCDAT 8
(9) INT_CRT_DDCDAT 8 (20) EXT_DDCCLK 9
(9) INT_CRT_DDCCLK 9 10
10
R231 *2.2K/J_4
VCC5 R219 *4.7K/J_4
VCC5
R228 *2.2K/J_4
87213-1000G Quanta Computer Inc.
*87213-1000G
R224 *4.7K/J_4
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
USB/CCD/TOUCH/CRT
Date: Thursday, October 07, 2010 Sheet 31 of 41
1 2 3 4 5 6 7 8
5 4 3 2 1

NCP5393B AMD AM3 POWER CKT


3VPCU VCC3
32
PR167
PR158
100K_4
10K/F_4

CPU_CORE VCC5 VCC12


PR169

3
3
D D
1K/F_4 PR30

1
2 *2.2R_6
2
PR170 PQ53
PR29
100K_4 MMBT3904 PQ52 3 2 100/F_6

1
2N7002E-T1 1.5VSUS
PC55 PQ19
ME2N7002E

1
2.2U/6.3V_6
(5) CPU_CORE_TYPE
PC51

0.1U/16V_4
PC71

PC69
0.1U/25V/X7R_6

1K/F_4
PU16

PR161

PR163
1K/F_4

1K/F_4
PR165

PR149
0.1U/16V_4 NCP5393B
PR39
*0R_4 QFN 48pin
300R/F_4

22

11
1
PVT:Change PU16 footprint
41 43

VCC

12VMON
VCCB
(5,16,26) CPU_VDDIO_PWRGD PWRGOOD VDD_DRVON VCORE_EN (33)
(5,16,26) PWROK_EC PR166 0R_4 37 48 VCORE_G1 (33)
PWROK VDD_G1
(26) VRON 38 14 CS1N (33)
ENABLE VDD_CS1N
T140 35 13
VID0 VDD_CS1 CS1
(5) CPU_PVEN 36 PR156 PR157 *100K_4 PC62 CS1 (33)
VID1
(5) CPU_SVD 40 1.24K/F_4
SVD/VID2 CS1 *0.1U/16V_4
(5) CPU_SVC 39
SVC/VID3
T133 25 PC202 0.22U/25V_6
VID4
T134 26 47
VID5 VDD_G2
12 16
(5) PSI PSI_L VDD_CS2N
15 CPU_CORE
VDD_CS2
9
PC200 VDD_DIFFOUT
For PSI_PHASE_SEL PR148
PR154 PC199 3
VDD_COMP
*1000P/50V_4 4.7K/F_4 2200P/50V_4
*1K/F_4
CPU_CORE 46
VDD_G3 VCORE_G3 (33)
PC201 22P/50V/4 18 CS3N (33)
PR147 *75R/F_4 VDD_CS3N
C 4 17 C
VDD_FB VDD_CS3 CS3
PR159 PR160 *100K_4 PC66 CS3 (33)
PR134 5 1.24K/F_4
VDD_DROOP CS3 *0.1U/16V_4
100R_4 PR150 1K/F_4 PR155 10K/F_4
PC203 0.22U/25V_6

PR31 0R_4 45
VDD_G4
(5) CPU_VDD_FB 6 20
VDD_VS+ VDD_CS4N
19 CPU_CORE
PC54 VDD_CS4
(5) CPU_VDD_FB# 7
VDD_VS-
*1000P/50V_4

PR135 ONSEMI RECOMMEND 11/20 PC60 PC59


100R_4 *0.1U/16V_4 *0.1U/16V_4
42 VDD_NB_EN ONSEMI RECOMMEND 11/20
NB_DRVON VDD_NB_G
44
NB_G VDDNB_CSN
24
NB_CSN
28 23
NB_DIFFOUT NB_CS
PR175 PC207 PR162 PR164 4.02K/F_6 PC72
34 3.09K/F_4
PC206 NB_COMP VDDNB_CS *0.1U/16V_4
*1000P/50V_4 2K/F_4 2200P/50V_4
PC204 0.22U/25V_6
PR153 *0R_4
PC205 100P/50V_4 8 VCC5
PR174 *75R/F_4 VDD_OFFSET
33
NBCORE NB_FB
PR40 *0R_4
32 29 VCC5
NB_DROOP NB_OFFSET
PR173 1K/F_4 PR168 20K/F_4

PAD_GND
PR136 31
NB_VS+
30 PR152 PR38 PR151
NB_VS-

ROSC
100R_4 10

GND
PC81 VCC5

ILIM
V_FIX
10K/F_4 10K/F_4
PR42 0R_4 *1000P/50V_4 2.2/F_4

(5) CPU_VDDNB_FB_H
21

27

2
49
PR32
B (5) CPU_VDDNB_FB_L B
*0R_4

PR137 PC73 PC74


100R_4 *0.1U/16V_4 *0.1U/16V_4 PR171
22.6K/F_4
ONSEMI RECOMMEND 11/20 PR43 short
Bottom PAD
PR172 Connect to
Fsw= ~212Khz GND
27.4K/F_4
OCP= 93A through 9 VIAs

VCC12 VCC5 VIN_CPU

PD6
5
6
7
8

RB500V
PR118
2

PR125 PC7 PC8


2.2R_6 PC9
4 2200P/50V_4 0.1U/25V_4 4.7U/25V_8
2.2R_6
1

PC180 PQ4
0.22U/25V_6 AO4496
PVT
1

PR123 0R_8
4 8 VDDNB_DH NBCORE
BST

VCC DRVH PL1


PR124
3
2
1

10K_4 1.5UH/MPC-1040-16A
A 7 VDDNB_SW A
SWN
PGND

VDD_NB_G 2
VDD_NB_EN IN
3 5
5
6
7
8

OD DRVL
560U/2.5V_R6_16

0.1U/10V_4
6

PR2

10U/6.3V_8
+

PC178
PC174 PU13 VDDNB_DL 4 2.2R_8 PC177
1U/16V_6 NCP5359A PQ3
PC176

AO4712 PR208 PR98


*0/short_4 *0/short_4
PC5
2200P/50V_6
Quanta Computer Inc.
3
2
1

VDDNB_CS PROJECT : Shasta_(NZ2)


Size Document Number Rev
VDDNB_CSN DVT
AMD AM3 CPUCORE(NCP5293)
Date: Wednesday, September 15, 2010 Sheet 32 of 41
5 4 3 2 1
5 4 3 2 1

33
VIN_CPU VIN_CPU VIN
PL4
D D

FBMJ3216HS480NT_1206
PL5

2200P/50V_4
VCC12 VCC5

0.1U/25V_4

10U/25V_12

10U/25V_12

10U/25V_12

10U/25V_12

330U/25V_R8
1
FBMJ3216HS480NT_1206

PC196

PC10
+

PC195

PC42

PC49

PC233

PC234

0.1U/25V_6
PD8

PC111
PR146

2
CPU_BST1 CPU_DH1 4 PQ13 4 PQ15
2.2R_6 FDMS7692 FDMS7692

1
2
3

1
2
3
PR142 RB500V
PC192
2.2R_6
0.1U/25V_6
PVT

1
PR144 0R_8 RJK03D9DP
4 8

BST
VCC DRVH PL3
PR145 10K_4 0.45UH/MPC-1040-26A
7 CPU_SW1
SWN

PGND
(32) VCORE_G1 2
IN
(32) VCORE_EN 3 5
OD DRVL
PR143
PC188

6
2.2R_6 PU15 PR8
1U/16V_6 2.2R_8
NCP5359A

5
CPU_DL1
CPU_DL1 4 4
C C
PC15

1
2
3

1
2
3
PQ11 2200P/50V_6
PQ12
FDMS0310S FDMS0310S PR210 PR209
CPU_CORE
*0/short_4 *0/short_4
RJK03D0DPA
OS-CON

560U/2.5V_R6_14

560U/2.5V_R6_14
560U/2.5V_R6_14

0.1U/10V_4
+ + +

PC197

PC189

PC184

PC70
(32) CS1

(32) CS1N

For 2-Phase mode VIN_CPU

560U/2.5V_R6_14

560U/2.5V_R6_14
560U/2.5V_R6_14
2200P/50V_4

10U/25V_12

10U/25V_12

10U/25V_12

10U/25V_12
0.1U/25V_4
VCC12 VCC5

0.1U/10V_4
+ + +

PC186

PC187

PC12

PC13

PC235

PC236

PC193

PC185

PC198
5

5
B B

PC182
PD7
PR140
CPU_BST3 CPU_DH3 4 PQ7 4 PQ8
2.2R_6 FDMS7692 FDMS7692
RB500V

1
2
3

1
2
3
PR133 PC183
RJK03D9DP
0.1U/25V_6
2.2R_6
PVT
1

PR139 0R_8
4 8 JOE 11/30
BST

VCC DRVH PL2


PR141 10K_4 0.45UH/MPC-1040-26A
7 CPU_SW3
SWN
PGND

(32) VCORE_G3 2 IN
3 5
OD DRVL RJK03D0DPA
PR138
6

PC181
5

5
2.2R_6 PR3
PU14
1U/16V_6 2.2R_8
NCP5359A
CPU_DL3 4 4

PQ6 PC11
1
2
3

1
2
3
PQ5
2200P/50V_6
FDMS0310S FDMS0310S
PR211 PR212
*0/short_4 *0/short_4
A A

(32) CS3
Quanta Computer Inc.
(32) CS3N
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
CPU DRIVER
Date: Wednesday, September 15, 2010 Sheet 33 of 41
5 4 3 2 1
1 2 3 4 5

NB_CORE, VCC1.1, 1.1V_S5 VIN


34

2200P/50V_4

0.1U/25V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8
PC172

PC2
PC171

PC3

PC4
5VSUS PVT
PR103

A
10R_6
PC164
VCC_NB Volt +/- 5% A

1U/6.3V_4 f= 333KHz Peak current: 10A

5
PC158
D OCP: 15A

RT_VDD
1U/6.3V_4
PR104 G
RT_BST 4
PVT S
2R_6

1
2
3
PC165 PQ2 VCC_NB

13
2

9
PU11 0.22U/25V_4 PVT
RJK03B9DPA
12 RT_DH

BST
VDDP
VDD
PR106 DH
RT_ILIM 10 PVT:Delete PR1
8.66K/F_4 CS
PR94
(26) HWPG_1.1V RT_PG 4 11 RT_LX PL15
PGOOD PHASE 1UH/PCMB-1040-20A
0R_4 PR107
5 RT8209A 16 RT_TON
NC TON
PR97
RT_EN 15 8 RT_DL
232K/F_4 RJK03D3DPA Rdson=4.7mOhm
(26,38) VRON_DELAY EN/DEM DL

2
PGND

VOUT
VCC_NB OCP:15A 333K

GND
4.7K_4

5
NC
17 3

560U/2.5V_R6_16

560U/2.5V_R6_16
PC237 PAD FB PR105

0.1U/10V_4
D

10U/6.3V_8
RT_FB
0.1U/10V_4 G 2.2R_8 + + L(ripple current)

14

PC163

PC1
4

1
S =(19-1.1)*1.1 /(1*333k*19) ~= 3.11A

PC160

PC162
Iocp = 15-(3.11/2) ~= 13.445A

1
2
3
PC161
PR93 PR92 PQ1
1500P/50V_4 Vcs = 13.445A * 4.7mOhm = 63.19mV
4.7K/F_4 10K/F_4
RJK03D3DPA R(Ilim) = 63.19mV/10uA = 6.32K
PC154

*100P/50V_4
B B

Vo=0.75(R1+R2)/R2

5VSUS 5VSUS 3VPCU 1.1V_S5 +/- 5%


PC105 VCC1.1(1.12V) +/- 5% Countinue current:0.2A
1U/6.3V_4 Countinue current:2.8A PU4 Peak current:0.5A
PR50 RT9025
1 2 Peak current:4.6A

10U/6.3V_8

0.1U/10V_4
100K/F_4
1.5VSUS 3 5

PC65

PC61
VIN NC
PU5 VCC1.1
1.1V_S5
APL5930
6

PVT
PVT 5 7 3A 6
VPP

PR47 VIN POK VOUT


PR37 10K_4

10U/6.3V_8

10U/6.3V_8
8 4 2

0.1U/10V_4
(26,38) VRON_DELAY EN VO (26,38,40) S5_PWR_ON EN
3
VO

PC53

PC56

PC67
1K/F_4 4 8
PR41 5VPCU VDD GND
GND

ADJ
1U/6.3V_4
9 2 8.06KK/F_4 PC82 1 9
T-PAD FB PGOOD GND1

1
PC68

PC58
*330U/6.3V_R6_17
*1U/6.3V_4 0.1U/10V_4
*330U/6.3V_R6_17

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8
1

7
0.8V +
10U/6.3V_8

2
R1
PC78

PC79

PC77
PC91 + PC93
PC90

C PR35 C

PC242
*0.1U/10V_4 0.1U/10V_4 1.1VADJ
PC241

PR44 38.3K/F_4

2
20K/F_4
R2
PR36
100K/F_4
VO=(0.8(R1+R2)/R2)

1
R2<120Kohm
Vout =0.8(1+R1/R2) =1.1V PVT

5VSUS 5VSUS PVT

PC243 VCC1.1(1.12V) +/- 5%


1U/6.3V_4 Countinue current:1.2A VCC1.1
PR85 VCC1.1_SB
1 2
100K/F_4
Peak current:4.6A
1.5VSUS
PU19
VCC1.1_SB
APL5930 R243
6

*RES 0.01R 2W +-2%/7520


5 7 3A 2 1
Quanta Computer Inc.
VPP

PR73 VIN POK

(26,38) VRON_DELAY 8 EN VO 4 2P 1P

1K/F_4 VO
3 PROJECT : Shasta_(NZ2)
PR45 Size Document Number Rev
GND

9 2 PC245 DVT
T-PAD FB 8.06KK/F_4 NBCORE_+1.1V/+1.1VS5
D D
*1U/6.3V_4 Date: Wednesday, September 15, 2010 Sheet 34 of 41
10U/6.3V_8

10U/6.3V_8

10U/6.3V_8
1

0.8V
10U/6.3V_8

PC244

PC246

PC248

PC247 PC250
PC249

*0.1U/10V_4 0.1U/10V_4
PR214

20K/F_4

Vout =0.8(1+R1/R2) =1.1V

1 2 3 4 5
5 4 3 2 1

35
DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW
D D

VIN Place these CAPs Place these CAPs


PL9 close to FETs close to FETs

FBMJ3216HS480NT_1206 PD3
PVT PR68 PR67
1 2

2200P/50V_4
4.7U/25V_8

4.7U/25V_8
0.1U/25V_4

0.1U/25V_4

2200P/50V_4
0.1U/25V_4

4.7U/25V_8

4.7U/25V_8
10U/25V_12
1K/F_4 150K/F_4

2
PC100
PC103

PC98

PC87
PC86
PC83

PC99
PC84
UDZ5V6B-7-F

PC97

8206ON_LDO
5V_VCC1 5VALW

PC85
1

1
PR66
1 2

0.1U/25V_4
*0R_4

PC118

5
6
7
8
PC116

1
1U/6.3V_4

*0.1U/10V_4
5VPCU +/- 5%

2
5VALW 4 PQ25

PC117
Peak current:7A PC115 AO4496
3VPCU +/- 5%

1
OCP minimum:10A
5V_VCC1 Peak current:6A

8
7
6
5
0.1U/10V_4

2
PC114 3VPCU
OCP minimum:9A

3
2
1
4.7U/6.3V_6 PVT

1
4
C C
PR64

8
7
6
5
4
3
2
1
5VPCU 0R_4 PVT:Delete PR45
PQ23 PL7

LDO

ONLDO

REF
LDOREFIN

IN
N.C

VCC
TON
PVT 3.8UH/MSCDRI-1040-6A

2
AO4496
PVT:Delete PR34 PR62

1
2
3

2
9 BYP REFIN2 32 294K/F_4

2
PL8 10 31 1 2
OUT1 ILIM2 PR55

5
6
7
8
3.8UH/MSCDRI-1040-6A PR54 5V_FB1 11 30 3V_FB2
5VPCU FB1 PU7 OUT2 PR46 0R_4
1 2 12 29
ILIM1 SKIP

330U/6.3V_R6_17
PGOOD1 13 RT8206B 28 PGOOD2 2.2R_8
316K/F_4

1
PGOOD1 PGOOD2
14 27 4

0.1U/10V_4

10U/6.3V_8
1
ON1 ON2 PQ22
2

8
7
6
5
5V_DH 15 26 3V_DH +
DH1 DH2

PC76

PC75
PR60 5V_LX 16 25 3V_LX AO4712
330U/6.3V_R6_17

PR33 LX1 LX2


37

PC63
PC95
10U/6.3V_8

+ *0R_4 2.2R_8 PAD


4 36
0.1U/10V_4

PAD

AGND
PGND
1500P/50V_4
PC94

BST1

BST2
39

VDD
PAD
PAD
PAD
PAD

PAD
PAD
1

PAD

2
DL1

DL2
N.C
40
PC102

PQ21
PC208

0.1U/25V_4

3
2
1
PAD PR59
AO4712
2

2
PC106
PC107 *0R_4

38
35
34
33
17
18
19
20
21
22
23
24

42
41
PC64
PR56 0.1U/25V_4
1500P/50V_4
1
2
3

1
0R_4
PR52 PR53 Rds(on) 18m ohm
1

1 2 5V_BST1 3V_BST2 1 2
2R_6 2R_6
5V_DL 3V_DL
Rds(on) 18m ohm 5VALW

B AO4712 Rdson=18mOhm B
PR51
1 2 3VPCU OCP:9A 500K
*0R_4

1
PC104 L(ripple current)
1U/6.3V_4 =(19-3.3)*3.3 /(3.8u*500k*19) ~= 1.44A
AO4712 Rdson=18mOhm

2
Iocp = 9-(1.44/2) ~= 8.28A
5VPCU OCP:10A 400K PD2 Vth = 8.28A * 18mOhm = 149.04mV
1SS355
R(Ilim) = (149.04mV*10)/5uA = 298K
L(ripple current) 1 2
=(19-5)*5 /(3.8u*400k*19) ~= 2.4A
Iocp = 10-(2.4/2) ~= 8.8A
PR65
Vth = 8.8A * 18mOhm = 158.4mV
5VALW
R(Ilim) = (158.4mV*10)/5uA = 316.8K 10K_4
1

PC110
2.2U/6.3V_6
2

PR61
PGOOD2 2 1
0R_4

PR58
PGOOD1 2 1
(5) SYS_SHDN# HWPG_3/5V (26)
0R_4

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
+5V/+3V (RT8206B)
Date: Wednesday, September 15, 2010 Sheet 35 of 41
5 4 3 2 1
5 4 3 2 1

DDRIII--1.5VSUS
VIN_51116 VIN
36
PL10

FBMJ3216HS480NT_1206

D D

2200P/50V_4

4.7U/25V_8

4.7U/25V_8

4.7U/25V_8
0.1U/25V_4
PC121

PC128

PC126

PC122
PC119

PC120
PC131 10U/6.3V_6
1.5VSUS 0.1U/25V_6

5
PR74 0R/F_6 PC132 0.1U/25V_6
SMDDR_VTERM 51116_BST

51116_DH 4
PC123 PC127 1.5VSUS(1.518V) +/- 5%
51116_LX
Peak current:17A

1
2
3
10U/6.3V_6
PQ27
10U/6.3V_6
51116_DL RJK03B9DPA-00#J53 OCP minimum:25A
PL12 1.5VSUS
PVT

25

24

23

22

21

20

19
1UH/PCMB-1040-20A
1.5VSUS

LL

DRVL
VTT

VBST
GND

VLDOIN

DRVH
PVT:Delete PR73

1 18
VTTGND PGND

*560U/2.5V_R6_16
PR75

560U/2.5V_R6_16
5

5
2 17 5VPCU

0.1U/10V_4
10U/6.3V_8
VTTSNS CS_GND 2.2R_6 + +
PR195

PC133
PC135
3 16
GND CS
4 4

PC134
PC136
C DIS_MODE 4.99K/F_4 C
TP1 4 MODE V5IN 15
0R/F_6 PR196 5.1R/F_6

1
2
3

1
2
3
SMDDR_VREF PR181 51116_VTREF 51116_V5FILT PQ28 PQ29 PC137
1 5 14
VTTREF V5FILT
51116_V5FILT RJK03D3DPA RJK03D3DPA 2200P/50V_4
6 COMP PGOOD 13

1
VDDQSNS PC217 PC216
VDDQSET 1U/6.3V_4 1U/6.3V_4
PC213

2
AOL1718 Rdson<4.3mOhms
NC

NC
0.033U/50V_6 S3

S5 1.5VSUS OCP:25A 400K


PR194
7

10

11

PU17 12 1 2 5VSUS
100K/F_4 Delta I (ripple current)
UP6163AQAG HWPG_1.5V (26) = (19-1.5)*1.5/(1u*400k*19)
PR193 *620K/F_4 = 3.45A
VIN_51116
For RT8207AGQW Iocp = 25-(3.45/2)=28.275A
Vtrip = 28.28A*2.15mOhm=60.8mV
PR185 *0R_4 PR192 0R_4
1.5VSUS Rtrip = 60.8mV/10uA=6.08K
(5) CPU_VDDIO_FB_H SUSON (26,40)
PQ55
1.5VSUS

1
PC215 VCC1.5
AO4496
PR191
*1U/6.3V_4 8 1
PC214 PR187 0R_4 2 7 2
6 3
*100P/50V_6 76.8K/F_4 PR190 *0R_4 5
S3_1.5V
MAINON_2 (26,37,38,40) PC210

4
B B
0.1U/10V_4
PR189 *0R_4 PR178
VDDQSET 5VSUS
0R_4

*2200P/50V_4
1

PC211
PR188

MAIND_2
PR186 *0R_4 75K/F_4

2
MAIND_2 (40)
(5) CPU_VDDIO_FB_L
PVT

PQ54 VCC1.5_VGA
PR184 *0R_4 AON6426L
DIS_MODE

S
5 2
PR179 0R_4 1
1.5VSUS

G
4
PR176
MAIND_2

*2200P/50V_4
PR76 short
0R_4

PC209
2
A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
NB3_POWER-DDR-01 +1.5VSUS/ +1.5V/ +1.5V_VGA
Date: Wednesday, September 15, 2010 Sheet 36 of 41
5 4 3 2 1
5 4 3 2 1

37
VGA Core
5VSUS
PD1
RB501V
VIN
PR18
2 1 8208RTBST1 VGA_CORE +/- 5%
D D
10R_6 Peak current: 12A

8208RTVDD1
PC25 PC28

2200P/50V_4
OCP: 18A

4.7U/25V_8
1U/6.3V_4

0.1U/25V_4

4.7U/25V_8
1U/6.3V_4
PC19

PC47
VCC3

PC48

PC46

PC45
PR10 0.1U/25V_4
8208BST1_1 1 2

5
0R_6
PR4

13
2

9
10K/F_4 PQ18 VGA_CORE
PR13
8208CS1 10 12 8208RTDH1 4

VDD

BST
VDDP
CS DH AON7410
23.2K/F_4 PVT
PVT:Delete PR23
PR7 0R_4 8208RTPG1 8208RTLX2 PL6
(26) dGPU_PWROK 4 11

3
2
1
PGOOD PHASE 1UH/PCMB-063T-11A
PR9 0R_4 PR11
(26,36,38,40) MAINON_2 8208RTEN1 15 16 8208TON1
EN/DEM TON
232K/F_4

2
17 8 8208RTDL1
PAD DL

VOUT
PR27

560U/2.5V_R6_16

560U/2.5V_R6_16
PC17 8208RTD11

G0
14 5

FB

D0

*10U/6.3V_8
G1 D1 2.2R_8

10U/6.3V_8

0.1U/10V_4
*10U/6.3V_8
*0.22U/10V_4 PQ16 + +

PC18

PC20
PC191

PC190
4

1
PR19 AON7702
PU1

PC41

PC27
30K/F_4
PR20 PC44

3
2
1
RT8208A 8208RTD10
30K/F_4 1500P/50V_4
PR5 8208RTFB1
3V_S5
10K/F_4 3V_S5 PR14
PR12 2K/F_4 RDSon=14m ohm AON7702 Rdson=14mOhm
10K/F_4

3
PVT PC22 *100P/50V_4 VGA_CORE OCP:18A 333K
PR6
10K/F_4
C
(20) GFX_CORE_CNTRL0 2 L(ripple current) C

PQ9 =(19-1)*1 /(1*333k*19) ~= 2.84A


*DMN601K-7 Vo=0.75(R1+R2)/R2 Iocp = 18-(2.84/2) ~= 16.58A

1
Vcs = 16.58A * 14mOhm = 232.12mV

3
PVT R(Ilim) = 232.12mV/10uA = 23.2K
PWRCNTL1 PWRCNTL0 V-CORE
2 PQ10 H 1V
(20) GFX_CORE_CNTRL1 0 0
*DMN601K-7
M 0 1 0.95V

1
TBD 1 0 0.95V
L 1 1 0.9V

5VSUS 5VSUS

PC35
1.5VSUS 1U/6.3V_4
PU3
1 2 PR21
RT9025 VCC1.0_VGA
VCC3 100K/F_4 VCC1.8_VGA
PU2
0.1U/10V_4
10U/6.3V_8

3
VIN NC
5 PVT
PVT:Delete PR17
PC36

PC31

APL5930

6
5 7

VPP
B VIN POK B

6 (26,36,38,40) MAINON_2 8 4
VOUT EN VO
PR25 3
PR15 10K/F_4 VO
(26,36,38,40) MAINON_2 2
EN PC34

GND
PR22
10K/F_4 5VPCU 4 8 9 2
0.1U/10V_4

VDD GND T-PAD FB


10U/6.3V_8

127K/F_4 *1U/6.3V_4
10U/6.3V_8
ADJ

PC26

PC29

PC23

1 9

1
1

PGOOD GND1

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8
1U/6.3V_4

PC40
0.8V
PC30

0.1U/10V_4

10U/6.3V_8

PC32

PC33
PC194
PC43

PC24
0.1U/10V_4
7

PC39
R1
2

2
0.1U/10V_4
+1.0V_VGAADJ PR24 PR16
25.5K/F_4 100K/F_4
PR28
(26) VCC1.1_1.0_VGA_PWRGD VCC1.0_VGA +/- 5%

1
2

0R_4 R2
PR26 Peak current:2.45A
100K/F_4
Countinue current:2A VCC1.8_VGA +/- 5%
1

Vout =0.8(1+R1/R2) =1.8V Peak current:1.3A


Countinue current:1A
VO=(0.8(R1+R2)/R2)
R2<120Kohm

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
VGACORE (RT8208/1.8V)
Date: Wednesday, September 15, 2010 Sheet 37 of 41
5 4 3 2 1
5 4 3 2 1

VCC1.8, VCC1.2, VDDNA (2.5V)


38
VCC1.8 3V_S5

D PU10 VCC1.8 +/- 5% D

RT9025 Countinue current:0.7A

0.1U/10V_4
10U/6.3V_8
3 5 Peak current:1A

PC150

PC151
VIN NC VCC1.8

PVT
6
PR91 VOUT

(26,39,40) MAINON_1 2

0.1U/10V_4
EN

10U/6.3V_8

10U/6.3V_8
18K/F_4

PC157

PC156

PC155
5VSUS 4 8
VDD GND

ADJ
1 9

0.1U/10V_4

1
PGOOD GND1

1U/6.3V_4
PC152

PC153

7
R1

2
PR95
1.8VADJ

127K/F_4

2
R2 PR96
VO=(0.8*(R1+R2)/R2)
100K/F_4
R2<120Kohm

1
5VSUS 5VSUS
VCC1.2 +/- 5%
PC112

C
1U/6.3V_4 Countinue current:2A C
PR63
VCC1.2 1 2
100K/F_4
Peak current:3A
1.5VSUS
PU6
VCC1.2
APL5930

6
5 7 3A

VPP
VIN POK
8 4
(26,34) VRON_DELAY EN VO
3
PR57 1K/F_4 VO
PR49

GND
9 2 10K/F_4 PC96
T-PAD FB
*1U/6.3V_4

10U/6.3V_8

10U/6.3V_8

10U/6.3V_8
0.8V

10U/6.3V_8

PC92

PC89

PC101
PC108 PC109

PC113
*0.1U/10V_4 0.1U/10V_4
PR48
20K/F_4

Vout =0.8(1+R1/R2) =1.2V

VCC2.5 +/- 5%
B B
Peak current: 600mA
VCC2.5 PU12
Countinue current: 200mA
VCC2.5
RT9043GB
PR109
(26,36,37,40) MAINON_2 3 5
EN VOUT
0R_4
1

*100P/50V_4
3V_S5 VIN

1U/6.3V_4
R1

PC168
PR108

PC166
+ PC240 +

*0.1U/10V_4

1
PC170

1U/6.3V_4
2 4 110K/F_4

PC167
GND FB
*100U/6.3V

2
+2.5VSET

PR110
R2 100K/F_4 Vout=1.2*(1+R1/R2)
3VPCU 1.17V +/- 5%
PU18
1.2V_S5_USB Peak current: 600mA
RT9025
Countinue current: 200mA
0.1U/10V_4
10U/6.3V_8

3 5
PC230

PC229
VIN NC 1.2V_S5_USB

6
PR202 VOUT
A
(26,34,40) S5_PWR_ON 2 A

0.1U/10V_4
EN

10U/6.3V_8

10U/6.3V_8
10K/F_4

PC227

PC226

PC228
5VPCU 4 8
VDD ADJ GND
1 9
0.1U/10V_4

PGOOD GND1
1

1U/6.3V_4
PC231

PC232

R1
2

PR205
1.2VADJ

46.4K/F_4 Quanta Computer Inc.


2

R2 PR204 PROJECT : Shasta_(NZ2)


100K/F_4
VO=(0.8*(R1+R2)/R2) Size Document Number Rev
R2<120Kohm DVT
LDO/VDDA/+1.8V/+0.9V
1

Date: Wednesday, September 15, 2010 Sheet 38 of 41


5 4 3 2 1
5 4 3 2 1

DC IN JACK 39
PL13
FBMJ3216HS480NT_1206
dcjk-2dc1003-000313-6p-v PVT PQ26 VIN
FDD6685_NL
POWER_JACK PL11
D FBMJ3216HS480NT_1206 D
VIN
5 VA1 3 4
4
3

2
6

C761 *22uF

C762 *22uF

0.1U/50V_6
PR69

0.1U/50V_6

0.1U/50V_6
PR71 PC125

1
PC130

1
PC140

PC139

PC212
PR177 PC124
PJ1 0.1U/25V_6 200K/F_4 *0.1U/25V_6 200K/F_6

1
2
10K/F_6 PD4 0.1U/25V_6 + PC251

1
*P4SMAJ20A
*47U/25V_R6_25

2
15VALW

2
PR70 PR72 PC129
DC-IN JACK 3VPCU 200K/F_4 820K/F_6 0.1U/25V_6

1
PD9
*RB500V-40/UMD2
PR197
ADP-ID (26)
10K/F_6
PR198 PR199 PC218
13K/F_6 *13K/F_6
*0.1U/25V/X7R_6

C C

VIN

PL14

HDD_+12V VCC3 5VSUS


FBMJ3216HS480NT_1206

PD5

1
2

2
PC221 PC222 PC148 + PC219 PC149
RB500V
2200P/50V_4 0.1U/25V_4 10U/25V_1206 *100U/25V_R6 0.1U/25V_4

1
5
6
7
8
PC141 PC147

2
5VPCU
PR89
1U/16V_6 0.22U/25V_6
PR90
*10K_4 4
1R_6
PQ33

1
AO4496 MAX:2A

6
VCC12
PR86
10 1 OCP: 3A PVT

VCC

3
2
1
PG BST
10K_4
PVT:Delete PR85
7 3 PL16
COMP/EN UG
1000P/50V_4

PR81 0R_8 10UH/MSCDRI-1040-4.4A


3.3K/F_4

8
PC143

PR80 FB
PR78

2 VCC12
10K_4 LX
PDGND
PDGND
PDGND
PDGND
PDGND
PDGND

B B
GND
VOS

4
0.22U/10V_4

LG
PR77

5
6
7
8
PC142

PU9
11
12
13
14
15
16
5
9

2.2R_8
NCP1589MNTZG

2
PVT:Change PU9 footprint 4 PQ30 PC220 + PC146 + PC145
3
3

0.1U/25V_4 100U/16V_R6_25 100U/16V_R6_25

1
AO4712
(26,38,40) MAINON_1 2 1 PC138
2

PR88 PR79
PC144 PR84 2200P/50V_6

3
2
1
PR83 PR82 0.022U/50V_4 332R/F_4 10K_4
1

PQ32 PQ31 4.75K/F_4


2

PVT DDTC144EU ME2N7002E 332R/F_4 4.75K/F_4


1

PR87
VIN
51.1R/F_4
*49.9K/F_4
PR182
8

PR183 *10K/F_4 3 +
1
2 -
PU8A
4

*LM358A

A A
PVT

PR180
PR213
*300/F_6
VIN
2

LED1 4.7k/F_6 A single green-colored (565 +/-5 nm) LED should be provided
as part of the internal power supply. It illuminates when the
Quanta Computer Inc.
power supply has AC power available and output power is good
(even when system is off). PROJECT : Shasta_(NZ2)
Size Document Number Rev
1

DVT
ACIN/+12V(NCP1589A)
Date: Wednesday, September 15, 2010 Sheet 39 of 41
5 4 3 2 1
5 4 3 2 1

40
Discharge, Mosfet SW

VIN VCC5 VCC3 VCC12 15VALW 5VPCU VIN 5VSUS 15VALW 5VPCU

D D

0.1U/10V_4

0.1U/10V_4
PC57
PC50
PR101

5
6
7
8

5
6
7
8
PR116 PR113 PR114 PR111 PR102 PR100
1M_4 22R_8 22R_8 1M_4 1M_4 22R_8 1M_4
R237
22R/J/2512 MAIND_1A 4 SUSD 4

PQ37 PQ35 PQ36


PQ39 PQ40

3
DMN601K-7 DMN601K-7 DMN601K-7
DMN601K-7 DMN601K-7 PQ17 PQ20

2200P/50V_4
VCC5

1
PQ61 AO4496 5VSUS

2200P/50V_4
AO4496

1
PC169

PC159
2 2 2 2 2 2

3
2
1

3
2
1
4A

2
AO3404 5A

2
3

3
PC38 PC52

1
PR99
2 PR112 0.1U/10V_4 2 1M_4 0.1U/10V_4
(26,38,39) MAINON_1 (26,36) SUSON
1M_4
15VALW 3VPCU
PQ38 PQ34
1

1
DTC144EUA PVT DTC144EUA SUSON_G
MAINON_1G

5
6
7
8
PR117

0.1U/10V_4
VCC1.8
1M_4

PC21
R241 MAIND_1B 4
5V_S5 22R_8
PQ62 PQ42

3
MAIND_2
DMN601K-7 VCC3 MAIND_2 (36)
DMN601K-7 PQ14

2200P/50V_4
PR206

1
AO4496

3
2
1
PC173
22R_8 2 2
5.65A

2
PQ60
3

C C
DMN601K-7 PC37
VIN VCC2.5 VCC1.8_VGA VCC1.5_VGA VCC1.0_VGA 15VALW
1

1
2 0.1U/10V_4
1

PR132 PR127 PR128 PR129 PR130 PR131


1M_4 22R_8 22R_8 22R_8 22R_8 1M_4
VIN 3V_S5 15VALW 3VPCU 5VPCU

PQ51

3
PQ47 PQ48 PQ49 PQ50
DMN601K-7
PVT
DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7

2200P/50V_4
1
PR121 PR120 PR122

PC179
2 2 2 2 2
1M_4 22R_8 1M_4 VCC1.5
0.1U/10V_4

0.1U/10V_4

2
1
2
5
6

1
PQ59
PC80

PC238
DMN601K-7

3
RVCCD 3
2

1
2
3

PQ44 PQ45 PR126


(26,36,37,38) MAINON_2 2
DMN601K-7 DMN601K-7 PQ24 1M_4 PR115
4
2200P/50V_4

ME3424D 22R_8
1

2 2 PQ46
PC175

1
5V_S5 DTC144EUA
3V_S5 MAINON_2G
2

0.5A PQ41
3

3
1

DMN601K-7
1

2 PR119 PC239
1

(26,34,38) S5_PWR_ON 1M_4 PC88 2


RVCC_G 0.1U/10V_4
2

PQ43 0.1U/10V_4
1

DTC144EUA

1
B B

VIN 3V_LAN 15VALW

3VPCU

PR207 PR200 PR201

1M/J_4 22R/J_6 1M/J_4

5
6
7
8

0.1U/10V_4
PC225
WOL_ON_G WOL_ON_D 4
3

PQ58 3V_LAN 3V_S5


3

AO4496

3
2
1
PQ63 PR203 PQ57 PQ56 R208 *0_8
LAN_WOL_EN_EC 2 2 2 PC223 5.65A
(26) LAN_WOL_EN_EC 1M/J_4
DTC144EUEUA-7-F 2N7002E-T1-E3 2N7002E-T1-E3 0.01U/50V/X7R/0603 PC224
1

0.1U/10V_4
1

A A

Quanta Computer Inc.


PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
DISCHARGE
Date: Wednesday, September 15, 2010 Sheet 40 of 41
5 4 3 2 1
A B C D E

41
1.Add R208(RC0603).
2.Mount PR197,PR198( ADP-ID circuit).
3.PR205 Change to 46.4K(USB PHY 1.17V).
4.Change footprint R250,R251,R252,R253,R254,R200,R76,R89,R62,R213,R98,R65,AR19,AR25,R202,R203.
5.Delete R255,R412,U7,R237,R241,R243,G2 PAD,L4.
6.AddCN27 ( ODD_Eject for HW).
7.Add CN16 Pin11 net for Eject#_HW behavior.
8.Change AR30,AR31 Power to VCC3.
9.Add Clear_CMOS to JP2 pin 7.
1 10.Reserve PC240. 1

11.Change PL6 P/N a DC-10B0M007.


12.Change PC145, PC146 P/N a CC71003MZ11.
13.Change PR195 a4.99K/1%_0402 aCS24992FB26.
14.Mount PC20.
15.Change PR175 a 2K/1%_0405 a CS22002FB19.
16.Change PL16, PL7, PL8 footprint a choke-etqp4lr36wfc-smt.
17.Add PU18 RT9025 for 1.2V_S5_USB.
18.Change PC10, PC16 a 100uF/25 (CC71004MZ04) to PC10 a 330uF/25V (CC73304MZ29).
19.Remove PC6, PC14, and change PC42, PC49, PC12, PC13 a 4.7uF/25V (CH5474MEA07) to 10uF/25V (CH61004M291).
20.Mount AC14.
21.Del AQ4, AQ5, AR33, AR34, AR4, AR14.
22.Add VCC12 Discharge circuit PQ61, R237.
23.change PC240 a 100uF/6.3V a CH71001M687.
24.U24,U25,U27,U28,U31,U32 USB ESD IC Pin2,Pin5 swap.
25.Move S5_PWR_ON net form EC 90 pin to 112pin.
26.PQ1,PQ2 footprint change.
27.PR187 change to 76.8K CS37682FB00.
28.PR41 change to 8.06K CS28062FB21.
29.R100 footprint modify.
2 30.CON4,CN23 footprint modify 2

31.Connect R389 to VCC3


32.Add CN28,C671,R640,R638,R639
33.Change PWRLED0#,PWRLED1# to EC pin108,109 from pin48,120
34.Reserve R63,mount R71
PVT:
35.Change PL1,PL2,PL3 footprint,Add PR98,PR208,PR209,PR210,PR211,PR212
36.Add Buzzer BZ1,R435,Q19,C543,R436,R433,R412
37.Delete AR30,AR31,AQ1,AQ2,AQ3,AddD702,D703,AC41,AU2,AR35
38.Change PQ1,PQ2 to RJK03D3DPA & RJK03B9DPA
39.Delete AL7,AL8
40.Delete PR1,PR34,PR45,PR73,PR23,PR17,PR85
41.VCC1.5 Discharge connect to MAINON_2
42.Delete R406,R407,R422,R423,R408,R409,R424,R425,R410,R413,R401,R396,R202,R203
43.Change PU16 footprint
44.Change PR106 to 8.66k
45. Add R396,D17
46.2nd Fan R638 connect to VCC12 from VCC3
47.Reserve C745,C748,C757,C758,C756,C716 for EMI request
48.Add C14,C16,C78,C293,C308,C503,C695,C481,C404,C301,C214,C42,C4,C1,C383,C506,C511,C17,C381,C283,C143,C418 for EMI request
3 49.Add C5,C6,C7,L42 3

50.R201 change to bead


51.Add C759,C760 for EMI request
52.Reserve for C761,C762,C763 for EMI request
53.Reserve R387,R422,Add Q49
54.Add PC241,PC242
55.Add C8,C11,C12
56.Add and Reserve R401,Reserve PQ9,PQ10
57.Delete R10
58.Add C764,C765,C766,C767
59.Mount R270
60.PC85 change to 10uF
61.Change PU9,PU16 footprint
62.Add R241,PQ62
63.Add C769,C771,C772,C773,C770,C768 for EMI
64.Add D704,AC42,AU3
65.Add C774
66. Add PR213,Reserve PU8,PR182,PR183,PR180
67.Add PU19,PC243,PR85,PR73,PC247,PC249,PC250,PR45,PR214,PC245,PC244,PC246,PC248
68. Reserve R243
4
69. Add AR30,D705 4

70.Mount C474,C475,C723,C724
71. Reserve CN5,CON3
72. Reserve CN26
73. Delete LED2,LED3,LED4,LED5,LED6,LED7,R426,R427,R428,R429,R430,R431,Q14,Q15,Q16,Q17,Q18
74. Add C780,C779,C782,C781,C776,C775,C778,C777 for USB D+/D-
Quanta Computer Inc.
PROJECT : Shasta_(NZ2)
Size Document Number Rev
DVT
CHANGE LIST
Date: Friday, September 17, 2010 Sheet 41 of 41
A B C D E

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