D
Intel SKYLAKE ULT Platform Block Diagram LAYER 1 : TOP
LAYER 2 : SGND
D
LAYER 3 : IN1(High)
LAYER 4 : IN2(Low)
LAYER 5 : SVCC
VRAM DDR3L x 4 (900 MHz) LAYER 6 : BOT
AMD MESO XT
DDR3L SODIMM1 256 x 16 x 4, 64 bit
Maxima 8GBs
DDR3L SKYLAKE U PCI-E Gen3
x 4 Lane Max 4GBs
Power : 25 (Watt)
PAGE 17 Processor Package : S3
PAGE 18 19
Size : 23 x 23 (mm)
DDR3L SODIMM2
DDR3L
Maxima 8GBs
Processor : Daul Core PAGE 19~24
PAGE 18
Power : 15 (Watt) RTD2136 LVDS (2CH)
Package : BGA1356 Package : QFN-32 PAGE 27/27
SATA0 - 1st HDD
SATA0 6GB/s Size : 40 X 24 (mm) PAGE 22
Package : 9.5 (mm)
C eDP C
Power : PAGE 34
eDP X 2 PAGE 27/27
SATA ODD SATA1 3GB/s
Package : 12.7 (mm) HDMI Conn
Power : PAGE 34 PAGE 28
DP Port 1
USB3.0 Port x 1
USB3.0 Interface USB 3.0 Port 1,2,3(USB 2.0 Port 0,1,5) Port 1
PAGE 33
HP USB2.0 Interface
PAGE 2~16
System BIOS
SPI ROM SPI Interface
Azalia
PAGE 10 Camera
TPM PAGE 32 Port2 Touch Screen
Port7
SLB9665TT2.0 FW 5 PAGE 28 Elan EKTH3915 for 14",15"
Elan EKTH3918 for 17"
B LPC Interface PCIE Gen 1 x 1 Lane PAGE 32 B
www.vinafix.com
5 4 3 2 1
+3V [4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43]
+1.0V [4,6,16,32,35,40]
[28]
[28]
[28]
IN_D2#
IN_D2
IN_D1#
IN_D2#
IN_D2
IN_D1#
IN_D1
E55
F55
E58
F58
U17A
DDI1_TXN[0]
DDI1_TXP[0]
DDI1_TXN[1]
SKL_ULT ? Need apply PN
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
C47
C46
D46
C45
INT_EDP_TXN0
INT_EDP_TXP0
INT_EDP_TXN1
INT_EDP_TXP1
INT_EDP_TXN0
INT_EDP_TXP0
INT_EDP_TXN1
[27]
[27]
[27]
Reserve EDP_HPD opposites circuit!
02
+VCCSTPLL [4,5,6,9,40,41] [28] IN_D1 INT_EDP_TXP1 [27]
+VCCIO [6,16,40] HDMI [28]
[28]
IN_D0#
IN_D0
IN_D0#
IN_D0
F53
G53
DDI1_TXP[1]
DDI1_TXN[2]
DDI1_TXP[2]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
A45
B45
IN_CLK# F56 A47
[28] IN_CLK# DDI1_TXN[3] EDP_TXN[3] +3V
IN_CLK G56 B47
[28] IN_CLK DDI1_TXP[3] EDP_TXP[3]
C50 E45 INT_EDP_AUXN
DDI2_TXN[0] DDI EDP EDP_AUXN INT_EDP_AUXN [27]
D D50 F45 INT_EDP_AUXP D
DDI2_TXP[0] EDP_AUXP INT_EDP_AUXP [27]
C52 R90
D52 DDI2_TXN[1] B52 EDP_DISP_UTIL *10K/F_4
A50 DDI2_TXP[1] EDP_DISP_UTIL TP46
B50 DDI2_TXN[2] G50
D51 DDI2_TXP[2] DDI1_AUXN F50 ULT_EDP_HPD
C51 DDI2_TXN[3] DDI1_AUXP E48
DDI2_TXP[3] Q DDI2_AUXN F48
DDI2_AUXP G46 R100
DDPB_CTRLDATA/ GPP_E19 DISPLAY SIDEBANDS DDI3_AUXN F46 100K_4
DDI3_AUXP
Display Port B Detected [28] SDVO_CLK
L13
L12 GPP_E18/DDPB_CTRLCLK L9 HDMI_HPD_CON
This signal has a weak internal pull-down. [28] SDVO_DATA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
L7 HDMI_HPD_CON [28]
N7 L6
0 = Port B is not detected. DDPC_CTRLDATA N8 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 N9
TP121
1 = Port B is detected. GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
L10 ULT_EDP_HPD ULT_EDP_HPD [27,28]
N11
DDPD_CTRLDATA N12 GPP_E22/DDPD_CTRLCLK R12 PCH_LVDS_BLON
TP122 GPP_E23/DDPD_CTRLDATA EDP_BKLTEN PCH_LVDS_BLON [28]
R11 PCH_DPST_PWM
EDP_BKLTCTL PCH_DPST_PWM [27]
+VCCIO R96 24.9/F_4 EDP_RCOMP E52 U13 PCH_DISP_ON PCH_DISP_ON [28]
EDP_RCOMP EDP_VDDEN
*SKL_ULT 1 OF 20
REV = 1
eDP_COMPIO and ICOMPO signals should be shorted near ?
balls and routed with typical impedance <25 mohms
1125 change R96 connection from +1.0V to +VCCIO
1222 del for DDP not use
C C
+1.0V
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
02 -- SKYPAKE 1/20(eDP/DDI)
NB5 Date: Friday, May 22, 2015 Sheet 2 of 49
5 4 3 2 1
5 4 3 2 1
[17]
[17]
[18]
[18]
[17]
M_A_DQSN[7:0]
M_A_DQSP[7:0]
M_B_DQSN[7:0]
M_B_DQSP[7:0]
M_A_DQ[63:0]
03
[18] M_B_DQ[63:0]
+1.35VSUS [6,17,18,38,40]
SkyLake ULT Processor (DDR3L)
D D
? ?
U17B SKL_ULT Need apply PN U17C
SKL_ULT
Need apply PN
AU53 M_A_CLKN0 [17]
M_A_DQ0 AL71 DDR0_CKN[0] AT53 M_A_DQ32 AY39 AN45
DDR0_DQ[0] DDR0_CKP[0] M_A_CLKP0 [17] DDR0_DQ[32]/DDR1_DQ[0] DDR1_CKN[0] M_B_CLKN0 [18]
M_A_DQ1 AL68 AU55 M_A_CLKN1 [17] M_A_DQ33 AW39 AN46 M_B_CLKN1 [18]
M_A_DQ2 AN68 DDR0_DQ[1] DDR0_CKN[1] AT55 M_A_DQ34 AY37 DDR0_DQ[33]/DDR1_DQ[1] DDR1_CKN[1] AP45
DDR0_DQ[2] DDR0_CKP[1] M_A_CLKP1 [17] DDR0_DQ[34]/DDR1_DQ[2] DDR1_CKP[0] M_B_CLKP0 [18]
M_A_DQ3 AN69 M_A_DQ35 AW37 AP46 M_B_CLKP1 [18]
M_A_DQ4 AL70 DDR0_DQ[3] BA56 M_A_DQ36 BB39 DDR0_DQ[35]/DDR1_DQ[3] DDR1_CKP[1]
DDR0_DQ[4] DDR0_CKE[0] M_A_CKE0 [17] DDR0_DQ[36]/DDR1_DQ[4]
M_A_DQ5 AL69 BB56 M_A_CKE1 [17] M_A_DQ37 BA39 AN56 M_B_CKE0 [18]
M_A_DQ6 AN70 DDR0_DQ[5] DDR0_CKE[1] AW56 M_A_DQ38 BA37 DDR0_DQ[37]/DDR1_DQ[5] DDR1_CKE[0] AP55
DDR0_DQ[6] DDR0_CKE[2] DDR0_DQ[38]/DDR1_DQ[6] DDR1_CKE[1] M_B_CKE1 [18]
M_A_DQ7 AN71 AY56 M_A_DQ39 BB37 AN55
M_A_DQ8 AR70 DDR0_DQ[7] DDR0_CKE[3] M_A_DQ40 AY35 DDR0_DQ[39]/DDR1_DQ[7] DDR1_CKE[2] AP53
M_A_DQ9 AR68 DDR0_DQ[8] AU45 M_A_DQ41 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR1_CKE[3]
DDR0_DQ[9] DDR0_CS#[0] M_A_CS#0 [17] DDR0_DQ[41]/DDR1_DQ[9]
M_A_DQ10 AU71 AU43 M_A_DQ42 AY33 BB42
DDR0_DQ[10] DDR0_CS#[1] M_A_CS#1 [17] DDR0_DQ[42]/DDR1_DQ[10] DDR1_CS#[0] M_B_CS#0 [18]
M_A_DQ11 AU68 AT45 M_A_DQ43 AW33 AY42
DDR0_DQ[11] DDR0_ODT[0] M_A_DIM0_ODT0 [17] DDR0_DQ[43]/DDR1_DQ[11] DDR1_CS#[1] M_B_CS#1 [18]
M_A_DQ12 AR71 AT43 M_A_DIM0_ODT1 [17] M_A_DQ44 BB35 BA42 M_B_DIM0_ODT0 [18]
M_A_DQ13 AR69 DDR0_DQ[12] DDR0_ODT[1] M_A_DQ45 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR1_ODT[0] AW42
DDR0_DQ[13] DDR0_DQ[45]/DDR1_DQ[13] DDR1_ODT[1] M_B_DIM0_ODT1 [18]
M_A_DQ14 AU70 BA51 M_A_A5 M_A_A5 [17] M_A_DQ46 BA33
M_A_DQ15 AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 M_A_A9 M_A_DQ47 BB33 DDR0_DQ[46]/DDR1_DQ[14] AY48 M_B_A5
DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] M_A_A9 [17] DDR0_DQ[47]/DDR1_DQ[15] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A5 [18]
M_B_DQ0 AF65 BA52 M_A_A6 M_A_A6 [17] M_B_DQ32 AU40 AP50 M_B_A9 M_B_A9 [18]
M_B_DQ1 AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_A8 M_B_DQ33 AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48 M_B_A6
DDR1_DQ[1]/DDR0_DQ[17] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] M_A_A8 [17] DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A6 [18]
M_B_DQ2 AK65 AW52M_A_A7 M_B_DQ34 AT37 BB48 M_B_A8
DDR1_DQ[2]/DDR0_DQ[18] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] M_A_A7 [17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_A8 [18]
C M_B_DQ3 AK64 AY55 M_A_BS#2 M_B_DQ35 AU37 AP48 M_B_A7 C
DDR1_DQ[3]/DDR0_DQ[19] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BS#2 [17] DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] M_B_A7 [18]
M_B_DQ4 AF66 AW54M_A_A12 M_B_DQ36 AR40 AP52
DDR1_DQ[4]/DDR0_DQ[20] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_A_A12 [17] DDR1_DQ[36]/DDR1_DQ[20] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BS#2 [18]
M_B_DQ5 AF67 BA54 M_A_A11 M_B_DQ37 AP40 AN50 M_B_A12
DDR1_DQ[5]/DDR0_DQ[21] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_A11 [17] DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A12 [18]
M_B_DQ6 AK67 BA55 M_A_A15 M_B_DQ38 AP37 AN48 M_B_A11
DDR1_DQ[6]/DDR0_DQ[22] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_A15 [17] DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_A11 [18]
M_B_DQ7 AK66 AY54 M_A_A14 M_B_DQ39 AR37 AN53 M_B_A15
DDR1_DQ[7]/DDR0_DQ[23] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_A14 [17] DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_A15 [18]
M_B_DQ8 AF70 M_B_DQ40 AT33 AN52 M_B_A14
DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_A14 [18]
M_B_DQ9 AF68 AU46 M_A_A13 M_A_A13 [17] M_B_DQ41 AU33
M_B_DQ10 AH71 DDR1_DQ[9]/DDR0_DQ[25] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU48 M_B_DQ42 AU30 DDR1_DQ[41]/DDR1_DQ[25] BA43 M_B_A13
DDR1_DQ[10]/DDR0_DQ[26] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# [17] DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] M_B_A13 [18]
M_B_DQ11 AH68 AT46 M_A_WE# [17] M_B_DQ43 AT30 AY43 M_B_CAS# [18]
M_B_DQ12 AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AU50 M_B_DQ44 AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44
DDR1_DQ[12]/DDR0_DQ[28] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_RAS# [17] DDR1_DQ[44]/DDR1_DQ[28] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_WE# [18]
M_B_DQ13 AF69 AU52 M_A_BS#0 [17] M_B_DQ45 AP33 AW44 M_B_RAS# [18]
M_B_DQ14 AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] AY51 M_A_A2 M_B_DQ46 AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44
DDR1_DQ[14]/DDR0_DQ[30] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] M_A_A2 [17] DDR1_DQ[46]/DDR1_DQ[30] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BS#0 [18]
M_B_DQ15 AH69 AT48 M_B_DQ47 AP30 AY47 M_B_A2
DDR1_DQ[15]/DDR0_DQ[31] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BS#1 [17] DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_A2 [18]
M_A_DQ16 BB65 AT50 M_A_A10 M_A_DQ48 AY31 BA44
DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] M_A_A10 [17] DDR0_DQ[48]/DDR1_DQ[32] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BS#1 [18]
M_A_DQ17 AW65 BB50 M_A_A1 M_A_DQ49 AW31 AW46M_B_A10
DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] M_A_A1 [17] DDR0_DQ[49]/DDR1_DQ[33] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_A10 [18]
M_A_DQ18 AW63 AY50 M_A_A0 M_A_DQ50 AY29 AY46 M_B_A1
DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 [17] DDR0_DQ[50]/DDR1_DQ[34] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A1 [18]
M_A_DQ19 AY63 BA50 M_A_A3 M_A_DQ51 AW29 BA46 M_B_A0
DDR0_DQ[19]/DDR0_DQ[35] DDR0_MA[3] M_A_A3 [17] DDR0_DQ[51]/DDR1_DQ[35] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A0 [18]
M_A_DQ20 BA65 BB52 M_A_A4 M_A_DQ52 BB31 BB46 M_B_A3
DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[4] M_A_A4 [17] DDR0_DQ[52]/DDR1_DQ[36] DDR1_MA[3] M_B_A3 [18]
M_A_DQ21 AY65 M_A_DQ53 BA31 BA47 M_B_A4 M_B_A4 [18]
M_A_DQ22 BA63 DDR0_DQ[21]/DDR0_DQ[37] AM70 M_A_DQSN0 M_A_DQ54 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR1_MA[4]
M_A_DQ23 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQSN[0] AM69 M_A_DQSP0 M_A_DQ55 BB29 DDR0_DQ[54]/DDR1_DQ[38] BA38 M_A_DQSN4
M_A_DQ24 BA61 DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQSP[0] AT69 M_A_DQSN1 M_A_DQ56 AY27 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 M_A_DQSP4
M_A_DQ25 AW61 DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQSN[1] AT70 M_A_DQSP1 M_A_DQ57 AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 M_A_DQSN5
M_A_DQ26 BB59 DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQSP[1] AH66 M_B_DQSN0 M_A_DQ58 AY25 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 M_A_DQSP5
M_A_DQ27 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 M_B_DQSP0 M_A_DQ59 AW25 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] AT38 M_B_DQSN4
M_A_DQ28 BB61 DDR0_DQ[27]/DDR0_DQ[43] DDR1_DQSP[0]/DDR0_DQSP[2] AG69 M_B_DQSN1 M_A_DQ60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR1_DQSN[4]/DDR1_DQSN[2] AR38 M_B_DQSP4
M_A_DQ29 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 M_B_DQSP1 M_A_DQ61 BA27 DDR0_DQ[60]/DDR1_DQ[44] DDR1_DQSP[4]/DDR1_DQSP[2] AT32 M_B_DQSN5
M_A_DQ30 BA59 DDR0_DQ[29]/DDR0_DQ[45] DDR1_DQSP[1]/DDR0_DQSP[3] BA64 M_A_DQSN2 M_A_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQSN[5]/DDR1_DQSN[3] AR32 M_B_DQSP5
M_A_DQ31 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 M_A_DQSP2 M_A_DQ63 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR1_DQSP[5]/DDR1_DQSP[3] BA30 M_A_DQSN6
M_B_DQ16 AT66 DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQSP[2]/DDR0_DQSP[4] AY60 M_A_DQSN3 M_B_DQ48 AU27 DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 M_A_DQSP6 +1.35VSUS
B
M_B_DQ17 AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 M_A_DQSP3 M_B_DQ49 AT27 DDR1_DQ[48] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 M_A_DQSN7 B
M_B_DQ18 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR0_DQSP[3]/DDR0_DQSP[5] AR66 M_B_DQSN2 M_B_DQ50 AT25 DDR1_DQ[49] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 M_A_DQSP7
M_B_DQ19 AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 M_B_DQSP2 M_B_DQ51 AU25 DDR1_DQ[50] DDR0_DQSP[7]/DDR1_DQSP[5] AR25 M_B_DQSN6
M_B_DQ20 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 M_B_DQSN3 M_B_DQ52 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27 M_B_DQSP6
M_B_DQ21 AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 M_B_DQSP3 M_B_DQ53 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 M_B_DQSN7 R285
M_B_DQ22 AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQ54 AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21 M_B_DQSP7
DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[54] DDR1_DQSP[7] 470/F_4
M_B_DQ23 AU65 AW50 M_B_DQ55 AP25
M_B_DQ24 AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR0_ALERT# AT52 DDR0_PAR M_B_DQ56 AT22 DDR1_DQ[55] AN43
AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR0_PAR TP12 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 DDR1_PAR
M_B_DQ25 M_B_DQ57
AP60 DDR1_DQ[25]/DDR0_DQ[57] AY67 SM_VREF AU21 DDR1_DQ[57] DDR1_PAR AT13 SM_DRAMRST# TP14
M_B_DQ26 SM_VREF [17] M_B_DQ58 DDR3_DRAMRST# [17,18]
M_B_DQ27 AN60 DDR1_DQ[26]/DDR0_DQ[58] DDR_VREF_CA AY68 SMDDR_VREF_DQ0_M3 M_B_DQ59 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0 R159 121/F_4
DDR1_DQ[27]/DDR0_DQ[59] DDR0_VREF_DQ SMDDR_VREF_DQ0_M3 [17] DDR1_DQ[59] DDR_RCOMP[0]
M_B_DQ28 AN61 BA67 SMDDR_VREF_DQ1_M3 M_B_DQ60 AN22 AT18 SM_RCOMP_1 R162 80.6/F_4
M_B_DQ29 AP61 DDR1_DQ[28]/DDR0_DQ[60]
NIL-DDR CH -
A DDR1_VREF_DQ SMDDR_VREF_DQ1_M3 [18] 20mils width M_B_DQ61 AP22 DDR1_DQ[60] DDR_RCOMP[1] AU18 SM_RCOMP_2 R163 100/F_4
M_B_DQ30 AT60 DDR1_DQ[29]/DDR0_DQ[61] AW67DDR_VTT_CNTL M_B_DQ62 AP21 DDR1_DQ[61] DDR_RCOMP[2]
DDR1_DQ[30]/DDR0_DQ[62] DDR_VTT_CNTL DDR_VTT_CNTL [4,18] DDR1_DQ[62]
M_B_DQ31 AU60 M_B_DQ63 AN21
DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[63]
NIL-DDR CH -
B PDC
*SKL_ULT 2 OF 20 *SKL_ULT 3 OF 20
REV = 1 REV = 1
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
04 -- SKYPAKE 3/20(DDR3-A I/F)
NB5 Date: Wednesday, May 13, 2015 Sheet 3 of 49
5 4 3 2 1
5 4 3 2 1
[10,11,12,14,15,16,18] +3V_DEEP_SUS
[2,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43]
[10,15,16,32,34,35,37,39,40,43,44,46]
[2,5,6,9,40,41]
+3V
+3VS5
+VCCSTPLL
[2,6,16,32,35,40] +1.0V
04
U17K
SKL_ULT
?
Need apply PN
SYSTEM POWER MANAGEMENT
PCH Pull-high/low(CLG)
C AT11 PCH_SLP_S0_N
GPP_B12/SLP_S0# PCH_SLP_S0_N [16,35]
AP15
AN10 GPD4/SLP_S3# BA16 SUSB# [16,35]
PLTRST#
D SYS_RESET# B5 GPP_B13/PLTRST# GPD5/SLP_S4# AY16 SUSC# [16,35] +3V_DEEP_SUS D
[16] SYS_RESET# SYS_RESET# GPD10/SLP_S5# SLP_S5# [16]
RSMRST# AY17
[35] RSMRST# RSMRST# AN15 SLP_SUS#_EC SUSWARN# R193 10K_4
A68 SLP_SUS# AW 15 SLP_SUS#_EC [35]
R394 *10K_4 PROCPWRGD
EC26 H_VCCST_PWRGD B65 PROCPW RGD SLP_LAN# BB17 GPD9 SUSACK# R200 10K_4
VCCST_PW RGD GPD9/SLP_W LAN# AN16 TP105
*220P/50V_4 C560 *0.1U/16V_4
B6 GPD6/SLP_A# SLP_A# [16]
SYS_PWROK RF_OFF_PCH R187 10K_4
[16] SYS_PWROK SYS_PW ROK
PCH_PWROK BA20 BA15 DNBSWON#
[16,35] EC_PWROK PCH_PW ROK GPD3/PW RBTN# DNBSWON# [35]
DSWROK_EC_R BB20 AY15 AC_PRESENT_EC
DSW _PW ROK GPD1/ACPRESENT AU13 AC_PRESENT_EC [20,35] +3VS5
SUSWARN# *0_4 R196 RF_OFF_PCH
R192 *0_4/S SUSWARN# AR13 GPD0/BATLOW # RF_OFF_PCH [34]
[35] SUSWARN#_EC GPP_A13/SUSW ARN#/SUSPW RDNACK
0_4 R199 SUSACK# AP11 PCIE_WAKE# R204 1K_4
[35] SUSACK#_EC GPP_A15/SUSACK#
0423 change to shortpad AU11
PCIE_WAKE# BB15 GPP_A11/PME# AP16 INTRUDER#_R 1M_4 R165 AC_PRESENT_EC R203 *10K_4
[30,34,35] PCIE_WAKE# W AKE# INTRUDER# +3V_RTC
LAN_WAKE# AM15
AW 17 GPD2/LAN_W AKE# AM10 LAN_WAKE# R591 *10K_4
DDR_VTT_CNTL AT15 GPD11/LANPHYPC GPP_B11/EXT_PW R_GATE# AM11 GPP_B2
[3,18] DDR_VTT_CNTL GPD7/RSVD GPP_B2/VRALERT# TP10
+3V
Need check circuit!!!! *SKL_ULT 11 OF 20
Should be delete REV = 1 ? SYS_RESET# R415 10K_4
C C
3
[16,35,37,38,39] HWPG D12 1 2 RB500V-40 H_VCCST_PWRGD_R R395 60.4/F_4 H_VCCST_PWRGD +1.0V_PWRGD_G2 2 Q5
2N7002K R16
100K_4
R395 close to CPU side
3
PLTRST#(CLG) H_VCCST_PWRGD trace 0.3" - 1.5" +1.0V_PWRGD_G1 2 Q6
1
Check Q2010 Rise/Fall time less than 100ns C543 METR3904-G
*10P/50V_4
1
PLTRST# [16,19,30,32,34,35] C32 R21
0.1U/16V_4 100K_4
R14
100K/F_4
B B
R412
10K/F_4
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
06 -- SKYPAKE 5/20(Power Manger)
NB5 Date: Friday, May 22, 2015 Sheet 4 of 49
5 4 3 2 1
5 4 3 2 1
Under U17
[41] +VCC_CORE
[2,4,6,16,32,35,40]
[2,4,6,9,40,41]
+1.0V
[6] +VCCSTG
+VCCSTPLL
+VCC_CORE
U17L SKL_ULT ? Need apply PN
CPU POWER 1 OF 4
+VCC_CORE Under U17
05
A30 G32
A34 VCC_A30 VCC_G32 G33
A39 VCC_A34
VCC_A39
33A VCC_G33
VCC_G35
G35
A44 G37 C566 C155 C567 C169 C529 C194 C162
C59 C47 C52 C518 C517 C519 C60 C524 AK33 VCC_A44 VCC_G37 G38 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
10U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 47U/6.3VS_8 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AK35 VCC_AK33 VCC_G38 G40
D AK37 VCC_AK35 VCC_G40 G42 D
AK38 VCC_AK37 VCC_G42 J30
AK40 VCC_AK38 VCC_J30 J33
100- ±1%
AL33 VCC_AK40 VCC_J33 J37 pull-up to VCC
AL37 VCC_AL33 VCC_J37 J40 near processor.
AL40 VCC_AL37 VCC_J40 K33 C568 C133 C140 C147 C195 C182 C122 C112
C95 C193 C123 C180 C181 C121 C547 AM32 VCC_AL40 VCC_K33 K35 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AM33 VCC_AM32 VCC_K35 K37
AM35 VCC_AM33 VCC_K37 K38
AM37 VCC_AM35 VCC_K38 K40
AM38 VCC_AM37 VCC_K40 K42
G30 VCC_AM38 VCC_K42 K43 R98 *100/F_4
VCC_G30 VCC_K43 +VCC_CORE
K32 E32
RSVD_K32 VCC_SENSE VCC_SENSE [41]
C523 C63 C83 C70 C520 C55 E33
VSS_SENSE VSS_SENSE [41]
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AK32
RSVD_AK32 B63 H_CPU_SVIDALRT# R99 *100/F_4
AB62 VIDALERT# A63 VR_SVID_CLK_R
P62 VCCOPC_AB62 VIDSCK D64 H_CPU_SVIDDAT
V62 VCCOPC_P62 VIDSOUT
VCCOPC_V62 G20
VCCSTG_G20 +VCCSTG
H63
VCC_OPC_1P8_H63
G61
VCC_OPC_1P8_G61
AC63
AE63 VCCOPC_SENSE
VSSOPC_SENSE
AE62
AG62 VCCEOPIO
C VCCEOPIO C
VCCEOPIO_SENSE AL63
TP13 AJ62 VCCEOPIO_SENSE
VSSEOPIO_SENSE
TP8 VSSEOPIO_SENSE PDC
*SKL_ULT 12 OF 20 Layout note: need routing together and ALERT need between CLK and DATA.
Close U17 REV = 1 ?
+VCCSTPLL
+VCC_CORE
C534
+VCC_CORE *0.1U/16V_4
B B
R397
100/F_4
CLOSE TO CPU
PLACE THE PU RESISTORS SVID DATA
H_CPU_SVIDDAT R382 *0_4/S VR_SVID_DATA [41]
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
07 -- SKYPAKE 6/20 (POWER-1)
NB5 Date: Wednesday, May 13, 2015 Sheet 5 of 49
5 4 3 2 1
5 4 3 2 1
06
+VCCSTPLL [2,4,5,9,40,41]
+VCCSA [41,42]
+1.35VSUS [3,17,18,38,40]
+1.0V_DEEP_SUS [9,13,15,16,39,40]
+1.0V [2,4,16,32,35,40]
+3VPCU [13,30,31,32,33,34,35,36,37]
+VCCIO [2,16,40]
+1.35VSUS Need apply PN +VCCIO
?
Under U17 U17N SKL_ULT Under U17 Close U17
CPU POWER 3 OF 4
AU23 AK28
AU28 VDDQ_AU23 VCCIO AK30
D C281 C297 C268 C271 C270 C258 AU35 VDDQ_AU28 2A 3.1A VCCIO AL30 C161 C188 C190 C154 C138 C145 C189 C178 C192 C168 D
10U/6.3V_4 10U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 AU42 VDDQ_AU35 VCCIO AL42 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
BB23 VDDQ_AU42 VCCIO AM28
BB32 VDDQ_BB23 VCCIO AM30
BB41 VDDQ_BB32 VCCIO AM42 +VCCSA
Close U17 VDDQ_BB41 VCCIO
BB47 Under U17
BB51 VDDQ_BB47 AK23
VDDQ_BB51 VCCSA AK25
4.5A VCCSA G23
C260 C278 C269 C273 AM40 VCCSA G25
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 VDDQC VCCSA G27 C544 C530 C67 C532 C80 C94 C170 C107 C125 C542 C551 C558 C86 C536
A18 VCCSA G28 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
+VCCSTPLL VCCST 0.12A VCCSA
C200 C196 J22
*10U/6.3V_4 1U/6.3V_4 A22 VCCSA J23
+VCCSTG VCCSTG_A220.04A VCCSA J27
AL23 VCCSA K23
+VCCPLL_OC VCCPLL_OC VCCSA K25 Close U17
+VCCSTPLL K20 VCCSA K27
120mA VCCPLL_K200.12A VCCSA
C126 C108 C163 C179 C41 C91
Close U17 Under U17 K21 K28 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
+VCCPLL VCCPLL_K21 VCCSA
R556 0_4 K30
VCCSA +VCCIO
+1.0V +VCCSTG AM23 VCCIO_VCCSENSE
VCCIO_SENSE AM22 VCCIO_VSSSENSE
R75 *0_4 VSSIO_SENSE
H21
+VCCIO VSSSA_SENSE VSSSA_SENSE [41]
H20 VCCIO_VCCSENSE R135 100/F_4
VCCSA_SENSE VCCSA_SENSE [41]
E
R589 *0_4 0421 Add R588,R589
*SKL_ULT 14 OF 20 VCCIO_VSSSENSE R186 100/F_4
for Modern Stand By REV = 1
C C
+1.35VSUS +VCCPLL_OC
R168 0_6
+1.35V_VCCPLL_OC
R588 *0_6
+VCCSTPLL +VCCPLL
R67 *0_6/S
Under U17 IO Thrm Protect 1226 Add thermistor circuit for CPU & DDR
+VCCSTG +VCCPLL_OC
+3VPCU +3VPCU +3VPCU
C98 C230 For 65 degree, 1.8v limit, (SW) For 65 degree, 1.8v limit, (SW) For 65 degree, 1.8v limit, (SW)
1U/6.3V_4 1U/6.3V_4
R146 R549 R551
20K/F_4 20K/F_4 *20K/F_4
B B
+VCCSTPLL
R550 close R44 R552 close U12
For 75 degree, 1.2v limit, (HW) For 75 degree, 1.2v limit, (HW) For 75 degree, 1.2v limit, (HW)
C96 C82
THRM_MOINTOR1 [35] THRM_MOINTOR2 [35] THRM_MOINTOR3 [35]
*1U/6.3V_4 *22U/6.3V_6
THER_PIPE THER_CPU THER_DDR
2
Close U17
+VCCSTPLL +VCCPLL
+1.35VSUS
C69 C134 Close U17
1U/6.3V_4 1U/6.3V_4
A A
C229 C240 C237 C255 C228 C238 C257 C289 C279 C305
10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
08 -- SKYPAKE 7/20 (POWER-2)
NB5 Date: Friday, May 22, 2015 Sheet 6 of 49
5 4 3 2 1
5 4 3 2 1
07
+VCCGT [41]
B B
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
09 -- SKYPAKE 8/20 (POWER-3)
NB5 Date: Wednesday, May 13, 2015 Sheet 7 of 49
5 4 3 2 1
5 4 3 2 1
08
U17Q
U17P Need apply PN
Need apply PN SKL_ULT ?
D U17R SKL_ULT ? D
SKL_ULT ?
Need apply PN GND 2 OF 3
GND 1 OF 3
R AT63 BA49
A5 AL65 AT68 VSS VSS BA53
GND 3 OF 3
A67 VSS VSS AL66 AT71 VSS VSS BA57
F8 VSS VSS VSS VSS
VSS L18 A70 AM13 AU10 BA6
G10 VSS VSS VSS VSS VSS
VSS L2 AA2 AM21 AU15 BA62
G22 VSS VSS VSS VSS VSS
VSS L20 AA4 AM25 AU20 BA66
G43 VSS VSS VSS VSS VSS
VSS L4 AA65 AM27 AU32 BA71
G45 VSS VSS VSS VSS VSS
VSS L8 AA68 AM43 AU38 BB18
G48 VSS VSS VSS VSS VSS
VSS N10 AB15 AM45 AV1 BB26
G5 VSS VSS VSS VSS VSS
VSS N13 AB16 AM46 AV68 BB30
G52 VSS VSS VSS VSS VSS
VSS N19 AB18 AM55 AV69 BB34
G55 VSS VSS VSS VSS VSS
VSS N21 AB21 AM60 AV70 BB38
G58 VSS VSS VSS VSS VSS
VSS N6 AB8 AM61 AV71 BB43
G6 VSS VSS VSS VSS VSS
VSS N65 AD13 AM68 AW 10 BB55
G60 VSS VSS VSS VSS VSS
VSS N68 AD16 AM71 AW 12 BB6
G63 VSS VSS VSS VSS VSS
VSS P17 AD19 AM8 AW 14 BB60
G66 VSS VSS VSS VSS VSS
VSS P19 AD20 AN20 AW 16 BB64
H15 VSS VSS VSS VSS VSS
VSS P20 AD21 AN23 AW 18 BB67
H18 VSS VSS VSS VSS VSS
VSS P21 AD62 AN28 AW 21 BB70
H71 VSS VSS VSS VSS VSS
VSS R13 AD8 AN30 AW 23 C1
J11 VSS VSS VSS VSS VSS
VSS R6 AE64 AN32 AW 26 C25
J13 VSS VSS VSS VSS VSS
VSS T15 AE65 AN33 AW 28 C5
J25 VSS VSS VSS VSS VSS
VSS T17 AE66 AN35 AW 30 D10
J28 VSS VSS VSS VSS VSS
VSS T18 AE67 AN37 AW 32 D11
J32 VSS VSS VSS VSS VSS
VSS T2 AE68 AN38 AW 34 D14
J35 VSS VSS VSS VSS VSS
VSS T21 AE69 AN40 AW 36 D18
J38 VSS VSS VSS VSS VSS
VSS T4 AF1 AN42 AW 38 D22
J42 VSS VSS VSS VSS VSS
C VSS U10 AF10 AN58 AW 41 D25 C
J8 VSS VSS VSS VSS VSS
VSS U63 AF15 AN63 AW 43 D26
K16 VSS VSS VSS VSS VSS
VSS U64 AF17 AP10 AW 45 D30
K18 VSS VSS VSS VSS VSS
VSS U66 AF2 AP18 AW 47 D34
K22 VSS VSS VSS VSS VSS
VSS U67 AF4 AP20 AW 49 D39
K61 VSS VSS VSS VSS VSS
VSS U69 AF63 AP23 AW 51 D44
K63 VSS VSS VSS VSS VSS
VSS U70 AG16 AP28 AW 53 D45
K64 VSS VSS VSS VSS VSS
VSS V16 AG17 AP32 AW 55 D47
K65 VSS VSS VSS VSS VSS
VSS V17 AG18 AP35 AW 57 D48
K66 VSS VSS VSS VSS VSS
VSS V18 AG19 AP38 AW 6 D53
K67 VSS VSS VSS VSS VSS
VSS W 13 AG20 AP42 AW 60 D58
K68 VSS VSS VSS VSS VSS
VSS W6 AG21 AP58 AW 62 D6
K70 VSS VSS VSS VSS VSS
VSS W9 AG71 AP63 AW 64 D62
K71 VSS VSS VSS VSS VSS
VSS Y17 AH13 AP68 AW 66 D66
L11 VSS VSS VSS VSS VSS
VSS Y19 AH6 AP70 AW 8 D69
L16 VSS VSS VSS VSS VSS
VSS Y20 AH63 AR11 AY66 E11
L17 VSS VSS VSS VSS VSS
VSS Y21 AH64 AR15 B10 E15
VSS AH67 VSS VSS AR16 B14 VSS VSS E18
AJ15 VSS VSS AR20 B18 VSS VSS E21
AJ18 VSS VSS AR23 B22 VSS VSS E46
*SKL_ULT 18 OF 20 AJ20 VSS VSS AR28 B30 VSS VSS E50
AJ4 VSS VSS AR35 B34 VSS VSS E53
REV = 1 ? VSS VSS VSS VSS
AK11 AR42 B39 E56
AK16 VSS VSS AR43 B44 VSS VSS E6
AK18 VSS VSS AR45 B48 VSS VSS E65
AK21 VSS VSS AR46 B53 VSS VSS E71
AK22 VSS VSS AR48 B58 VSS VSS F1
AK27 VSS VSS AR5 B62 VSS VSS F13
AK63 VSS VSS AR50 B66 VSS VSS F2
AK68 VSS VSS AR52 B71 VSS VSS F22
B AK69 VSS VSS AR53 BA1 VSS VSS F23 B
AK8 VSS VSS AR55 BA10 VSS VSS F27
AL2 VSS VSS AR58 BA14 VSS VSS F28
AL28 VSS VSS AR63 BA18 VSS VSS F32
AL32 VSS VSS AR8 BA2 VSS VSS F33
AL35 VSS VSS AT2 BA23 VSS VSS F35
AL38 VSS VSS AT20 BA28 VSS VSS F37
AL4 VSS VSS AT23 BA32 VSS VSS F38
AL45 VSS VSS AT28 BA36 VSS VSS F4
AL48 VSS VSS AT35 F68 VSS VSS F40
AL52 VSS VSS AT4 BA45 VSS VSS F42
AL55 VSS VSS AT42 VSS VSS BA41
AL58 VSS VSS AT56 VSS
AL64 VSS VSS AT58
VSS VSS PDC
*SKL_ULT 17 OF 20
*SKL_ULT 16 OF 20 REV = 1 ?
REV = 1 ?
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
10 -- SKYPAKE 9/20 (GND-1)
NB5 Date: Friday, May 22, 2015 Sheet 8 of 49
5 4 3 2 1
5 4 3 2 1
+1.0V_DEEP_SUS [13,15,16,39,40]
+1.8V_DEEP_SUS [15,39,46]
+VCCSTPLL [2,4,5,6,40,41]
09
?
U17S
SKL_ULT
Need apply PN
CFG0-19 need Reserve TP RESERVED SIGNALS-1
PDC
*SKL_ULT 19 OF 20
1222 Cannonlake-U stuff, Skylake-U un-stuff
B REV = 1 B
?
The CFG signals have a default value of '1' if not terminated on the board.
Processor Strapping
1 0 Circuit
CFG3 CFG3
Disable: Enable: Set DFX Enable in DFX interface MSR R387 *1K_4
(Physcial Debug Enable)
DFX Privacy
CFG4 CFG4
Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP R427 1K_4
(DP Presence Strap)
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
13 -- SKYPAKE 12/20 (RSV-1)
NB5 Date: Wednesday, May 13, 2015 Sheet 9 of 49
5 4 3 2 1
5 4 3 2 1
+3V_DEEP_SUS [4,11,12,14,15,16,18]
+3V [2,4,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43]
+3VS5 [4,15,16,32,34,35,37,39,40,43,44,46]
10
?
U17E
SKL_ULT
Need apply PN
SPI - FLASH
SMBUS, SMLINK
D
PCH_SPI1_CLK AV2 R7 SMB_PCH_CLK D
PCH_SPI1_SO AW3 SPI0_CLK GPP_C0/SMBCLK R8 SMB_PCH_DAT
PCH_SPI1_SI AV3 SPI0_MISO GPP_C1/SMBDATA R10 SML0ALERT#
SPI0_MOSI GPP_C2/SMBALERT# SML0ALERT# [11]
PCH_SPI_IO2 AW2
PCH_SPI_IO3 AU4 SPI0_IO2 R9 SMB_ME0_CLK
PCH_SPI_CS0# AU3 SPI0_IO3 GPP_C3/SML0CLK W2 SMB_ME0_DAT
AU2 SPI0_CS0# GPP_C4/SML0DATA W1 SML1ALERT#
SPI0_CS1# GPP_C5/SML0ALERT# SML1ALERT# [11]
AU1
SPI0_CS2# W3 SMB_ME1_CLK
GPP_C6/SML1CLK V3 SMB_ME1_DAT
SPI - TOUCH GPP_C7/SML1DATA AM7 GPP_B23
GPP_B23/SML1ALERT#/PCHHOT# TP19
TP54 SPI1_CLK M2
SIO_EXT_SMI# M3 GPP_D1/SPI1_CLK
[35] SIO_EXT_SMI# GPP_D2/SPI1_MISO
PCI_SERR# J4
[35] PCI_SERR#
SPI1_IO2 V1 GPP_D3/SPI1_MOSI D
TP66 SPI1_IO3 V2 GPP_D21/SPI1_IO2
TP65 SPI1_CS# M1 GPP_D22/SPI1_IO3 AY13
LPC LAD0 [32,34,35]
TP51 GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 BA13
GPP_A2/LAD1/ESPI_IO1 LAD1 [32,34,35]
BB13 LAD2 [32,34,35]
C LINK GPP_A3/LAD2/ESPI_IO2 AY12
GPP_A4/LAD3/ESPI_IO3 LAD3 [32,34,35]
G3 BA12
CL_CLK GPP_A5/LFRAME#/ESPI_CS# LFRAME# [32,34,35]
G2 BA11 EC25 18P/50V_4
G1 CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET#
CL_RST#
AW9 CLK_PCI_EC_R R171 22/F_4 CLK_24M_KBC [35]
AW13 GPP_A9/CLKOUT_LPC0/ESPI_CLK AY9 CLK_PCI_LPC_R R166 22/F_4
[35] EC_RCIN# GPP_A0/RCIN# GPP_A10/CLKOUT_LPC1 CLK_24M_DEBUG [34]
AW11CLKRUN# CLKRUN# [35]
AY11 GPP_A8/CLKRUN#
[32,35] SERIRQ GPP_A6/SERIRQ PDC EC21 18P/50V_4 EMI(near PCH)
*SKL_ULT 5 OF 20 R170 *22/F_4 CLK_PCI_TPM [32]
REV = 1
?
EC22 EMI(near PCH)
*18P/50V_4
C C
U16
[35] PCH_SPI_CS0#_R PCH_SPI_CS0#_R 1 8 +3VSPI
PCH_SPI1_CLK_R 6 CE# VDD
[35] PCH_SPI1_CLK_R SCK
[35] PCH_SPI1_SI_R PCH_SPI1_SI_R 5
PCH_SPI1_SO_R 2 SI 7 HOLD#
[35] PCH_SPI1_SO_R SO HOLD#
B B
BIOS_WP# 3 4
WP# VSS
A25LQ32AM-F/Q
AKE3EFP0N07
91960-0084L-8P-SOCKET
TP43
PCH_SPI_CS0#_R U15&U16 footprint 要要要
PCH_SPI1_CLK_R
TP78
PCH_SPI1_SI_R
TP66-71 need place to TOP TP75
PCH_SPI1_SO_R
TP44
TP40
BIOS_WP#
HOLD#
PCH SPI ROM(CLG)
TP67
SMBus/Pull-up(CLG)
+3VS5 R451 *0_4
2
DDR thermal sensor C577
3
WP# VSS
4
11
D
Functional Strap Definitions D
DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
+3V_DEEP_SUS
ACZ_SPKR
No Boot:
[14,29] ACZ_SPKR The signal has a weak internal pull-down.
TOP SWAP OVERRIDE 0 = Enable security measures defined in the Flash
HIGH - TOP SWAP ENABLE
R492 Descriptor.
R458 *4.7K_4
*20K/F_4 LOW-DISABLED 1 = Disable Flash Descriptor Security (override). This
HIGH: LPC SELECTED FOR SYSTEM FLASH strap should only be asserted high using external
WEAK INTERNAL PD pull-up in manufacturing/debug environments ONLY.
[14] ACZ_SDOUT ACZ_SDOUT This function is useful when running ITP/XDP.
C +3V_DEEP_SUS C
No Boot:
The signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security +3V
No Boot:
(TLS) cipher suite (no confidentiality). The signal has a weak internal pull-down.
R95
1 = Enable Intel ME Crypto Transport Layer Security 0 = Disable No Reboot mode.
1K_4
(TLS) cipher suite (with confidentiality). Must be 1 = Enable No Reboot mode
pulled up to support Intel AMT with TLS and Intel R144
(PCH will disable the TCO
SBA (Small Business Advantage) with TLS. *4.7K_4
[10] SML0ALERT#
SML0ALERT# Timer system reboot feature).
This function is useful when running ITP/XDP.
GPP_B18
[14] GPP_B18
R94
*20K/F_4
R143
10K_4
+3V_DEEP_SUS
No Boot:
The signal has a weak internal pull-down.
0 = LPC Is selected for EC.
B B
1 = eSPI Is selected for EC.
R441
[14] GSPI1_MOSI GSPI1_MOSI No Boot: *10K_4
The signal has a weak internal pull-down.
This field determines the destination of accesses to the
R140 BIOS memory range. Also controllable using Boot BIOS
*20K/F_4 SML1ALERT#
Destination bit (Chipset Configuration Registers: Offset [10] SML1ALERT#
3410h:Bit 10). This strap is used in conjunction with Boot
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination R440
20K/F_4
0 SPI
1 LPC
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
16 -- SKYPAKE 15/20(HDA)
NB5 Date: Wednesday, May 13, 2015 Sheet 11of 49
5 4 3 2 1
5 4 3 2 1
12
+3V [2,4,10,11,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43]
+3V_DEEP_SUS [4,10,11,14,15,16,18]
U17H SKL_ULT
?
Need apply PN
SSIC / USB3
PCIE/USB3/SATA
H8 USB30_RX1-
USB3_1_RXN USB30_RX1- [33]
G8 USB30_RX1+
H13 USB3_1_RXP C13 USB30_TX1- USB30_RX1+ [33]
[19]
[19]
PEG_RXN0
PEG_RXP0
G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13 USB30_TX1+
USB30_TX1- [33] USB3.0 (M/B-1)
PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB30_TX1+ [33]
[19] PEG_TXN0 C574 0.22U/10V_4 PEG_TXN0_C B17
C573 0.22U/10V_4 PEG_TXP0_C A17 PCIE1_TXN/USB3_5_TXN J6 USB30_RX2-
[19] PEG_TXP0 PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB30_RX2- [33]
H6 USB30_RX2+
D G11 USB3_2_RXP/SSIC_1_RXP B13 USB30_TX2- USB30_RX2+ [33] D
[19]
[19]
PEG_RXN1
PEG_RXP1
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13 USB30_TX2+
USB30_TX2- [33] USB3.0 (3D CAMERA)
PEG_TXN1_C D16 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB30_TX2+ [33]
[19] PEG_TXN1 C557 0.22U/10V_4
C556 0.22U/10V_4 PEG_TXP1_C C16 PCIE2_TXN/USB3_6_TXN J10 USB30_RX3-
[19] PEG_TXP1 PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN USB30_RX3- [30]
H10 USB30_RX3+
dGPU H16 USB3_3_RXP/SSIC_2_RXP B15 USB30_TX3- USB30_RX3+ [30]
[19]
[19]
PEG_RXN2
PEG_RXP2
G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15 USB30_TX3+
USB30_TX3- [30] USB3.0 Small Board
PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB30_TX3+ [30]
[19] PEG_TXN2 C554 0.22U/10V_4 PEG_TXN2_C D17
C555 0.22U/10V_4 PEG_TXP2_C C17 PCIE3_TXN E10
[19] PEG_TXP2 PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15
[19] PEG_RXN3 PCIE4_RXN USB3_4_TXN
F15 D15
[19] PEG_RXP3 PCIE4_RXP USB3_4_TXP
[19] PEG_TXN3 C552 0.22U/10V_4 PEG_TXN3_C B19
C553 0.22U/10V_4 PEG_TXP3_C A19 PCIE4_TXN AB9 USBP1-
[19] PEG_TXP3 PCIE4_TXP USB2N_1 USBP1- [33]
AB10 USBP1+ Combo USB3.0 MB-1
USB2P_1 USBP1+ [33]
F16
[30] PCIE_RXN5_CARD PCIE5_RXN
E16 AD6 USBP2-
[30] PCIE_RXP5_CARD PCIE5_RXP USB2N_2 USBP2- [30]
C571 0.1U/16V_4 PCIE_TXN5_CARD_C C19 AD7 USBP2+ Combo USB3.0 Small Board
Cardreader [30]
[30]
PCIE_TXN5_CARD
PCIE_TXP5_CARD C572 0.1U/16V_4 PCIE_TXP5_CARD_C D19 PCIE5_TXN USB2P_2 USBP2+ [30]
PCIE5_TXP AH3 USBP3-
USB2N_3 USBP3- [28]
G18 AJ3 USBP3+ Camera
[34] PCIE_RXN6_WLAN PCIE6_RXN USB2P_3 USBP3+ [28]
F18
[34] PCIE_RXP6_WLAN PCIE6_RXP
WLAN [34] PCIE_TXN6_WLAN C569 0.1U/16V_4 PCIE_TXN6_WLAN_C D20 AD9
C570 0.1U/16V_4 PCIE_TXP6_WLAN_C C20 PCIE6_TXN USB2N_4 AD10
[34] PCIE_TXP6_WLAN PCIE6_TXP USB2P_4
[34] SATA_RXN0 F20 AJ1
E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2
[34] SATA_RXP0 PCIE7_RXP/SATA0_RXP USB2P_5
HDD B21 USB2
[34] SATA_TXN0 PCIE7_TXN/SATA0_TXN
A21 AF6 USBP6-
[34] SATA_TXP0 PCIE7_TXP/SATA0_TXP USB2N_6 USBP6- [30]
AF7 USBP6+ Combo USB3.0 Small Board
USB2P_6 USBP6+ [30]
C G21 C
[34] SATA_RXN1 PCIE8_RXN/SATA1A_RXN
F21 AH1 USBP7-
[34] SATA_RXP1 PCIE8_RXP/SATA1A_RXP USB2N_7 USBP7- [34]
ODD D21 AH2 USBP7+ WLAN
[34] SATA_TXN1 PCIE8_TXN/SATA1A_TXN USB2P_7 USBP7+ [34]
C21
[34] SATA_TXP1 PCIE8_TXP/SATA1A_TXP AF8 USBP8-
USB2N_8 USBP8- [32]
E22 AF9 USBP8+ Touch Screen
[30] PCIE_RXN9_LAN PCIE9_RXN USB2P_8 USBP8+ [32]
E23
[30] PCIE_RXP9_LAN PCIE9_RXP
LAN C575 0.1U/16V_4 PCIE_TXN9_LAN_C B23 AG1
[30] PCIE_TXN9_LAN PCIE9_TXN USB2N_9
[30] PCIE_TXP9_LAN C564 0.1U/16V_4 PCIE_TXP9_LAN_C A23 AG2
PCIE9_TXP USB2P_9
F25 AH7
E25 PCIE10_RXN USB2N_10 AH8
D23 PCIE10_RXP USB2P_10
C23 PCIE10_TXN AB6 USB2_COMP R126 113/F_4 PLACE 'R10387' WITHIN 500 MILS +3V
PCIE10_TXP USB2_COMP AG3 FROM USB2_COMP PIN WITH
R56 100/F_4 F5 USB2_ID AG4 TRACE IMPEDANCE LESS THAN 0.5 OHMS
E5 PCIE_RCOMPN USB2_VBUSSENSE GPU_EVENT# R413 *10K_4
PCIE_RCOMPP A9 DGPU_HOLD_RST#
GPP_E9/USB2_OC0# DGPU_HOLD_RST# [19]
D56 C9 GPU_EVENT# R584 100K_4 DGPU_HOLD_RST# R400 *10K_4
[16] XDP_PRDY#_CPU PROC_PRDY# GPP_E10/USB2_OC1#
D61 D9 DGPU_PWR_EN
[16] XDP_PREQ#_CPU PROC_PREQ# GPP_E11/USB2_OC2# DGPU_PWR_EN [20,44,46]
+3V_DEEP_SUS R180 10K_4 PIRQA# BB11 B9 DGPU_PWROK DGPU_PWROK [20,35,44,46] DGPU_PWR_EN R73 10K_4
GPP_A7/PIRQA# GPP_E12/USB2_OC3#
E28 J1 GC6_FB_EN DGPU_PWROK R414 10K_4
E27 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J2 DEVSLP1
PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1 TP49
D24 J3 OCP_OC# SATA_LED# R425 10K_4
C24 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 TP48
E30 PCIE11_TXP/SATA1B_TXP H2 ACC_LED# GC6_FB_EN R424 *10K_4
PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 ACC_LED# [34]
F30 H3 ODD_PRSNT#_R R416 *0_4
PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 ZERO_ODD_DP# [34]
A25 G4 SATAGP2 ODD_PRSNT#_R R418 10K_4
B25 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 TP47
B PCIE12_TXP/SATA2_TXP H1 SATA_LED#_R R421 *0_4/S SATA_LED# B
GPP_E8/SATALED# SATA_LED# [34]
PDC
*SKL_ULT 8 OF 20 0423 change to shortpad +3V_DEEP_SUS
REV = 1 ?
ACC_LED# R426 10K_4
PCI-E Port Mapping Table USB3.0 Port Mapping Table USB2.0 Port Mapping Table
PCI-E Port Function CLK RQ Port Function USB3.0 Function USB2.0 Function
Port1 dGPU Port0 Un-used
PORT-1 USB3.0 MB-1 PORT-1 Cobime USB3.0 MB-1
PORT-2 USB3.0 (3D CAMERA) PORT-2 Cobime USB3.0 Smaii Board
Port2 dGPU Port1 CardReader PORT-3 Cobime USB3.0 Smaii Board PORT-3 Camera
Port3 dGPU Port2 WLAN
PORT-4 NC PORT-4 NC
PORT-5 NC
Port4 dGPU Port3 LAN PORT-6 Cobime USB3.0 Smaii Board
Port5 CardReader Port4 VGA
PORT-7 WLAN
PORT-8 Touch Screen
Port6 WLAN Port5 Un-used PORT-9 NC
A A
Port7 HDD
PORT-10 NC
Port8 ODD
Port9 LAN
PROJECT : X1A
Quanta Computer Inc.
Port10 Un-used
Size Document Number Rev
Custom 1A
17 -- SKYPAKE 16/20 (PCIE/USB)
NB5 Date: Wednesday, May 13, 2015 Sheet 12of 49
5 4 3 2 1
5 4 3 2 1
+3V_RTC [4,15,32]
+1.8V_DEEP_SUS [9,15,39,46]
+3V [2,4,10,11,12,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43]
13
U17J SKL_ULT ? Need apply PN
CLOCK SIGNALS
CLK_GFX_N D42
VGA
[19] CLK_GFX_N
CLK_GFX_P C42 CLKOUT_PCIE_N0 1222 for Cannonlake-U reserve
[19] CLK_GFX_P CLKOUT_PCIE_P0 +1.0V_DEEP_SUS
[20] PCIE_CLKREQ_VGA# PCIE_CLKREQ_VGA# AR10 RP3 install for XDP
D GPP_B5/SRCCLKREQ0# D
CLK_PCIE_CRN B42 RP3
[30] CLK_PCIE_CRN CLKOUT_PCIE_N1
Cardreader [30] CLK_PCIE_CRP CLK_PCIE_CRP A42 F43 CK_XDP_N_R 2 1 R547 *60.4/F_4 XCLK_BIASREF R393 2.7K/F_4
AT7 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N E43 4 3 CK_XDP_N [16]
[30] PCIE_CLKREQ_CR# PCIE_CLKREQ_CR# CK_XDP_P_R
GPP_B6/SRCCLKREQ1# CLKOUT_ITPXDP_P CK_XDP_P [16]
CLK_PCIE_WLANN D41 BA17 *0_4P2R_4
[34] CLK_PCIE_WLANN CLKOUT_PCIE_N2 GPD8/SUSCLK
WLAN CLK_PCIE_WLANP C41
[34]
[34]
CLK_PCIE_WLANP
PCIE_CLKREQ_WLAN# PCIE_CLKREQ_WLAN# AT8 CLKOUT_PCIE_P2 E37 XTAL24_IN CLK_REQ/Strap Pin(CLG)
GPP_B7/SRCCLKREQ2# XTAL24_IN E35 XTAL24_OUT
CLK_PCIE_LANN D40 XTAL24_OUT
[30] CLK_PCIE_LANN CLKOUT_PCIE_N3 +3V
LAN CLK_PCIE_LANP C40 E42 XCLK_BIASREF
[30] CLK_PCIE_LANP CLKOUT_PCIE_P3 XCLK_BIASREF
PCIE_CLKREQ_LAN# AT10
[30] PCIE_CLKREQ_LAN# GPP_B8/SRCCLKREQ3# AM18 RTC_X1 PCIE_CLKREQ_VGA# R150 10K_4
B40 RTCX1 AM20 RTC_X2
CLKOUT_PCIE_N4 RTCX2 TP103
A40 PCIE_CLKREQ_WLAN# R149 10K_4
PCIE_CLKREQ4# AU8 CLKOUT_PCIE_P4 AN18 SRTC_RST#
GPP_B9/SRCCLKREQ4# SRTCRST# AM16 RTC_RST# PCIE_CLKREQ_LAN# R161 10K_4
RTCRST# RTC_RST# [16]
E40
E38 CLKOUT_PCIE_N5 PCIE_CLKREQ_CR# R148 10K_4
PCIE_CLKREQ5# AU7 CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5# TBT PCIE_CLKREQ5# R158 10K_4
*SKL_ULT 10 OF 20
REV = 1 ?
C U17I
SKL_ULT ? Need apply PN C
CSI-2
A36 C37
B36 CSI2_DN0 CSI2_CLKN0 D37
C38 CSI2_DP0 CSI2_CLKP0 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
A38 CSI2_DP2 CSI2_CLKP2 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
CSI2_DP3 CSI2_CLKP3
C31 E13 R82 100/F_4
D31 CSI2_DN4 CSI2_COMP B7 GPP_D4
CSI2_DP4 GPP_D4/FLASHTRIG TP36
C33
D33 CSI2_DN5
A31 CSI2_DP5 EMMC
B31 CSI2_DN6 AP2 GPP_F13
A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1 TP93
GPP_F14
CSI2_DN7 GPP_F14/EMMC_DATA1 TP94
B33 AP3 GPP_F15
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3 TP96
GPP_F16
GPP_F16/EMMC_DATA3 TP91
A29 AN1 GPP_F17
CSI2_DN8 GPP_F17/EMMC_DATA4 TP90
B29 AN2 GPP_F18
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4 TP89
GPP_F19
CSI2_DN9 GPP_F19/EMMC_DATA6 TP92
D28 AM1 GPP_F20
A27 CSI2_DP9 GPP_F20/EMMC_DATA7 TP88
B27 CSI2_DN10 AM2 EMMC_RCLK
CSI2_DP10 GPP_F21/EMMC_RCLK TP86
C27 AM3 EMMC_CLK
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4 TP83
EMMC_CMD
CSI2_DP11 PDC GPP_F12/EMMC_CMD TP95
AT1 EMMC_RCOMP R455 200/F_4
EMMC_RCOMP
*SKL_ULT 9 OF 20
REV = 1 ?
B B
RTC Clock 32.768KHz RTC Circuitry(RTC) External Crystal and Green Clock
The 24 MHz (50 Ohm ESR) XTAL used for Skylake-U needs to be
replaced by 38.4 MHz (30 Ohm ESR) XTAL for Cannonlake-U.
1
2
Y4
32.768KHZ R486 +3V_RTC_0 C506 0513 Y2 change to 20pF R399
3
3
4
R362 SRTC_RST# 2
EC_RTC_RST [35]
+3V_RTC_0 1K_4 +3V_RTC_1 XTAL24_OUT C559 10P/50V_4
D11
BAT54CW-7-F Q31 TP34
1
BAT-23_2-4_2
RTC_RST# R359 *0_6 SRTC_RST#
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
13 -- SKYPAKE 17/20 (CLK)
NB5 Date: Wednesday, May 13, 2015 Sheet 13 of 49
5 4 3 2 1
5 4 3 2 1
14
+3V [2,4,10,11,12,13,15,16,17,18,27,28,29,30,31,32,33,34,35,41,43]
+3V_DEEP_SUS [4,10,11,12,15,16,18]
6 OF 20
*SKL_ULT
REV = 1 ?
HDA Bus(CLG)
[4,10,11,12,14,16,18]
[9,13,16,39,40]
+3V_DEEP_SUS
+1.0V_DEEP_SUS
[9,39,46] +1.8V_DEEP_SUS
[4,13,32] +3V_RTC
[4,10,16,32,34,35,37,39,40,43,44,46] +3VS5
15
D ? D
U17O
SKL_ULT
Need apply PN
CPU POWER 4 OF 4
+VCCPRIM AB19
C158 1U/6.3V_4 AB20 VCCPRIM_1P0 AK15 +VCCPGPPA
P18 VCCPRIM_1P0 VCCPGPPA AG15 +VCCPGPPB
VCCPRIM_1P0 2.899A VCCPGPPB +3V_DEEP_SUS
Y16 +VCCPGPPC
AF18 VCCPGPPC Y15 +VCCPGPPD
+1.0V_DEEP_SUS VCCPRIM_CORE VCCPGPPD
C153 1U/6.3V_4 AF19 T16 +VCCPGPPE
V20 VCCPRIM_CORE VCCPGPPE AF16 +VCCPGPPF +VCCPGPPA R138 *0_6/S
VCCPRIM_CORE 2.57A VCCPGPPF
V21 AD15 +VCCPGPPG
VCCPRIM_CORE VCCPGPPG +VCCPGPPB
C820 and C690 close to cpu less then 100 mils C201 1U/6.3V_4 R127 *0_6/S
AL1 V19
PCH Internal VRM +VCCDSW_1.0V
C581 1U/6.3V_4 DCPDSW _1P0 VCCPRIM_3P3_V19 +3V_DEEP_SUS
+VCCPGPPC R114 *0_6/S
K17 T1 +VCCPRIM_1.0V_T1 R134 *0_6/S
VCCMPHYAON_1P0 VCCPRIM_1P0_T1 +1.0V_DEEP_SUS
R429 *0_6/S +VCCMPHYAON_1P0 L1 +VCCPGPPD R118 *0_6/S
+1.0V_DEEP_SUS VCCMPHYAON_1P0
C146 1U/6.3V_4 AA1 +VCCATS_1.8V R450 *0_6/S
VCCATS_1P8 +1.8V_DEEP_SUS
N15 +VCCPGPPE R110 *0_6/S
N16 VCCMPHYGT_1P0_N15 AK17 +VCCRTCPRIM_3.3V R130 *0_6/S
VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3 +3V_DEEP_SUS
N17 1.714A +VCCPGPPG R122 *0_6/S
+1.0V_DEEP_SUS VCCMPHYGT_1P0_N17
C84 1U/6.3V_4 P15 AK19
VCCMPHYGT_1P0_P15 VCCRTC_AK19 +3V_RTC
C62 47U/6.3VS_8 P16 BB14 0423 change to shortpad 0423 change to shortpad
VCCMPHYGT_1P0_P16 VCCRTC_BB14
R69 *0_6/S +VCCAMPHYPLL_1P0 K15 BB10 DCPRTC C239 0.1U/16V_4 +1.0V_DEEP_SUS +1.8V_DEEP_SUS
+1.0V_DEEP_SUS VCCAMPHYPLL_1P0 DCPRTC
C65 1U/6.3V_4 L15
VCCAMPHYPLL_1P0 A14 +VCCCLK1 R79 *0_6/S
R71 *0_6/S +VCCAPLL_1.0V V15 VCCCLK1 +VCCPGPPF R449 *0_6/S
+1.0V_DEEP_SUS VCCAPLL_1P0 0.03A
K19 +VCCCLK2 R53 *0_6/S
+VCCPRIM AB17 VCCCLK2
+1.0V_DEEP_SUS R113 *0_6/S
VCCPRIM_1P0_AB17 0423 change to shortpad
C Y18 L21 +VCCCLK3 R57 *0_6/S C
VCCPRIM_1P0_Y18 VCCCLK3
0423 change to shortpad
R190 *0_4/S AD17 N20 +VCCCLK4 R76 *0_6/S
+3VS5 VCCDSW _3P3_AD17 VCCCLK4
C171 1U/6.3V_4 AD18 0.09A
AJ17 VCCDSW _3P3_AD18 L19 +VCCCLK5 R77 *0_6/S
C274 1U/6.3V_4 VCCDSW _3P3_AJ17 VCCCLK5
AJ19 A10 +VCCCLK6 R70 *0_6/S
+V3.3DX_1.5DX_ADO VCCHDA VCCCLK6 C97 1U/6.3V_4
R175 *0_6/S +VCCSPI AJ16 AN11 CORE_VID0
+3V_DEEP_SUS VCCSPI GPP_B0/CORE_VID0 TP18
AN13 CORE_VID1
AF20 GPP_B1/CORE_VID1 TP11
R115 *0_6/S +VCCSRAM_1.0V AF21 VCCSRAM_1P0
+1.0V_DEEP_SUS VCCSRAM_1P0
C116 1U/6.3V_4 T19
T20 VCCSRAM_1P0
0423 change to shortpad VCCSRAM_1P0
R174 *0_6/S +VCCPRIM_3.3V AJ21
+3V_DEEP_SUS VCCPRIM_3P3_AJ21
R435 *0_6/S +VCCPRIM_1.0V AK20
+1.0V_DEEP_SUS VCCPRIM_1P0_AK20
R78 *0_6/S +VCCAPLLEBB N18
+1.0V_DEEP_SUS VCCAPLLEBB
C139 1U/6.3V_4
15 OF 20
*SKL_ULT
REV = 1 ?
+VCCATS_1.8V +3V_RTC +VCCRTCPRIM_3.3V
+V3.3DX_1.5DX_ADO +1.0V_DEEP_SUS
R93 C104
100K_4 1U/6.3V_4
U5 +VCCPGPPB +VCCPGPPC +VCCPGPPE
5 1
IN OUT
4 2
IN GND C164 C144 C128
3 C106 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
[35,39,40] SLP_SUS_ON ON/OFF 0.1U/16V_4
G5243AT11U
C105
*10P/50V_4
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
15 -- SKYPAKE 20/20(PCH POWER)
NB5 Date: Wednesday, May 13, 2015 Sheet 15 of 49
5 4 3 2 1
5 4 3 2 1
16
+1.0V_DEEP_SUS
CN2 TP50
1 51
[12] XDP_PREQ#_CPU 1 51
2 50
[12] XDP_PRDY#_CPU 2 50
R432 1K_4 3 49
[9] CFG0 3 49 XDP_BPM0 [2]
4 48
[9] CFG1 4 48 XDP_BPM1 [2]
5 47
[9] CFG2 5 47 CFG17 [9]
R420 1K_4 6 46
[9] CFG3 6 46 CFG16 [9]
D 7 45 D
[9] CFG4 7 45 CFG8 [9]
8 44
[9] CFG5 8 44 CFG9 [9]
9 43
[9] CFG6 9 43 CFG10 [9]
10 42
[9] CFG7 10 42 CFG11 [9]
11 41
[16] ON/OFFBTN_KBC# 11 41 CFG19 [9]
CFG0 R428 1K_4 PW R_DEBUG 12 40
12 40 CFG18 [9]
13 39
[13] CK_XDP_P 13 39 CFG12 [9]
14 38
[13] CK_XDP_N 14 38 CFG13 [9]
XDP_DBRESET_N 15 37
15 37 CFG14 [9]
R84 *0_4/S SMB_RUN_DAT_XDP 16 36
[10,17,18,27,31] SMB_RUN_DAT 16 36 CFG15 [9]
R83 *0_4/S SMB_RUN_CLK_XDP 17 35
[10,17,18,27,31] SMB_RUN_CLK 17 35 EC_PW ROK [4,35]
XDP_TDO 18 34 XDP_TCK1
XDP_TRST# 19 18 34 33 SYS_PW ROK
0423 change to shortpad 19 33
XDP_TDI 20 32 XDP_RST
XDP_TMS 21 20 32 31
XDP_TCK0 22 21 31 30
[2] XDP_TCK0 22 30
23 29
24 23 29 28
25 24 28 27
26 25 27
52
53
26 *FH26W -51S-0.3SHW (05)
52
53
+VCCIO
1125 change R81 connection
from +1.0V to +VCCIO
C +1.0V_DEEP_SUS C
XDP_DBRESET_N R80 1K_4 +3V SYS_PW ROK R104 *1K_4 +3V_DEEP_SUS R81
150/F_4
C103 C132
0.1U/16V_4 0.1U/16V_4 C100 C101 PW R_DEBUG
0.1U/16V_4 0.1U/16V_4
+3V
R86
*10K_4
+3V_DEEP_SUS
+3VS5
C99
APS 0.1U/16V_4
CN3 U4
1 14
1 2 VCC
2 SUSB# [4,16,35]
3 +3VS5 XDP_TDO 2 3 XDP_TDO_CPU [2]
3 4 1A 1B
4 SLP_S5# [4]
5 SUSC# [4,35] [4,35,37,38,39] HW PG 1
5 6 1OE
6 SLP_A# [4]
7 XDP_TDI 5 6
7 2A 2B XDP_TDI_CPU [2]
8
8 9 4
9 RTC_RST# [13] 2OE
10
10 11 XDP_TMS 9 8
B 11 ON/OFFBTN_KBC# [16] 3A 3B XDP_TMS_CPU [2] B
12
12 13 10
13 SYS_RESET# [4] 3OE
14
14 15 R202 *0_4 XDP_TRST# 12 11
15 PCH_SLP_S0_N [4,35] 4A 4B XDP_TRST#_CPU [2]
16
16 17 13
17 18 4OE 15
18 SUSB# [4,16,35] DPAD
*ACES_88511-180N 7 +1.0V
GND
*SN74CBTLV3126RGYR R417 51_4
XDP_TCK1
[2] JTAG_TCK_PCH
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
16 -- HSW XDP & APS 1A
NB5 Date: Wednesday, May 13, 2015 Sheet 16 of 49
5 4 3 2 1
5 4 3 2 1
[3] M_A_A[15:0]
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
95
JDIM2A
A0
A1
A2
DQ0 7
5
DQ1 15
DQ2 17
M_A_DQ4
M_A_DQ0
M_A_DQ7
M_A_DQ3
M_A_DQ[63:0] [3]
2.48A +1.35VSUS
75
76
81
JDIM2B
VDD1
VDD2
VSS16
VSS17
44
48
49
17
M_A_A4 92 A3 DQ3 4 M_A_DQ1 82 VDD3 VSS18 54
M_A_A5 91 A4 DQ4 6 M_A_DQ5 87 VDD4 VSS19 55
M_A_A6 90 A5 DQ5 16 M_A_DQ2 88 VDD5 VSS20 60
M_A_A7 86 A6 DQ6 18 M_A_DQ6 93 VDD6 VSS21 61
M_A_A8 89 A7 DQ7 21 M_A_DQ9 94 VDD7 VSS22 65
M_A_A9 85 A8 DQ8 23 M_A_DQ12 99 VDD8 VSS23 66
D M_A_A10 107 A9 DQ9 33 M_A_DQ10 100 VDD9 VSS24 71 D
M_A_A11 84 A10/AP DQ10 35 M_A_DQ14 105 VDD10 VSS25 72
M_A_A12 83 A11 DQ11 22 M_A_DQ8 106 VDD11 VSS26 127
(204P)
[3] M_A_DIM0_ODT0 ODT0 DQ36 132 VSS3 VSS51
120 M_A_DQ36 9 196
[3] M_A_DIM0_ODT1 ODT1 DQ37 140 VSS4 VSS52
M_A_DQ34 13
11 DQ38 142 M_A_DQ39 14 VSS5
C 28 DM0 DQ39 147 M_A_DQ40 19 VSS6 C
46 DM1 DQ40 149 M_A_DQ43 20 VSS7
(204P)
63 DM2 DQ41 157 M_A_DQ41 25 VSS8
136 DM3 DQ42 159 M_A_DQ47 26 VSS9 203
DM4 DQ43 146 VSS10 VTT1 +0.65V_DDR_VTT
153 M_A_DQ45 31 204
170 DM5 DQ44 148 M_A_DQ44 32 VSS11 VTT2
187 DM6 DQ45 158 M_A_DQ42 37 VSS12 205
DM7 DQ46 160 M_A_DQ46 38 VSS13 GND 206
[3] M_A_DQSP[7:0] DQ47 163 VSS14 GND
M_A_DQSP0 12 M_A_DQ53 43
M_A_DQSP1 29 DQS0 DQ48 165 M_A_DQ52 VSS15
M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ55
M_A_DQSP3 64 DQS2 DQ50 177 M_A_DQ50 DDR3-DIMM0_H=4.0_STD
M_A_DQSP4 137 DQS3 DQ51 164 M_A_DQ49 ddr-ddrsk-20401-tp4b-204p-smt
M_A_DQSP5 154 DQS4 DQ52 166 M_A_DQ48 DGMK4000324
M_A_DQSP6 171 DQS5 DQ53 174 M_A_DQ54 SOCKET DDR3 SODIMM(204P,H4.0,STD)TOP BSQ
M_A_DQSP7 188 DQS6 DQ54 176 M_A_DQ51
[3] M_A_DQSN[7:0] 10 DQS7 DQ55 181
M_A_DQSN0 M_A_DQ56
M_A_DQSN1 27 DQS#0 DQ56 183 M_A_DQ60
M_A_DQSN2 45 DQS#1 DQ57 191 M_A_DQ59
M_A_DQSN3 62 DQS#2 DQ58 193 M_A_DQ63
M_A_DQSN4 135 DQS#3 DQ59 180 M_A_DQ57
CPU Bracket M_A_DQSN5
M_A_DQSN6
152
169
DQS#4
DQS#5
DQ60 182
DQ61 192
M_A_DQ61
M_A_DQ62
M_A_DQSN7 186 DQS#6 DQ62 194 M_A_DQ58
DQS#7 DQ63
EZIW
DDR3-DIMM0_H=4.0_STD [2,4,10,11,12,13,14,15,16,18,27,28,29,30,31,32,33,34,35,41,43] +3V
ddr-ddrsk-20401-tp4b-204p-smt [3,6,18,38,40] +1.35VSUS
DGMK4000324 [18,38] +0.65V_DDR_VTT
SOCKET DDR3 SODIMM(204P,H4.0,STD)TOP BSQ [18] +SMDDR_VREF_DIMM
B B
EC51 *120P/50V_4 EC50 *120P/50V_4 C433 1U/6.3V_4 C429 1U/6.3V_4 SMDDR_VREF_DQ0_M3 R281 2/F_6 SMDDR_VREF_DQ0_M1
[3] SMDDR_VREF_DQ0_M3
1
EC49 *120P/50V_4 EC48 *120P/50V_4 C434 1U/6.3V_4 C418 1U/6.3V_4
C411 +1.35VSUS
EC37 120P/50V_4 EC40 *0.1U/16V_4 C435 1U/6.3V_4 C416 1U/6.3V_4 0.022U/25V_4 R287
2
R282 24.9/F_4 1.8K/F_4
EC44 *120P/50V_4 EC42 *0.1U/16V_4 C425 1U/6.3V_4
R292
EC47 *120P/50V_4 EC43 *0.1U/16V_4 C423 1U/6.3V_4 1.8K/F_4
+SMDDR_VREF_DIMM
EC46 *120P/50V_4 EC41 *0.1U/16V_4 C421 1U/6.3V_4 [3] SM_VREF R293 2/F_6 +SMDDR_VREF_DIMM
C443 *0.1U/16V_4
1
C442 10U/6.3V_6 C431 *2.2U/6.3V_6 C437
+0.65V_DDR_VTT 0.022U/25V_4 R295
C441 10U/6.3V_6 1.8K/F_4
2
EC39 *120P/50V_4 +SMDDR_VREF_DQ0
A C420 10U/6.3V_6 R294 24.9/F_4 A
EC38 *120P/50V_4 C428 *0.1U/16V_4
C419 10U/6.3V_6
C427 *2.2U/6.3V_6
C424 10U/6.3V_6
[3] M_B_A[15:0]
M_B_A0
M_B_A1
M_B_A2
98
97
96
JDIM1A
A0
A1
DQ0
DQ1
5
7
15
M_B_DQ12
M_B_DQ8
M_B_DQ11
M_B_DQ[63:0] [3]
2.48A
+1.35VSUS
75
76
81
JDIM1B
VDD1
VDD2
VSS16
VSS17
44
48
49
18
M_B_A3 95 A2 DQ2 17 M_B_DQ10 82 VDD3 VSS18 54
M_B_A4 92 A3 DQ3 4 M_B_DQ9 87 VDD4 VSS19 55
M_B_A5 91 A4 DQ4 6 M_B_DQ13 88 VDD5 VSS20 60
M_B_A6 90 A5 DQ5 16 M_B_DQ15 93 VDD6 VSS21 61
M_B_A7 86 A6 DQ6 18 M_B_DQ14 94 VDD7 VSS22 65
M_B_A8 89 A7 DQ7 21 M_B_DQ4 99 VDD8 VSS23 66
D M_B_A9 85 A8 DQ8 23 M_B_DQ0 100 VDD9 VSS24 71 D
M_B_A10 107 A9 DQ9 33 M_B_DQ3 105 VDD10 VSS25 72
M_B_A11 84 A10/AP DQ10 35 M_B_DQ6 106 VDD11 VSS26 127
A11 DQ11 VDD12 VSS27
(204P)
[3] M_B_DIM0_ODT0 ODT0 DQ36 VSS4 VSS52
M_B_ODT1 120 132 M_B_DQ33 13
[3] M_B_DIM0_ODT1 ODT1 DQ37 VSS5
140 M_B_DQ34 14
C 11 DQ38 142 M_B_DQ38 19 VSS6 C
28 DM0 DQ39 147 M_B_DQ44 20 VSS7 203
DM1 DQ40 VSS8 VTT1 +0.65V_DDR_VTT
46 149 M_B_DQ41 25 204
63 DM2 DQ41 157 M_B_DQ42 26 VSS9 VTT2
(204P)
136 DM3 DQ42 159 M_B_DQ43 31 VSS10 205
153 DM4 DQ43 146 M_B_DQ45 32 VSS11 HOLE1 206
170 DM5 DQ44 148 M_B_DQ40 37 VSS12 HOLE2
187 DM6 DQ45 158 M_B_DQ46 38 VSS13 207
DM7 DQ46 160 M_B_DQ47 43 VSS14 PAD1 208
[3] M_B_DQSP[7:0] 12 DQ47 163 VSS15 PAD2
M_B_DQSP1 M_B_DQ48
M_B_DQSP0 29 DQS0 DQ48 165 M_B_DQ52
M_B_DQSP2 47 DQS1 DQ49 175 M_B_DQ55 DDR3-DIMM1_H=4.0_RVS
M_B_DQSP3 64 DQS2 DQ50 177 M_B_DQ54 ddr-ddrrk-20401-tp4b-204p-smt
M_B_DQSP4 137 DQS3 DQ51 164 M_B_DQ49 DGMK4000262
M_B_DQSP5 154 DQS4 DQ52 166 M_B_DQ53
M_B_DQSP6 171 DQS5 DQ53 174 M_B_DQ50
M_B_DQSP7 188 DQS6 DQ54 176 M_B_DQ51
[3] M_B_DQSN[7:0] 10 DQS7 DQ55 181
M_B_DQSN1 M_B_DQ57
M_B_DQSN0 27 DQS#0
DQS#1
DQ56
DQ57
183 M_B_DQ56 Local Thermal Sensor
M_B_DQSN2 45 191 M_B_DQ58
M_B_DQSN3 62 DQS#2 DQ58 193 M_B_DQ62 U12 C448 *0.01U/50V_4
M_B_DQSN4 135 DQS#3 DQ59 180 M_B_DQ61
M_B_DQSN5 152 DQS#4 DQ60 182 M_B_DQ60 MBCLK2 8 1
DQS#5 DQ61 [10,27,35] MBCLK2 SCLK VCC +3V
M_B_DQSN6 169 192 M_B_DQ59
M_B_DQSN7 186 DQS#6 DQ62 194 M_B_DQ63
[10,27,35] MBDATA2
MBDATA2 7 2 DDR_THERMDA DDR3 Thermal Sensor
DQS#7 DQ63 SDA DXP
3
PM_EXTTS#0 6 3
DDR3-DIMM1_H=4.0_RVS ALERT# DXN C452 2 Q21
ddr-ddrrk-20401-tp4b-204p-smt R313 *10K/F_4 4 5 *2200P/50V_4 *METR3904-G
+3V OVERT# GND
DGMK4000262
1
B DDR_THERMDC B
2nd:AL000781012 G781P8(98h)
3nd:AL000431014 TMP431ADGKR(98h)
1
C380 1U/6.3V_4
R213 R209 R251 C391 1U/6.3V_4 C375
*47K/F_4 *47K/F_4 *47K/F_4 C378 1U/6.3V_4 +SMDDR_VREF_DQ1 0.022U/25V_4 R264
2
C396 1U/6.3V_4 1.8K/F_4
C401 1U/6.3V_4 C359 *0.1U/16V_4
C409 10U/6.3V_6 R266
2
T30 U24
R31 NC#T30 NC#U24 U23
NC#R31 NC#U23 AF17 AE10
NC_UPHYAB_DP_CALR NC#AE10
R29 T26
P28 NC#R29 NC#T26 T27
NC#P28 NC#T27 Meso_S3
P30 T24
N31 NC#P30 NC#T24 T23
NC#N31 NC#T23
N29 P27
M28 NC#N29 NC#P27 P26
NC#M28 NC#P26
M30 P24
L31 NC#M30 NC#P24 P23
NC#L31 NC#P23
L29 M27
K30 NC#L29 NC#M27 N26
NC#K30 NC#N26
12/10:reserve for verify
CLOCK
CLK_GFX_P AK30 +3V_VGA
[13] CLK_GFX_P CLK_GFX_N AK32 PCIE_REFCLKP
[13] CLK_GFX_N PCIE_REFCLKN
CALIBRATION
Y22 SUN_PCIE_CALRP R448 1.69K/F_4
PCIE_CALR_TX +1.0V_VGA
R233 1K_4 TEST_PG N10 AA22 SUN_PCIE_CALRN R447 1K/F_4 R460
TEST_PG PCIE_CALR_RX
1K/F_4
PEGX_RST# AL27
PERSTB PLTRST# 2
Meso_S3 3 PEGX_RST#
+3V_VGA
DGPU_HIN_RST# 1
D13
BAT54AW-L
[20,22,46] +3V_VGA
C591 [20,22,32,44,46] +1.8V_VGA
U18 *0.1U/16V_4 [22,46] +1.0V_VGA
C587 *0.1U/16V_4 *MC74VHC1G08DFT2G
5
2
[4,16,30,32,34,35] PLTRST#
4 PEGX_RST#
1 PEGX_RST# [20]
[12] DGPU_HOLD_RST# R470 *0_4/S DGPU_HIN_RST#
R459
3
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
1A
NB5 MESO_S3 PCIE/DP power
Date: Wednesday, May 13, 2015 Sheet 19of 49
Pure UMA can remove
VGA_REQ
D15
10/6 : FAE request reserve
PCIE_CLKREQ_VGA#
PCIE_CLKREQ_VGA# [13]
U19B
+1.8V_VGA +1.8V_VGA
10/1 : Gen 3 support or not
Carrizo : PU 8.45K ; PD 2K
Carrizo-L : PU NC ; PD 4.75K
20
3
RB500V-40 AF2 R480 R488
NC#AF2 AF4 8.45K/F_4 8.45K/F_4
R156
2 Q12
DVO NC#AF4 Beema : PU NC ; PD 4.75K
[12,44,46] DGPU_PWR_EN
30K/F_4 DRC5144E0L N9 AG3 PS_0 PS_1
DBG_DATA16 NC#AG3
3
R511 L9 DPA AG5
2 Q38 AE9 DBG_DATA15 NC#AG5
[12,35,44,46] DGPU_PWROK
1
C224 *METR3904-G Y11 DBG_DATA14 AH3 C597
0.47U/6.3V_4 *10K/F_4 AE8 DBG_DATA13 NC#AH3 AH1 R476 R484 C599
*0.01U/50V_4
1
AD9 DBG_DATA12 NC#AH1 2K/F_4 2K/F_4 *0.082U/16V_4
AC10 DBG_DATA11 AK3
AD7 DBG_DATA10 NC#AK3 AK1
AC8 DBG_DATA9 NC#AK1
AC7 DBG_DATA8 AK5
AB9 DBG_DATA7 NC#AK5 AM3 +1.8V_VGA +1.8V_VGA
AB8 DBG_DATA6 NC#AM3
AB7 DBG_DATA5 AK6
AB4 DBG_DATA4 NC#AK6 AM5
AB2 DBG_DATA3 NC#AM5
10/2 : remove TP for no use Y8 DBG_DATA2 DPB
AJ7 R496 R445
+3V_VGA Y7 DBG_DATA1 NC#AJ7 AH6 *0_4 4.53K/F_4
Thermal Solution(Close to GPU) DBG_DATA0 NC#AH6
AK8 PS_2 PS_3
C350 *0.01U/50V_4 NC#AK8 AL7
NC#AL7
R253 U9
BIT5 => BIT0
9/2: modify to +3V_VGA W6 R490 C603 R446 C582
10K/F_4
NC#W6 DPC
DGPUT_CLK 8 1 +3V_VGA +1.8V_VGA V6 4.75K/F_4 *0.68U/4V_4 2K/F_4 *0.01U/50V_4 PS0 => 11001
SCLK VCC NC#V6 V4
DGPUT_DATA 7 2 GPU_THERMDA NC#V4 U5
SDA DXP AC5 NC#U5
VGA_ALERT R256 *0_4 VGA_ALERT_R 6 3 AC6 NC#AC5 PS1 => 11001
ALERT# DXN C347
9/11: follow CRB change to 10K N#CAC6 V2
R248 *10K/F_4 4 5 *2200P/50V_4 NC#V2
+3V_VGA OVERT# GND R521 R520 Y4
PS2 => 11000
GPU_THERMDC 10K_4 10K_4 AA5 NC#Y4 W5
[35] DGPU_OVT# NC#AA5 NC#W5
*G781-1P8 AA6
NC#AA6 PS3 => 11000
Y2
NC#Y2 J8
Main:AL000781039 G781-1P8(9Ah) U1 NC#J8
TP115 NC#U1/BP_0 AA1
+3V_VGA NC#AA1/PLL_ANALOG_IN TP111
U3 AA3 R517 16.2K/F_4
TP114 NC#U3/BP_1 NC#AA3/PLL_ANALOG_OUT
Y6
R237 10K/F_4 GPU_AC_BATT R238 *10K/F_4 NC#Y6
2
GPU_GPIO6 T8
T7 PCC/GPIO_6 AH26 *4.7K_4 Q36
NC_GPIO_7 DAC1 NC_HSYNC
GPIO8_ROMSO P10 AJ27 1 3
TP30 GPIO_8_ROMSO NC_VSYNC/WAKEb TP106
GPIO9_ROMSI P4 *2N7002K
R527 10K/F_4 TP26 GPIO_9_ROMSI
TEMP_FAIL D14 GPIO10_ROMSCK P2
TP31 GPIO_10_ROMSCK
N6 AD22 9/4: follow CRB design by FAE
TP27 NC_GPIO_11 NC_RSET
GPU_AC_BATT N5 R464
[4,35] AC_PRESENT_EC TP116 NC_GPIO_12
N3 AG24 4.7K_4
TP112 NC_GPIO_13 NC_AVDD AE22
*RB500V-40 N1 NC_AVSSQ
M4 GPIO_15_PWRCNTL_0 AE23
AMD recommend 0423 change to shortpad GPIO_16 NC_VDD1DI
VGA_ALERT R6 AD23
GPIO_17_THERMAL_INT NC_VSS1DI
R214 *0_4/S TEMP_FAIL M2 0423 change to shortpad
P8 GPIO_19_CTF AM12
P7 GPIO_20_PWRCNTL_1 NC
Q17A *2N7002KDW GPIO22_ROMCS N8 GPIO_21 GPU_SVD R507 *0_4/S
TP32 GPIO_22_ROMCSB SVI2_DATA [44]
R498 *0_4 DGPU_PROCHOT#_R AK10 AK12 GPU_SVD
GPUT_DATA
Dual 3 4 DGPUT_DATA
[35] DGPU_PROCHOT#
AM10 GPIO_29 NC_SVI2#1/GPIO_SVD AL11 GPU_SVT GPU_SVC R510 *0_4/S
[35] GPUT_DATA TP110 GPIO_30 NC_SVI2#2/GPIO_SVT SVI2_CLK [44]
PCIE_REQ_GPU# N7 AJ11 GPU_SVC
DGPU_TRSTB L6 CLKREQB NC_SVI2#3/GPIO_SVC GPU_SVT R508 *0_4/S
TP120 JTAG_TRSTB SVI2_SVT [44]
R181 *0_4
PEGX_RST# [19]
5
DGPU_TDO K4
TP117 JTAG_TDO
TESTEN K7 DAC2
GPUT_CLK 6 1 DGPUT_CLK AF24 TESTEN AG13 R244
[35] GPUT_CLK NC#AF24 NC_SWAPLOCKA
Dual AH12 1K/F_4 10K/F_4
NC_SWAPLOCKB R236 R500 *10K/F_4 GPU_SVD R501 *10K/F_4
Q17B *2N7002KDW GPU_GPIO6
DGPU_OCP_L [44]
W8 R509 *10K/F_4 GPU_SVC R505 *10K/F_4
NC_GENERICB AC19 PS_0 C338
R221 *0_4/S W7 PS_0 R504 *10K/F_4 GPU_SVT R502 *10K/F_4
AD10 NC_GENERICD AD19 PS_1 0.1U/16V_4
AJ9 NC_GENERICE_HPD4 PS_1
+3V_VGA AL9 NC#AJ9 AE17 PS_2
0423 change to shortpad DBG_CNTL0 PS_2
AE20 PS_3 9/11: Add for SR Tool review result
PS_3
R243 C584 12P/50V_4 PX_EN AB16 AE19 R487 *0_4 Reserved. Do not connect on the PCB
TP109 PX_EN TS_A
*5.1K/F_4
EVGA-XTALI
AC16
NC_DBG_VREFG
2
1
TESTEN Y3
R454 DDC/AUX PS_3[3:1] Vendor Type Vendor P/N PU PD
1M_4 AE6
27MHZ +-10PPM PLL/CLOCK NC_DDC1CLK AE5 000 Hynix 256Mx16 *4, 900Mhz H5TC4G63CFR-N0C NC 4.75K
4
3
C263 AC3
NC_DDCVGADATA TP28
Q19 R5
1U/10V_4 +1.8V_TSVDD AD17 GPIO28_FDO
*2N7002K
TSVDD
For AMD tuning
TEMP_FAIL 2 AC17 timing purpose
TSVSS
1
PROJECT : X1A
R453 *0_4 EVGA-XTALI
Meso_S3 Quanta Computer Inc.
[32] CLK_27M_XTAL_IN
Size Document Number Rev
+1.8V_VGA [19,22,32,44,46]
1A
+1.0V_VGA [19,22,46]
NB5 MESO_S3_Main
Date: Wednesday, May 13, 2015 Sheet 20of 49
21
U19E
U19F
AA27 A3
AB24 PCIE_VSS#1 GND#1 A30 LVDS CONTROL
AB32 PCIE_VSS#2 GND#2 AA13 RECOMMENDED SETTINGS
AC24 PCIE_VSS#3 GND#3 AA16 0= DO NOT INSTALL RESISTOR
AC26 PCIE_VSS#4 GND#4 AB10 CONFIGURATION STRAPS-- SEE EACH DATABOOK FOR STRAP DETAILS 1 = INSTALL 3K RESISTOR
AC27 PCIE_VSS#5 GND#5 AB15 X = DESIGN DEPENDANT
AD25 PCIE_VSS#6 GND#6 AB6
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, NA = NOT APPLICABLE
AD32 PCIE_VSS#7 GND#7 AC9 AL15 THEY MUST NOT CONFLICT DURING RESET
AE27 PCIE_VSS#8 GND#8 AD6 NC_UPHYAB_TMDPA_TX0N AK14
AF32 PCIE_VSS#9 GND#9 AD8 NC_UPHYAB_TMDPA_TX0P
AG27 PCIE_VSS#10 GND#10 AE7 AH16 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS
AH32 PCIE_VSS#11 GND#11 AG12 NC_UPHYAB_TMDPA_TX1N AJ15
K28 PCIE_VSS#12 GND#12 AH10 NC_UPHYAB_TMDPA_TX1P
K32 PCIE_VSS#13 GND#13 AH28 AL17 TX_PW RS_ENB GPIO0 PCIE FULL TX OUTPUT SW ING
L27 PCIE_VSS#14 GND#14 B10 NC_UPHYAB_TMDPA_TX2N AK16
PCIE_VSS#15 GND#15 NC_UPHYAB_TMDPA_TX2P 0
M32 B12 TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED
N25 PCIE_VSS#16 GND#16 B14 AH18
PCIE_VSS#17 GND#17 NC_UPHYAB_TMDPA_TX3N X
N27 B16 AJ17
P25 PCIE_VSS#18 GND#18 B18 NC_UPHYAB_TMDPA_TX3P RSVD GPIO2 RESERVED 0
P32 PCIE_VSS#19 GND#19 B20 AL19 RSVD GPIO8 RESERVED 0
R27 PCIE_VSS#20 GND#20 B22 NC_TXOUT_L3P AK18
T25 PCIE_VSS#21 GND#21 B24 NC_TXOUT_L3N
T32 PCIE_VSS#22 GND#22 B26 BIF_VGA DIS GPIO9 VGA ENABLED 0
U25 PCIE_VSS#23 GND#23 B6 TMDP
U27 PCIE_VSS#24 GND#24 B8
V32 PCIE_VSS#25 GND#25 C1 AH20 RSVD GPIO21 RESERVED 0
W25 PCIE_VSS#26 GND#26 C32 NC_UPHYAB_TMDPB_TX0N AJ19
W26 PCIE_VSS#27 GND#27 E28 NC_UPHYAB_TMDPB_TX0P
W27 PCIE_VSS#28 GND#28 F10 AL21 BIOS_ROM_EN GPIO_22_ROMCSB ENABLE EXTERNAL BIOS ROM
PCIE_VSS#29 GND#29 NC_UPHYAB_TMDPB_TX1N 0
Y25 F12 AK20
Y32 PCIE_VSS#30 GND#30 F14 NC_UPHYAB_TMDPB_TX1P
PCIE_VSS#31 GND#31 F16 AH22 ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT 0 0 1
GND#32 F18 NC_UPHYAB_TMDPB_TX2N AJ21
GND#33 F2 NC_UPHYAB_TMDPB_TX2P
GND#34 F20 AL23 VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS (Removed on Seymour/W histler) 0
M6 GND#35 F22 NC_UPHYAB_TMDPB_TX3N AK22
N11 GND#56 GND#36 F24 NC_UPHYAB_TMDPB_TX3P
GND#57 GND#37 F26 AK24 RSVD H2SYNC RESERVED 0
N13 GND#38 F6 NC_TXOUT_U3P AJ23
N16 GND#58 GND#39 F8 NC_TXOUT_U3N
N18
N21
GND#59
GND#60
GND#61
GND GND#40
GND#41
GND#42
G10
G27
AUD[1]
AUD[0]
HSYNC
VSYNC
SEE DATABOOK FOR DETAIL
SEE DATABOOK FOR DETAIL
0
0
P6 G31
P9 GND#62 GND#43 G8 Meso_S3
R12 GND#63 GND#44 H14 RSVD GENERICC RESERVED 0
R15 GND#64 GND#45 H17
R17 GND#65 GND#46 H2
R20 GND#66 GND#47 H20
T13 GND#67 GND#48 H6
T16 GND#68 GND#49 J27
T18 GND#69
GND#70
GND#50
GND#51
J31 NOTE1: AMD RESERVED CONFIGURATION STRAPS
T21 K11
T6 GND#71 GND#52 K2
U15 GND#72 GND#53 K22
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL RESISTOR. IF THESE GPIOS ARE USED,
U17 GND#73 GND#54 K6 THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET.
U20 GND#74 GND#55 T11
U9 GND#75 GND#84 R11
V13 GND#76 GND#85 GPIO21 H2SYNC GENERICC GPIO8 GPIO2
V16 GND#77
V18 GND#78
Y10 GND#79
Y15 GND#80
Y17 GND#81 A32
Y20 GND#82 VSS_MECH#1 AM1
AA11 GND#83 VSS_MECH#2 AM32
M12 GND#86 VSS_MECH#3
V11 GND#87
GND#88
Meso_S3
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
1A
NB5 MESO_S3_GND/LVDS/Strap
Date: Wednesday, May 13, 2015 Sheet 21 of 49
22
U19D
PCIE_VDDR : 1.8V @ 100mA
MEM I/O AM30
PCIE_PVDD +1.8V_VGA
1.35V ( DDR3, MVDDQ = 1.35V@2A) PCIE
+1.35V_VGA H13 AB23
H16 VDDR1#1 NC#AB23 AC23 C241 C223
H19 VDDR1#2 NC#AC23 AD24 1U/10V_4 10U/6.3VS_6
C226 C256 C284 C245 C251 C266 J10 VDDR1#3 NC#AD24 AE24
10U/6.3VS_6 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 J23 VDDR1#4 NC#AE24 AE25
J24 VDDR1#5 NC#AE25 AE26
J9 VDDR1#6 NC#AE26 AF25
K10 VDDR1#7 NC#AF25 AG26
K23 VDDR1#8 NC#AG26
K24 VDDR1#9
K9 VDDR1#10 L23
C277 C233 L11 VDDR1#11 PCIE_VDDC#1 L24 +1.0V_VGA
0.1U/16V_4 0.01U/50V_4 L12 VDDR1#12 PCIE_VDDC#2 L25
VDDR1#13 PCIE_VDDC#3 PCIE_VDDC : 0.95V @ 2.5A (GEN3.0)
L13 L26
L20 VDDR1#14 PCIE_VDDC#4 M22
L21 VDDR1#15 PCIE_VDDC#5 N22
L22 VDDR1#16 PCIE_VDDC#6 N23 C199 C225 C234 C220 C232 C244 C246
VDDR1#17 PCIE_VDDC#7 N24 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3VS_6
PCIE_VDDC#8 R22
PCIE_VDDC#9 T22
LEVEL PCIE_VDDC#10 U22
+1.8V_VGA TRANSLATION PCIE_VDDC#11 V22
PCIE_VDDC#12 TDP=25W/TDC=36A/EDC=TDCx1.5=54A(1ms)/EDP=35W(sustained)/Peak=53W(1ms)
AA20 VDDC+VDDCI +VGA_CORE
AA21 VDD_CT#1
VDD_GPIO18 @13mA VDD_CT#2 0.85~1.1V(36A peak )( Ripple < 87.2mV)
AB20 AA15
AB21 VDD_CT#3 CORE VDDC#1 N15
C248 VDD_CT#4 VDDC#2 N17
1U/10V_4 +3V_VGA VDDC#3 R13 C252 C331 C298 C292 C318 C332 C283 C330
VDDC#4
POWER
I/O R16 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4
AA17 VDDC#5 R18
VDD_GPIO33@25mA VDDR3#1 VDDC#6
AA18 Y21
AB17 VDDR3#2 VDDC#7 T12
AB18 VDDR3#3 VDDC#8 T15
C259 VDDR3#4 VDDC#9 T17
1U/10V_4 V12 VDDC#10 T20
Y12 NC_VDDR4#1 VDDC#11 U13 C280 C250 C288 C294 C308 C296 C299 C311
U12 NC_VDDR4#2 VDDC#12 U16 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4 2.2U/6.3V_4
NC_VDDR4#3 VDDC#13 U18
VDDC#14 V21
VDDC#15 V15
VDDC#16 V17
VDDC#17 V20
VDDC#18 Y13
Memory Phase Lock Loop Power : VDDC#20
1
0423 change to shortpad 1.8V @ 90mA Y16
VDDC#21 Y18 +
L16 *BLM18PG181SN1D(180,1.5A)_S0_6/S MPV18 VDDC#22 AA12 C302 C290 C324 C326 C360 C327 C265
+1.8V_VGA VDDC#23 M11 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 10U/6.3VS_6 330U_2.5V_3528
2
VDDC#24 N12
C306 C341 C342 VDDC#25 U11
1U/10V_4 10U/6.3VS_6 10U/6.3VS_6 VDDC#26 AB11
VDDC/VARY_BL AB12
VDDC/DIGON AB13
VDDC/GENERICA W9
PLL VDDC/GENERICC AC11
Engine Phase Lock Loop Power : VDDC/DDC2CLK
analog power pin for engine PLL AC13
VDDC/DDC2DATA AC14
1.8V @ 75mA VDDC/HPD1 U10
L18 HCB1608KF-121T30(120+-25%,3A) SPV18 MPV18 L8 VDDC/GPIO_1 T10
+1.8V_VGA MPLL_PVDD VDDC/GPIO_2 W10
VDDC/GPIO_18 Y9
C383 C370 VDDC/GPIO_14_HPD2
1U/10V_4 10U/6.3VS_6 R21 0.95V~1.1V(0.8A)
SPV18 H7 BIF_VDDC_1 U21
SPLL_PVDD BIF_VDDC_2 +1.0V_VGA
Engine Phase Lock Loop Power :
digital power pin for engine PLL M13 0.95V~1.1V(5A VDDCI)
ISOLATED VDDCI#1 M15
0.95V @ 100mA CORE I/O VDDCI#2 M16
+VGA_CORE
L15 HCB1608KF-121T30(120+-25%,3A) +1.0V_VGA_SPV10 H8 VDDCI#3 M17
+1.0V_VGA SPLL_VDDC VDDCI#4 M18 C282 C301 C369 C307 C242 C325 C323
VDDCI#5 M20 0.1U/16V_4 0.1U/16V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3VS_610U/6.3VS_6
C339 C345 J7 VDDCI#6 M21
1U/10V_4 SPLL_PVSS VDDCI#7 N20
0.1U/16V_4 VDDCI#8
W1 R519 *0_4 +VGA_CORE
NC#W1/FB_VDDCI W3 R518 *0_4
NC#W3/FB_VSS
AC20 R184 *0_4/S
NC#FB_VDDC VGPU_CORE_SENSE [44]
AD20 R177 *0_4/S
NC#FB_VSS VSS_GPU_SENSE [44]
Meso_S3 0423 change to shortpad
+1.35V_VGA [23,24,44]
+1.8V_VGA [19,20,32,44,46]
+1.0V_VGA [19,46]
+VGA_CORE [44,45]
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
1A
NB5 MESO_S3 Power
Date: Wednesday, May 13, 2015 Sheet 22 of 49
[24]
[24]
VMA_ODT0
VMA_ODT1
VMA_ODT0
VMA_ODT1
VMA_DQ0 K27
U19C
K17 VMA_MA0
23
VMA_RAS0# VMA_DQ1 J29 DQA0_0 MAA0_0 J20 VMA_MA1
[24] VMA_RAS0# DQA0_1 MAA0_1
[24] VMA_RAS1# VMA_RAS1# VMA_DQ2 H30 H23 VMA_MA2
VMA_DQ3 H32 DQA0_2 MAA0_2 G23 VMA_MA3
VMA_CAS0# VMA_DQ4 G29 DQA0_3 MAA0_3 G24 VMA_MA4
[24] VMA_CAS0# DQA0_4 MAA0_4
[24] VMA_CAS1# VMA_CAS1# VMA_DQ5 F28 H24 VMA_MA5
From GPU
VMA_DQ6 F32 DQA0_5 MAA0_5 J19 VMA_MA6
VMA_W E0# VMA_DQ7 F30 DQA0_6 MAA0_6 K19 VMA_MA7
[24] VMA_W E0# DQA0_7 MAA0_7
[24] VMA_W E1# VMA_W E1# VMA_DQ8 C30 G20 VMA_MA13 25mm (max) 5mm (max) 25mm (max)
VMA_DQ9 F27 DQA0_8 MAA0_8 L17 VMA_MA15
VMA_CSA0#_0 VMA_DQ10 A28 DQA0_9 MAA0_9
MEMORY INTERFACE
[24] VMA_CSA0#_0 DQA0_10
VMA_DQ11 C28 J14 VMA_MA8 DRAM_RST_C R250 10/F_4 DRAM_RST_M [24]
VMA_CSA1#_0 VMA_DQ12 E27 DQA0_11 MAA1_0 K14 VMA_MA9 R247 51_4
[24] VMA_CSA1#_0 DQA0_12 MAA1_1
VMA_DQ13 G26 J11 VMA_MA10
VMA_CKE0 VMA_DQ14 D26 DQA0_13 MAA1_2 J13 VMA_MA11
[24] VMA_CKE0 DQA0_14 MAA1_3
[24] VMA_CKE1 VMA_CKE1 VMA_DQ15 F25 H11 VMA_MA12 R246 C352
VMA_DQ16 A25 DQA0_15 MAA1_4 G11 VMA_BA2
VMA_CLK0 VMA_DQ17 C25 DQA0_16 MAA1_5 J16 VMA_BA0 4.99K/F_4 120P/50V_4
[24] VMA_CLK0 DQA0_17 MAA1_6
[24] VMA_CLK0# VMA_CLK0# VMA_DQ18 E25 L15 VMA_BA1
VMA_DQ19 D24 DQA0_18 MAA1_7 G14 VMA_MA14
VMA_CLK1 VMA_DQ20 E23 DQA0_19 MMA1_8 L16
[24] VMA_CLK1 DQA0_20 MAA1_9
[24] VMA_CLK1# VMA_CLK1# VMA_DQ21 F23
VMA_DQ22 D22 DQA0_21 E32 VMA_DM0
VMA_W DQS[7..0] VMA_DQ23 F21 DQA0_22 WCKA0_0 E30 VMA_DM1
[24] VMA_W DQS[7..0] DQA0_23 WCKA0B_0
VMA_DQ24 E21 A21 VMA_DM2
VMA_RDQS[7..0] VMA_DQ25 D20 DQA0_24 WCKA0_1 C21 VMA_DM3
[24] VMA_RDQS[7..0] DQA0_25 WCKA0B_1 Place all these components very close to GPU (Within
VMA_DQ26 F19 E13 VMA_DM4
VMA_DM[7..0] VMA_DQ27 A19 DQA0_26 WCKA1_0 D12 VMA_DM5
25mm) and keep all component close to each Other (within
[24] VMA_DM[7..0] DQA0_27 WCKA1B_0 5mm) except Rser2
VMA_DQ28 D18 E3 VMA_DM6
VMA_DQ[63..0] VMA_DQ29 F17 DQA0_28 WCKA1_1 F4 VMA_DM7
[24] VMA_DQ[63..0] DQA0_29 WCKA1B_1
VMA_DQ30 A17 This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
VMA_MA[15..0] VMA_DQ31 C17 DQA0_30 H28 VMA_RDQS0
[24] VMA_MA[15..0] DQA0_31 EDCA0_0 Capacitors and Resistor values are an example only. The Series R and
VMA_DQ32 E17 C27 VMA_RDQS1 || Cap values will depend on the DRAM load and will have to be
VMA_DQ33 D16 DQA1_0 EDCA0_1 A23 VMA_RDQS2
DQA1_1 EDCA0_2 calculated for different Memory ,DRAM Load and board to pass Reset
VMA_BA0 VMA_DQ34 F15 E19 VMA_RDQS3
[24] VMA_BA0
A15 DQA1_2 EDCA0_3 E15
Signal Spec.
[24] VMA_BA1 VMA_BA1 VMA_DQ35 VMA_RDQS4
VMA_BA2 VMA_DQ36 D14 DQA1_3 EDCA1_0 D10 VMA_RDQS5
[24] VMA_BA2 DQA1_4 EDCA1_1
VMA_DQ37 F13 D6 VMA_RDQS6
VMA_DQ38 A13 DQA1_5 EDCA1_2 G5 VMA_RDQS7
VMA_DQ39 C13 DQA1_6 EDCA1_3
support 1Gbit DQA1_7
VRAM ( 64M X 16 ) VMA_DQ40 E11 H27 VMA_W DQS0
VMA_DQ41 A11 DQA1_8 DDBIA0_0 A27 VMA_W DQS1
VMA_DQ42 C11 DQA1_9 DDBIA0_1 C23 VMA_W DQS2
VMA_DQ43 F11 DQA1_10 DDBIA0_2 C19 VMA_W DQS3
VMA_DQ44 A9 DQA1_11 DDBIA0_3 C15 VMA_W DQS4
VMA_DQ45 C9 DQA1_12 DDBIA1_0 E9 VMA_W DQS5
VMA_DQ46 F9 DQA1_13 DDBIA1_1 C5 VMA_W DQS6
VMA_DQ47 D8 DQA1_14 DDBIA1_2 H4 VMA_W DQS7
VMA_DQ48 E7 DQA1_15 DDBIA1_3
VMA_DQ49 A7 DQA1_16 L18 VMA_ODT0
VMA_DQ50 C7 DQA1_17 ADBIAO K16 VMA_ODT1
VMA_DQ51 F7 DQA1_18 ADBIA1
VMA_DQ52 A5 DQA1_19 H26 VMA_CLK0
VMA_DQ53 E5 DQA1_20 CLKA0 H25 VMA_CLK0#
VMA_DQ54 C3 DQA1_21 CLKA0B
VMA_DQ55 E1 DQA1_22 G9 VMA_CLK1
VMA_DQ56 G7 DQA1_23 CLKA1 H9 VMA_CLK1#
+1.35V_VGA VMA_DQ57 G6 DQA1_24 CLKA1B
VMA_DQ58 G1 DQA1_25 G22 VMA_RAS0#
VMA_DQ59 G3 DQA1_26 RASA0B G17 VMA_RAS1#
VMA_DQ60 J6 DQA1_27 RASA1B
R119 VMA_DQ61 J1 DQA1_28 G19 VMA_CAS0#
VMA_DQ62 J3 DQA1_29 CASA0B G16 VMA_CAS1#
40.2/F_4 VMA_DQ63 J5 DQA1_30 CASA1B
DQA1_31 H22 VMA_CSA0#_0
MVREFD K26 CSA0B_0 J22
J26 MVREFDA CSA0B_1
+1.35V_VGA MVREFSA G13 VMA_CSA1#_0
J25 CSA1B_0 K13
C177 R125 Rd R133 120/F_4 K25 NC CSA1B_1
MEM_CALRP0 K20 VMA_CKE0
1U/10V_4 100/F_4 R124 CKEA0 J17 VMA_CKE1
CKEA1
40.2/F_4 G25 VMA_W E0#
DRAM_RST_C L10 WEA0B H10 VMA_W E1#
MVREFS DRAM_RST WEA1B
CLKTESTA K8
CLKTESTB L7 CLKTESTA
CLKTESTB
C187 R129
Meso_S3
1U/10V_4 100/F_4
C340 C349
*0.1U/16V_4 *0.1U/16V_4
R234 R239
*51.1/F_4 *51.1/F_4
VMA_MA[15..0]
24
[23] VMA_MA[15..0]
[23] VMA_DM[7..0]
[23] VMA_DQ[63..0]
[23] VMA_WDQS[7..0]
[23] VMA_RDQS[7..0] 1G/2G DDR3L
U6 U20 U8 U22
K1 A1 VMA_ODT0 K1 A1 K1 A1 VMA_ODT1 K1 A1
[23] VMA_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 [23] VMA_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
L2 A8 VMA_CSA0#_0 L2 A8 L2 A8 VMA_CSA1#_0 L2 A8
[23] VMA_CSA0#_0 J3 CS VDDQ#A8 C1 VMA_RAS0# J3 CS VDDQ#A8 C1 [23] VMA_CSA1#_0 J3 CS VDDQ#A8 C1 VMA_RAS1# J3 CS VDDQ#A8 C1
[23] VMA_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [23] VMA_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 VMA_CAS0# K3 C9 K3 C9 VMA_CAS1# K3 C9
[23] VMA_CAS0# L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2 [23] VMA_CAS1# L3 CAS VDDQ#C9 D2 L3 CAS VDDQ#C9 D2
VMA_WE0# VMA_WE1#
[23] VMA_WE0# WE VDDQ#D2 WE VDDQ#D2 [23] VMA_WE1# WE VDDQ#D2 WE VDDQ#D2
E9 E9 E9 E9
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
VMA_RDQS2 F3 VDDQ#F1 H2 VMA_RDQS0 F3 VDDQ#F1 H2 VMA_RDQS7 F3 VDDQ#F1 H2 VMA_RDQS6 F3 VDDQ#F1 H2
VMA_WDQS2 G3 DQSL VDDQ#H2 H9 VMA_WDQS0 G3 DQSL VDDQ#H2 H9 VMA_WDQS7 G3 DQSL VDDQ#H2 H9 VMA_WDQS6 G3 DQSL VDDQ#H2 H9
C DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 DQSL VDDQ#H9 C
R153
40.2/F_4 C642 C334 C643 C623 C329 C333 C644 C317 C621 C641 C328 C363 C619 C617 C315 C362 QBCON PN TOP BSQ
C214
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VMA_CLK0_COMM
Hynix 2G AKD5PZDTW02 AKD5PZDTW01
R154 0.01U/50V_4 +1.35V_VGA +1.35V_VGA
40.2/F_4
Micron 2G AKD5PZSTL01 AKD5PZSTL00
VMA_CLK0# 9/4: Dual Rank : 80.6 ohm SAMSUNG 2G AKD5PGDT501 AKD5PGDT500
A VMA_CLK1 C295 C316 C314 C364 C272 C616 C236 C609 C594 C606 C596 C608 C610 C595 C613 C612 A
Single Rank : 40.2 ohm 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
R257
25
D D
C C
B B
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom DDR3L - RANK1 1A
NB5 Date: Wednesday, May 13, 2015 Sheet 25 of 49
5 4 3 2 1
5 4 3 2 1
26
D D
C C
B B
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom DDR3L - RANK1 1A
NB5 Date: Wednesday, May 13, 2015 Sheet 26 of 49
5 4 3 2 1
5 4 3 2 1
+3.3V_2136_A
RTD2136S Power Up Sequence
27
Reserve for co layout EDP CON, EDP only please stuff +1.2V_2136
Pin 18: keep 80mil Trace
+3.3V_2136_D
R60 *100K/F_4
17
11
15
43
18
22
U3
5
HPD
DP_V12
DP_V33
SWR_LX
SWR_VCCK
VCCK
SWR_VDD
PVCC
EDP_HPD_2136 42
TXO0- TXLOUT0-_2136 [28]
41 <=100ms
1 TXO0+ 40 TXLOUT0+_2136 [28]
2 DP_HPD TXO1- 39 TXLOUT1-_2136 [28]
TESTMODE TXO1+ TXLOUT1+_2136 [28]
INT_eDP_AUXN C78 *0.1U/16V_4 INT_eDP_AUXN_2136 3 38
[2] INT_eDP_AUXN AUX-CH_N TXO2- TXLOUT2- [28]
INT_eDP_AUXP C79 *0.1U/16V_4 INT_eDP_AUXP_2136 4 37
[2] INT_eDP_AUXP AUX-CH_P TXO2+ TXLOUT2+ [28]
36
7 TXOC- 35 TXLCLKOUT- [28]
INT_eDP_TXP0 C72 *0.1U/16V_4 INT_eDP_TXP0_2136
[2] INT_eDP_TXP0 LANE0P TXOC+ TXLCLKOUT+ [28]
INT_eDP_TXN0 C73 *0.1U/16V_4 INT_eDP_TXN0_2136 8 34
[2] INT_eDP_TXN0 LANE0N TXO3-
INT_eDP_TXP1 C74 *0.1U/16V_4 INT_eDP_TXP1_2136 9 33
[2] INT_eDP_TXP1 LANE1P TXO3+
INT_eDP_TXN1 C75 *0.1U/16V_4 INT_eDP_TXN1_2136 10 32
[2] INT_eDP_TXN1 LANE1N TXE0- TXUOUT0- [28]
31
TXE0+ 30 TXUOUT0+ [28]
RTD2136R TXE1- TXUOUT1- [28]
SCL1_2136 13 29
CIICSCL1 TXE1+ TXUOUT1+ [28]
SDA1_2136 14 28
CIICSDA1 TXE2- 27 TXUOUT2- [28]
45 TXE2+ 26 TXUOUT2+ [28]
[28] EDIDDATA_2136 MIICSDA1 TXEC- TXUCLKOUT- [28]
46 25
[28] EDIDCLK_2136 MIICSCL1 TXEC+ TXUCLKOUT+ [28]
SDAT_2136 47 24
PANEL_VCC
[10,16,17,18,31] SMB_RUN_CLK R58 *0_4
SCLK_2136 48 MIICSDA0 TXE3- 23 +3V
DP_REXT
PWMOUT
[10,16,17,18,31] SMB_RUN_DAT MIICSCL0 TXE3+
DP_GND
R59 *0_4
PWMIN
C 49 44 2136_LVDS_BLON C
GND
NC BL_EN 2136_LVDS_BLON [28]
Reserve C102
*0.1U/16V_4
16
12
19
20
21
IC底底底底GND
2136_DISP_ON
2136_DISP_ON [28]
R43 2136_DPST_PWM
2136_DPST_PWM [28]
*12K/F_4
PCH_DPST_PWM For eDP, close to U3
R50 *0_4 SCL1_2136
[10,18,35] MBCLK2
R29 *100K/F_4 R28 0_4
[2] PCH_DPST_PWM EDP_DPST_PWM [28]
R51 *0_4 SDA1_2136
[10,18,35] MBDATA2
Use 1% Res on R32
Default(LVDS Only)
LVDS Only
ULT_EDP_HPD R42 *1K/F_4 EDP_HPD_2136
[2,28] ULT_EDP_HPD
B SDAT_2136 B
R36
*4.7K_4
[2,4,10,11,12,13,14,15,16,17,18,28,29,30,31,32,33,34,35,41,43] +3V
A A
42
0.047U/25V_4
0.047U/25V_4
OUT_LVDS_BLON R41 1K/F_4 [27] EDIDDATA_2136 EDIDDATA R31 *4.7K_4 EDIDDATA 0423 change to shortpad
EDIDCLK 40
[27] EDIDCLK_2136 39
R363 *0_6/S
OUT_LVDS_BLON R49 100K/F_4 RF C50 C51
+3V
EDIDCLK_R 38
2
*10P/50V_4 *10P/50V_4 C512 EDIDDATA_R 37
TXLOUT0- 36
TXLOUT0+ 35
C510
C511
1000P/50V_4
1
OUT_DPST_PWM R46 1K/F_4 VADJ1 34
A
TXLOUT1- 33 A
1
[27] TXLOUT2- TXLOUT2-
3 C21 C23 C17 L10 120/300MA DIGITAL_CLK_L 8
[2] PCH_DISP_ON ON/OFF [29] DIGITAL_CLK 7
0.01U/50V_4 0.1U/16V_4 10U/6.3V_6 [27] INT_eDP_TXP1_R C34 0.1U/16V_4 [29] DIGITAL_D1 L11 120/300MA
2
R11 R24 *0_4 TXLOUT0+ VADJ1 6
[27] TXLOUT0+_2136 5
G5243AT11U R27 *0_4 TXLOUT0- BLON_CON
R31 close to U2 100K/F_4 [27] TXLOUT0-_2136
C36 0.1U/16V_4 C89 C88 4
for eDP,stuff for eDP,stuff U2 & L8
[27] INT_eDP_TXN1_R 100mA *10P/50V_4 *10P/50V_4 +VIN_BLIGHT
3
2
[27] INT_eDP_TXP0_R C29 0.1U/16V_4 +VIN +VIN_BLIGHT +VIN_BLIGHT
for LVDS,stuff C29 & R23 R17 *0_4 TXLOUT1+ 1
41
[27] TXLOUT1+_2136
[27] TXLOUT1-_2136 R19 *0_4 TXLOUT1- C548 0.1U/25V_4 GS12401-1011-9H
[27] INT_eDP_TXN0_R C31 0.1U/16V_4 LVDS-51519-04001-001-40P-L
C550 0.01U/50V_4 DFFC40FR063
For eDP, close to CN2 For EDP Only: Reserved [27] INT_eDP_AUXN_R C42 0.1U/16V_4
B [27] EDIDDATA R371 *0_4 EDIDDATA_R B
R370 *100K_4 EDIDDATA_R R373 *0_4 EDIDCLK_R +VIN +VIN 0507 change footprint
+3V [27] EDIDCLK
R372 *100K_4 EDIDCLK_R [27] INT_eDP_AUXP_R C46 0.1U/16V_4
[2] PCH_LVDS_BLON R54 0_4 OUT_LVDS_BLON
[27] EDP_DPST_PWM R45 10_4 OUT_DPST_PWM +3V R47 *1K_4 OUT_DPST_PWM C545 C541 C546 C540 C549 C533 C539
R68 *1K_4 OUT_LVDS_BLON [4,30,32,33,37,38,39,40,41,42,43,44,46] +5VS5 *4.7U/25V_8 0.1U/25V_4 *4.7U/25V_8 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4 0.1U/25V_4
[2,4,10,11,12,13,14,15,16,17,18,27,29,30,31,32,33,34,35,41,43] +3V
[29,30,31,32,33,34,43] +5V
[31,33,34,36,37,38,39,41,42,43,44,45] +VIN
[4,10,11,12,14,15,16,18] +3V_DEEP_SUS
3
[2] IN_D0# IN_D0# C249 0.1U/16V_4 C_TX0_HDMI- Q35 R466 470/F_4 C_TX2_HDMI-
Q37
+3V R479 2N7002K
IN_D1 C227 0.1U/16V_4 C_TX1_HDMI+ 2.2K_4 5 +3V R468 470/F_4 C_TX1_HDMI+
[2] IN_D1
IN_D1# C235 0.1U/16V_4 C_TX1_HDMI- 2 R473 470/F_4 C_TX1_HDMI-
[2] IN_D1#
[2] SDVO_CLK 4 3 HDMI_SCLK
[2] IN_D2 IN_D2 C215 0.1U/16V_4 C_TX2_HDMI+ R475 470/F_4 C_TX0_HDMI+
[2] IN_D2# IN_D2# C218 0.1U/16V_4 C_TX2_HDMI- R478 470/F_4 C_TX0_HDMI-
2
1
[2] IN_CLK IN_CLK C254 0.1U/16V_4 C_IN_CLK R485 470/F_4 C_IN_CLK
[2] IN_CLK# IN_CLK# C264 0.1U/16V_4 C_IN_CLK# [2] SDVO_DATA 1 6 HDMI_SDATA R461 1 2 100K/F_4 R489 470/F_4 C_IN_CLK#
H=1.4mm(Max) +5V_HDMIC
40 mils F1 FUSE1A6V_POLY CN10
2 1 +5V_HDMIC 20
+5V 1 SHELL1
C285 C_TX2_HDMI+
C286 0.1U/16V_4 *0.01U/50V_4 2 D2+
C_TX2_HDMI- 3 D2 Shield
VC2 C_TX1_HDMI+ 4 D2-
SSM14 spec is 40V 1A D1+
*TVM0G5R5M220R for EMI request 5
C_TX1_HDMI- 6 D1 Shield
C_TX0_HDMI+ 7 D1- 23
8 D0+ SHELL2
C_TX0_HDMI- 9 D0 Shield
C_TXC_HDMI+ 10 D0-
11 CK+
C_TXC_HDMI- 12 CK Shield 22
RB500V-40 13 CK- SHELL2
D3 2 1 5V_HSMBCK R178 2.2K_4 14 CE Remote
+5V_HDMIC NC
2 1 5V_HSMBDT R176 2.2K_4 HDMI_SCLK 15
D2 HDMI_SDATA 16 DDC CLK
RB500V-40 C261 *10P/50V_4 17 DDC DATA
C275 *10P/50V_4 18 GND
19 +5V
+3V +5V_HDMIC HP DET 21
SHELL2
HDMI_HPD HDMI_DET_C HDMI CONN
R197
1M_4 C310
2
VC1
*TVM0G5R5M220R
[2] HDMI_HPD_CON 1 3 HDMI_HPD R216 20K/F_4 220P/50V_4
Q18
D 2N7002K D
EMI Solution
C_TX2_HDMI+ R147 220/F_4 C_TX2_HDMI-
Audio Codec
5
U23
1
+5V
29
Vout Vin
4
1
C646 C367 C337 C647 BYP C632 C631 C630
L30 +3V_DVDD Close to PIN9 1023 Del L1001 10U/6.3VS_6 0.1U/16V_4 *AZ2015-01H *2.2U/6.3V_4 2 3 0.1U/16V_4 0.047U/25V_4 1U/6.3V_4
+3V GND EN
2
HCB1005KF-181T15 C628
L29 +3V_DVDD-IO
Close to PIN27 *1U/6.3V_4 *TPS793475DBVR
+3V
C638 C640 C639 HCB1005KF-181T15 HPA01091DBVR
1U/6.3V_4 10U/6.3VS_6 0.1U/16V_4 AGND AGND
C637 C634 R235 *10K_4 +5V
10U/6.3VS_6 0.1U/16V_4 Vset=1.242V
+5V_AVDD
Close to PIN38
TO Digital MIC Ra
U10 C635 C633
[28] DIGITAL_D1 R559 0_4 0.1U/16V_4 10U/6.3VS_6
C355 10P/50V_4 9 27 +5V_AVDD
DVDD AVDD1 38
Rb AVDD2
[33] DIGITAL_D1_3D R560 *0_4 DIGITAL_D1_R R255 BLM15AG601SN1D DMIC0 4 AGND AGND
GPIO1/ DMIC-DATA
Rc
[33] DIGITAL_CLK_3D R561 *0_4 DIGITAL_CLK_R R252 BLM15AG601SN1D DMIC_CLK_R 2 26 AGND R539
GPIO0/ DMIC-CLK AVSS1 33 10K_4
check value
Analog
C353 10P/50V_4 AVSS2
Rd
R562 0_4 R261 *0_4/S 7 21 C651 10U/6.3VS_6 C648
[28] DIGITAL_CLK
0423 change to shortpad DVSS LDO-CAP AGND Close to PIN21 C649 R534 0.1U/16V_4
ACZ_SDOUT_AUDIO 5 AMP_BEEP AMP_BEEP_L AMP_BEEP_R2
[14] ACZ_SDOUT_AUDIO SDATA-OUT
3D CAMERA MIC
3
6 25 C374 0.1U/16V_4 0.1U/16V_4 47K/F_4
[14] BIT_CLK_AUDIO BIT-CLK VREF Q39
C373 2.2U/6.3V_4
Close to PIN25
Layout Note: R262 33_4 HD_SDIN0 8
AGND
C652 R536 2 ACZ_SPKR [11,14]
[14] ACZ_SDIN0 SDATA-IN
Ra, Rb, Rc,Rd need to close HPOUT-L
31 HPOUT_L
HPOUT_L [30] AGND SHIELD 0.1U/16V_4 4.7K_4
1
10 AGND SHIELD
To Digital MIC: [14] ACZ_SYNC_AUDIO SYNC 23 VREFOUT_C
Only install Ra, Rd ACZ_RST#_AUDIO 11 LINE1-VREFO AGND
RESET# Check layout
Digital
AGND
To 3D Camera: C386 *0.1U/16V_4 AMP_BEEP 12 28 MIC_L1 C357 4.7U/6.3V_4 mount location
Only install Rb, Rc PCBEEP LINE1-L 29 MIC_R1 C356 *4.7U/6.3V_4 R269 1K/F_4 EXT_MIC_L
TO Audio Jack MIC
L_SPK+ 40 LINE1-R
SPK-L+
L_SPK- 41 20
SPK-L- MIC1-R 19
42 MIC1-L
PVSS
0423 change to shortpad Speaker 4 ohm: 40mils
R_SPK- 43
SPK-R- 30 MUTE_LED_CNTL_L R249 *0_4/S CN4
44 MIC1-VREFO MUTE_LED_CNTL [31]
R_SPK+ L_SPK+ L4 PBY160808T-600Y-N L_SPK+_R
SPK-R+ L_SPK- L3 PBY160808T-600Y-N L_SPK-_R 4
COMBO-DET 46 R_SPK- L2 PBY160808T-600Y-N R_SPK-_R 3
0423 change to shortpad DMIC1/GPIO2 2
37 R_SPK+ L1 PBY160808T-600Y-N R_SPK+_R
PD# R242 *0_4/S PD#_R 47 MONO-OUT 1
EAPD/PD INT SPEAKER CONN
48 34 C354 2.2U/6.3V_4
[30] HP_EAPD GLOBE INPUT MUTE CPVEE AGND Close to CN4 C5 C4 C3 C2
24 35 CAP-
18 I2S_DIN CBN 680P/50V_4 680P/50V_4
DREG-OUT
17 I2S_LRCK 36 C636 680P/50V_4 680P/50V_4
I2S-DOUT CBP Close to Pin 35
SENSEA
16 CAP+ 2.2U/6.3V_4
SenseB
PVDD1
PVDD2
JDREF
15 I2S-SCLK
GND
1 I2S-MCLK 1
39 ALC3241 x QFN48
45
1
49
13
14
22
+5V_DVDD
BLM15AG601SN1D
L31
VREFOUT_C R268 2.2K_4 EXT_MIC_L EXT_MIC_L EXT_MIC_L2
EC86 0.1U/16V_4
C656
EC84 0.1U/16V_4 +3V_DVDD *1U/6.3V_4 R554 C661 VC10
R270 *22K/F_4 100P/50V_4 *AVLC5S_4
EC85 0.1U/16V_4 2.2K_4
AGND
EC35 0.1U/16V_4
R241 AGND AGND AGND
EC82 0.1U/16V_4 10K_4 COMBO-DET R531 *0_4/S COMBO-DET_R 0423 change to shortpad
CN12
AGND C653 100P/50V_4 AGND R553 *0_4/S COMBOJACK_6P
0423 change to shortpad R537 3
AGND 1 2 PD# 10K_4 C650 4
[14] ACZ_RST#_AUDIO
10U/6.3VS_6 [30] LINEOUT_L_C LINEOUT_L_C R540 47/F_4 LINEOUT_L_C1 L32 FCM1005KF-301T03 LINEOUT_L_C2 1
D6 *RB500V-40 R240
Close to CODEC [30,35] VOLMUTE#
1 2 *10K_4 [30] LINEOUT_R_C LINEOUT_R_C R541 47/F_4 LINEOUT_R_C1 L33 FCM1005KF-301T03 LINEOUT_R_C2 2
place to near U10 or under U10 5
AGND
D5 RB500V-40 C657 100P/50V_4 6
AGND
R532 *0_8/S
SENSE_A
7
AGND
EC83 VC3
AGND *100P/50V_4 *AVLC5S_4
R555
0_4
AGND AGND
AGND
ACZ_SDIN0 EC32 *33P/50V_4
C654 1U/10V_4
D D
20
19
18
17
16
R275 *0_4 U11
AGND
1218 Del C1043, C1050 15
VDD
GND
CPP
CPVSS
CPM
CPVSS
14 LINEOUT_L_C
R274 0_4 HPOUT_L1 C389 2.2U/6.3V_4 HPOUT_L2 1 HPLEFT +5V_AMP
[29] HPOUT_L LEFTINML- 13
R276 0_4 C394 2.2U/6.3V_4 2 GND
LEFTINP+ 12
3 VDD
AGND GND TPA6133A2
11 LINEOUT_R_C C385
R277 0_4 C397 2.2U/6.3V_4 4 HPRIGHT
RIGHTINP+ 30 1U/10V_4
R279 0_4 HPOUT_R1 C399 2.2U/6.3V_4 HPOUT_R2 5 AGND 29
[29] HPOUT_R RIGHTINM- AGND 28
TEST2
TEST1
AGND
AGND
AGND
AGND
AGND
AGND
27
GND
GND
SD#
AGND 26 AGND
R280 *0_4 AGND
AGND
Placement close the CODEC (U11)
6
7
8
9
10
21
22
23
24
25
HPA022642RTJR
If Don't Use AMP need install
HP_EAPD 1
[29] HP_EAPD
AMP_CLK
D16
BAT54AW-L AMP_DAT
MCM2012B900GBE 55
4 3 USBP2+_C 54 55
[12] USBP2+ 1 2 53 54
H1 H2 H3 H4 H5 H6 USBP2-_C
[12] USBP2- 53
*O-Y16X-4 *H-TC236BC315D110P2 *H-C98D98N *H-C315D157I197P2 *H-TC236BC276D118P2 *INTEL-BKT-SHARK-ULT 52
USB30_TX3+ L5 51 52
[12] USB30_TX3+ 50 51
DEEP_PWRLED# USB30_TX3-
[12] USB30_TX3- 50
49
LID_EC# USB30_RX3+ 48 49
[12] USB30_RX3+ 48
USB30_RX3- 47
[12] USB30_RX3-
1
1
2
3
4
NBSWON1# MCM2012B900GBE 46 47
4 3 USBP6+_C 45 46
[12] USBP6+ 45
1 2 USBP6-_C 44
[12] USBP6- 43 44
C6 C13 C12
*220P/50V_4 *220P/50V_4 *220P/50V_4 L7 PCIE_CLKREQ_CR# 42 43
B [13] PCIE_CLKREQ_CR# 42 B
41
[13] PCIE_CLKREQ_LAN# 41
PLTRST# 40
[4,16,19,32,34,35] PLTRST# 40
PCIE_WAKE# 39
[4,34,35] PCIE_WAKE# 38 39
H7 H8 H9 H10 H11 H12 [33,35] USBPW_ON#
*H-TC276BC197D146P2 *H-TC315BC276D157P2 *H-TC276BC197D146P2 *H-TC236BC315D118P2 *H-TC236BC315D118P2 *H-C236D110P2 37 38
[35] NBSWON1# 37
36
[35] LID_EC# 36
35
[34] DEEP_PWRLED# 35
+3VPCU 34
33 34
+5VS5 +3VPCU +3VLANVCC +3V +3VLANVCC 33
32
1
31 32
+3V 31
30
29 30
C48 C33 C35 C40 28 29
+5VS5 28
27
*0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4 *0.1U/16V_4 26 27
25 26
24 25
H13 PAD1 PAD2 PAD3 PAD4 PAD8 23 24
H-TC197BC102D102P2 *SPAD-RE315X157NP *O-Y16X-3 *spad-y11x-1np *spad-re197x394np *SPAD-X1AD-2NP 22 23
21 22
20 21
[32] LAN_XTAL25_IN 20
19
18 19
[12] PCIE_TXP9_LAN 18
[12] PCIE_TXN9_LAN 17
1
16 17
15 16
[13] CLK_PCIE_LANP 15
[13] CLK_PCIE_LANN 14
1
13 14
12 13
1
*Clamp-Diode 9
2
[12] PCIE_TXP5_CARD 8 9
PAD5 PAD6 PAD7 R1
[12] PCIE_TXN5_CARD 8
*SPAD-C157NP *SPAD-C157NP *SPAD-X1AD-1NP 10K_4 7
6 7
[13] CLK_PCIE_CRP 5 6
[13] CLK_PCIE_CRN 5
A DEEP_PWRLED# 4 A
3 4
[12] PCIE_RXP5_CARD 3
3
2
[12] PCIE_RXN5_CARD
1
1 2
2 PWR_LED# 1
PWR_LED# [35]
Q1 C1
1
DRC5144E0L 0.1U/16V_4
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
C 1A
Card Reader
NB5 Date: Wednesday, May 13, 2015 Sheet 30 of 49
5 4 3 2 1
A B C D E
3
MX3 24 MX3 24 R338 4.7K_4
4 MY5 23 24 MY5 23 24 4
5
MY1 22 23 MY1 22 23
22 22 +3V +3VSUS
2 MX0 21 MX0 21
[29] MUTE_LED_CNTL 21 21
2
Q26 MY2 20 MY2 20 R337 4.7K_4
2N7002K MY4 19 20 MY4 19 20
MY7 18 19 MY7 18 19 1 6 TP_SMB_DATA
17 18 17 18 [10,16,17,18,27] SMB_RUN_DAT
R355 MY8 MY8
1
10K_4 MY6 16 17 MY6 16 17
MY3 15 16 MY3 15 16 Q25B
MY12 14 15 MY12 14 15 2N7002KDW
MY13 13 14 MY13 13 14
MY14 12 13 MY14 12 13
MY11 11 12 MY11 11 12
MY10 10 11 MY10 10 11
MY15 9 10 MY15 9 10
MY16 8 9 MY16 8 9
MY17 7 8 MY17 7 8
6 7 6 7
R348 2 1 200/F_6 CAPSLED#_R 5 6 CAPSLED#_R 5 6 C472 0.1U/16V_4
[35] CAPSLED# 5 5 +3VSUS
MUTE_LED_CNTL_R1 R349 2 1 MUTE_LED_CNTL_R 4 MUTE_LED_CNTL_R 4
+3VSUS R320 4.7K_4 TPCLK
200/F_6 WIRELESS_ON_R 3 4 WIRELESS_ON_R 3 4 R316 4.7K_4 TPDATA
WIRELESS_OFF_R 2 3 WIRELESS_OFF_R 2 3
LED_PW 1 2 LED_PW 1 2 C455 10P/50V_4 CN13
+3V 1 +3V 1
L21 BLM15BA330SN1D TPDATA-1 1
[35] TPDATA 2
51586-03241-001-32p-l 51586-03241-001-32p-l [35] TPCLK L22 BLM15BA330SN1D TPCLK-1
DFFC32FR043 DFFC32FR043 C458 10P/50V_4 3
TP_SMB_CLK 4
TP_SMB_DATA 5
6
3 3
C467 *10P/50V_4 DFFC06FR162
3
MY6 6 5 *DRC5144E0L
1
MY1 9 2 MY4 +5V
MY5 8 3 MY7 MX4 C480 220P/50V_4
MY0 7 4 MY8 MX6 C478 220P/50V_4 C525 10U/6.3VS_6
MY9 6 5 MX3 C484 220P/50V_4 +5V
MX2 C483 220P/50V_4 WIRELESS_OFF EC56 *220P/50V_4 C528 0.1U/16V_4
+3VPCU *10P8R-8.2K
R350 FAN1
R346 *8.2K_4 MY16 MX7 C477 220P/50V_4 WIRELESS_ON EC55 *220P/50V_4 *1K/F_4 FAN1_PWM C531 *220P/50V_4
2 R347 *8.2K_4 MY17 MX0 C487 220P/50V_4 5 2
MX5 C481 220P/50V_4 15 FAN1SIG C537 *220P/50V_4
[35] FAN1_PWM 2
MX1 C476 220P/50V_4
R353 2 1 *200/F_6 3 6
[35] FAN1SIG 46
MY12 C494 220P/50V_4
MY13 C495 220P/50V_4 WIRELESS_ON_R R344 4.7K_4 FAN Connect
+3V
MY14 C496 220P/50V_4 Q27
3
MY15 C499 220P/50V_4 *DRC5144E0L
MY16 C500 220P/50V_4 靠靠EC
MY17 C501 220P/50V_4 2
WIRELESS_ON
1
R354
1M_4
3
Q30
AO3404
1 2 1
3
R356
[35] KB_LED_EN
2 2M_4 +5V_LED_KBLIGHT
4
+5V_LED_KBLIGHT
4 PROJECT : X1A
Q29
C502
0.1U/16V_4
C503
0.1U/16V_4
3
2
C504
*0.1U/16V_4
3
2 Quanta Computer Inc.
2N7002K 1 1
1
HIGH
BADD
4EH/4F (default)
Accelerometer Sensor
32
+3V
U2
C37 R5 *33_4 LAN_XTAL25_IN_R 6 15 C24 *0.1U/16V_4
[30] LAN_XTAL25_IN
3
25M +V3.3A
3
C19 *12P/50V_4
R360 R366 *0_6/S USBP8- R368 0_4 USBP8-_C
*10K_4 C507 USBP8+ R367 0_4 USBP8+_C GEN_XTAL25_IN
1
2
1
Q32
*AO3409 VC11 *EGA1_4 USBP8-_C Y1
R358 *220K_4 2 C30 *10P/50V_4 CLK_27M_XTAL_IN C10 *10P/50V_4 LAN_XTAL25_IN
VC12 *EGA1_4 USBP8+_C *25MHZ +-10PPM
4
3
A GEN_XTAL25_OUT A
C505
3
3
C22 *15P/50V_4
*0.022U/25V_4
TS_ON 2 C513
Q33
0.1U/16V_4
PROJECT : X1A
*DMG1012T-7(SOT523) Quanta Computer Inc.
1
VC9
0.1U/16V_4
470P/50V_4
*AVLC5S_4
USB 3.0 33
8 HSD2+ D- 3 C622 1000P/50V_4 CN11
[14]
+3V
GPP_A16
R569 *0_4 9
10
OE
VCC
SEL
GND
HSD-
HSD+
4
5
UART2_RXD
UART2_TXD
UART2_RXD [14]
UART2_TXD [14]
USBP1-
MCM2012B900GBE
4 3
+5V_USBP1
USBP1-_C
1A 1
2
USB3.0 CONN
1 VBUS
3D CAMERA 3D Camera Conn.
[12] USBP1- 2 D-
R568 *10K_4 USBP1+ 1 2 USBP1+_C 3
+3V [12] USBP1+ 3 D+
*FSUSB42UMX 4 0114
D L14 5 4 GND CN30 D
C710
[12] USB30_RX1-
6 5 SSRX- Add 3D CAMERA circuit +5V_CAM_C
[12] USB30_RX1+ 7 6 SSRX+ +5V_CAM_C 10 12
*0.1U/16V_4
C343 0.1U/16V_4 USB30_TX1-_C 8 7 GND 3D_FW_GPIO 9
[12] USB30_TX1- 9 8 SSTX- [2] 3D_FW_GPIO 8
Place on BOT side under L14 C348 0.1U/16V_4 USB30_TX1+_C 40mil
[12] USB30_TX1+ 9 SSTX+ USB3_SSTX+ 7
L40 *0_8
13
12
11
10
+5V 6
L41 *0_8 USB3_SSTX-
+5V_CAM 5
0129
13
12
11
10
USB3_SSRX+ 4
Add UART for debug C690 C694 USB3_SSRX- 3
*0.01U/50V_4 2
*4.7U/6.3V_4 1 11
*50450-01071-001
+
4 VIN2 OUT2 6
[30,35] USBPW_ON# EN OUT1 +3V 4
1 5 [29] DIGITAL_D1_3D L42 *120/300MA DIGITAL_D1_3D_L
GND OC L43 *120/300MA DIGITAL_CLK_3D_L 3
[29] DIGITAL_CLK_3D 2
VC8 C604 AP2820GMMTR-G1
1U/6.3V_4 1
Active Low
*AVLC5S_4 *INT SPEAKER CONN
C696 C695
*10P/50V_4 *10P/50V_4
0116
Change CN31 footprint
C C
+VIN EC62 1U/25V_4 TST : Low = Normal LFPS swing / Hight =Turn down LFPS swing *PS8713BTQFN24GTR2-A1
PROJECT : X1A
+VIN EC63 1U/25V_4 Quanta Computer Inc.
+VIN EC79 *0.1U/25V_4
Size Document Number Rev
Custom 1A
USB 3.0
NB5 Date: Wednesday, May 13, 2015 Sheet 33 of 49
5 4 3 2 1
A B C D E
Mini Card
WLAN/BT(Option)
+3VPCU +3VS5
+3V_WLAN_P
+3V_WLAN_P
CN6
+3V_WLAN_P
34
R9 C9 C39 C7 C38
10K_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 10U/6.3VS_6 NGFF
1
1 2 R3 4.7K_4
GND 3.3Vaux +3V_WLAN_P
Q2 3 4
[12] USBP7+ USB_D+ 3.3Vaux
AO3409 5 6 WLAN_LED# R2 *0_4/S
[12] USBP7- USB_D- LED#1 RF_LINK# [35]
R8 200K_4 2 7 8
4 9 GND PCM_CLK 10 4
SDIO CLK(O) PCM_SYNC 0423 change to shortpad
11 12
SDIO CMDIO) PCM_IN
3
24mil 13 14
Q3 15 SDIO DAT0(IO) PCM_OUT 16
3
C14 +3V_AOCS 17 SDIO DAT1(IO) LED#2 18
2 19 SDIO DAT2(IO) GND 20
[35] EC_AOCS 21 SDIO DAT3(IO) UART W ake 22
0.022U/25V_4 C8
23 SDIO W ake(I) UART Rx 24 Q4
2N7002K *0.1U/16V_4 25 SDIO Reset Key 5 26 5
KEY1 Key 6 BT_OFF [14]
27 28
1
45 46
47 GND COEX2 48 2N7002KDW
[13] CLK_PCIE_WLANP REFCLKP0 COEX1
49 50
[13] CLK_PCIE_WLANN REFCLKN0 SUSCLK(32KHz)
51 52
GND PERST0# PLTRST# [4,16,19,30,32,35]
3 1 MINICAR_PME# R374 *0_4/S REQ_WLAN# 53 54 INT_BT_OFF# R7 10K_4
[4,30,35] PCIE_WAKE# [13] PCIE_CLKREQ_WLAN# CLKREQ0# W _DISABLE2#
Q10 *DRC5144E0L MINICAR_PME# 55 56 INT_RF_OFF# R4 10K_4
PEW ake0# W _DISABLE1# +3V_WLAN_P
57 58
59 GND NFC I2C SM DATA 60
0423 change to shortpad PETp1 NFC I2C SM CLK
+3V_WLAN_P 61 62
For EMI Suggestion 63 PETn1 ALERT# 64 LAD0 LAD0 [10,32,35]
R39 10K_4 CLK_24M_DEBUG EC16 *33P/50V_4 65 GND RESERVED 66 LAD1
PERp1 UIM_SW P/PERST1# LAD1 [10,32,35]
R20 *0_4 67 68 LAD2
PERn1 UIM_POW ER_SNK LAD2 [10,32,35]
3 69 70 LAD3 3
GND UIM_POW ER_SRC LAD3 [10,32,35]
PCIE_WAKE# EC19 *220P/50V_4 71 72
[10] CLK_24M_DEBUG Reserved1 3.3Vaux
2
LFRAME# 73 74
[10,32,35] LFRAME# Reserved2 3.3Vaux
75
GND
GND
EC_PCIE_WAKE# EC17 *220P/50V_4 GND
76
77
Q9 DRC5144E0L
2
S1 2 SATA_TXP1_14 C202 *0.01U/50V_4 +3V SATA_TXP0_C
TXP 3 SATA_TXN1_14 C204 *0.01U/50V_4 SATA_TXP1 [12] 9
14 TXN SATA_TXN1 [12] R152 SATA_TXN0_C
14 Q13 8
3
5 SATA_RXN1_14 C209 *0.01U/50V_4 1M_4 Q15 C321
16 RXN 6 SATA_RXP1_14 C212 *0.01U/50V_4 SATA_RXN1 [12] R217 5 AO3404 0.1U/16V_4
ACIN [35,36]
1
16 RXP 8 ZERO_ODD_DP# 1 2 SATA_RXP1 [12] 10K_4 7
DP 9 R222 1K_4 4 3 2 SATA_RXN0_C
2 S7 +5V 10 2M_4 R164 6 2
+5V +5V_ODD ZERO_ODD_DP# [12]
P1 11 ZERO_ODD_DA# SATA_RXP0_C
MD ODD_EJECT# [35] +5V_ODD 5
17 1 2
17 GND1 ZERO_PWR_ODD [35]
4
1
GND2 4
1
15 7 1 6
15 GND3 12 C222
GND 120 mils 3
1
13 0.022U/25V_4
2
P6 GND +5V_ODD
*14 SATA ODD 2N7002KDW R182 2
C247 C253 C319 C320 C262 ACIN EC24 *220P/50V_4 22_8
sata-202403-1-13p-r 11/14 10U/6.3VS_6 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 0.1U/16V_4 1
3 2
HD1
ZERO_PWR_ODD EC23 *220P/50V_4 Q14
2N7002K +5V
High : ODD power down
15" SATA ODD Low : ODD power on
ZERO_PWR_ODD 2 SATA_TXP0_C C381
SATA_TXN0_C C384
0.01U/50V_4
0.01U/50V_4
SATA_TXP0 [12]
SATA_TXN0 [12]
ODD1 ODD CAP Setting C727/C728/C732/C732 C729/C730/C731/C733 SATA_RXN0_C C387 0.01U/50V_4 SATA_RXN0 [12]
SATA_RXP0_C C390 0.01U/50V_4 SATA_RXP0 [12]
1
1
2 ZERO_ODD_DA#
3 ODD 14" O X
4 Default +5V
5 C400 *10U/6.3VS_6
6 ODD 15"/17" X O
7
8 C398 10U/6.3VS_6
9
10 +5V_ODD
ZERO_ODD_DP#
1 11 C393 0.1U/16V_4 1
12 SATA_RXP1_15 C592 0.01U/50V_4 SATA_RXP1
13 SATA_RXN1_15 C590 0.01U/50V_4 SATA_RXN1
19 14
20 19 15 SATA_TXN1_15 C588 0.01U/50V_4 SATA_TXN1 VC5 *AVLC5S_4
20 16 SATA_TXP1_15 C585 0.01U/50V_4 SATA_TXP1
17
18 SATA_LED# R289 39_6
LED2 PROJECT : X1A
[12] SATA_LED#
15 SATA ODD
ACC_LED#
2
3
SATA_R_LED1
LED1
1 2
+3V [30] DEEP_PWRLED#
DEEP_PWRLED# 1 2
+3VPCU Quanta Computer Inc.
[12] ACC_LED# 1 LED 3P WHITE/AMBER R284 360_4
R291 200/F_6 3P WHITE LED Size Document Number Rev
[2,4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,35,41,43] +3V (Amber)
[28,29,30,31,32,33,43]
[6,13,30,31,32,33,35,36,37]
+5V
+3VPCU SATA LED VC6 *AVLC5S_4
PWR LED VC4 *AVLC5S_4 NB5
Custom
WLAN/NGFF/MSATA 1A
+3V_ECACC
+3V_VSTBY
+3V +3VPCU EC_WRST
35
EC_WRST [20]
C451 0.1U/16V_4 +3VPCU
C450 0.1U/16V_4
C457 0.1U/16V_4 C449 0.1U/16V_4 Q23 R317 4.7K_4 +3V
3
C466 0.1U/16V_4 METR3904-G +3VPCU
C453 0.1U/16V_4 ACIN 2 OVT_DETC 2 1 EC_PWROK
ACIN [34,36]
114
121
106
127
C475 0.1U/16V_4 D8 RB500V-40
11
26
50
92
74
U13 VC7 *AVLC5S_4
1
VSTBY_FSPI
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VCC
AVCC
LAD0 10 84 EC_AOCS R318 10K_4
[10,32,34] LAD0 LAD0 EGCLK/W UI27/GPE3 EC_AOCS [34] +3VPCU
LAD1 9 83 VRON
[10,32,34] LAD1 8 LAD1 EGCS#/W UI26/GPE2 VRON [41]
LAD2 THRM_ALERT_HW#1 R322
[10,32,34] LAD2 LAD2
LAD3 7 82 SUSACK#_EC 100K_4
[10,32,34] LAD3 LAD3 EGAD/W UI25/GPE1 SUSACK#_EC [4]
PLTRST# 22 Open Drain need pu high
[4,16,19,30,32,34] PLTRST# LPCRST#/W UI4/GPD2
D CLK_24M_KBC 13 56 MY16 D
[10] CLK_24M_KBC LPCCLK KSO16/SMOSI/GPC3 MY16 [31]
LFRAME# 6 57 MY17
[10,32,34] LFRAME# LFRAME# KSO17/SMISO/GPC5 MY17 [31]
0423 change to shortpad EC_WRST
PCIE_WAKE# 17 LPC 19 CRY1 R326 *0_4/S 3 1
[4,30,34] PCIE_WAKE# LPCPD#/W UI6/GPE6 L80HLAT/BAO/W UI24/GPE0 AC_PRESENT_EC [4,20] DGPU_OVT# [20]
20 EC_PWROK
126 L80LLAT/W UI7/GPE7 EC_PWROK [4,16]
R312 *0_4 Q22
[4,16] PCH_SLP_S0_N 5 GA20/GPB5 122
SERIRQ GPIO DTR1/SBUSY/GPG1/ID7 R299 0_4 *2N7002K C459
2
[10,32] SERIRQ 15 SERIRQ 99 ODD_EJECT# [34]
SIO_EXT_SMI# PCI_SERR# PCI_SERR# [10]
[10] SIO_EXT_SMI# 23 ECSMI#/GPD4 HMOSIGPH6/ID6 98 DGPU_PWROK [12,20,44,46]
[14] SIO_EXT_SCI# SIO_EXT_SCI# HWPG 1U/10V_4
14 ECSCI#/GPD3 HMISO/GPH5/ID5 97 HWPG [4,16,37,38,39]
EC_WRST ACIN R319 4.7K_4 +1.0V
EC_RCIN# 4 W RST# HSCK/GPH4/ID4 96 GPU_AC_BATT
[10] EC_RCIN# KBRST#/GPB6 HSCE#/W UI19/GPH3/ID3 GPU_AC_BATT [20]
GPUT_CLK 16 95 MBDATA3
[20] GPUT_CLK PW UREQ#/BBO/GPC7 CTX1/W UI18/GPH2/SMDAT3/ID2 94 MBDATA3 [32]
MBCLK3
CRX1/W UI17/GPH1/SMCLK3/ID1 93 MBCLK3 [32]
0421 Modify PCH_SLP_S0_N CLKRUN#
CLKRUN#/W UI16/GPH0/ID0 CLKRUN# [10]
for Modern Stand By For Gsensor C454 220P/50V_4
2
BATSHIP 113 3 SUSWARN#_EC H_PECI (50ohm) Q24
[36]
[30]
BATSHIP
LID_EC#
LID_EC#
TPDATA
123
86
CRX0/GPC0
TMA0/GPB2 IT8987 GPH7 SUSWARN#_EC [4]
Route on microstrip only
Spacing >18 mils 3 1
PM_THRMTRIP# [2]
[31] TPDATA
TPCLK 85 PS2DAT0/TMB1/GPF1 117 EC_PECI_R R302 43_4
Trace Length: 0.4~6.125 iches METR3904-G H_PROCHOT#
[31] TPCLK PS2CLK0/TMB0/GPF0 SMCLK2/W UI22/GPF6/PECI EC_PECI [2] H_PROCHOT# [2,36,41]
SUSB# 88 118 GPUT_DATA For GPU thermal
[4,16] SUSB# PS2DAT1/RTS0#/GPF3 SMDAT2/W UI23/GPF7 GPUT_DATA [20]
3
DSWROK_EC 87 PS/2 110
[4] DSWROK_EC PS2CLK1/DTR0#/GPF2 SMCLK0/GPB3 MBCLK [36]
SLP_SUS#_EC 90 111
For
[4] SLP_SUS#_EC
Touch-Pad[15,39,40] SLP_SUS_ON 89 PS2DAT2/W UI21/GPF5
SM_BUS SMDAT0/GPB4 115 MBDATA [36] for Battery charge/charge
PS2CLK2/W UI20/GPF4 SMCLK1/GPC1 MBCLK2 [10,18,27]
116 H_PROCHOT#_EC 2 C445
SMDAT1/GPC2 MBDATA2 [10,18,27] for DDR Thermal IC Q20 *47P/50V_4
R315 2N7002K
RSMRST# 119
[4] RSMRST# DSR0#/GPG6
MAINON 33 *10K_4
[38,40,43] MAINON
1
GINT/CTS0#/GPD5 24 PWR_LED#
UART PW M0/GPA0 PWR_LED# [30]
C 25 MBATLED0# C
PW M1/GPA1 MBATLED0# [36]
[11] GPIO33_EC D7 RB500V-40 108 28 AC_LED_ON#
AC_LED_ON# [36]
RF_LINK# 109 RXD/SIN0/GPB0 PW M2/GPA2 29 TS_ON
[34] RF_LINK# TXD/SOUT0/GPB1 PW M3/GPA3 TS_ON [32]
30 FAN1_PWM
PW M4/GPA4 31 KB_LED_EN
FAN1_PWM [31]
Adapter select for EC
[30,33] USBPW_ON#
R308
USBPW_ON#
15/F_4 BIOS_SPI_CLK
125
105 SSCE1#/GPG0
PW M5/GPA5
PW M6/SSCK/GPA6
32
34
VOLMUTE#
CAPSLED#
KB_LED_EN [31]
VOLMUTE# [29,30]
R332 10K_4 ADAPTER_SEL_EC R331 10K_4
adapter Type check
[10] PCH_SPI1_CLK_R FSCK/GPG7 PW M7/GPA7 CAPSLED# [31] +3VPCU
Close to BIOS 0423 change to shortpad
R297 15/F_4 BIOS_RD# 103 FLASH PWM 47 FAN1SIG Hi ==> (90W)
[10] PCH_SPI1_SO_R FMISO/GPG5 TACH0/GPD6 FAN1SIG [31]
R309 15/F_4 BIOS_WR# 102 48 R345 *0_4/S EC_RTC_RST
[10] PCH_SPI1_SI_R FMOSI/GPG4 TACH1/TMA1/GPD7 EC_RTC_RST [13] +3VPCU
R298 15/F_4 BIOS_CS# 101 Middle ==> (65W)
[10] PCH_SPI_CS0#_R FSCE#/GPG3
S5_ON 100
[37] S5_ON SSCE0#/GPG2 77 DGPU_PROCHOT# Low ==> (45W) Change to 1SS355 as Current loss
DAC1/GPJ1 DGPU_PROCHOT# [20]
1
MY0 36 76 R590 *0_4 PCH_SLP_S0_EC
[31] MY0 KSO0/PD0 DAC0/GPJ0 PCH_SLP_S0_EC [40]
MY1 37 D9
[31] MY1
MY2 38 KSO1/PD1 120 TEMP_MBAT
1231 power request *1SS355
[31] MY2 39 KSO2/PD2 TMR0/W UI2/GPC4 124 TEMP_MBAT [36]
MY3 H_PROCHOT#_EC
[31] MY3 40 KSO3/PD3 TMR1/W UI3/GPC6
MY4 0421 Add R590 for Modern Stand By
[31] MY4
2
MY5 41 KSO4/PD4 AD_TYPE R342 2K/F_4 R341 100/F_4
[31] MY5 KSO5/PD5 Adapter Voltage R332 R331 AD_ID [36]
MY6 42 107 NBSWON1#
[31] MY6 43 KSO6/PD6 PW RSW /GPE4 18 NBSWON1# [30]
MY7 SUSC#
1
[31] MY7 KSO7/PD7 RI1#/W UI0/GPD0 SUSC# [4,16] D10
MY8 44 WAKE UP 21 DNBSWON# 90W High V X
[31] MY8 MY9 45 KSO8/ACK# RI2#/W UI1/GPD1 DNBSWON# [4]
PDZ5.6B
KBMX C473 R343
[31] MY9 46 KSO9/BUSY 35
MY10 SUSON 12.1K/F_4 C474
[31] MY10 KSO10/PE W UI5/GPE5 SUSON [38,40,43]
MY11 51 112 LAN_POWER 65W Middle V V 0.1U/25V_4 100P/50V_4
[31] MY11 KSO11/ERR# RING#/PW RFAIL#/CK32KOUT/LPCRST#/GPB7 LAN_POWER [43]
MY12 52
2
[31] MY12 KSO12/SLCT
MY13 53
[31] MY13 KSO13
MY14 54 45W Low X V
[31] MY14 KSO14
MY15 55 66 BAT_I
[31] MY15 KSO15 ADC0/GPI0 BAT_I [36]
MX0 58 67 AD_TYPE
B [31] MX0 59 KSI0/STB# ADC1/GPI1 68 B
MX1 SYS_I
[31] MX1 KSI1/AFD# ADC2/GPI2 SYS_I [36]
MX2 60 A/D D/A 69 AD_AIR
[31] MX2 61 KSI2/INIT# ADC3/GPI3 70 AD_AIR [36]
MX3 THRM_MOINTOR2 R296 *10K_4 GPIO33_EC R307 10K_4 NBSWON1#
[31] MX3 KSI3/SLIN# ADC4/W UI28/GPI4 THRM_MOINTOR2 [6] +3V +3VPCU
MX4 62 71 THRM_MOINTOR3 R325 4.7K_4 GPUT_CLK R306 4.7K_4 MBCLK
[31] MX4 KSI4 ADC5/W UI29/GPI5 THRM_MOINTOR3 [6]
MX5 63 72 THRM_MOINTOR1 R301 4.7K_4 GPUT_DATA R305 4.7K_4 MBDATA
[31] MX5 64 KSI5 ADC6/W UI30/GPI6 73 THRM_MOINTOR1 [6]
MX6 ADAPTER_SEL_EC R324 10K_4 EC_PCIE_WAKE#
[31] MX6 KSI6 ADC7/W UI31/GPI7
MX7 65 R300 47K/F_4 LID_EC#
[31] MX7 KSI7 R304 4.7K_4 MBCLK2 0506 Del R340 R310 10K_4 S5_ON
81 EMU_LID R303 4.7K_4 MBDATA2
DAC5/RIG0#/GPJ5 EMU_LID [28]
128 CLOCK 80 THRM_ALERT_HW#1 R329 10K_4 DNBSWON#
VCORE
VSS
VSS
VSS
VSS
27
49
91
104
75
12
AJ089870F01
L23 *HCB1608KF-181T15_S0_6/S
IT8987E/BX CLK_24M_KBC R321 *10_4 C460 *10P/50V_4
C456
0.1U/16V_4
IT8502_AGND 0423 change to shortpad HWPG C447 0.1U/16V_4
C463 C464
1U/6.3V_4 1000P/50V_4 THRM_MOINTOR2 C662 2 1 0.1U/16V_4
Close U13
0423 change to shortpad
THRM_MOINTOR3 C663 2 1 *0.1U/16V_4
+3V_VSTBY L20 *HCB1608KF-181T15_S0_6/S
+3VPCU
A A
[2,4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,41,43] +3V
C446
1226 0.1U/16V_4
[6,13,30,31,32,33,34,36,37] +3VPCU
Add THRM_MONITOR2 to EC Pin70
Add THRM_MONITOR3 to EC Pin71
Change GPU_AC_BATT to EC Pin120 PROJECT : X1A
Change TEMP_MBAT to EC Pin126 Quanta Computer Inc.
Delete IMVP_PWRGD connection on EC Pin 96 Size Document Number Rev
Change DGPU_PROCHOT_EC# to EC Pin 96 Custom
WLAN/G-Sensor/G-CLK/TS 1A
NB5 Date: Wednesday, May 13, 2015 Sheet 35of 49
5 4 3 2 1
5 4 3 2 1
DC_JACK
90W
AD_ID [35]
Do Not add test pad on BATDIS_G signal
36
14"
EC68 +BATCHG PL3 BATT+
1000P/50V_4 +VA_AC +VA PQ16 PQ3 +BAT_DIS *0_8/S
6
AP0203GMT-HF FDMS7698
2014/11/11 updated
CN5 PL8 PQ18 BAT1
1 EMB20P03V +VAD +PRWSRC PR177 +VIN *BBP28B3-B520A-7H
AD_ID
S
VDD 6 2 5 2 1 2 5 2 PL4 2 1
PL7
7 3 1 1 *0_8/S SMD 3 2
4 3
1
5 EC92 *0_8/S 8 PC157 PC150 SMC
GND 4
G
0.1U/25V_4 0.1U/25V_4
*10U/25V_8
PC183 PD10 PD9 PC28 5
4
LED2 8 3 EC69 PC153 PC152 PC144 *P4SMAJ20A 0.01U/50V_4 B_TEMP_MBAT 6 5
0.1U/25V_4
W LED GND PR68
4 7 6 10
P4SMAFJ20A
2200P/50V_4 PR176 PR178 BQBATDRV PR1 PR2
0.1U/25V_4
0.1U/25V_4
0.1U/50V_6
2
2
LED1 7 GND 9 *0_2/S *0_2/S 330_4 330_4 8 7 10 9
ALED GND 4.02K/F_4 8 9
10 BATDIS_G
GND
[35] MBDATA
DC-IN CONN
PV update PV change [35] MBCLK
PR3
Place this ZVS close to For EMI
Place this ZVS close 200K/J_4
Far-Far away +VIN PV update
to Diode away +VIN
BQACN_N
BQACP_N
+PRWSRC +3VPCU
IDEA_G
1
PC2 PC3 PR4
+VAD PR30 *100P/50V_4 *100P/50V_4 1K/F_4
+5VPCU PQ2 1M_4 TEMP_MBAT [35]
4 3
Q2
PC44 PC41 PC37
EC58 EC59 EC60 EC61 PD1 PD2
PR14
2
5 6 PR223 PR221 1U/25V_4 1U/25V_4 1U/25V_4 1U/25V_4 PDZ5.6B PDZ5.6B PC1 PC119
PR179 4.02K/F_4 4.02K/F_4 1U/25V_6 0.1U/25V_4 0.1U/25V_4 0.01U/50V_4 0.01U/50V_4
220K_4 2 1 PR29
2.43K/F_6 +VA
Q1
1BQACN
2BQACP
+VIN
PV change For ISN Place this cap
3
ACP
ACN
MBATLED0# [35]
PC154 PC188 PC186 EC8 EC7 EC6 EC5 EC93 EC94 EC95
8
7
6
5
2200P/50V_4
1000P/50V_4
10U/25V_8
10U/25V_8
10U/25V_8
10U/25V_8
PQ12 PC32 PC187
4.7U/25V_8
*10U/25V_8
*10U/25V_8
*10U/25V_8
DRC5144E0L BQCMSRC 3 24 PQ19
0.1U/25V_4
1
PC33
PD6
PV update
BQ24780SRUYR
3
2
1
PR227 PR56 BQVCC 28 PC34
1N4448WS-7-F +VAD VCC PR53
+5VPCU *430K/F_4 1U/25V_6 25 BQB_2 BQB_1
10/F_8 BTST +BAT_DIS +BATCHG
0_6 PL9 PR198
1
8
7
6
5
1
PR172 430K/F_4 PC202
2.43K/F_6 PR74 PR69
PV change *1000P/50V_4 PQ17
75K/F_4 82K/F_4 EMB20N03V PR192 PC168 PC175 PC162 PD3
RB500V-40
10U/25V_8
10U/25V_8
PR79 2.2_6
0.1U/25V_4
*0_4/S 23 BQLODRV 4 PR200 PR195
2
[35] AD_AIR MBDATA BQDATA 11 LODRV *0_2/S *0_2/S
SDA
3
PC137 22
12 GND
1000P/50V_4
3
2
1
2 0.1U/16V_4 SCL 29 2200P/50V_4
AC_LED_ON# [35] PAD
PR73 PR78 BQPROCHOT 10
[2,35,41] H_PROCHOT# PROCHOT
PQ11 12.4K/F_4 *0_4/S
DRC5144E0L +3VPCU PR76 *100K/F_4 BQBATPRES 15 17 BQBATSRCPR224 10/F_6
1
0.1U/25V_4
[34,35] ACIN ACOK SRN
PR22 PR232
PR219
PC42
PV update
*470_8 10/F_4 18 BQBATDRV
100K/F_4
[35] SYS_I
BQIADP 7
IADP
BATDRV
PAD
PAD
30
31 0.1U/25V_4
15" 17"
32
CMPOUT
PAD
3
IDCHG PAD
PMON
0.01U/50V_4 100P/50V_4 34 BAT2 *51483-00801-V01
PAD
PAD
PAD
PAD
ILIM
35 BBP28B3-B520A-7H BATT+ 1
2 PAD BATT+ 1 2 1
[35] BATSHIP 2 1 3 2
SMD
21
13
14
38
37
36
SMD 3 2 SMC 4 3
PQ1 Place this cap SMC 4 3 4
4
BQILIM
*2N7002K 5
close to EC
1
A
2014/11/11 updated A
PR60
43.2K/F_4
Place this cap EC90 EC91
close to EC 0.1U/25V_4 0.1U/25V_4
+3VPCU [6,13,30,31,32,33,34,35,37]
+5VPCU [37]
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Charger (BQ24780)
NB5 Date: Friday, May 22, 2015 Sheet 36 of 49
5 4 3 2 1
5 4 3 2 1
DC/DC +3VS5/+5VS5
37
Do Not add test pad on VCC & LDO pin +3VS5 [4,10,15,16,32,34,35,39,40,43,44,46]
+3VPCU +VIN_3VS5 +VIN +3.3 Volt +/- 5% +5VS5 [4,30,32,33,38,39,40,41,42,43,44,46]
PU13
5 8
PL15 TDC:8A
D LDO VIN *0_8/S D
0.1U/25V_4
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*1000P/50V_4
+3VS5 2.2U/6.3V_4 +3VS5
9
GND
2
PR83 PJP4
10K/F_4 PC60 +3.3VS5_S
PV change 6 SY8208BBST
PR88
SY8208BBST_S
*POWER_JP/S
1
HWPG SY8208BPG 2 BST PL17
PGOOD 0_6
[4,16,35,38,39] HWPG 0.1U/25V_4 2.2uH/8A(PCMC063T-2R2MN)
PR87 10 SY8208BSW
*0_4/S SW
1
PR89
*0_4/S PR97 +
S5_ON SY8208BEN 1 *2.2_6 PR245 PC239 PC235 PC242 PC237 PC236 PC240
EN1 *0_2/S
0.1U/16V_4
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*150U/6.3V_5X3.8 ESR20
2
PR91 PC224
PV change 1M_4 *0.1U/16V_4 PC64
+3VPCU *2200P/50V_4
1
4 SY8208BVOUT
VOUT
SY8208CEN
PR235
PD4
499K/F_4
SY8208BLDOEN 7 3 SY8208BFB PR240 PC216
*UDZVTE-173.6B +VIN EN2 FB
C C
1K/F_4 0.01U/50V_4
2
PR236
PR43 150K/F_4 SY8208B
*4.99K/F_4
3
2
PQ4
*METR3904-G
1
PR44
*4.02K/F_4
7 8
PL5 +5 Volt +/- 5%
LDO VIN *0_8/S
TDC:8A
PC167 PC170 PC161 PC160 PC165 PC149
EDP:9A
0.1U/25V_4
2200P/50V_4
2.2U/6.3V_4 9
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
GND
B +5VS5 B
2
PR39 PR35 PC30 PJP3
*0_4/S 6 SY8208CBST SY8208CBST_S +5VS5_S *POWER_JP/S
HWPG SY8208CPG 2 BST PL11
0_6
1
PGOOD 0.1U/25V_4 2.2uH/8A(PCMC063T-2R2MN)
10 SY8208CSW
SW
PV change
1
PR50
Rb *1K/F_4 +
PR34 PR230 PC227 PC217 PC223 PC205 PC210 PC207
[35] 5VS5_ON *0_2/S
*2.2_6
0.1U/16V_4
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*150U/6.3V_5X3.8 ESR20
2
SY8208CEN 1
[35] S5_ON EN
Ra PR36
1K/F_4 PC27 PC24
PR210 *0.1U/16V_4 *2200P/50V_4
1M_4
4 SY8208CVOUT
VOUT
5
VCC
3 SY8208CFB
PC176 FB
USB Charge Support Ra Rb 2.2U/6.3V_4 PR207 PC180
1K/F_4 6800P/50V_4
SY8208C
A
VINE (No support) Stuff NA A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NB5 3/5VPCU(RT8243A)
Date:Friday, May 22, 2015 Sheet 37 of 49
5 4 3 2 1
1 2 3 4 5
38
PR161
PV change
[4,16,35,37,39] HWPG
*0_4/S
PR165
A A
[35,40,43] SUSON
*0_4/S
PV change PC130
PR168 *0.1U/16V_4
*0_4
[18] DDR_VTT_PG_CTRL_R
PR158
1P35V_PGOOD
[35,40,43] MAINON PR166 243K/F_4
1P35V_CS
1P35V_S3
1P35V_S5
*0_4/S PR162 +VIN_DDR +VIN
PV change PC133 499K/F_4
*0.1U/16V_4 1P35V_TON
PL25 +1.35V +/- 5%
*0_8/S
Countinue current:6A
PC291 PC293 PC290 PC292 PC289
10
13
Peak current:8A
2200P/50V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
8
7
6
5
OCP minimum:12A
S3
S5
CS
PGOOD
TON
+0.75V_DDR_VTT +0.65V_DDR_VTT PQ30
EMB20N03V
20 +1.35VSUS
VTT 17 1P35V_UGATE 4
2 UGATE
VTTSNS
2
PC134 PC129
10U/6.3V_6 18 1P35V_BOOT PR164 PJP2
3
2
1
1 BOOT1 PL26 +1.35VSUS_S
VTTGND 2.2_6 *POWER_JP/S
0.1U/25V_4 1uH/11A(PCMC063T-1R0MN)
1
( 3mA ) PU10 16 1P35V_PHASE
RT8231BGQW PHASE
PR170
8
7
6
5
1
4 15 1P35V_LGATE
B
DDR_VTTREF VTTREF LGATE B
100/F_4 PR163 +
19 12 1P35V_VDD 2.2_6 PR160 PC128 PC127 PC123 PC124 PC126 PC294
VLDOIN VDD +5VS5
PC136 PC135 *0_2/S
0.1U/16V_4
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
*220U/2.5V_5X3.8 ESR12
2
0.1U/16V_4 0.033U/10V_4 4
PC132 PC125
1U/6.3V_4 PQ31
*10U/6.3V_6
VDDQ
PGND
LPMB
MDV1595SURH PC131
PAD
3
2
1
VID
2200P/50V_4
FB
+1.35VSUS
11
14
21
PR171 Rds(on) 14m ohm
1P35V_VID
1P35V_FB
*0_2/S
PR159
1P35V_VDDQ
+5VS5
*0_2/S
PR167
10.2K/F_4
PR169
10K/F_4
C C
D D
+1.35VSUS [3,6,17,18,40]
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
DDR3 (RT8231B)/1.8VS5 1A
NB5
Friday, MayDate:
22, 2015 Sheet
38 of 49
1 2 3 4 5
5 4 3 2 1
39
PV update
PR48
84.5K/F_4
D D
+VIN_0.95V PL6 +VIN (V1.00A+V1.00_MODPHY+VccPRIM_CORE)
6
PU12 *0_8/S
PR38 7 8
+1.0VS5 Volt +/- 5%
TON
+5VS5 NC IN 9
*0_4 IN 22
21 IN PC179 PC171 PC181 PC174 PC148
Countinue current:6A
VCC
2200P/50V_4
0.1U/25V_4
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
Peak current:9A
PC201
1U/6.3V_4 +1.0V_DEEP_SUS
2
PR62 PC43
20 1237BSTPCH 1237BSTPCH_S PJP1
BST PL13 +1.0VS5_S2
0_6 *POWER_JP/S
PR54 0.1U/25V_4 1uH/11A (PCMC063T-1R0MN)
PV change
1
*0_4/S 10 1237LX
HWPG 1237PGPCH 1 LX 11
[4,16,35,37,38] HWPG PGOOD LX 16
PR213 LX 17 PR67
*0_2/S LX 18 *2.2_6
1237PFMPCH 3 LX +
PFM PR239 PC220 PC221 PC228 PC54 PC59 PC229
12 *0_2/S
0.1U/16V_4
22U/6.3V_8
22U/6.3V_8
*220U/2V_7343
*22U/6.3V_8
*22U/6.3V_8
1237ENPCH 2 PGND 13
[15,35,39,40] SLP_SUS_ON EN PGND 14 PC45
PR65 PGND 15 *2200P/50V_4
*0_4/S PC196 PGND 19
PV change *0.1U/16V_4 PGND 4
C AGND C
PR47
2.61K/F_4
1237SSPCH 23 5 1237FBPCH 1237FBPCH_S
SS FB
PC40 PR208
0.1U/16V_4 AOZ1267QI-02 10K/F_4
PR95
*0_6/S
+3VS5
+1.8V +/- 5%
PC70
B 4.7U/6.3V_6 TDC:1A B
EDP:2A
4
HWPG 5 3
PG LX
PR101 SY8002B
*0_4/S PR246
1 2
[15,35,39,40] SLP_SUS_ON EN GND *0_2/S
PC241 PC238
FB
PC67
10U/6.3V_6
0.1U/16V_4
0.1U/16V_4
6
PR241
20K/F_4 R1
PR242
R2 10K/F_4
VO=(0.6(R1+R2)/R2)
A A
PROJECT : X1A
+VIN [28,31,33,34,36,37,38,41,42,43,44,45]
+3VS5 [4,10,15,16,32,34,35,37,40,43,44,46] Quanta Computer Inc.
+5VS5 [4,30,32,33,37,38,40,41,42,43,44,46]
Size Document Number Rev
Custom 1A
+1.1VS5 (RT8228)/2.5V
NB5 Date: Friday, May 22, 2015 Sheet 39 of 49
5 4 3 2 1
5 4 3 2 1
+1.0V_DEEP_SUS [9,13,15,16,39]
+1.0V [2,4,6,16,32,35]
+3VS5 [4,10,15,16,32,34,35,37,39,43,44,46]
+VCCSTPLL [2,4,5,6,9,41]
+VCCIO [2,6,16] +1.0V_DEEP_SUS
40
+3VS5
20150106 updated <= 65usec full
PC68 load ready
3
PR93 0.1U/16V_4 +1.0V_DEEP_SUS PU5
5
D *0_4 PR81 AOZ1335DI D
1 *47K/F_4 <= 65usec full 1 TDC:0.04A
[35,38,43] SUSON 4 +VCCSTG_ON 2 PR11161 VIN PV Update
2 *0_4/S
load ready 2
PV Update +1.0V +1.0V_MODERN
[15,35,39] SLP_SUS_ON VIN
PQ6 PC65 Ra Rb
PR90 PU4 PC48 *DMG3414U-7 1U/6.3V_4 9 8
PV Change
3
*0_4 *TC7SZ08FU *1000P/50V_4 VIN VOUT
TDC:0.16A
1
PR92 PR11168
PR100 +VCCSTPLL PC56 PC57 0_6 *0_6
*0_6/S 3 0.1U/16V_4 10U/6.3V_6
+3VS5 VBIAS
TDC:3A
PC55
PC72 PC69 0.1U/16V_4 PR98 +VCCIO
0.1U/16V_4 *10U/6.3V_6 *0_6/S
PV Update PR11174
0_4
PV Update 5
4 GND
[35,38,40,43] MAINON ON
+VCCSTPLL PR82
Rc
0_4 PC53
+5VS5 *0.1U/16V_4
PV Update
PR72
*22_8 PR11175
35 PCH_SLP_S0_EC
PR85 0_4
*1M_4
PV Update
6
Rd
2
C PQ5B PR102 C
MODERNSTB_EN
Support Modern standby mode
*2N7002KDW *0_4
1
3
5
1. Remove Ra/Rc & stuff Rb/Rd
PR86
*2M_4
PV Update
Reserve for Modern StandBy 2. stuff block C & D
PQ5A
PV Update
4
*2N7002KDW
+3VS5
Block C
+1.35VSUS
3
+1.0V_DEEP_SUS PR99 0.1U/16V_4
5
*0_4
1 PR11166 <= 65usec full
[35] PCH_SLP_S0_EC
4 2
2 load ready
[35,38,40,43] MAINON
PC351 <= 65usec full 0_4 PC295 PQ40
3
3
PR11169 *0_4/S *NL17SZ08DFT2G *1000P/50V_4
1
*47K/F_4
2 PR11167 +1.35V_VCCPLL_OC
[35,38,40,43] MAINON TDC:0.3A *0_6/S
PQ59
PV Change PV Update
PC349 *DMG3414U-7 PR11170 +1.0V_MODERN
Reserve for debug
*1000P/50V_4 *0_6/S
1
PC347 PC296
B 0.1U/16V_4 10U/6.3V_6 B
PC348 PC350
PV Update PV Update
*0.1U/16V_4 *10U/6.3V_6
3
PR11172 5
*1M_4
3
6
PQ41A
4
5 2 *2N7002KDW
PR11163
6
PQ61A *2M_4
4
1
2 *2N7002KDW
PR11171 PQ41B
*2M_4 *2N7002KDW
1
PQ61B
*2N7002KDW
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+1.0V/+VCCSTPLL
NB5 Date: Friday, May 22, 2015 Sheet 40of 49
5 4 3 2 1
1 2 3 4 5
PR51
41
PC193 Place close to
1000P/50V_4 +VIN_VCC_CORE PL1 +VIN
PV change 2K/F_4 PR220 VCORE Inductor
*0_8/S
PR110 PR49
PR216 2 1
+VCC_CORE
100/F_4 *0_4/S 4.7K/F_4 PC22
100K/F_4 NTC
0.018U/16V_4
[5] VCC_SENSE
[5] VSS_SENSE PC185 PC140 PC138 PC139 PC6 PC141 PC10 PC4
1000P/50V_4 PC23 PR31 2200P/50V_4 0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
PR111
PR41 PR40 0.033U/10V_4 14K/F_4 CPU CORE
5
*0_4/S
100/F_4 1K/F_4 PR197
SWN_CORE PQ13 D TDC:21A
+VCCSTPLL FDMS7698
PV change 7.5K/F_4 PR52
HG_CORE_L 4
G EDP:40A
S DCR=0.48m ohm
PC26 PC192 1_6
A 1000P/50V_4 PL14 +VCC_CORE A
DEL PQ21 (20141216)
1
2
3
0.15uH/40A(PCMB104T-R15MS0R487)
PC173 0.22U/25V_6
PR199
PR186 PR184 PR189 PR24 PC158
1
100/F_4 *110/F_4 45.3/F_4 75/F_4 0.1U/16V_4 1K/F_4
5
0.01U/50V_4 PR175 + +
PC178 15P/50V_4 PQ21 D D 2.2_6 PR228 PR237 PC203 PC49
VR_SVID_DATA FDMS0308AS G G *0_2/S *0_2/S 390U/2.5V_5X5.8ESR10 *220U/2V_7343
2
VR_SVID_ALERT# 4 4
VR_SVID_CLK
PV change S S
H_PROCHOT# PQ14
1
2
3
1
2
3
1000P/50V_4
FDMS0308AS PC143 CSN_CORE
140K/F_4
PR205 2200P/50V_4
69.8K/F_4
0.1U/16V_4
PC14 11K/F_4 SWN_CORE
1000P/50V_4
PV change
PV change
PR173 PC156
*0_4/S PR10 470P/50V_4
PR109 +VIN_VCCGT +VIN
PC166
PC182
TSENSE_CORE
+VCCSA PL10
IOUT_CORE
COMP_CORE
*0_8/S
100/F_4 2.49K/F_4 PR55 PV change
CSN_CORE
VSN_CORE
CSP_CORE
VSP_CORE
BST_CORE
ILIM_CORE
PR187
PR194
PC5 HG_GT1 HG_GT1_L
SW_CORE
HG_CORE
LG_CORE
[6] VCCSA_SENSE
PR174 1000P/50V_4 1_6
[6] VSSSA_SENSE
1
*0_4/S
PR112 PR19 PV change PC198 PC197 PC200 PC199 PC195 PC194 PC189 + +
VCCGT
2200P/50V_4
PC234 PC225
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
*4.7U/25V_8
100/F_4 1K/F_4
100U/25V
*100U/25V
TDC:22A
2
1
2
PV change
34
31
27
30
29
28
32
33
25
26
24
23
15
G1
D1
D1
D1
PC8 EDP:45A
PV change
IOUT_1a
ILIM_1a
TSENSE_1ph
COMP_1a
VSN_1a
VSP_1a
CSN_1a
CSP_1a
HG3
BST3
SW3
LG3/ICCMAX_1b
HG1
[42] CSN_SA
1000P/50V_4 PC191 DCR=0.48m ohm
B 1 2 14 BST_GT1 PL16 +VCCGT B
For Acoustic
S1/D2
PC11 VSP_SA 49 BST1 0.15uH/40A(PCMB104T-R15MS0R487)
Place close to VSP_1b 16 SW_GT1 0.22U/25V_6 9 SW_GT1
*390P/50V_4
1
PR6 PC16 17 LG_GT1 PR204 PQ22
G2
LG1/ROSC
S2
S2
S2
14K/F_4 0.022U/25V_4 CSN_SA 45 FDMS3664S PR233 + + +
CSN_1b 2.2_6 PR234 PR238 PC206 PC222 PC58
PR5 14K/F_4
5
CSP_SA 44 21 *0_2/S *0_2/S 390U/2.5V_5X5.8ESR10 390U/2.5V_5X5.8ESR10 *220U/2V_7343
[42] SWN_SA PV change
2
CSP_1b HG2
7.5K/F_4
PC9 PR182 34K/F_4 ILIM_SA 46 22
180P/50V_4 ILIM_1b PU1 BST2
PR13
PC151 1000P/50V_4 COMP_SA 47 20 PC212
PC15 COMP_1b NCP81206 SW 2 PR211
PV change 2200P/50V_4 CSN_GT1
1K/F_4
0.01U/50V_4 PC159 IOUT_SA 43 19 LG_GT2
470P/50V_4 IOUT_1b LG2/ICCMAX_1a SWN_GT1
22.6K/F_4
PR185 100K/F_4
DIFFOUT_2ph/IccMax_2ph
[42] PWM_SA PR180
PR183
*0_4/S
51.1K/F_4
PV change40 PW M/ADDR_VBOOT CSP1_2ph
10 CSP_GT1
CSCOMP_2ph
VR_HOT# CSP2_2ph
TSENSE_2ph
COMP_2ph
PR26 *0_4/S ALERT# 37 7 CSSUM_GT PC184
IOUT_2ph
[5] VR_SVID_ALERT#
VSN_2ph
VSP_2ph
ALERT# CSSUM_2ph
ILIM_2ph
VR_RDY
2
EPAD
12 18
PSYS
VCC
VRMP PVCC
G1
D1
D1
D1
EN
PV change PC177
42
41
50
11
51
52
53
13
0.01U/50V_4 +5VS5
S1/D2
PR214
C PR7 10K/F_4 PR212 0_4/P SW_GT1 9 C
VR_RDY
VR_EN
PSYS
TSENSE_GT
VSP_GT
VSN_GT
IOUT_GT
DIFFOUT_GT
FB_GT
COMP_GT
ILIM_GT
CSCOMP_GT
+3V PV change
2.2_6
IMVP_PWRGD PR15 *0_4/S PQ23
G2
S2
S2
S2
PR16 *0_4/S PC29 PC31 *FDMS3664S
[35] VRON
PR18 *0_4/S +5VS5
1U/6.3V_4
2.2U/6.3V_4
[36] PMON
5
PR12 30.9K/F_4 PC172
PV change 0.1U/16V_4
PC7 *100P/50V_4 LG_GT1
PV change PV change
PR247
+VCCGT PR9 *0_4/S
100/F_4
[7] VCCGT_SENSE
PC13 PR17
[7] VSSGT_SENSE
1000P/50V_4 1K/F_4
PR248
PR8 *0_4/S
470P/50V_4
100/F_4 PR190
14.3K/F_4
PV change PV change
TSENSE_GT TSENSE_CORE PC12
PR45 PR203
2200P/50V_4 SWN_GT1
PR188 7.15K/F_4 39.2K/F_4
PC163
27K/F_4
PR196 PR206 PC25
*0_4/S *0_4/S
PV change 0.047U/25V_4
PV change PR37 CSN_GT1 Place close to
10/F_4 GT1 Inductor
2
15K/F_4
D
100K/F_4 NTC
100K/F_4 NTC
PR33
PC17
PR23
PC18 15P/50V_4 165K/F_4
2
49.9/F_4 PR226
1
330P/50V_4
100K/F_4 NTC
PR27
PR25 1K/F_4 PC20 PC21 PR193
1
GT MOSFET VCORE MOSFET
program IccMax_2ph
2200P/50V_4 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CPU VR IC (NCP81206)
NB5 Date: Friday, May 22, 2015 Sheet 41of 49
1 2 3 4 5
1 2 3 4 5
42
A A
+VIN_VCCSA +VIN
PL2
*0_8/S
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
0.1U/25V_4
8
7
6
5
VCCSA HG_SA
PR42
HG_SA_L VCCSA
1_6
4 TDC:8A
8
PU2
DCR=4.2m ohm EDP:12A
DRVH
PC35 PQ15
PV change
3
2
1
1 VGTA_BST1 EMB20N03V PL12 +VCCSA
PR57 2 BST 0.47uH/17.5A(PCMC063T-R47MN)
[41] PWM_SA PW M 7
*0_4/S SW_SA 0.22U/25V_6
B PR58 3 SW B
[41] DRON EN
8
7
6
5
*0_4/S NCP81253
PR215 PC51 PC213 PC214 PC215 PC50 PC52
PV change 2.2_6 PR225 PR229
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
22U/6.3V_8
*22U/6.3V_8
*22U/6.3V_8
+5VS5 4 *0_2/S *0_2/S
GND
PAD
VCC 5 LG_SA 4
DRVL
PC36 PQ20
9
6
2.2U/6.3V_6 MDV1595SURH PC190
3
2
1
2200P/50V_4
CSN_SA [41]
SWN_SA [41]
C C
D D
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 2A
+VCCSA (NCP81253)
NB5 Date: Friday, May 22, 2015 Sheet 42 of 49
1 2 3 4 5
5 4 3 2 1
43
D D
+5VS5 +3VS5
+3VS5 +3VS5
PC63 PC61
PC85 PC76 5.1A 0.1U/16V_4 0.1U/16V_4 0.04A
5.2A 0.67A
7
0.1U/16V_4 0.1U/16V_4
7
+5V PR104 +5V_S2 +3VSUS_S2 PR94 +3VSUS
VIN1
VIN1
VIN2
VIN2
+3V PR108 +3V_S2 +3VLANVCC_S2 +3VLANVCC *0_8/S *0_6/S
VIN1
VIN1
VIN2
VIN2
C C
*0_8/S 13 8
PR105 VOUT1 OUT2
13 8 14 9
14 VOUT1 OUT2 9 VOUT1 OUT2
VOUT1 OUT2 *0_6/S
PC73 PC74 PC71 PC66
PC82 PC84 PC75 PC77 *10U/6.3V_6 0.1U/16V_4 11 0.1U/16V_4 *10U/6.3V_6
*10U/6.3V_6 0.1U/16V_4 11 0.1U/16V_4 *10U/6.3V_6 PU7 GND
PU8 GND APL3523A 15
APL3523A 15 4 GND
GND +5VS5 VBIAS
+5VS5 4 PC62
PC80 VBIAS
PR244
PR106 0.1U/16V_4 *0_4/S
0.1U/16V_4 *0_4/S MAINON 3 5
CT1
CT2
3 5 ON1 ON2 SUSON [35,38,40]
LAN_POWER [35]
CT1
CT2
12
10
*0_4/S PC83 PC78 *0.1U/16V_4 *0.1U/16V_4
12
10
*0.1U/16V_4 *0.1U/16V_4
PC233 PC232
PC81 PC79 220P/50V_4 1000P/50V_4
220P/50V_4 1000P/50V_4
B B
+VIN +5VS5
+5V_CAM
20150212 updated
+VIN PR301 PQ55 PC345
1
2
5
6
PR300 *1M_4 *EMB32N03K *0.1U/16V_4
*22_8
3
3
4
PR302 *2200P/50V_4
2 2 *5.1M_4 +5V_CAM
3
2 PR304
[14,35] 3D_CAM_EN
1
[2,4,10,11,12,13,14,15,16,17,18,27,28,29,30,31,32,33,34,35,41] +3V
[28,29,30,31,32,33,34] +5V
[28,31,33,34,36,37,38,39,41,42,44,45] +VIN
[4,10,15,16,32,34,35,37,39,40,44,46] +3VS5
[4,30,32,33,37,38,39,40,41,42,44,46] +5VS5
[30,32] +3VLANVCC
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
Dis-charge IC (SLG55448)
NB5 Date: Friday, May 22, 2015 Sheet 43 of 49
5 4 3 2 1
5 4 3 2 1
+VIN
PL22
+VIN_GFX
+5VS5 8899VCC +5VS5
44
PR299 +VIN_GPU
*0_8/S 8899PVCC
+MVDDQ Volt +/- 5% PC98 PC275 PC274 PC115 PC114 PR270
2.2_6
2200P/50V_4
PR289 2.2_6 PC266 PC286
0.1U/25V_4
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
Countinue current:6A 4.7_4 2.2U/6.3V_6 2.2U/6.3V_6 PR279
4.7_4
OCP_TDC=12.6A
28
50
PR155 PC270
D OCP_SPIKE=18A(1ms) PC285 140K/F_4 0.1U/25V_4 D
VCC
PVCC
PR296
8899TONA 40 4 8899TON
Vboot=0.9V TONSETA TONSET
5
6
7
8
150K/F_4 8899ISEN2P_S
0.1U/25V_4 47 8899UGATE1 8899ISEN2P_S [45]
LL=0 V/A UGATE1 PC287
8899UGATE1 [45]
8899ISEN2N_S
46 8899BOOT1 8899ISEN2N_S [45]
external offset=0.45V DCR=9mohm 48899UGATEA_S PR266 8899UGATEA143 BOOT1
UGATEA1 0.1U/25V_4 PR293
+1.35V_VGA 1_6
PL24 PQ27 48 8899PHASE1 470/F_4
1uH/11A (PCMC063T-1R0MN) EMB20N03V PHASE1 8899PHASE1 [45]
1
2
3
8899PHASEA1 8899PHASEA144 49 8899LGATE1 PC278
PHASEA1 LGATE1 8899LGATE1 [45]
5
6
7
8
PC284 1 8899UGATE2 8899ISEN1P_S
UGATE2 8899UGATE2 [45] 8899ISEN1P_S [45]
1
*220U/2V_7343
390U/2.5V_5X5.8ESR10
*1K/F_4
2
1
2
3
619/F_4 2200P/50V_4 LGATE2 845/F_4 PC276 PC267
5 8899ISEN2P
0.1U/16V_4
PC283 33 ISEN2P
ISENA2P 6 8899ISEN2N 1U/25V_4
PR144 34 ISEN2N
1U/25V_4
PV Change 8899VCC ISENA2N 8 8899ISEN1P
PR271
10K/F_4 ISEN1P
PR295 *1K/F_4
8899ISENA1P 36 7 8899ISEN1N
ISENA1P ISEN1N
150/F_4
PR291 8899ISENA1N 35 9 PR275
C 845/F_4 ISENA1N ISEN3P 845/F_4 PC268 C
10 PR268 0.1U/16V_4
ISEN3N 8899VCC
PC279 10K/F_4
0.1U/16V_4 PR286 8899VSENA 32 11 8899VSEN PR265 0_4/P
VSENA VSEN
0_4
PC273 PC101
PR280
PR290 PR274 8899COMPA30 13 8899COMP PR264 PR124 +VGA_CORE
COMPA COMP 0_4
0_4 0_4 24.9K/F_4 150K/F_4
*82P/50V_4 330P/50V_4
PC262
PR127 PR128
PC269 PR118
PR287 PR281 PV Change 10/F_4
10K/F_4 0_4
0_4 5.1K/F_4 10P/50V_4
*100P/50V_4
PR132 PR259
*10K/F_4 PC108 PC258 *0_4/S VGPU_CORE_SENSE [22]
8899FBA 31 12 8899FB *0.1U/25V_4 PR261
FBA FB VSS_GPU_SENSE [22]
14 8899RGND *0.1U/25V_4 *0_4/S
RGND
PR148 PR147 PR145 PR146
8899SET2 26 25 8899SET1 PR116
8899VCC SET2 SET1 8899VCC
10/F_4
VID Override table (VDD) 19.1K/F_4 130/F_4 340K/F_4 13.7K/F_4 PV Change
PR154 PR153 PR150 PR151
2
8899VDDIO 18 17 8899IMONA PC259
+1.8V_VGA VDDIO IMONA
+1.8V_VGA 18.7K/F_4 *100P/50V_4 PR269
2
2.2_6 100K/F_4 NTC
PGOODA
PWROK
V064
SVC
SVD
1
SVT
PC104 PR140
1
PR121 PR122 0.1U/16V_4 PR149 16.5K/F_4
19
20
21
22
38
39
29
16
+3VS5 8899PGOOD
*10K/F_4
PROJECT : X1A
PR134 PR292
Quanta Computer Inc.
*10K/F_4 *0_2/S
Size Document Number Rev
Custom 1A
Vcore( RT8899A)
NB5 Date: Friday, May 22, 2015 Sheet 44 of 49
5 4 3 2 1
5 4 3 2 1
45
D D
+VIN_GPU
+VIN
For Acoustic
PL21
*0_8/S
1
PC103 PC110 PC118 PC280 PC117 PC116 + +
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
PC252 PC261 PC253
*4.7U/25V_8
5
100U/25V
0.1U/25V_4
*100U/25V
2
2
D D
PR157 G G
8899UGATE1_G 4 8899UGATE1_G 4
[44] 8899UGATE1 S S
1_6 DCR=1.1mohm
PQ10 PQ29
1
2
3
1
2
3
*FDMS7698 FDMS7698 PL23 +VGA_CORE
0.36uH/30A
PV change
[44] 8899PHASE1
5
PR130
D D 2.2_6
G G
4 4
[44] 8899LGATE1 S S PR283 PR284
PQ9 PQ26 *0_2/S *0_2/S
1
2
3
1
2
3
C C
*FDMS0308AS FDMS0308AS PC102
2200P/50V_4
8899ISEN1N_S 8899ISEN1N_S [44]
8899ISEN1P_S 8899ISEN1P_S [44]
2200P/50V_4
4.7U/25V_8
4.7U/25V_8
4.7U/25V_8
0.1U/25V_4
*4.7U/25V_8
Vboot=0.9V
5
B B
D D LL=1m V/A
PR119 G G
8899UGATE2_G 4 8899UGATE2_G 4
[44] 8899UGATE2 S S
1_6 DCR=1.1mohm
PQ8 PQ25
1
2
3
1
2
3
1
5
PR120 + + + + +
D D 2.2_6 PC109 PC257 PC255 PC256 PC254 PC97
390U/2.5V_5X5.8ESR10
390U/2.5V_5X5.8ESR10
390U/2.5V_5X5.8ESR10
390U/2.5V_5X5.8ESR10
0.1U/16V_4
*220U/2V_7343
G G
2
4 4
[44] 8899LGATE2 S S PR258 PR257
PQ7 PQ24 *0_2/S *0_2/S
1
2
3
1
2
3
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CPU Core2
NB5 Date: Friday, May 22, 2015 Sheet 45 of 49
5 4 3 2 1
1 2 3 4 5 6 7 8
+0.95V +/- 3%
46
Countinue current:2A
Peak current:3A
OCP minimum:4A
A A
+1.0V_VGA +0.95V_VGA
2
PV Change *2200P/50V_4 *2.2_6 PR255
PU15 PL19 +1.0V_VGA_S2 *POWER_JP/S
PR253 1uH/11A (PCMC063T-1R0MN)
1
554PG_1.0V 4 1 554LX_1.0V
[12,20,35,44] DGPU_PWROK PG NC
RT8068A
PJP5 *0_4/S 9 2
*POWER_JP/S PVIN LX
2 1 554PVIN_1.0V 10 3 PC248 PC251 PC247 PC249
+3VS5 PVIN LX *68P/50V_4 *22P/50V_4 PR256 0.1U/16V_4 10U/6.3V_6
PR250 7 554NC_1.0V *0_2/S
PC245 PC244 10_6 NC
0.01U/50V_4 10U/6.3V_6 554SVIN_1.0V 8 6 554FB_1.0V 554FB_1.0V_S
SVIN FB
11 5
R1
R2 PR254
PC246 GND EN 6.65K/F_4
Vih=1.6V
1U/6.3V_4 PR251
11.3K/F_4 V0=0.6*(R1+R2)/R2
PR252
4.7K/F_4
[12,20,44,46] DGPU_PWR_EN
+3V_VGA
+VGA_CORE/+1.35_VGA
+1.8V_VGA/+0.95V_VGA
+3VS5 +1.8V_DEEP_SUS
+3.3V_VGA +/- 5% +1.8V_VGA +/- 5%
Countinue current:0.1A Countinue current:0.5A
Peak current:0.25A PC95 PC90 Peak current:1A
C 0.1U/16V_4 0.1U/16V_4 C
1
7
+3V_VGA PR117 PR113 +1.8V_VGA
VIN1
VIN1
VIN2
VIN2
*0_8/S *0_6/S
13 8
14 VOUT1 OUT2 9
VOUT1 OUT2
PC91 PC94 PC87 PC86
*10U/6.3V_6 0.1U/16V_4 11 0.1U/16V_4 *10U/6.3V_6
PU9 GND
APL3523A 15
4 GND
+5VS5 VBIAS
PD7 PC93
RB500V-40
2 1 PR114
0.1U/16V_4 10K/F_4
3 5
[12,20,44,46] DGPU_PWR_EN ON1 ON2 DGPU_PWR_EN [12,20,44,46]
CT1
CT2
PR115
10K/F_4 PC96 PC92
12
10
0.47U/6.3V_4 0.47U/6.3V_4
+3V_VGA [19,20,22]
PC89 PC88 +1.0V_VGA [19,22,46]
1000P/50V_4 1000P/50V_4 +1.8V_VGA [19,20,22,32,44]
D D
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
+VGA POWER
NB5 Date: Friday, May 22, 2015 Sheet 46 of 49
1 2 3 4 5 6 7 8
5 4 3 2 1
+3VS5 +3VLANVCC
16
+3VS5 +3V 19 2
+3VPCU
+VIN 5
+3VS5
1
+PWR_SRC +VIN
47
S5 PWR S5 PWR 3 +5VS5
LAN_POWER 15 MAINON 18 PWR +5VPUC 3V/5V
MOS SW MOS SW BTN VR CHARGER Battery
HWPG
D PG D
+3VS5 +3VSUS
14 LATCH
3
S5 PWR (NBSWON1#)
SUSON 13
MOS SW
SUSON 13 4 S5_ON
MAINON 18 9 RSMRST#
RSMRST#
+5VS5 +5V
9 DNBSWON#
19 LAN_POWER 15 PWRBTN#
12 SUSC#
SLP_S4#
S5 PWR 17 SUSB#
MAINON 18 SLP_S3#
MOS SW VRON 23
31 PLTRST#
PLTRST#
EC EC_PWROK 30 SYS_PWROK
SLP_SUS_ON 7 PCH
C +VIN +0.65V_DDR_VTT PCH_PWROK C
9 DSWROK_EC
19 DSW_PWROK
GPIO55 6 SLP_SUS#_EC
MAINON 18 SLP_SUS#
27 IMVP_PWRGD
GPH5 IMVP_PWROK 27
1.35V +1.35VSUS
VR 14 11 SUSWARN#_EC
SUSWARN#
SUSON 13
10 SUSACK#_EC
22 HWPG SUSACK#
HWPG
PG
EN
+3V +1.0V
21 DRON
25 25
18 DRON
MAINON
+1.0V_EN DS3 PWR
+3VS5
PCH_SLP_S0_N MOS SW 8
VRON 23
20 +1.8V_DEEP_SUS
14
A +3V +VCCSTPLL PW8824 A
13
SUSON DS3 PWR
VCCSTPLL_EN
MOS SW PG
HWPG PROJECT : X1A
EN
SLP_SUS_ON Quanta Computer Inc.
7 SLP_SUS_ON 7 Size Document Number Rev
1A
NB5 Intel POWER UP SEQUENCE
Wednesday, May 13, 2015
Date: Sheet 47 of 49
5 4 3 2 1
5 4 3 2 1
PU1
48
Adapter (+VAD)
+PRWSRC
(+VIN)
Battery VRON SUSON MAINON DRON +3V_MAIN_EN DGPU_FB_EN SLP_SUS_ON
D D
C C
LAN_POWER MAINON SUSON MAINON +3V_MAIN_EN DGPU_PWR_EN SLP_SUS_ON SLP_SUS_ON +1.5V_EN USBPW_ON#
+3VLANVCC +3V +3VSUS +5V +3V_GFX +3V_AON +1.8V_DEEP_SUS +3V_DEEP_SUS +1.5V +5V_USBP1
A A
PROJECT : X1A
Quanta Computer Inc.
Size Document Number Rev
1A
NB5 Power Block Diagram
Date: Wednesday, May 13, 2015 Sheet 48 of 49
5 4 3 2 1
5 4 3 2 1
+3V_RTC
G3 to S0 S0 S0 to S3 S4/S5
49
SRTC_RST#
D RTC_RST# D
T1
9 ms
S5_ON
+5VS5
+3VS5
PWR_BTN
SLP_SUS_ON
+3V_DEEP_SUS
C C
+1.8V_DEEP_SUS
+1.0V_DEEP_SUS
tPCH03
10 us
RSMRST#
SUS_ON
+1.35VSUS
+3VSUS
+VCCSTPLL
MAINON
B B
tPCH28
30 us
+3V +5V +1V
+0.65V_DDR_VTT
+VCORE
+VCCGT
IMVP_PWRGD
EC_PWROK
A A
PLTRST#
tPCH33
PROJECT : X1A
99 ms Quanta Computer Inc.
Size Document Number Rev
1A
NB5 Intel POWER UP SEQUENCE
Wednesday, May 13, 2015
Date: Sheet 49 of 49
5 4 3 2 1