Preferred Devices
PIN 2
EMITTER
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
(GROUND)
Rating Symbol Value Unit
Collector-Base Voltage VCBO 50 Vdc
Collector-Emitter Voltage VCEO 50 Vdc 3
SC−89
CASE 463C
STYLE 1
MARKING DIAGRAM
3
xx D
1 2
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation, PD
FR−4 Board (Note 1) @ TA = 25°C 200 mW
Derate above 25°C 1.6 mW/°C
Thermal Resistance, Junction to Ambient (Note 1) RθJA 600 °C/W
Total Device Dissipation, PD
FR−4 Board (Note 2) @ TA = 25°C 300 mW
Derate above 25°C 2.4 mW/°C
Thermal Resistance, Junction to Ambient (Note 2) RθJA 400 °C/W
Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C
1. FR−4 @ Minimum Pad.
2. FR−4 @ 1.0 × 1.0 Inch Pad.
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2
DTA114EXV3T1 Series
ON CHARACTERISTICS (Note 3)
DC Current Gain DTA114EXV3T1 hFE 35 60 −
(VCE = 10 V, IC = 5.0 mA) DTA124EXV3T1 60 100 −
DTA144EXV3T1 80 140 −
DTA114YXV3T1 80 140 −
DTA114TXV3T1 160 250 −
DTA143TXV3T1 160 250 −
DTA144WXV3T1 80 140 −
DTA144TXV3T1 160 250 −
DTA143XXV3T1 20 35 −
Collector−Emitter Saturation Voltage (IC = 10 mA, IE = 0.3 mA) VCE(sat) − − 0.25 Vdc
(IC = 10 mA, IB = 5.0 mA) DTA123EXV3T1
(IC = 10 mA, IB = 1.0 mA) DTA114TXV3T1/ DTA143TXV3T1/
DTA143ZXV3T1/DTA124XXV3T1/DTA143EXV3T1
Output Voltage (on) VOL Vdc
(VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kΩ) DTA114EXV3T1 − − 0.2
DTA124EXV3T1 − − 0.2
DTA114YXV3T1 − − 0.2
DTA114TXV3T1 − − 0.2
DTA143TXV3T1 − − 0.2
(VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kΩ) DTA144EXV3T1 − − 0.2
(VCC = 5.0 V, VB = 4.0 V, RL = 1.0 kΩ) DTA144WXV3T1 − − 0.2
DTA144TXV3T1 − − 0.2
DTA143XXV3T1 − − 0.2
Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 kΩ) VOH 4.9 − − Vdc
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kΩ) DTA114TXV3T1
DTA143TXV3T1
3. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
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3
DTA114EXV3T1 Series
250
PD , POWER DISSIPATION (MILLIWATTS)
200
150
100
50 RθJA = 600°C/W
0
−50 0 50 100 150
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
r(t), NORMALIZED TRANSIENT THERMAL RESISTANCE
1.0
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01 0.01
SINGLE PULSE
0.001
0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000
t, TIME (s)
Figure 2. Normalized Thermal Response
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4
DTA114EXV3T1 Series
1 1000
VCE = 10 V
IC/IB = 10
0.01 10
0 20 40 50 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
4 100
75°C 25°C
f = 1 MHz
lE = 0 V TA=−25°C
10
IC, COLLECTOR CURRENT (mA)
3 TA = 25°C
Cob , CAPACITANCE (pF)
1
2
0.1
1
0.01 VO = 5 V
0 0.001
0 10 20 30 40 50 0 1 2 3 4 5 6 7 8 9 10
VR, REVERSE BIAS VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS)
100
VO = 0.2 V
V in , INPUT VOLTAGE (VOLTS)
TA=−25°C
10
25°C
75°C
0.1
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
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DTA114EXV3T1 Series
10 1000
VCE = 10 V
TA=75°C
1 25°C 25°C
TA=−25°C 100 −25°C
75°C
0.1
0.01 10
0 20 40 50 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
4 100
75°C 25°C
f = 1 MHz
TA=−25°C
lE = 0 V
IC, COLLECTOR CURRENT (mA)
10
3 TA = 25°C
Cob , CAPACITANCE (pF)
1
2
0.1
1
0.01
VO = 5 V
0 0.001
0 10 20 30 40 50 0 1 2 3 4 5 6 7 8 9 10
VR, REVERSE BIAS VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS)
Figure 10. Output Capacitance Figure 11. Output Current versus Input Voltage
100
VO = 0.2 V
V in , INPUT VOLTAGE (VOLTS)
TA=−25°C
10 25°C
75°C
0.1
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
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DTA114EXV3T1 Series
1 1000
IC/IB = 10
75°C −25°C
0.1 100
0.01 10
0 10 20 30 40 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
1 100
TA=75°C 25°C
f = 1 MHz
lE = 0 V
0.8 TA = 25°C 10 −25°C
IC, COLLECTOR CURRENT (mA)
Cob , CAPACITANCE (pF)
0.6 1
0.4 0.1
0.2 0.01
VO = 5 V
0 0.001
0 10 20 30 40 50 0 1 2 3 4 5 6 7 8 9 10
VR, REVERSE BIAS VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS)
Figure 15. Output Capacitance Figure 16. Output Current versus Input Voltage
100
VO = 0.2 V
TA=−25°C
25°C
V in , INPUT VOLTAGE (VOLTS)
10 75°C
0.1
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
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DTA114EXV3T1 Series
1 180
IC/IB = 10 VCE = 10 V TA=75°C
80
0.01 60
40
20
0.001 0
0 20 40 60 80 1 2 4 6 8 10 15 20 40 50 60 70 80 90 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
4.5 100
4 f = 1 MHz TA=75°C 25°C
lE = 0 V
3.5 TA = 25°C
IC, COLLECTOR CURRENT (mA)
Cob , CAPACITANCE (pF)
3 −25°C
2.5
10
2
1.5
1
VO = 5 V
0.5
0 1
0 2 4 6 8 10 15 20 25 30 35 40 45 50 0 2 4 6 8 10
VR, REVERSE BIAS VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS)
Figure 20. Output Capacitance Figure 21. Output Current versus Input Voltage
10
VO = 0.2 V 25°C
V in , INPUT VOLTAGE (VOLTS)
TA=−25°C
75°C
0.1
0 10 20 30 40 50
IC, COLLECTOR CURRENT (mA)
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8
DTA114EXV3T1 Series
75°C
TA = −25°C
75°C TA = −25°C
0.1 100
25°C
25°C
VCE = 10 V
IC/IB = 10
0.01 10
0 5 10 15 20 25 30 35 40 45 50 1 10 100
IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA)
Figure 23. Maximum Collector Voltage versus Figure 24. DC Current Gain
Collector Current
1.4 100
f = 1 MHz 75°C
IC, COLLECTOR CURRENT (mA)
1.2 IE = 0 V
Cob, CAPACITANCE (pF)
TA = 25°C 10 TA = −25°C
1.0
25°C
1
0.8
0.6 0.1
0.4
0.01 VO = 5 V
0.2
0 0.001
0 10 20 30 40 50 60 0 1 2 3 4 5 6 7 8 9 10 11
VR, REVERSE BIAS VOLTAGE (VOLTS) Vin, INPUT VOLTAGE (VOLTS)
Figure 25. Output Capacitance Figure 26. Output Current versus Input Voltage
100 +12 V
VO = 0.2 V
Vin, INPUT VOLTAGE (VOLTS)
Typical Application
TA = −25°C for PNP BRTs
10 75°C
LOAD
25°C
1
0 5 10 15 20 25
IC, COLLECTOR CURRENT (mA)
Figure 27. Input Voltage versus Output Current Figure 28. Inexpensive, Unregulated Current Source
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DTA114EXV3T1 Series
PACKAGE DIMENSIONS
SC−89
CASE 463C−03
ISSUE C
NOTES:
A 1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
−X− 2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
3 MATERIAL.
1 2
B −Y− S 4. 463C−01 OBSOLETE, NEW STANDARD 463C−02.
K MILLIMETERS INCHES
DIM MIN NOM MAX MIN NOM MAX
G A 1.50 1.60 1.70 0.059 0.063 0.067
2 PL B 0.75 0.85 0.95 0.030 0.034 0.040
D 3 PL C 0.60 0.70 0.80 0.024 0.028 0.031
D 0.23 0.28 0.33 0.009 0.011 0.013
0.08 (0.003) M X Y G 0.50 BSC 0.020 BSC
H 0.53 REF 0.021 REF
J 0.10 0.15 0.20 0.004 0.006 0.008
K 0.30 0.40 0.50 0.012 0.016 0.020
L 1.10 REF 0.043 REF
M −−− −−− 10 _ −−− −−− 10 _
M N N −−− −−− 10 _ −−− −−− 10 _
J S 1.50 1.60 1.70 0.059 0.063 0.067
C
STYLE 1:
SEATING PIN 1. BASE
−T− PLANE 2. EMITTER
3. COLLECTOR
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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