EEE, IV SEM 1

Course Plan FMTC0302/Rev.1.2

Semester: IV Year: 2017-18

Course Title: Title: Operational amplifier and Course Code: 15EE46

Linear ICs
Total Contact Hours: 50 Duration of USE: 03 Hrs.

USE Marks: 80 IA Marks: 20

Lesson Plan Author Prof. Chaitanya K J Date: 1/1/2018

Checked By: Dr. Vinoda S Date: 4/1/2018

Pre-requisites:
i. The knowledge of Basic Electronics, Basic Electrical, KVL and KCL.

Course Learning Outcomes-CO

At the end of the course students will be able to:
i. Understand the basics of op-amp.
ii. Understand the various applications of op-amps.
iii. Design various circuits using linear ICs.
iv. Use linear ICs in Hardware projects .
 EEE, IV SEM 2

Course Articulation Matrix: Mapping of Course Outcomes (CO) with Program outcomes

Course Title: Operational amplifier and linear ICs Course code: 15EE46 Semester: IV Year: 2017-18

1 2 3 4 5 6 7 8 9 10 11 12

Communication
Problem analysis

Project management and finance

Engineering knowledge

Design/development of solutions

Modern tool usage

Ethics

Life-long learning
Conduct investigations of complex

The engineer and society

Individual and team work

Environment and sustainability
problems
Course Outcomes-CO

1. Understand the basics of op-amp. 2 1 1

2.Design of linear and Non linear 2 2 2 1

circuits using Op-amps.
3. Analyze various circuits of linear 1 2 2 2 1
ICs.

4. Use linear ICs in Hardware 2 2 1 1 2

projects.

AVERAGE 1.75 1.7 1.66 1.5 1 2

5
 EEE, IV SEM 3

Course Articulation Matrix: Mapping of Course Outcomes (CO) with Program Specific outcomes

Course Title: Operational amplifier and linear ICs code: 15EE46 Semester: IV Year: 2017-18

Course Outcomes-CO PSO 1 PSO 2 PSO 3

1 .Understand the basics of op-amp. 1

2. Understand the various applications of op-amps. 2 2

3. Design various circuits using linear ICs. 2 2 3

4. Use linear ICs in Hardware projects. 2 2 2

EEE, IV SEM 4

Course Content
 Course Title: Operational amplifier and linear
Course Code: 15EE46
ICs
L-T-P: 4-0-0 Teaching Hrs:50 USE Duration:03
IA Marks: 20
USE Marks:80 Total Marks: 100
Credits: 04

Content
EEE, IV SEM 5
Module – 1 Hrs

Operational amplifiers: Introduction, Block diagram representation of

a typical Op-amp, Schematic symbol, Characteristics of an Op-amp,
Ideal op-amp, Equivalent circuit, Ideal voltage transfer curve, Open loop
configuration, Differential amplifier, Inverting & non inverting amplifier,
Op-amp with negative feedback ; voltage series feedback amplifier gain,
Input resistance, Output resistance, Voltage shunt feedback amplifier-
gain, Input resistance, Output resistance.
General Linear Applications: D.C. & A.C amplifiers, Peaking 10
amplifier, Summing,
Scaling & averaging amplifier, Inverting and non-inverting
configuration, Differential configuration, Instrumentation amplifier.

Revised Bloom’s
L1 – Remembering, L2 – Understanding, L3 – Applying
Taxonomy Level

Module-2

Active Filters: First & Second order high pass & low pass Butterworth
filters, Higher order filters Band pass filters, Band reject filters & all
pass filters.
DC Voltage Regulators: Voltage regulator basics, Voltage follower
regulator, Adjustable output regulator, LM317 & LM337 Integrated 10
circuit regulators.
L1 – Remembering, L2 – Understanding, L3 – Applying,
Revised Bloom’s L4 – Analysing
Taxonomy Level

Module-3
Signal generators: Triangular / rectangular wave generator, Phase shift
oscillator, Wienbridge oscillator, Oscillator amplitude stabilization,
Signal generator output controls.
Comparators & Converters: Basic comparator, Zero crossing detector,
Inverting & noninverting Schmitt trigger circuit, Voltage to current
converter with grounded load, Current 10
to voltage converter and basics of voltage to frequency and frequency to
voltage converters

Revised Bloom’s L1 – Remembering, L2 – Understanding, L3 – Applying,

Taxonomy Level L4 – Analyzing

Module-4
Signal processing circuits: Precision half wave & full wave rectifiers
limiting circuits,
Clamping circuits, Peak detectors, Sample & hold circuits.
A/D & D/A Converters: Basics, R–2R D/A Converter, Integrated circuit
 EEE, IV SEM 6

Evaluation Scheme

IA Exam Scheme
Assessment Weightage in Marks

Internal Assessment 1 15

Internal Assessment 2 15

Internal Assessment 3 15

Average of best of two IA + Average of four unit 15 + 5 = 20

tests
Total (max)

Course Unitization for Internal Assessment Exams and University Semester

Examination
No. of Questions in No. of
Teaching
Module Chapter Questions
Hours IA1 IA2 IA3
in USE
1 Operational 10 02
amplifiers ,General 02
Linear Applications
2 Active Filters, DC 10 02
01
Voltage Regulators
3 Signal generators, 10 02 02
Comparators &
Converters
4 Signal processing 10 01 02
circuits, A/D & D/A 01
Converters
5 Phase Locked Loop 10 02
02
(PLL), Timer

Note*
For I.A.:
 Each IA is conducted for 30 marks and reduced to 15 marks.
 3 Questions carrying 15 marks each and up to 4 sub questions are allowed.
 Answer any 2 full questions of 16 marks each (Two full questions from Q1,Q2 and Q3)
 Each unit test is conducted for 15 marks and reduced to 5 marks.
 2 Questions carrying 8 marks each are allowed.
 EEE, IV SEM 7

For U.S.E..:
 Question paper will have ten questions.
 Each full question consisting of 16 marks.
 There will be 2 full questions (with a maximum of three sub questions) from each module.
 Each full question will have sub questions covering all the topics under a module.
 The students will have to answer 5 full questions, selecting one full question from each module.

Date: Head of Department

 EEE, IV SEM 8

Chapter wise Plan

Course Code and Title: 15EE46 – Operational amplifier and linear ICs

Module Number and Title: 1- Operational amplifiers ,General Planned Hours: 10

Linear Applications

Learning Outcomes:

At the end of the topic student should be able to:

Sr.No TLO’s CO’s BL

1. Understand the block diagram of op-amp i

L1
2. Understand the basic operation of op-amp i
L2

3 Explain the different linear applications of op-amp ii

L4

4 Design different op-amp configurations ii

L3

Lesson Schedule

Class No. Portion covered per hour

1.Introduction, Block diagram representation of a typical Op-amp,
Schematic symbol.
2. Characteristics of an Op-amp, Ideal op-amp, Equivalent circuit,
Ideal voltage transfer curve, Open loop configuration.
3. Differential amplifier, Inverting & non inverting amplifier.
4. Op-amp with negative feedback; voltage series feedback amplifier gain,
Input resistance, Output resistance
5. Voltage shunt feedback amplifier- gain, Input resistance, Output resistance.
6. D.C. & A.C amplifiers.
7. Peaking amplifier, Summing.
8. Scaling & averaging amplifier.
9. Inverting and non-inverting configuration.
10. Differential configuration, Instrumentation amplifier
 EEE, IV SEM 9

Review Questions

Sr.No Questions TLO BL

1 Draw the basic circuit diagram of op-amp;
2 L1
identify all terminals and briefly explain how the
circuit operates.

2 What are the characteristic of an ideal op-amp.

2 L1

3 Define the following electrical parameters: input

2 L1
offset voltage, input bias current, input offset
current, input resistance, CMRR, output voltage
swing and slew rate.

4 Explain briefly why negative feedback is

2 L1
desirable in amplifier applications.

5 Find the expressions for Af ,Zif and Zof for voltage

3 L1
series and voltage shunt feedback amplifier.

6 Briefly explain the difference between the dc and

3 L1
 EEE, IV SEM 10

ac amplifiers.

7 Design peaking amplifier circuit to provide a gain

4 L3
of 5 at a peak frequency of 10 kHz.

8 Explain how op amp can be used as summing,

3 L2
scaling and averaging amplifier.

Sr.No Questions TLO BL

9 What are the two differential amplifier
3 L2
configurations? Briefly compare and contrast
these configurations.

10 Explain the operation of non-inverting amplifier

3 L1
and derive an equation for its voltage gain.

11 Explain the operation of inverting amplifier and

3 L2
derive an expression for its voltage gain.

12 With neat block diagram explain Instrumentation

1 L1
amplifier.

13 Why op-amp cannot be used in open loop

2 L1
configuration as an amplifier?

14 What is the difference between ideal op-amp and

2 L1
practical op-amp.

15 Compare inverting and non-inverting amplifier

3 L1
circuit using op-amp.

16 Draw and explain equivalent circuit of practical

2 L1
op-amp.
 EEE, IV SEM 11

17 Draw and explain the voltage transfer curves for

2 L1
the op-amp.

Course Code and Title: 15EE46 – Operational amplifier and linear ICs

Module Number and Title: 2. Active Filters, DC Voltage Planned

Regulators Hours:10

Learning Outcomes:

At the end of the topic student should be able to:

Sr.No TLO’s CO’s BL

1 Understand the necessity of filters.

ii L1

2 Design different types of filters.

iii L3

3 Understand the working of different types regulators.

ii L1

4 Design regulator circuits.

iv L3
 EEE, IV SEM 12

Lesson Schedule

Class No. Portion covered per hour

1. First order high pass & low pass Butterworth filters.
2. Second order high pass & low pass Butterworth filters.
3. Higher order filters
4. Band pass filters.
5. Band reject filters & all pass filters.
6. Voltage regulator basics.
7. Voltage follower regulator
8.Adjustable output regulator
9. LM317 Integrated circuit regulators.
10. LM337 Integrated circuit regulators.

Review Questions
Sr.No Questions TLO BL

1
Explain the operation of first order high pass 2 L2
Butterworth filter.
2
Explain the operation of second order high pass 2 L2
Butterworth filter.
3
Explain the operation of second order low pass 2 L2
Butterworth filter.
4
Explain the operation of first order low pass 2 L2
Butterworth filter.
5
Explain with neat diagram the operation of wide 2 L2
band pass filter.
6
Explain with neat diagram the operation of narrow 2 L2
band pass filter.
7
Explain the operation of wide band reject filter. 2 L2

8
What is an all-pass filter? Where and why is it 1 L1
needed?
 EEE, IV SEM 13

9
Briefly explain the action of dc voltage regulator. 3 L1
Write the equations for line regulation, load
regulation and ripple rejection.
10 Sketch the circuit of a voltage follower circuit.
3 L1
Explain its operation.

11 Show how a voltage follower regulator should be

3 L2
modified to produce an output voltage greater than the
reference voltage.

12 Briefly discuss the design procedure for a voltage

3 L2
follower regulator.
13 Briefly discuss the design procedure for a voltage
3 L2
follower regulator with an output voltage greater
than the reference voltage.

14 Explain the operation of LM317 and LM337 IC

3 L2
regulators.

Course Code and Title: 15EE46 – Operational amplifier and linear ICs

Module Number and Title: 3. Signal generators , Planned Hours: 10

Comparators & Converters

Learning Outcomes:

At the end of the topic student should be able to:

Sr.No TLO’s CO’s BL

1 Understand different types of signal generator. ii L1

2 Design signal generator for a particular frequency. iii L3

3 Understand the working of different comparators. ii L2

4 Design different comparator, converter circuits. iii L3

 EEE, IV SEM 14

Lesson Schedule

Class No. Portion covered per hour

1. Triangular / rectangular wave generator.

2. Phase shift oscillator.
3. Wienbridge oscillator.
4. Oscillator amplitude stabilization.
5. Signal generator output controls.
6. Basic comparator, Zero crossing detector.
7. Inverting & noninverting Schmitt trigger circuit.
8. Voltage to current converter with grounded load.
9. Current o voltage converter.
10. Basics of voltage to frequency and frequency to voltage converters.

Review Questions
Sr.No Questions TLO BL
1 Draw and explain the operation of
1 L1
triangular/rectangular signal generator.

2 How to achieve frequency and duty cycle

1 L2
adjustment in triangular/rectangular signal
generator.

3 With neat circuit diagram explain the working of

1 L1
 EEE, IV SEM 15

RC phase shift oscillator.

4 Draw and explain the operation of Wien bridge

1 L1
oscillator using op-amp.

5 How to achieve amplitude stabilization in various

1 L1
oscillators explain with neat circuit diagram.
6 Draw neat circuit diagram of output stage of signal
1 L1
generator and explain how to achieve the controls.

7 Draw the circuit diagram of a comparator using

3 L1
IC741 op-amp. Explain its working.

8 Explain zero crossing detector and draw the input-

3 L1
output waveforms.

9 Explain the working of inverting and non-

3 L1
inverting Schmitt trigger circuit.
10 Explain the operation of F/V and V/F converter.
3 L1
11 Explain the operation of voltage to current
3 L1
converter with grounded load.

12 Explain the operation of current to voltage

3 L1
converter.

Course Code and Title: 15EE46 – Operational amplifier and linear ICs

Module Number and Title: 4. Signal processing circuits, A/D Planned Hours: 10
& D/A Converters

Learning Outcomes:

At the end of the topic student should be able to:

Sr.No TLO’s CO’s BL
1
Analyze half wave and full wave rectifiers. ii L1
 EEE, IV SEM 16

2
Determine performance parameters of half wave and ii L1
full wave rectifiers.
3
Analyze different signal processing circuits.. ii L2

4
Understand the significance of different types of analog ii L2
and digital converters.

Lesson Schedule

Class No. Portion covered per hour

1. Precision half wave rectifiers & full wave rectifiers.

2. Limiting circuits.
3. Clamping circuits.
4. Peak detectors.
5. Sample & hold circuits.
6. Basics, R–2R D/A Converter.
7. Integrated circuit 8-bit D/A, successive approximation ADC.
8. Linear ramp ADC.
9. Dual slope ADC.
10. Digital ramp ADC.

Review Questions
Sr.No Questions TLO BL
1 Draw and explain half wave precision rectifier
1 L1
circuit.
2 With help of neat diagram and waveform explain
1 L1
full wave precision rectifier circuit.

3 Show how Zener diodes can be used to limit the

1 L2
output voltage of an op-amp circuit. Briefly explain.

4 Sketch a Zener diode peak clipper circuit with an

1 L1
adjustable output voltage limit. Explain the circuit
 EEE, IV SEM 17

operation and write the equations for the upper and

lower limits of output voltage.

5 Sketch an op-amp dead zone circuit and also explain

1 L1
its operation.

6 Draw and explain the operation of precision clipper

1 L1
circuit.
7 Explain the operation of precision clamping circuit.
3 L1
8 Show how a dead zone circuit can be combined with
3 L2
a summing circuit to produce precision limiting on
both positive and negative half-cycle of the output
waveform. Draw the voltage waveforms throughout
the circuit and explain its operation.
9 Draw the circuit of an op-amp precision clamping
3 L1
circuit and explain its operation.

10 Explain the operation of sample and hold circuit

3 L1
with signal, control and output waveforms.

11 Explain the operation of a voltage follower peak

3 L1
detector circuit, discussing capacitor selection
procedure.

12 Sketch precision rectifier peak detector circuit, draw

3 L1
the input and output waveforms and explain the
circuit operation. Write the equation for calculating
the capacitor value for a peak detector circuit.

13 Sketch the circuit of a LH0053 IC sample and hold,

3 L1
and briefly explain its operation.

Sr.No Questions TLO BL

14 Explain operation of a successive approximation
4 L4
ADC using simplified block diagram.

15 Explain op-amp D/A converter with R-2R resistors.

4 L4
16 Explain the operation of dual slope ADC.
4 L4
 EEE, IV SEM 18

17 Explain the operation of Linear ramp ADC.

4 L4
18 Explain the operation of Digital ramp ADC.
4 L4
19 Write a note on Integrated circuit 8-bit D/A.
4 L1

Course Code and Title: 15EE46 – Operational amplifier and linear ICs

Module Number and Title: 5. Phase Locked Loop (PLL) Planned Hours: 10
Timer

Learning Outcomes:

At the end of the topic student should be able to:

Sr.No TLO’s CO’s BL
 EEE, IV SEM 19

1 Understand basics of PLL.

ii L1
2 Understand the performance parameters of PLL.
i L2
3
Understand the working of 555 timer, astable and mono iv L2
stable multivibrator.

Lesson Schedule

Class No. Portion covered per hour

1.Basic PLL
2. Components.
3. Performance factors.
4. Applications of PLL IC 565.
5. Internal architecture of 555 timer.
6. Mono stable multivibrators.
7. Continued.
8. Astable multivibrators.
9. Continued.
10. Applications.

Review Questions
Sr.No Questions TLO BL
1 Draw and explain the functional diagram of a 555
1 L1
timer.

2 Define lock- in range, capture range and pull-in time

2 L1
with reference to PLLS.

3 Draw the block diagram of PLL and explain it.

1 L2
 EEE, IV SEM 20

4 Explain 555 timer as monostable multivibrator with

3 L2
relevant circuit diagram, waveforms and
expressions.

5 With a neat block diagram, explain the operation of

3 L1
a astable multivibrator using 555 timer.

6 Discuss the important features of IC PLL565.

3 L1
7 List the applications of PLL.
3 L1
8 Discuss some applications of timer in monostable
3 L1
mode.

9 Discuss some applications of timer in astable mode.

3 L1

(Model Question Paper)

Sem: IV/ I-IA
Sub: OP-AMPS and Linear ICs
Sub Code: 15EE46
Faculty Incharge: Prof. Chaitanya K J Max Marks: 30

Note: 1) Answer any TWO questions

2) All questions carry equal marks
Marks CO BL
 EEE, IV SEM 21

Q1 a) Define the following parameters and mention its practical values 05 i L1

for op-amp 741.

(i) CMRR (ii) Slew-rate (iii) PSRR (iv) Output offset voltage.

b) Obtain the expression for output voltage for the two input 05 i L2
inverting summing amplifier circuit.

c) With a neat circuit diagram explain basic operational amplifier 05 i L1

circuit.

Q2 a) If a non-inverting amplifier is designed for a gain of 100, using 05 i L3

an op-amp with 95 Db CMRR, calculate the common mode
output (Vocm ) for a common mode input (Vicm) of 2V.

b) Briefly explain the difference between the dc and ac amplifiers. 05 ii L1

c) With neat block diagram explain Instrumentation amplifier. 05 ii L1
Q3 a) Compare a wide band filter with narrow band filter. 05 ii L1
b) What is band elimination filter? Implement a band elimination 05 ii L1
filter using:
i) High pass filter and low pass filter. ii) Band pass filter.

c) Design a first order active low pass filter to have a cutoff 05 ii L3

frequency of 2 KHz. Use 741 opamp
[ Data: VBE = 0.7V; IB = 500Na for 741 opamp]

All the best

(Model Question Paper)

II -IA
Sem: IV
Sub: OP-AMPS and Linear ICs
Sub Code: 15EE46
Faculty Incharge: Prof. Chaitanya K J Max Marks: 30

Note: 1) Answer any TWO questions

2) All questions carry equal marks
 EEE, IV SEM 22

Marks CO BL

Q1 a Show how a voltage regulator can be modified to produce 10 ii L1

an output voltage regulator greater than the reference
voltage. Explain how the output can be adjustable.
b Design a voltage follower type regulator circuit using 741 05 iii L3
op-amp with following specifications: i) Output voltage
12V. ii) Maximum load current = 50mA.
Q2 a With a neat circuit diagram, explain the operation of non- 05 ii L1
inverting Schmitt trigger with different LTP and UTP.

b Draw the circuit of a triangular/rectangular waveform 10 ii L1

generator, which has frequency and duty cycle controls.
Explain the circuit operation with relevant waveforms for
a smaller duty cycle.

Q3 a Explain the operation of voltage to current converter with 10 ii L1

grounded load.

b Draw the circuit of an output stage for controlling the 05 ii L1

output amplitude and d.c voltage level of a signal
generator. Briefly explain its operation.
All the best

(Model Question Paper)

III -IA
Sem: IV
Sub: OP-AMPS and Linear ICs Date:
Sub Code: 15EE46 Time:
Faculty Incharge: Shashirekha.G Max Marks: 30.

Note: 1) Answer any TWO questions

2) All questions carry equal marks
 EEE, IV SEM 23

Marks CO BL

Q1 a 10 ii L1
Draw the sample and hold circuit. Sketch the signal, control
and output voltage waveforms. Explain the operation of the
circuit.
b Draw a precision full wave rectifier circuit using a precision 05 ii L1
half wave circuit and a summing circuit. Explain its working
and draw all relevant waveforms.

Q2 a Explain operation of a successive approximation ADC using 10 ii L1

simplified block diagram.

b Explain 555 timer as monostable multivibrator with relevant 05 ii L1

circuit diagram, waveforms and expressions.

Q3 a Draw the block diagram of PLL and explain it. 10 ii L1

b Explain op-amp D/A converter with R-2R resistors. 05 ii L2

All the best

Model Question Paper (CBCS) with effect from 2016-17

USN 15EE46

Time: 3 hrs. Max. Marks: 80

Note: Answer any FIVE full questions, choosing one full question
from each module.
 EEE, IV SEM 24

Module-1
1 a. Explain briefly why negative feedback is desirable in amplifier applications. (05 Marks)
b. Find the expressions for Af ,Zif and Zof for voltage series feedback amplifier. (06 Marks)
c Explain how op-amp can be used as peaking amplifier. (05 Marks)
OR
2 a. . A non-inverting amplifier is to amplify a 100Mv signal to a level of 3V. Using a 741 op-amp,
design a suitable circuit. (05 Marks)
b. Obtain the expression for output voltage for the two input inverting summing
amplifier circuit. (04 Marks)
c. Explain how op-amp can be used as transresistance amplifier. (07 Marks)

Module-2
3 a. What are the advantages of active filters? Explain the working of first order high pass filter and
also derive expression for gain and phase angle. (08 Marks)
b. Design a voltage follower type regulator circuit using 741 op-amp with following specifications:
i) Output voltage 12V. ii) Maximum load current = 50mA. (08 Marks)

OR
4 a. Design a first order active low pass filter to have a cutoff frequency of 2 KHz. Use 741 op-amp
[ Data: VBE = 0.7V; IB = 500Na for 741 opamp] (06 Marks)
b. Explain the terms line regulation, load regulation and ripple rejection for a dc voltage regulator.
(04 Marks)
c. Compare a wide band filter with narrow band filter. (06 Marks)

Module-3
5 a. Draw the circuit of a triangular/rectangular waveform generator, which has frequency and duty
cycle controls. Explain the circuit operation with relevant waveforms for a smaller duty cycle.
(10 Marks)
b. Design a non inverting Schmitt trigger circuit to have UTP = +3V and LTP= -5V. Use 741
op-amp with VCC = ±15V. (06 Marks)
OR
6 a. With a neat circuit diagram, explain the operation of non-inverting Schmitt trigger with different
LTP and UTP. (08 Marks)
b. Write a short note on signal generator output controls and explain it with a suitable circuit.
(08 Marks)
Module-4
 EEE, IV SEM 25

7 a. Draw a precision full wave rectifier circuit using a precision half wave circuit and a summing
circuit. Explain its working and draw all relevant waveforms. (10 Marks)
b. Explain op-amp D/A converter with R-2R resistors. (06 Marks)

OR
8 a. Explain operation of a successive approximation ADC using simplified block diagram.
(08 Marks)
b. Explain the operation of a voltage follower peak detector circuit, discussing capacitor selection
procedure. (08 Marks)

Module-5

9 a. With a neat block diagram, explain the operation of a astable multivibrator using 555 timer.
(10 Marks)
b. Define lock- in range, capture range and pull-in time with reference to PLLS. (06 Marks)

OR

10 a. Draw the block diagram of PLL and explain it. (08 Marks)

b. Explain 555 timer as monostable multivibrator with relevant circuit diagram, waveforms
and expressions. (08 Marks)