This paper aims to maximize throughput by minimizing power as minimum as possible. Scores of optimization
techniques such as FFT, IFFT and memory optimization are available for reducing power of mobile OFDM systems. An
approach for achieving reduction in power of MIMO OFDM system by optimizing FFT architecture is addressed in this
paper. Memory references in MIMO OFDM transceiver are costly due to their long delay and high power consumption. To
implement fast Fourier transform (FFT) algorithms on MIMO OFDM, involves many memory references to access butterfly
inputs and twiddle factors. Conventional FFT implementations require unused memory references to load the same twiddle
factors for butterflies from different stages in FFT diagrams. To minimize memory references due to twiddle factors for
implementing FFT algorithms in MIMO OFDM systems, memory reference reduction method is incorporated here. Twiddle
factor is calculated using binary scaling technique. The proposed FFT structure is the combination of memory reference
reduction method with binary scaling technique and Radix-4 booth multiplier. Here multipliers in FFT are realized with
shifters, adders and subtractors. The proposed structure is evaluated using performance parameters such as BER and SNR.
Structural realization and analysis pertaining to timing, power and throughput are implemented in Virtex-4 and analysis is
carried out in Altera respectively.
Keywords: Multiple input multiple output (MIMO), Orthogonal frequency division multiplexing (OFDM),
Fast Fourier transform (FFT), Inverse fast Fourier transform (IFFT), Inter symbol interference (ISI)
Multiple input multiple output (MIMO) system section for wireless specification, but the difficulty is
consists of multiple antennas at the transmitter and hardware complexity3. The reported architecture4 is
receiver ends to improve link reliability and data rates implemented in matrix inversion circuit in MIMO
of the wireless communication system. Orthogonal detection wireless specification, the problem is the
frequency division multiplexing is efficient in increase in hardware complexity and throughput is
synchronizing the received signal under fading less compared with conventional approach. Variable
environment and has been used in past times in length FFT processor design based on Radix 2, Radix
applications that require a huge data rate. Fast Fourier 4 and Radix 8 with complex multipliers containing 3
transform (FFT)/ inverse FFT (IFFT) processors are multiplications described earlier5, consumes more
proposed for multiple-input multiple-output power.
orthogonal frequency division multiplexing based ASIC based MIMO for OFDM provides data rate
IEEE 802.11n. Here the processor not only supports of 192 Mbps with a 20 MHz bandwidth for IEEE
the operation of FFT/IFFT but also provides sufficient 802.11a standard. Here the paper mainly focuses on
throughput rates but the drawback is hardware silicon complexity of MIMO OFDM system.
complexity is more, compared with conventional Throughput of the system is very less compared with
approaches1. FFT architecture which is optimized for other systems6. MIMO OFDM Base band transceiver
a processor with a memory system containing a cache implementation is based on ASIC. Verification is
is discussed elsewhere2. The processor uses a cached based on testbed and GUI monitor. Here the authors
memory with increased efficiency and performance have developed separate testbeds for MIMO OFDM
for MIMO system, but the achieved throughput is system for verification purpose but haven’t
very less. The architecture is mainly focused on concentrated on throughput and BER7. In order to
minimum mean square error detector in decoding meet IEEE 802.11n requirements8,9 the processor not
_______________________
only supports the operation of FFT/IFFT in 128 points
*Corresponding author (E-mail: s.t.jayamani@gmail.com) and 64 points but can also provide different
308 INDIAN J. ENG. MATER. SCI., OCTOBER 2012
throughput rates for simultaneous data sequences. The The data is modulated into waveform at inverse
difficulty is number of point’s increases more and fast Fourier transform (IFFT) stage of the transmitter.
more. Hence, the cost and complexity of the system is The IFFT is used to modulate each sub-channel onto
also increased. IEEE 802.11a established for WLAN the appropriate carrier. The receiver performs the
standard, provides 54 Mbps throughput using SISO vice-versa process of the transmitter. FFT is used to
OFDM transceiver. Here the throughput of SISO demodulate the data.
OFDM is very less; to increase the throughput, One of the main drawback in wireless
MIMO OFDM is preferred10. The IEEE 802-11n communication systems is ISI which is caused due to
provides data rate up to 600 Mbps with transmission the multi-path reflections in the channel. In order to
speed of 80 MHz. Latency is incurred by reduce ISI a cyclic prefix is added. The added cyclic
pre-processing the channel matrices for MIMO prefix is a part of the first stage of a symbol which is
detection11. Different approaches for design and described in Fig. 2. This addition is necessary because
implementation of 4×4 MIMO OFDM transceiver it enables multi-path representations of the source
which provides date rate of 1 Gbps is discussed signal to fade, so that it won’t interfere with the
elsewhere12-15. Here MMSE MIMO detector is used to subsequent symbol.
reduce the latency but the disadvantage is that it After the addition of cyclic prefix to the sub-carrier
requires larger circuit for high speed transmission. In channels, it must be transmitted as a single signal.
any n bit 2’s complement multiplier the maximum Thus, the process of parallel to serial conversion stage
number of addition and subtraction operation is n/216. is done by adding all sub-carriers and combining them
However, the above mentioned results are still into a single signal. At the end of this process all
insufficient in day to day requirements like sub-carriers are generated perfectly in a simultaneous
transmission speed and power. In this paper, the VLSI manner.
implementation of MIMO OFDM transceiver suitable
for low power application has been studied. The FFT MIMO OFDM
optimization helps to reduce the delay time, power MIMO OFDM (multiple input multiple output,
thereby simultaneously increasing speed. orthogonal frequency division multiplexing) is a
technology that combines MIMO and OFDM together
Orthogonal Frequency Division Multiplexing to transmit data in wireless communications, in order
Orthogonal frequency division multiplexing to deal with frequency selective channel effect. The
(OFDM) is a technique which is a subset of frequency OFDM signal on each subcarrier can overcome
division multiplexing in which a single channel uses narrowband fading. Therefore, OFDM can transform
multiple sub-carriers on neighbouring frequencies.
The sub-carriers of an OFDM system overlap each
other. Normally the neighbouring channels which
overlap may obstruct one another. Since the sub-
carriers in an OFDM system are exactly orthogonal to
one another, they are capable of overlapping without
interfering. As a result, OFDM systems are capable of
maximizing spectral efficiency without causing
neighbouring channel interference. Since multiple
sub-carriers are used to transmit in an individual
channel, an OFDM communication system must Fig. 1 OFDM structure
perform several steps, which are described in Fig.1.
In an OFDM system, each channel is divided into a
number of sub-carriers. A serial bit stream is converted
into several parallel bit streams. After the bit stream
division among the individual sub-carriers, each sub-
carrier is modulated. The receiver performs the vice-
versa process, which first divides the incoming signal
into appropriate sub-carriers and then demodulate them
individually before recovering the original bit stream. Fig. 2 Cyclic prefix insertion format
RAJA & KANNAN: VLSI IMPLEMENTATION OF HIGH THROUGHPUT MIMO OFDM TRANSCEIVER 309
frequency-selective fading channels into parallel flat Calculation of FFT is done using decimation in
ones. Then by combining MIMO and OFDM time (DIT) or decimation in frequency (DIF)
technology together, MIMO algorithms can be algorithm. If it is DIT, first twiddle factor is
applied in broadband transmission multiplied and later it is summed up. It is computed
A MIMO OFDM system transmits data modulated with the help of Eq. (2). The butterfly diagram
by OFDM from multiple antennas simultaneously. At pertaining to DIT is shown in Fig. 4.
the receiver, after OFDM demodulation, the signals
N −1 N −1 N −1
are recovered by decoding each sub-channel from all X ( k ) = ∑ x (n)W Nnk = ∑ x(n)W nk
N + ∑ x(n)W nk
N
transmitting antennas. n=0 n = 0 ( even ) n = 0 ( odd )
N N
In the basic structure of MIMO OFDM shown in 2
−1
2
−1 … (2)
Fig. 3, the signals are modulated by OFDM = ∑ x(2r )W
r =0
2 rk
N + ∑ x( 2r + 1)W N( 2 r +1) k
r =0
modulator, then they are transmitted by MIMO N
−1
N
−1
system, finally, the signals are recovered by the 2 2
OFDM demodulator.
= ∑ x (r )W
r =0
1
rk
N +W k
N ∑x
r =0
2 ( r )W Nrk
2 2
Fig. 3 MIMO OFDM structure Fig. 4 Radix 2 DIT FFT butterfly diagram
310 INDIAN J. ENG. MATER. SCI., OCTOBER 2012
Throughput of the mobile system entirely depends periodically adjusting the phase and amplitude. Four-
on the power consumption and delay. The proposed QAM uses four combinations of phase and amplitude.
system consumes less power and short delay. Hence, Moreover, each combination is assigned a 2-bit digital
the throughput of the mobile system is increased. pattern. For example, to generate the bit stream
Based on the results, the performance of the MIMO (1,1,0,0,1,1). Because each symbol has a unique 2-bit
OFDM is compared and given in Table 4. digital pattern, these bits are grouped in two’s so that
they can be mapped to the corresponding symbols. In
Results of Simulation our example, the original bit stream (1,1,0,0,1,1)
Code development and simulation were carried out grouped into three symbols (11,00,11). The
on a system running on Intel P4 configuration having constellation plot in Fig. 7 shows the symbol map of
4 GB RAM working in windows 7 Platform. The 4-QAM with each possible phase (Θ) and amplitude
MIMO-OFDM structure for determination of (A) of a carrier signal in polar coordinate form.
constellation points and BER were coded and Bit error rate (BER) is defined as the ratio of
simulated in MATLAB. Structural realisation of number of error bits and total number of bits. There
MIMO OFDM transceiver is implemented in Xilinx. are many ways of reducing BER. Here, we focused on
Analysis pertaining to timing, frequency is done in Alamouti code and modulation techniques. In this
Altera. The experimental results and analysis obtained study we have taken AWGN is communication
using Matlab, Xilinx and Altera are presented and channel where noise gets spread over the entire
discussed. spectrum of frequencies. BER has been calculated by
MATLAB implementation output comparing the transmitted signal with the received
QAM able to carry higher data rates than the signal and computing the error count over the total
other schemes. QAM sends digital information by number of bits. For any given modulation, the BER is
normally expressed in terms of signal to noise ratio
Table 4– Performance Comparisons (SNR). The bit error rate is improved from 10-6 with
S.No Parameter MIMO Mixed Radix Modified the almost need of 10 dB of SNR as shown in Fig. 8.
OFDM FFT FFT
architecture architecture FPGA implementation output
based based Table 5 shows the percentage minimization of
MIMO MIMO power, memory references, space in bytes and clock
OFDM OFDM
cycles, and Table 6 shows the reduction in number of
1 Power dissipation 597 mW 540 mW 111 mW slices, Flip flops, LUT’s and I/O blocks.
2 Number of 32 24 15
memory reference
3 Storage space in 32 30 12
bytes
4 No. of clock cycle 698 600 540
5 Throughput 600 Mbps 700 Mbps 1.4 Gbps
6. Delay 9.43 ns 8.89 ns 4.04 ns
7. Logic elements 9940 9813 5844
Table 5 Percentage reduction of parameters compared with
conventional approaches
Sl. No Parameter A B C
1 % of power 90 20 5
dissipation
2 % of 75 45 11
memory
reference
3 % of space 94 38 9
in bytes
4 % of clock 86 77 19
cycle
A – Mixed Radix FFT + MIMO OFDM Transceiver;
B – Modified FFT + MIMO OFDM Transceiver
C – Modified FFT + SISO OFDM Transceiver Fig. 7 QPSK signal constellation points
RAJA & KANNAN: VLSI IMPLEMENTATION OF HIGH THROUGHPUT MIMO OFDM TRANSCEIVER 313
Fig. 12 Modified FFT with binary scaling technique and radix-4 Booth multiplier RTL output
outr4,outr5,outr6 and outr7 and imaginary part reference reduction technique and higher radix
outputs are taken from outi0,outi1,outi2,outi3, multiplier. Finally, the real part outputs are taken
outi4,outi5,outi6 and outi7. from outr0,outr1, outr2, outr3, outr4, outr5, outr6 and
Modified FFT simulation output
outr7 and imaginary part outputs are taken from outi0,
outi1, outi2,outi3, outi4, outi5, outi6 and outi7.
Simulation output of modified FFT with binary
scaling radix-4 booth multiplier technique is shown in Simulation output
the Fig. 16. The binary inputs in0, in1, in2, in3, in4, Simulation output 4×4 MIMO OFDM transceiver
in5, in6 and in7 are passed through the memory is shown in Fig. 17. The inputs in, in2, in3 and in4 are
RAJA & KANNAN: VLSI IMPLEMENTATION OF HIGH THROUGHPUT MIMO OFDM TRANSCEIVER 317
Fig. 16 Modified FFT with binary technique and radix-4 booth multiplier simulation output
passed through the modified FFT algorithm in the proportional to throughput. Maximum throughput is
transmitter section. The transmitted outputs are achieved by minimizing power as minimum as
spatially multiplexed and the transmitted data are possible. The proposed system power is 111 mW
received by receiver using MRC (maximum ratio which is minimum. Hence, throughput of the system
combining) techniques. Finally, the outputs are taken is increased as shown in Fig. 18.
from out1, out2, out3 and out4. Delay analysis
Performance analysis Proposed system generates short delay which is
Power analysis very less compared with other systems. Delay is
Proposed system requires less power which is very inversely proportional to the throughput. Maximum
less compared with other systems. Power is inversely throughput is achieved by minimizing delay as
318 INDIAN J. ENG. MATER. SCI., OCTOBER 2012
minimum as possible. The gate delay of proposed hardware. When compared with other system the
system is 4.04 ns which is very small. Hence, the proposed system requires very minimum number of
throughput of the system can be increased as shown in logic elements, hence the cost and complexity of the
Fig. 19. system is reduced as shown in Fig. 21.
Throughput analysis Power dissipation versus throughput
The throughput of the proposed system is 1.4 Gbps, Maximum throughput is obtained at minimum
this can be achieved with the help of modified FFT power that is 111 mW power. When the power
architecture. Modified FFT architecture reduces increases more and more correspondingly throughput
redundant memory reference, number of partial of the system gradually decreases as shown in Fig. 22.
products and number of non zero digits as shown in From the graph we conclude that the proposed system
Fig. 20. consumes less power and transmits maximum number
Logic elements analysis
bits per second.
Only 58% of logic elements is required to Memory reference versus performance parameters of different
implement the proposed system. The number of logic MIMO OFDM systems
elements determines the cost and complexity of the The main objective of this paper is to reduce the
power and increase the throughput. Memory reference