Proceedings of the 11th European Microwave Integrated Circuits Conference
A SiGe-Based Broadband 100−180-GHz
Differential Power Amplifier with 11 dBm Peak
Output Power and >1.3 THz GBW
Faisal Ahmed, Muhammad Furqan, Klaus Aufinger∗ and Andreas Stelzer
Institute for Communications Engineering and RF-Systems, Linz, Austria
∗
Infineon Technologies, Am Campeon, Neubiberg, Germany
Abstract—A high-gain broadband power amplifier (PA) imple-
mented in a 130-nm SiGe BiCMOS technology is presented. The
architecture is based on a class-A four stage fully-differential cas-
code amplifier. Each stage is directly matched to the subsequent
stage, using a 4-reactance wide-band matching network. On-
wafer characterization of the amplifier shows a peak differential
gain of 24.8 dB with a 3-dB bandwidth spanning from 100 GHz
to around 180 GHz (limited by equipment bandwidth). The
amplifier demonstrates a peak differential output power of
11 dBm at 160 GHz and more than 7.5 dBm output power over
the entire D-band. The amplifier consumes around 97 mA from
a 2.7 V supply. The circuit is the first Si-based power amplifier
covering the full D-band. It achieves a record gain-bandwidth
product of >1.39 THz in D-band, an exceptional GBW/PDC ratio
of more than 5 GHz/mW and a state-of-the-art output power at
160 GHz and 170 GHz in Si-based circuits.
Index Terms—Power amplifier, broadband, heterojunction
bipolar transistor (HBT), SiGe BiCMOS, millimeter-wave cir-
cuits.
I. I NTRODUCTION
Recently, interest in the D-band frequency range
(110−170 GHz) has seen a major hype. The reasons
are manifold. Firstly, D-band provides a sufficiently large
operation bandwidth. Secondly, even at the higher end of this
frequency range, the current advanced silicon technologies
are able to provide very good performance. Furthermore,
on-chip and in-package antennas in this frequency range are
much more feasible on account of their smaller sizes, paving
the way for highly integrated system-on-chips and system-
in-packages. High resolution radars, precise position and
velocity sensors and ultra wideband passive millimeter-wave
(mmW) imaging systems are specially suited for D-band. The
performance of the core components of these applications
such as signal sources, multiplier chains and power amplifiers
has to be continuously improved, in order to cope up with
the ever increasing system demands. The primary challenge
still is to achieve constant gain and output power over wide
bandwidths. Many SiGe-based wideband amplifiers have been
reported providing up to 40 GHz 3-dB bandwidth [1]. Other
technologies such GaAs mHEMT and InP heterojunction
bipolar transistors (HBT) on account of much higher fT /fmax
and breakdown voltages are able to provide wider bandwidths,
but still fall short in terms of reliability, integration and cost
as compared to Si-based systems.
978-2-87487-044-6 © 2016 EuMA 257
II. C IRCUIT A RCHITECTURE AND D ESIGN
The PA is fabricated in Infineon’s SiGe BiCMOS technol-
ogy B11HFC. The process offers HBT with a minimum effec-
tive emitter width of 130 nm, and an fT /fmax of 250/370 GHz
and a collector−emitter breakdown voltage (BVCEO ) of 1.5 V.
The goal of the design was to achieve a uniform gain and a
moderately high saturated output power over the full D-band.
This required several key design decisions such as selecting
a suitable topology of the amplifier, the number and size of
the stages and most importantly a matching network archi-
tecture which provides wideband operation without having
excessive loss. In terms of wideband operation a common-
base amplifier is more suitable on account of a low near-
constant input impedance over frequency, but provides low
gain especially in case of a low load impedance. Although
a cascode configuration requires higher supply voltage to
provide a large output signal swing (and consequently has
lower power-added-efficiency (PAE)), but provides the highest
gain and a robust architecture, predominantly due to the
reduced Miller capacitance at the input. The cascode amplifier
is especially suited to provide high gain even at the higher
end of the D-band, where the frequency is approaching fT
of the technology. Furthermore, its lower output admittance
on account of the smaller collector-base shunt capacitance,
facilitates a broadband design.
A schematic of the proposed differential broadband am-
plifier is shown in Fig. 1. The amplifier uses cascode topol-
ogy, with the first stage utilizing HBTs with 6 μm effec-
tive emitter lengths and CBEBC configuration. A double-
base configuration helps to reduce the base resistance which
could otherwise considerably reduce the power gain of the
HBT near fT . In total four stages of cascode amplifiers are
utilized. In order to achieve high output power the size of
each stage is progressively increased. The 2nd , 3rd and the 4th
stage utilize two emitter fingers in CBEBEBC configurations,
each with 4 μm, 5 μm and 6 μm lengths, respectively. The
parallel configuration of HBT contacts are better suited for
an optimized layout with reduced contact and interconnect
parasitics and help in providing a uniform current flow to the
transistor terminals. Each stage is biased slightly below the
optimum-fT current density. The first two stages have long
tailed-pairs for improving the common mode rejection ratio,
3–4 Oct 2016, London, UK
 2.7 V
60 Ω 60 Ω 60 Ω 60 Ω 60 Ω 50 Ω
TL2 C1 TL3
60 Ω 50 fF 80 μm 60 fF 65 μm 50 fF 48 μm
41 μm 68 μm 54 μm 49 μm
Biasing
QB Q3 Q6 Q9 Q12
circuit
for each stage
RB1 60 Ω 60 fF 60 Ω 60 Ω 60 Ω 100-Ω diff. output
TL1 35 μm 60 Ω
60 μm 42 μm 13 μm 29 μm
VB T-type
RB2 4 pH matching 4 pH 4 pH 4 pH
Q2 VB2 Q5 VB3 Q8 VB4 Q11
VB1
QB
80 Ω
RB RB RB
50 Ω 25 μm
70 μm Cin
Q1 Q4 Q7 Q10
100-Ω diff. input

55 μm 100 fF
L-type 5Ω 5Ω
60 Ω
matching
TLin

Fig. 1. Schematic of the differential broadband power amplifier.

while the 3rd and the 4th stage are pseudo-differential in order 18
to avoid limiting the output voltage swing. The layouts of 14
the CB stage of the cascodes are done in such a way to
introduce a small inductance at the base, which provides a 10
gain boost (made necessary by reduced current gain near fT )

Gain (dB)
6
on account of a small positive feedback. This inductance must
however be carefully designed in order to avoid unnecessary 2
stage1
gain peaking in the frequency response and consequently
-2 stage2
any unwanted instabilities. Differential signals are generated stage3
using a wideband modified Marchand balun (similar to [2]) -6
stage4
with a single-ended input impedance and a differential output
-10
impedance of 50 Ω and 100 Ω, respectively. 90 115 140 165 190
Frequency (GHz)

III. B ROADBAND M ATCHING N ETWORK AND S TAGGERED (a)

T UNING 35

The matching networks are realized using microstrip trans-

25
mission lines and integrated MIM capacitors. Sonnet EM
simulation was used to model the transistor via stack and the
15
Gain (dB)

interconnection parasitics. An optimal size of the 1st stage of

the amplifier, as well as an inherent weak frequency depen-
dence of the input impedance of a cascode stage, facilitates 5

a broadband input-match using a simple L-type matching first two stages

-5 first three stages
network. However, the output impedance of the cascode has
all four stages
a strong variation with frequency. This variation is effectively
made much smaller by using a 4-reactance T-type matching -15
90 110 130 150 170 190
network [3] (as opposed to a simplest possible L-type) for the Frequency (GHz)
interstage matching as shown in Fig. 1. The length of TL3 (b)
and the value of C1 is selected so as to produce a series
resonance in conjunction with the capacitive input impedance Fig. 2. Simulation results of the gain profiles. (a) Gain profiles of the indvidual
of the CE amplifier in the next stage. This series resonance stages showing the effect of wideband matching. (b) Gain profiles of the
combination of stages highlighting the effect of staggered tunning.
eliminates the parallel resonance which is generated in the
case of an L-type matching network consisting of TL2 and C1 ,
only. Consequently, the effective impedance consisting of the
input impedance of CE and the interstage matching network two maximum in the gain profile due to broadband matching
is comparatively much more constant and behaves inductively network. Inreasing the separation between these maximum
over frequency, which compliments the capacitive behavior of would result in wideband response, however this would also
the output impedance of the preceding stage, thus improving pronounce the gain minima in the mid-band. This shows the
the power match, especially at the higher frequencies. This limitation on the maximum achievable bandwidth from single
wideband matching network is utilized together with staggered stage for a given gain variation. Further increase in bandwidth
tuning of each stage. Fig. 2 (a) shows the power gain from is realized using staggered tunning as shown in Fig. 2 (b).
individual stages. Power gain of stages 1 to 3 clearly show Combined-gain response of the first three stages shows minima

258
 5
Measurement
Simulation
4
DC contact pads
3

7-factor
Input Marchand balun Output balun 2
4 amplifier stages
1

0
80 100 120 140 160 180 200
Frequency (GHz)

Fig. 5. Measured μ-factor of the differential broadband power amplifier.

Fig. 3. Chip micrograph of the differential broadband power amplifier. Size

of the chip: 600 μm × 700 μm inluding the pads. 25

Power (dBm), Gain(dB), PAE(%)

30 20
20 Output power
15
10 Gain
PAE
Magnitude (dB)

0
10

-10 S11 5
-20 S21
S12 0
-30
S22
-40 -5
-25 -20 -15 -10
-50 Input power (dBm)
80 100 120 140 160 180 200
Frequency (GHz) Fig. 6. Measured output power, power gain and PAE of the amplifier at
160 GHz.
Fig. 4. Measured and simulated S-parameters of the differential broadband
power amplifier over W- and D-bands. Solid lines depict measurements.

a peak gain of 24.8 dB and a 3-dB bandwidth from around

in the mid-band which is then compensated by the final stage
which is designed to provide gain peak in the mid-band.
IV. M EASUREMENT R ESULTS
Fig. 3 shows the micrograph of the PA. The total chip area
including the pads is 0.42 mm2 , however, the core area of
the amplifier is only 0.1 mm2 . The on-wafer small-signal S-
parameters were measured using an R&S ZVT20 vector net-
work analyzer. Due to the wideband operation of the amplifier
W-band (75−110 GHz) frequency extenders from Agilent and
D-band converters from OML were used in conjunction with
W- and D-band GSG probes from Cascade and GGB, respec-
tively. Single-ended measurements were performed using the
on-chip wideband Marchand baluns, which were separately
characterized and de-embedded from the measurement results.
The baluns have an average back-to-back loss of 3-6 dB from
100-180 GHz. At a supply voltage of 2.7 V, the amplifier
draws around 97 mA of current. The measured S-parameters
from 75−180 GHz are shown in Fig. 4. The amplifier provides
100 GHz to 180 GHz, which is limited at the higher end of
the band due to the measurement equipment. The amplifier
achieves a 3-dB bandwidth of 57 % and demonstrates a GBW
product of >1.39 THz, which is the highest reported to date
in the D-band. The measured gain and bandwidth of the
amplifier show a good correlation with the simulation results.
The measured input return loss is better than 8 dB through out
the D-band. The measured and the simulated μ-factor of the
amplifier is presented in Fig. 5 and shows an unconditional
stability throughout the frequency range.
The large signal measurements in the D-band were con-
ducted using an Agilent power meter E4416A and a W-
band power sensor W8486A (operation was verified). Due to
the limited output power of the OML frequency converters,
especially at the lower end of the D-band, the saturated
output power of the amplifier could not be measured at
all frequencies. To measure the large signal characteristics
of the amplifier at lower frequencies an external F-band
(90−140 GHz) frequency multiplier from RPG was used in

259
 TABLE I
P ERFORMANCE COMPARISON OF S I - BASED P OWER A MPLIFIERS IN S I /S I G E P ROCESSES
Frequency 3-dB BW Gain GBW OPpeak PDC GBW/PDC Area
Technology (GHz) (GHz) (dB) (GHz) (dBm) (mW) (GHz/mW) (mm2 ) Reference
65 nm CMOS 125−155 30 15 168.7 13.2(@140 GHz) 143 1.18 0.38 [4] MTT-S 2013
65 nm CMOS 135−165 30 16 189.3 12.2(@150 GHz) 137 1.38 0.38 [4] MTT-S 2013
130 nm SiGe 135−170 35 17 247.8 8(@170 GHz) 320 0.77 0.58 [5] RFIC 2013
90 nm SiGe 110−134 24 15 135 20.8(@126 GHz) 1520 0.09 4.95 [6] MTT-S 2014
120 nm SiGe 110−127 17 32 676.8 17.4(@120 GHz) 560 1.2 − [7] RFIC 2015
90 nm SiGe 107−142 35 7.7 84.9 22(@120 GHz) 2220 0.04 0.62 [8] CSICS 2015
130 nm SiGe 140−180 40 20 400 7(@165 GHz) 132 3.0 0.37 [1] CSICS 2015
130 nm SiGe 100−180 80 24.8 1390 11(@160 GHz) 262 5.2 0.42 This
9(@170 GHz) work

25 frequency from 100 GHz to 170 GHz is presented in Fig. 8.

Power (dBm), Gain(dB), PAE(%)

Through out the D-band the total peak output power variation
20 of the amplifier is around 3.3 dB and is lowest at the frequency
of 125 GHz with 7.6 dBm. The achieved peak output power
Output power
15 of 11 dBm and 9 dBm at 160 GHz and 170 GHz, respectively
Gain represent the state-of-the-art results for Si-based amplifiers.
10 PAE Below 110 GHz the output power starts to slowly roll-off
and is 6.4 dBm at 100 GHz. A comparison of Si-based power
5 amplifiers working in the D-band is provided in Table. I.

0 V. C ONCLUSION
This paper has presented the first Si-based broadband dif-
-5 ferential power amplifier operating over the entire D-band fre-
-30 -25 -20 -15 -10 -5 quency range with more than 7.5 dBm output power. Wideband
Input power (dBm) 4-reactance based interstage matching network and staggered
Fig. 7. Measured output power, power gain and PAE of the amplifier at tuning of each stage is used to achieve the desired result. It
110 GHz. achieves a 57% 3-dB bandwidth of around 80 GHz with a
GBW product of more than 1.3 THz, while utilizing a DC
15 power of 262 mW.

ACKNOWLEDGMENT
Output power (dBm)

10 This work is supported by the EU Commision through the

FP7 for R&D within the DOTSEVEN project (316755).

5 Measurement R EFERENCES
Simulation [1] M. Furqan, F. Ahmed et al., “A 140−180-GHz Broadband Amplifier with
7 dBm OP1dB ,” in Proc. IEEE CSCIS, New Orleans, LA, USA, Oct 2015,
0 pp. 1−4.
[2] F. Ahmed et al., “A 200−325-GHz wideband, low-loss modified Marc-
hand balun in SiGe BiCMOS technology, in Proc. European Microwave
Conf., Paris, France, Sep. 2015, pp. 40−43.
-5 [3] G. Liu, H. Schumacher, “Broadband millimeter-wave LNAs (47−77 GHz
100 110 120 130 140 150 160 170 and 70−140 GHz) using a T-type matching topology,” IEEE Trans. on
Frequency (GHz) Microw. Theory Tech., vol. 48, no. 9, pp. 2022−2029, Sep. 2013.
[4] Y. Hsiao et al., “Millimeter-wave CMOS power amplifiers with high
Fig. 8. Measured peak output power as a function of frequency. output power and wideband performances,” IEEE Trans. on Microw.
Theory Tech., vol. 61, no. 12, pp. 4520−4533, Nov. 2013.
[5] N. Sarmah et al., “A 135−170 GHz power amplifier in an advanced SiGe
HBT technology,”, in Proc. IEEE RFIC, Seattle, WA, USA, June 2013,
conjunction with an R&S SMR40 signal generator. Fig. 6 and pp. 287−290.
Fig. 7 show the measured output power, power gain and PAE [6] H. Lin et al., “A 110−134-GHz SiGe amplifier with peak output power
at 160 GHz and 110 GHz, respectively. The amplifier achieves of 100−12 mW,” IEEE Trans. on Microw. Theory Tech., vol. 62, no. 12,
pp. 2990−3000, Oct. 2014.
a 1-dB output compression point (OP1dB ) of 9.5 dBm and [7] R. B. Yishay et al., “A 17.8 dBm 110−130-GHz power amplifier and
a saturated output power of 11 dBm with a PAE of around doubler chain in SiGe BiCMOS Technology,” in Proc. IEEE RFIC,
5% at 160 GHz. At 110 GHz, an OP1dB and a Psat of around Phoenix, AZ, USA, May 2015, pp. 391−394.
[8] S. Daneshgar et al., “A 22 dBm, 0.6 mm2 D-band SiGe HBT power
4 dBm and 8 dBm were achieved, respectively. The measured amplifier using series power combining sub-quarter-wavelength baluns,”
maximum output power of the amplifier as a function of in Proc. IEEE CSICS, New Orleans, LA, USA, Oct 2015, pp. 1−4.

260