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  • Statistical Static Timing Analysis: Limits of Conventional STA

    Diunggah oleh

    Himanshu Gome
    20 tayangan1 halaman
    Statistical static timing analysis (SSTA) has become important due to increased semiconductor variations that cannot be handled by traditional static timing analysis (STA). SSTA replaces deterministic gate and interconnect timing with probability distributions, giving a distribution of possible circuit outcomes rather than a single outcome. It addresses limitations of STA like its inability to easily handle within-die correlation or be efficient and incremental with changes to address correlation. SSTA uses sensitivities to model correlations between delays and applies these correlations when computing statistical delay distributions.

    Deskripsi Asli:

    STA Basic Part-7

    Judul Asli

    STA - Part 7

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    Statistical static timing analysis (SSTA) has become important due to increased semiconductor variations that cannot be handled by traditional static timing analysis (STA). SSTA replaces deterministic gate and interconnect timing with probability distributions, giving a distribution of possible circuit outcomes rather than a single outcome. It addresses limitations of STA like its inability to easily handle within-die correlation or be efficient and incremental with changes to address correlation. SSTA uses sensitivities to model correlations between delays and applies these correlations when computing statistical delay distributions.

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    20 tayangan1 halaman

    Statistical Static Timing Analysis: Limits of Conventional STA

    Diunggah oleh

    Himanshu Gome
    Statistical static timing analysis (SSTA) has become important due to increased semiconductor variations that cannot be handled by traditional static timing analysis (STA). SSTA replaces deterministic gate and interconnect timing with probability distributions, giving a distribution of possible circuit outcomes rather than a single outcome. It addresses limitations of STA like its inability to easily handle within-die correlation or be efficient and incremental with changes to address correlation. SSTA uses sensitivities to model correlations between delays and applies these correlations when computing statistical delay distributions.

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    © All Rights Reserved
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    Tandai sebagai konten tidak pantas
    dari 1

    Statistical static timing analysis

    Conventional static timing analysis (STA) has been a stock analysis algorithm for the design of
    digital circuits over the last 30 years. However, in recent years the increased variation in
    semiconductor devices and interconnect has introduced a number of issues that cannot be handled
    by traditional (deterministic) STA. This has led to considerable research into statistical static timing
    analysis, which replaces the normal deterministic timing of gates and interconnects with probability
    distributions, and gives a distribution of possible circuit outcomes rather than a single outcome.

    Limits of conventional STA


    STA, while very successful, has a number of limitations:

     Cannot easily handle within-die correlation, especially if spatial correlation is included.


     Needs many corners to handle all possible cases.
     If there are significant random variations, then in order to be conservative at all times, it is too
    pessimistic to result in competitive products.
     Changes to address various correlation problems, such as CPPR (Common Path Pessimism
    Removal) make the basic algorithm slower than linear time, or non-incremental, or both.
    SSTA attacks these limitations more or less directly. First, SSTA uses sensitivities to find
    correlations among delays. Then it uses these correlations when computing how to add statistical
    distributions of delays.
    Interestingly, there is no technical reason why determistic STA could not be enhanced to handle
    correlation and sensitivities, by keeping a vector of sensitivities with each value as SSTA does.
    Historically, this seemed like a big burden to add to STA, whereas it was clear it was needed for
    SSTA, so no-one complained. See some of the criticism of SSTA below where this alternative is
    proposed.

    Methods of SSTA
    There are two main categories of SSTA algorithms - path-based and block-based methods.

    A path-based algorithm[1] sums gate and wire delays on specific paths. The statistical calculation is
    simple, but the paths of interest must be identified prior to running the analysis. There is the potential
    that some other paths may be relevant but not analyzed so path selection is important.

    A block-based algorithm[2] generates the arrival times (and required) times for each node, working
    forward (and backward) from the clocked elements. The advantage is completeness, and no need
    for path selection. The biggest problem is that a statistical max (or min) operation that also
    considered correlation is needed, which is a hard technical problem..

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