DATE REVISION NUMBER INITIALS DESCRIPTION

01/15/08 245-01616-010 TK Initial design

Pin name modifications
03/05/08 245-01616-010 JL Board number to HB95
1.Q1 change SOT89 package
08/01/08 245-01616-020 JC 2. re-dispose component location
1.Q1 change SOT23 package,C133 change 10uF,R23 change 2.7K,C19 change 1uF,C27 change 1000pF,
10/01/08 245-01616-030 JC C28 change 100pF,C39 change 0.01uF,C29 change 0.01uF,C23 change 0.01uF, C20 change 0.01uF,
C1 C2 change 22pF,C5 change 3.3pF,C6 C7 C11 change 10pF,C8 C9 C10 change 2pF,L1 L2 change 2nH,
C13 C14 change 4.7pF,L5 change 2.2nH, C15 change 1.5pF
2.Add R26,C16,L6,C32,C40,C41
1.Add C42, C43, VR1, D1, R27
10/29/08 245-01616-040 JC
2.C34 from 1u change 0.1u, C41 from 1p change 1.5p, C6 C7 from 4.7p change 10p, R19 change NC
L1 L2 from 2n change 2.2n, C8 C9 C10 C16 from 2p change 1.5p, C5 from 3p change 2p
C31 C35 from 4.7u change 2.2u, C28 from 100p change 102p
3.Remove R25, C33, C29, Q1, R20
1.Add C43, R20, R25, Q1
11/10/08 245-01616-050 JC
2.C5 from 2p change 2.2p, C11 from 10p change 0ohm
3.Remove VR1
1.Add VR1, L3, C44, R27, R28, C33, R19
11/13/08 245-01616-060 JC 2.R20 from 10ohm change 5.1ohm/1206, C31 from 2.2u change 1u, Q1 change NC,
3.Remove C43, R25

HB95- 802.11n Half-sized PCI Express Card Reference Design

ATHEROS CONFIDENTIAL
PRELIMINARY

Atheros Communications, Inc. Title

5480 Great America Parkway HB95 - Title Page

Santa Clara, CA 95054
DWG NO
Date Friday, November 14, 2008 Size B Rev 000 Sheet 1 of 3 HB95-245-01616-060
 XTAL
EEPROM 40MHZ

TX/RX
TX/RX DISCRETE
MINICARD CONNECTOR

BALUN ANT_CON

PCI EXPRESS
AR9285

RX DISCRETE RX
BALUN ANT_CON

1.2V
ANT_CON : ANTENNA CONNECTOR
3.3V SUPPLY

Option
DC-DC PNP
Transistor
Regulatory

ATHEROS CONFIDENTIAL
PRELIMINARY

Atheros Communications, Inc. Title

5480 Great America Parkway HB95 - Block Diagram

Santa Clara, CA 95054
DWG NO
Date Wednesday, November 12, 2008 Size B Rev 000 Sheet 2 of 3 HB95-245-01616-060
 C37 C6 50V L2
3.3VAUX 3.3V 0.1uF U1B AR9285 U1C AR9285 10pF +/-5% 2.0nH +/-0.1NH
R9 PERP0 PERP_0 40 3 RFINP RFOUTP
No Load PCIE_TX_P RFINP C10
PERN0 PERN_0 39 2 RFINN 1.5pF 1/16W
PCIE_TX_N RFINN C8
67 50V C11 1/16W J2
C38 XPABIAS RFOUTP 1.5pF +/-0.25PF 0 +/-5% CON RF 3PIN
RFOUTP 6
0.1uF C5 50V
J5 PETP0 RFOUTN 2.7pF +/-0.25PF
24

52

28
48
42 PCIE_RX_P 13 SWCOM0 RFOUTN 7 1
2

6
50V 2
3
3.3V PETN0 41 14 +/-0.25PF C12
3.3VAUX

3.3V
3.3V

1.5V
1.5V
1.5V
PCIE_RX_N SWCOM1 C9 50V No Load
R5 +/-5% 3.3V 15 1.5pF +/-0.25PF
10K 1/16W SWCOM2 RFOUTN
USB_D- 36
38 R4 REFCLK+ 37 16
USB_D+ 0 PCIE_REFCLK_P SWCOM3 C7 C16 C42
LED_WWAN_L 42
44 MPCIE_WLAN_LED REFCLK- 36 10pF 1.5pF L1 1pF
LED_WLAN_L R12 PCIE_REFCLK_N 50V 50V
LED_WPAN_L 46 68 PDET0 2.0nH
3.3V No Load +/-5% +/-0.25PF +/-0.1NH
SMB_CLK 30
32 R6 CLKREQ_L 47 AVDD33 4
SMB_DATA WAKE_L No Load WAKE2_L PCIE_CLKREQ_L PABIASP
WAKE_L 1
22 PERST_L R8 WAKE2_L 48 AVDD33 9
PERST_L CLKREQ_L No Load 3.3V PCIE_WAKE_L PABIASN RFINP
CLKREQ_L 7
20 WLAN_DISABLE C3 C4
W_DISABLE_L R7 10pF 10pF C14 L5 J3
11 REFCLK- 10K PERST_L 38 4.7pF C15 2.2nH CON RF 3PIN
REFCLK- PCI_RST_L Y1
13 REFCLK+ +/-5% 50V 1.5pF +/-0.1NH 1
REFCLK+ PERN0 1/16W XTALI +/-0.25PF
PERn0 23 1 2 50V 2
3
25 PERP0 +/-0.25PF C40
PERp0 PETN0 U1D AR9285 XTALO 10pF C41
PETn0 31 4 3
33 PETP0 63 18 GPIO_0A RFINN 50V 1.5pF
PETp0 NC GPIO0 C1 C2 +/-5%
40MHz 50V
PCIe interface Diff 100 OHMS 64 19 GPIO_1 22pF 22pF C13 C32
R10 NC GPIO1 50V 50V 4.7pF L6 1.5pF +/-0.25PF
UIM_PWR 8
10 0 65 20 +/-5% +/-5% 50V 2.2nH 50V
UIM_DATA GPIO_1 MPCIE_WLAN_LED NC GPIO2 +/-0.25PF +/-0.25PF
UIM_CLK 12 +/-0.1NH
14 66 24 GPIO_3
UIM_RESET NC GPIO3/EEP_WP
UIM_VPP 16
17 GPIO_0A WLAN_DISABLE 21
UIM_C8 AVDD33 GPIO4
UIM_C4 19 5 NC U1A
R11 22 BT_ACTIVE
0 AVDD33 GPIO5 3.3V 3.3V 3.3V XTALI XTALO
8 NC 55 XTALI XTALO 54
23 RX_CLEAR
GPIO6 EEPROM R3
3 R13 No Load BT_ACTIVE 52 32 R2 R1
RESERVED R14 No Load RX_CLEAR NC GPIO7 U2 IS24C04A 10K BIASREF 62
RESERVED 5 10K BIASREF CLKOBS 31
37 EPRM_SDA 51 33 1
RESERVED R17 3.3VAUX NC GPIO8 A0 VCC 8 GPIO_3
RESERVED 39 2 A1 WP 7 6.19K, 1%
41 EPRM_SCK 50 3 EPRM_SCK
RESERVED GPIO9 A2 SCL 6 EPRM_SDA
AR9285
RESERVED 43 4 GND SDA 5
45 No Load 49
RESERVED 3.3V GPIO10 IS24C04A
RESERVED 47
RESERVED 49 26 EPRM_SDA GPIO11/XLNA_Ctrl 12
51 R23 R15
RESERVED 2.7K No Load
27 EPRM_SCK
R24 +/-5% 30 U1E
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

CON PCI EXPRESS MINI-1.1 No Load 1/16W CMODE0 R16

PERST_L 10 29 No Load C26 10V C27 50V
RST_B CMODE1 R19 +/-5% 0.1uF +/-10% AVDD33 60 DVDD12 1000pF+/-10%
11
15
18
21
26
27
29
34
35
40
50

R18 R26 10K 1/16W AVDD33_BB_SYNTH DVDD12 C28 50V

4
9

No Load 10K C36 58 1.2V Bias C25 10V 25 DVDD12 1000pF+/-10%

+/-5% No Load CTRL1 0.1uF +/-10% AVDD12 61 DVDD12 C39 16V
1/16W DVDD12 AVDD12_BB_SYNTH DVDD12 0.01uF +/-10%
CTRL2 57 DVDD12 34
MMBT2907A

C22 10V 45 DVDD12

0.1uF +/-10% AVDD12 59 DVDD12
C21 6.3V AVDD12ADC
L3 20% 1uF +/-10% 35 DVDD12
AVDD33 R22 DVDD33 3.3V Q1 DVDD12 AVDD12 AVDD12_XTAL 3.3V VR1 2.2uH DVDD12 AVDD12_XTAL 56 VDDP12 C30 6.3V
0 MMBT2907A AVDD12_XTAL DVDD12 1uF +/-10%
3 VIN VDDP12 44
2 3 LX 4
ZH1 1 C44 C17 10V C23 16V
C34 C35 C31 R20 R21 2 6 22pF R27 +/-1% 0.1uF +/-10% AVDD33 1 17 DVDD33 0.01uF +/-10%
ZH2 0.1uF 2.2uF 2.2uF No Load C133 No Load EN FB/VOUT 50V 10.7K 1/16W AVD33_RX VDDP33 C20 16V
1
10V 16V 16V 10uF6.3V 5 +/-5% 28 DVDD33 0.01uF +/-10%
+/-10% +/-10% +/-10% +/-10% GND AVDD33 53 VDDP33 C18 10V
1

1 NC TPAD 7 AVDD33_XTAL
R28 +/-1% C19 43 DVDD33 0.1uF +/-10%
1/16W 1uF VDDP33 C24 10V
RT8010-3.3V 10K
1.2V Bias 6.3V 69 46 DVDD33 0.1uF +/-10%
+/-10% GND VDDP33

AR9285

ATHEROS CONFIDENTIAL Atheros Communications, Inc.

5480 Great America Parkway
Title
Digital & RF
PRELIMINARY Date
Santa Clara, CA 95054

Thursday, December 18, 2008 Size B Rev 000 Sheet 3 of 3

DWG NO
HB95-245-01616-060