3.

Short Channel Effects on MOS

Transistors.

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Overview.

• Short Channel
Devices.
• Velocity Saturation
Effect.
• Threshold Voltage
Variations.
• Hot Carrier Effects.
• Process Variations.

(Source: Jan M. Rabaey, Digital Integrated Circuits)

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 Short Channel Devices.

• As the technology scaling

reaches channel lengths less
than a micron (L<1µ), second
Gate Oxyde
order effects, that were ignored in Gate
devices with long channel length Source
Polysilicon
Drain Field-Oxyde

(L>1µ), become very important. n+ n+

(SiO2)
L<1µ
• MOSFET‘s owning those p+ stopper
p-substrate
dimensions are called „short
channel devices“.
Bulk Contact
• The main second order effects
are: Velocity Saturation, CROSS-SECTION of NMOS Transistor
Threshold Voltage Variations and
Hot Carrier Effects.

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Velocity Saturation Effect (I)

• Review of the Classical

Derivation of the Drain Current:
VGS>VT VGS VDS
S
ID
VDS<<VGS G
D
• Induced channel charge at V(x): n+ – V(x) + n+

L x
Qi(x)=-COX[VGS-V(x)-VT] (1)
p-substrate

• The current is given as a product B

of the drift velocity of the carriers

vn and the available charge: MOS transistor and its bias conditions

ID=-vn(x)Qi(x)W (2)
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 Velocity Saturation Effect (II)

• The electron velocity is related

⎡ 2
⎤
to the electric field through the I D = µ n COX
W
(
⎢ GS
V − VT )V DS −
VDS
⎥ (5)
mobility: L ⎣ 2 ⎦

• The behavior of the short channel

vn = − µ n Ε ( x ) = µ n
dV (3)
dx
• Combining (1) and (3) in (2):
IDdx=µnCOXW(VGS-V(x)-VT)dV (4)
• Integrating (4) from 0 to L yields
the voltage-current relation of the
transistor:
3: Short Channel Effects
devices deviates considerably
from this model.
• Eq. (3) assumes the mobility µn
as a constant independent of the
value of the electric field Ε.
• At high electric field carriers fail to
follow this linear model.
• This is due to the velocity
saturation effect.
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Velocity Saturation Effect (III)

vn (m/s)

• When the electric field reaches a

critical value ΕC, (1.5×106 V/m for
vsat=105
p-type silicon) the velocity of the constant
velocity
carriers tends to saturate (105 m/s
for silicon) due to scattering
constant mobility
effects. (slope=µ)
E (V/µm)
Ec=1.5

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 Velocity Saturation Effect (IV)

• The impact of this effect over the ⎡ 2

⎤
I D = κ (VDS )µ n COX ( )
W VDS
⎢ GS
V − V V − ⎥
drain current of a MOSFET T DS
L ⎣ 2 ⎦
operating in the linear region is (7)
obtained as follows:
with:
• The velocity as a function of the
κ (VDS ) =
electric field, plotted in the last 1
figure can be approximated by: 1 + (VDS Ε C L )

µ nΕ
v= for Ε≤ΕC (6) • For large values of L or small
1 + Ε ΕC values of VDS, κ approaches 1
and (7) reduces to (5).
v = vsat for Ε≥ΕC
• For short channel devices κ<1
Reevaluating (1) and (2) using (6): and the current is smaller than
what would be expected.
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Velocity Saturation Effect (V)

• When increasing the drain-source • Where VGT is a short notation for

voltage, the electric field reaches VGS-VT.
the value ΕC, and the carriers at
the drain become velocitiy • Equating (8) and (9) and solving
saturated. Assuming that the drift for VDSAT:
velocity is saturated, from (4) with
µndV=vsat the drain current is:
VDSAT = κ (VGT )VGT (10)
IDSAT=vsatCOXW(VG-VT-VDSAT) (8)
• For a short channel device and
large enough values of VGT,
Evaluating (7) with VDS=VDSAT κ(VGT) is smaller than 1, hence
W⎡ 2
⎤ the device enters saturation
I DSAT = κ (VDSAT )µ n COX
VDSAT
⎢VGT VDSAT − ⎥ before VDS reaches VGS-VT.
L⎣ 2 ⎦
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 Velocity Saturation Effect (VI)

ID

VGS=VDD Long-channel device

Short-channel device

VDS
VDSAT VGS-VT

Short channel devices display an extended saturation

region due to velocity-saturation

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Simplificated model for hand calculations (I)

A substantially simpler model can be obtained by making two

assumptions:
• Velocity saturates abruptly at ΕC and is approximated by:
ν=µnΕ for Ε≤ΕC
ν=νsat= µnΕC for Ε≥ΕC
• VDSAT at which ΕC is reached is constant and has a value:

Lν sat
VDSAT = LΕ C = (11)
µn
Under these conditions the equation for the current in the linear
region remains unchanged from the long channel model. The
value for IDSAT is found by substituting eq. (11) in (5).

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Simplificated model for hand calculations (II)

⎡ 2
⎤
⎢(VGS − VT )VDSAT −
W VDSAT
I DSAT = µ n COX ⎥
L ⎣ 2 ⎦

⎡ ⎤
I DSAT = vsat COX W ⎢(VGS − VT ) − DSAT ⎥
V
(12)
⎣ 2 ⎦

This model is truly first order and empirical and causes

substantial deviations in the transition zone between linear and
velocity saturated regions. However it shows a linear
dependence of the saturation current with respect to VGS for the
short channel devices.

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I-V characteristics of long- and short-

channel MOS transistors both with W/L=1.5

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 ID-VGS characteristic for long- and short
channel devices both with W/L=1.5

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Threshold Voltage Variations (I)

• For a long channel N-MOS transistor the threshold Voltage is

given for:

VT = VT 0 + γ ( − 2φ F + VSB − − 2φ F ) (11)

• Eq. (11) states that the threshold Voltage is only a function of the
technology and applied body bias VSB

• For short channel devices this model becomes inaccurate and

threshold voltage becomes function of L, W and VDS.

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 Threshold Voltage Variations (II)

VT VT

Long-channel threshold Low VDS threshold

L VDS

Threshold as a function of Drain-induced barrier lowering

the length (for low VDS) (for low L)
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Hot Carrier Effects (I)

• During the last decades transistors dimensions were scaled

down, but not the power supply.
• The resulting increase in the electric field strength causes an
increasing energy of the electrons.
• Some electrons are able to leave the silicon and tunnel into the
gate oxide.
• Such electrons are called „Hot carriers“.
• Electrons trapped in the oxide change the VT of the transistors.
• This leads to a long term reliabilty problem.
• For an electron to become hot an electric field of 104 V/cm is
necessary.
• This condition is easily met with channel lengths below 1µm.
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 Hot Carrier Effects (II)

Hot carrier effects cause the I-V characteristics of an NMOS transistor to

degrade from extensive usage.
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Process Variations.

Devices parameters vary between runs and even on

the same die!
Variations in the process parameters , such as impurity concentration den-
sities, oxide thicknesses, and diffusion depths. These are caused by non-
uniform conditions during the deposition and/or the diffusion of the
impurities. This introduces variations in the sheet resistances and transis-
tor parameters such as the threshold voltage.
Variations in the dimensions of the devices, mainly resulting from the
limited resolution of the photolithographic process. This causes ( W/L)
variations in MOS transistors and mismatches in the emitter areas of
bipolar devices.

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 Impact of Device Variations.

2.10

2.10

1.90

Delay (nsec)
Delay (nsec)

1.90

1.70
1.70

1.50 1.50
1.10 1.20 1.30 1.40 1.50 1.60 –0.90 –0.80 –0.70 –0.60 –0.50

Leff (in mm) VTp (V)

Delay of Adder circuit as a function of variations in L and VT

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Parameter values for a 0.25µm CMOS

process. (minimum length devices).

VTO (V) γ (V0.5) VDSAT (V) K‘ (A/V2) λ (V-1)

NMOS 0.43 0.4 0.63 115 × 10-6 0.06
PMOS -0.4 -0.4 -1 -30 × 10-6 -0.1

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