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CD4047BMS FN3313
CMOS Low-Power Monostable/Astable Multivibrator Rev 0.00
December 1992
Features Description
• High Voltage Type (20V Rating) CD4047BMS consists of a gatable astable multivibrator with logic tech-
niques incorporated to permit positive or negative edge triggered
• Low Power Consumption: Special CMOS Oscillator
monostable multivibrator action with retriggering and external counting
Configuration
options.
• Monostable (One-Shot) or Astable (Free-Running)
Inputs include +TRIGGER, -TRIGGER, ASTABLE, ASTABLE,
Operation
RETRIGGER, and EXTERNAL RESET. Buffered outputs are Q, Q,
• True and Complemented Buffered Outputs and OSCILLATOR. In all modes of operation, an external capacitor
• Only One External R and C Required must be connected between C-Timing and RC-Common terminals, and
an external resistor must be connected between the R-Timing and RC-
• Buffered Inputs Common terminals.
• 100% Tested for Quiescent Current at 20V Astable operation is enabled by a high level on the ASTABLE input or a
• Standardized, Symmetrical Output Characteristics low level on the ASTABLE input, or both. The period of the square wave
at the Q and Q Outputs in this mode of operation is a function of the
• 5V, 10V and 15V Parametric Ratings external components employed. “True” input pulses on the ASTABLE
• Meets All Requirements of JEDEC Tentative Standard input or “Complement” pulses on the ASTABLE input allow the circuit to
No. 13B, “Standard Specifications for Description of be used as a gatable multivibrator. The OSCILLATOR output period will
‘B’ Series CMOS Devices” be half of the Q terminal output in the astable mode. However, a 50%
duty cycle is not guaranteed at this output.
Monostable Multivibrator Features The CD4047BMS triggers in the monostable mode when a positive
• Positive or Negative Edge Trigger going edge occurs on the +TRIGGER input while the -TRIGGER is held
low. Input pulses may be of any duration relative to the output pulse.
• Output Pulse Width Independent of Trigger Pulse
Duration If retrigger capability is desired, the RETRIGGER input is pulsed. The
retriggerable mode of operation is limited to positive going edge. The
• Retriggerable Option for Pulse Width Expansion
CD4047BMS will retrigger as long as the RETRIGGER input is high,
• Internal Power-On Reset Circuit with or without transitions (See Figure 31)
• Long Pulse Widths Possible Using Small RC Compo- An external countdown option can be implemented by coupling “Q” to
nents by Means of External Counter Provision an external “N” counter and resetting the counter with trigger pulse. The
• Fast Recovery Time Essentially Independent of Pulse counter output pulse is fed back to the ASTABLE input and has a dura-
Width tion equal to N times the period of the multivibrator.
• Pulse-Width Accuracy Maintained at Duty Cycles A high level on the EXTERNAL RESET input assures no output pulse
Approaching 100% during an “ON” power condition. This input can also be activated to ter-
minate the output pulse at any time. For monostable operation, when-
Astable Multivibrator Features ever VDD is applied, an internal power on reset circuit will clock the Q
output low within one output period (tM).
• Free-Running or Gatable Operating Modes
The CD4047BMS is supplied in these 14-lead outline packages:
• 50% Duty Cycle
Braze Seal DIP H4Q
• Oscillator Output Available Frit Seal DIP H1B
• Good Astable Frequency Stability: Frequency Deviation: Ceramic Flatpack H3W
- = 2% + 0.03%/oC at 100kHz
- = 0.5% + 0.015%/oC at 10kHz (Circuits “Trimmed” Pinout
to Frequency VDD = 10V 10% CD4047BMS
TOP VIEW
Applications
C 1 14 VDD
Digital equipment where low power dissipation and/or high noise
R 2 13 OSC OUT
immunity are primary design requirements
R-C COMMON 3 12 RETRIGGER
• Envelope Detection • Frequency Discriminators
ASTABLE 4 11 Q
• Frequency Multiplication • Timing Circuits
ASTABLE 5 10 Q
• Frequency Division • Time Delay Applications
-TRIGGER 6 9 EXT. RESET
VSS 7 8 +TRIGGER
LIMITS
GROUP A
PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC - 2 A
2 +125oC - 200 A
VDD = 18V, VIN = VDD or GND 3 -55oC - 2 A
oC
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25 -100 - nA
oC
2 +125 -1000 - nA
VDD = 18V 3 -55oC -100 - nA
oC
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25 - 100 nA
o
2 +125 C - 1000 nA
o
VDD = 18V 3 -55 C - 100 nA
Input Leakage Curent IIL VDD = 24V, VIN = 11V or GND 1 +25oC -300 - nA
(Pin 3)
2 +125oC -10 - A
o
Input Leakage Current IIH VDD = 26V, VIN = 13V or GND 1 +25 C - 300 nA
(Pin 3) o
2 +125 C - 10 A
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
o
Output Current (Sink) Q, IOL5 VDD = 5V, VOUT = 0.4V 1 +25 C 0.53 - mA
Q, OSC Out
Output Current (Sink) Q, IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Q, OSC Out
Output Current (Sink) Q, IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Q, OSC Out
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Q, Q, OSC Out
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Q, Q, OSC Out
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Q, Q, OSC Out
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
Q, Q, OSC Out
Output Current (Sink) IOL5RC VDD = 5V, VOUT = 0.4V 1 +25oC 0.78 - mA
Output Current (Sink) IOL10RC VDD = 10V, VOUT = 0.5V 1 +25oC 2.0 - mA
Output Current (Sink) IOL15RC VDD = 15V, VOUT = 1.5V 1 +25oC 5.2 - mA
Output Current (Source) IOH5RC VDD = 5V, VOUT = 4.6V 1 +25oC - -0.78 mA
Output Current (Source) IOH10RC VDD = 10V, VOUT = 9.5V 1 +25oC - -2 mA
Output Current (Source) IOH15RC VDD = 15V, VOUT = 13.5V 1 +25oC - -5.2 mA
LIMITS
GROUP A
PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS
N Threshold Voltage VNTH VDD = 10V, ISS = -10A 1 +25oC -2.8 -0.7 V
oC
P Threshold Voltage VPTH VSS = 0V, IDD = 10A 1 +25 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH > VOL < V
VDD/2 VDD/2
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V
(Note 2)
Input Voltage High VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V
(Note 2)
Input Voltage Low VIL VDD = 15V, VOH > 13.5V, 1, 2, 3 +25oC, +125oC, -55oC - 4 V
(Note 2) VOL < 1.5V
Input Voltage High VIH VDD = 15V, VOH > 13.5V, 1, 2, 3 +25oC, +125oC, -55oC 11 - V
(Note 2) VOL < 1.5V
NOTES:
1. All voltages referenced to device GND, 100% testing being implemented
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max..
LIMITS
(NOTES 1, 2) GROUP A
PARAMETER SYMBOL CONDITIONS SUBGROUPS TEMPERATURE MIN MAX UNITS
oC
Propagation Delay TPLH1 VDD = 5V, VIN = VDD or GND 9 +25 - 400 ns
Astable, Astable to OSC oC,
10, 11 +125 -55oC - 540 ns
Propagation Delay TPHL3 VDD = 5V, VIN = VDD or GND 9 +25oC - 1000 ns
Trigger to Q, Q TPLH3
10, 11 +125oC, -55oC - 1350 ns
Propagation Delay TPLH2 VDD = 5V, VIN = VDD or GND 9 +25oC - 700 ns
(Note 2) TPLH2 oC,
10, 11 +125 -55oC - 945 ns
Astable or Astable to Q, Q
Propagation Delay TPHL4 VDD = 5V, VIN = VDD or GND 9 +25oC - 600 ns
(Note 2) TPLH4
10, 11 +125oC, -55oC - 810 ns
Retrigger to Q, Q
Propagation Delay TPLH5 VDD = 5V, VIN = VDD or GND 9 +25oC - 500 ns
(Note 2) TPLH5 o o
10, 11 +125 C, -55 C - 675 ns
Reset to Q, Q
Transition Time TTHL VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
TTLH
10, 11 +125oC, -55oC - 270 ns
NOTES:
1. VDD = 5V, CL = 50pF, RL = 200K; input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
LIMITS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS
Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 7.5 A
o
N Threshold Voltage VNTH VDD = 10V, ISS = -10A 1, 4 +25 C -2.8 -0.2 V
o
N Threshold Voltage VTN VDD = 10V, ISS = -10A 1, 4 +25 C - 1 V
Delta
P Threshold Voltage VTP VSS = 0V, IDD = 10A 1, 4 +25oC 0.2 2.8 V
oC
P Threshold Voltage VTP VSS = 0V, IDD = 10A 1, 4 +25 - 1 V
Delta
Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH > VOL < V
VDD/2 VDD/2
VDD = 3V, VIN = VDD or GND
Propagation Delay Time TPHL VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x ns
TPLH +25oC
Limit
NOTES: 1. All voltages referenced to device GND. 3. See Table 2 for +25oC limit.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 4. Read and Record
MIL-STD-883
CONFORMANCE GROUP METHOD GROUP A SUBGROUPS READ AND RECORD
Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Final Test 100% 5004 2, 3, 8A, 8B, 10, 11
Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6 Sample 5005 1, 7, 9
Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
Logic Diagrams
C R
C-TIMING 3 1 2 R-TIMING
RC OSCILLATOR OUT
13
COMMON
ASTABLE Q
5 10
ASTABLE LOW POWER FREQUENCY
GATE ASTABLE
ASTABLE DIVIDER (2) Q
4 CONTROL MULTIVIBRATOR 11
-TRIGGER
6
MONOSTABLE
+TRIGGER CONTROL
8
RETRIGGER RETRIGGER
12
CONTROL
EXTERNAL
RESET
9
VDD 14 S S
D Q D Q D Q 10 Q
VSS 7 FF2 FF3 FF4
VSS CL CL CL
CL Q CL CL 11 Q
R R1 R2 R
EXTERNAL *
9 VDD
RESET
VDD
** SPECIAL
RC COMMON
* INPUTS PROTECTED CAUTION: Terminal 3 is more sensitive
PROTECTION
BY CMOS to static electrical discharge. Extra
NETWORK
PROTECTION handling precautions are recommended.
NETWORK
VSS VSS
CL CL R2 R1
p p Q
D
n n
D Q
R1 R2 CL
CL
CL CL
CL CL p
n
R1 R2 p
FF1, FF3 n
CL
CL
(a)
Q
CL
S
CL S
p
Q
n
p
S D
D Q n
CL CL CL
CL
Q CL
CL R p p
n n
FF2, FF4 R R
CL CL
(b)
FIGURE 3. DETAIL LOGIC DIAGRAM FOR FLIP-FLOPS FF1 AND FF3 (a) AND FOR FLIP-FLOPS FF2 AND FF4 (b)
30 15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25 12.5
20 10.0
10V
15 7.5
10V
10 5.0
5 2.5
5V 5V
0 5 10 15 0 5 10 15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 4. TYPICAL OUTPUT LOW (SINK) CURRENT FIGURE 5. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS CHARACTERISTICS
-5 -2.5
-7.5
-10V -10V
-10 -5
-12.5
-15V -15V
-15 -7.5
FIGURE 6. TYP. OUTPUT HIGH (SOURCE) CURRENT FIGURE 7. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHAR-
CHARACTERISTICS ACTERISTICS
400
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
200 400
10V
10V
15V
100 200
15V
0 20 40 60 80 100 0 20 40 60 80 100
LOAD CAPACITANCE (CL) (pF) LOAD CAPACITANCE (CL) (pF)
FIGURE 8. TYP. PROPAGATION DELAY TIME AS A FUNCTION OF FIGURE 9. TYP. PROPAGATION DELAY TIME AS A FUNCTION OF
LOAD CAPACITANCE (ASTABLE, ASTABLE TO Q, Q) LOAD CAPACITANCE (+ OR - TRIGGER TO Q, Q)
10k
-4
0
0 20 40 60 80 100 0 2 4 6 8 10 12 14 16 18 20
LOAD CAPACITANCE (CL) (pF) SUPPLY VOLTAGE (VDD) (V)
FIGURE 10. TYP. TRANSITION TIME AS A FUNCTION OF LOAD FIGURE 11. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
CAPACITANCE ACCURACY vs SUPPLY VOLTAGE
4
4 AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
CX = 1000pF
CX = 0.01F 3
3
2
PERIOD ACCURACY (%)
2 10M
PERIOD ACCURACY (%)
1 10k
1 10k
1M RX = 1M AND 1M AND
0 10M
0 100k 100k 10k
10k
RX = 1M -1
-1 100k
10M
-2
-2
10k -3
-3 10k
-4 -4
0 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE (VDD) (V) SUPPLY VOLTAGE (VDD) (V)
FIGURE 12. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 13. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
ACCURACY vs SUPPLY VOLTAGE ACCURACY vs SUPPLY VOLTAGE
1 2
CX = 1F CX = 0.1F
RX = 1M RX = 1M
10V, 15V
SUPPLY VOLTAGE (VDD) = 5V SUPPLY VOLTAGE (VDD) = 5V
5V 1
PERIOD ACCURACY (%)
0
PERIOD ACCURACY (%)
10V
0
-1 15V
5V
10V
-3 -2
-55 -15 25 65 105 145 -55 -15 25 65 105 145
AMBIENT TEMPERATURE (TA) (oC) AMBIENT TEMPERATURE (TA) (oC)
FIGURE 14. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 15. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
ACCURACY vs AMBIENT TEMPERATURE (ULTRA ACCURACY vs AMBIENT TEMPERATURE (LOW
LOW FREQ.) FREQ.)
2 12
CX = 0.01F CX = 1000pF SUPPLY VOLTAGE (VDD) = 5V
RX = 100k 10 RX = 10k
SUPPLY VOLTAGE (VDD) = 5V, 10V
1 15V 8
0 5V AND 10V 4
15V 2
10V, 15V
10V AND 15V
-1 0
-2 5V
-2 -4
-55 -15 25 65 105 145 -55 -35 -15 -5 25 45 65 85 105 125 145
AMBIENT TEMPERATURE (TA) (oC) AMBIENT TEMPERATURE (TA) (oC)
FIGURE 16. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 17. TYP. ASTABLE OSCILLATOR OR Q, Q PERIOD
ACCURACY vs AMBIENT TEMPERATURE (MEDIUM ACCURACY vs AMBIENT TEMPERATURE (HIGH
FREQ.) FREQ.)
8
RX = 10k AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 5V
OUTPUT PULSE-WIDTH VARIATION (%) 6 CX = 1F
20 4
PERIOD ACCURACY (%)
100pF 1k
2
100k
10k
10 0 10k, 1M AND 10M
0.001F
-2 RX = 100k, 1M, 10M 1k
0.01F, 0.1F, 1F 0.01F, 0.1F, 1F
0 -4
0.001F
-6
-10 CX = 100pF
-8
-55 -15 25 65 105 145 0 5 10 15 20 25
AMBIENT TEMPERATURE (TA) (oC) SUPPLY VOLTAGE (VDD) (V)
FIGURE 18. TYPICAL ASTABLE OSCILLATOR OR Q, Q PERIOD FIGURE 19. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs
ACCURACY vs AMBIENT TEMPERATURE SUPPLY VOLTAGE
8 8
AMBIENT TEMPERATURE (TA) = +25oC AMBIENT TEMPERATURE (TA) = +25oC
CX = 0.1F CX = 1000pF
OUTPUT PULSE-WIDTH VARIATION (%)
6 6
4 4
2 2
RX = 1M AND 10
10k, 100k, 1M AND 10M 100k
0 0
10M 10k
-2 RX = 10k, 100k, 1M -2
-4 -4
-6 -6
-8 -8
0 5 10 15 20 25 0 5 10 15 20 25
SUPPLY VOLTAGE (VDD) (V) SUPPLY VOLTAGE (VDD) (V)
FIGURE 20. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs FIGURE 21. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs
SUPPLY VOLTAGE SUPPLY VOLTAGE
RX = 100k
8 SUPPLY VOLTAGE (VDD) = 10V OR 15V
RX = 100k 10
6
8 CX = 100pF
4 6
4
2 0.001F 0.01F
2
FIGURE 22. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs AM- FIGURE 23. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs AM-
BIENT TEMPERATURE BIENT TEMPERATURE
4 4
CX = 1000pF CX = 1000pF
10M SUPPLY VOLTAGE (VDD) = 15V
SUPPLY VOLTAGE (VDD) = 5V OR 10V
OUTPUT PULSE-WIDTH VARIATION (%)
-6 100k -6
-8 -8
1M
-10 1M
-10
10M
-12 10M
-12
-55 -35 -15 5 25 45 65 85 105 125 145 -50 -35 -15 5 25 45 65 85 105 125 145
AMBIENT TEMPERATURE (TA) (oC) AMBIENT TEMPERATURE (TA) (oC)
FIGURE 24. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs AM- FIGURE 25. TYPICAL OUTPUT PULSE WIDTH VARIATIONS vs AM-
BIENT TEMPERATURE BIENT TEMPERATURE
105
106
ASTABLE MODE ASTABLE MODE
SUPPLY VOLTAGE (VDD) = 5V SUPPLY VOLTAGE (VDD) = 10V
POWER DISSIPATION (PD) (W)
4
10 105
POWER DISSIPATION (PD) (W)
C =100pF
C =100pF
C =1000pF
103 C = 0.01F 104
C = 0.1F C =1000pF
C = 0.01F
C =10pF
C = 0.1F C =10pF
102 103
101 102
100 101
10-1 100 101 102 103 104 105 106 10-1 100 101 102 103 104 105 106
Q OR Q FREQUENCY (F) (Hz) Q OR Q FREQUENCY (F) (Hz)
FIGURE 26. TYPICAL POWER DISSIPATION vs OUTPUT FIGURE 27. TYPICAL POWER DISSIPATION vs OUTPUT
FREQUENCY (VDD = 5V) FREQUENCY (VDD = 10V)
ASTABLE MODE
SUPPLY VOLTAGE (VDD) = 15V
105
103
102
VTR VTR
t1 = -RC In ; t1´ = -RC In ;
VDD + VTR 2VDD
typically, t1 = 1.1RC typically, t1´ = 1.38RC
OPTIONAL
P = 4CV2f. (Output at terminal Nos. 10 and 11)
AST
BUFFER
CD4047BMS Monostable Mode:
CL CD4017BMS
Q OUT
R 12 (2.9CV2) (Duty Cycle)
P=
11 T
INPUT
PULSE TEXT (Output at terminal Nos. 10 to 11)
The circuit is designed so that most of the total power is con-
sumed in the external components. In practice, the lower the
FIGURE 32. IMPLEMENTATION OF EXTERNAL COUNTER OPTION values of frequency and voltage used, the closer the actual
power dissipation will be to the calculated value.
Timing Component Limitations
The capacitor used in the circuit should be non polarized and have Because the power dissipation does not depend on R, a design
low leakage (i.e. the parallel resistance of the capacitor should be at for minimum power dissipation would be a small value of C. The
least an order of magnitude greater than the external resistor used). value of R would depend on the desired period (within the limita-
There is no upper or lower limit for either R or C value to maintain tions discussed above). See Figures 26, 27, and 28 for typical
oscillation. power consumption in astable mode.
+TRIGGER &
RETRIGGER
TERMINALS
8 & 12
OSC OUTPUT t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2 t1´ t2
TERMINAL 13
Dimensions in parenthesis are in millimeters and are derived from the basic
inch dimensions as indicated. Grid graduations are in mils (10-3 inch).