ECE 331

Electronic Circuits Lab

Laboratory #7
The Common Emitter BJT Amplifier
A Ball Park Design

I. Objective
The purpose of this lab is to demonstrate the ability of the BJT, and its associated circuitry, to amplify a
signal; to demonstrate practical aspects of driving the transistor at its base; and to demonstrate the
change in Q-point due to variations in β from transistor to transistor of the same 2N3904 number.

II. Components
 Resistors Various Values
 Transistors (BJT) 2N3904 (data sheet at the end of Lab #6)

III. Equipment
 Multimeter
 DC Power Supply
 Signal Generator

IV. Discussion
The junction transistor is often used in a circuit configuration known as a common emitter amplifier
circuit. This circuit is shown in Figure 1. When used in this configuration, the transistor can act as a
current amplifier, a voltage amplifier or both.

Figure 1. A common emitter amplifier

In order for the transistor to perform its function of amplification, it is necessary to determine the DC
operating point (Q-point) of the transistor properly. This amounts to determining a static, or quiescent,
point such that the amplifier is capable of handling a symmetric signal at its input and providing an
amplified (non-distorted) version of that input signal. In addition, the design should not permit the
transistor to operate beyond it maximum, de-rated power dissipation curve. (Derating refers to the
process of reducing the power dissipation allowed as the operating temperature of the transistor rises,
this will not be an issue in this lab.)
One method of designing a transistor amplifier is to precisely measure a set of characteristic curves like
the ones shown in Fig. 7.14 (b) in Comer’s text. A static loadline is drawn on the curves and a Q-point is
selected usually to get maximum symmetric swing around the Q-point when a sinusoidal signal is
applied to the base. This method works well if a design is based on a specific transistor for a custom
made design. In a production environment, where a large number of amplifiers of the same kind are
produced this method would not work well since there are normally very large variations in transistor
characteristics even among transistors with the same identification number. We will take the more
pragmatic view point here of trying to do a “ballpark” design that allows for variations in transistor
characteristics. We shall use the following simplifying assumptions:

(1) The transistor has a β >> 1 but we will assume this number varies perhaps over a range from 90 to
200.

(2) At saturation, VCE ≈ 0 or if you wish to be more refined, you can assume about 0.5 V.

Normally, as in Comer, we set our Q-point at or about halfway point between cutoff and saturation
using assumption (2). Then we attempt to reduce as much as possible the effects of β and temperature
on our design.

V. Pre-lab Preparation

In this prelab you will design a common emitter amplifier to be tested in the lab. Since both you and
your lab partner will have different designs you should pick one of them for testing in the lab. If you are
having a difficult time deciding which design is better, then a flip of a coin might be a good way to
decide.

Before you start your design you should have read Chapter 7 of Fundamentals of Electronic Circuit
Design by David and Donald Comer (Wiley, 2003). In the design discussion that follows we will use the
notation for the CE amplifier that he uses in the text.

The amplifier designed should be based on Figure 1. The input voltage divider circuit consisting of a 220
kΩ and 100 Ω resistors are not part of the amplifier design process. They will provide a low impedance
source for your signal. This will be discussed in more detail later. In any design, the engineer starts with
a set of specifications.

Our design specifications are:

(1) The power supply, VCC should be 9 volts so that the amplifier could operate with a single 9 volt
battery.

(2) The transistor used will be a 2N3904 transistor.

(3) The power dissipation of the transistor should be limited to no more than 25 milliwatts. This will
assure us that the transistor will run cool without a heat sink and not heat up and create temperature
problems.

(4) The incremental voltage gain of the amplifier should exceed 100 V/V. The incremental voltage gain is
measured as the ratio of an incremental signal at node Vout to the incremental signal at node Vin. In our
case, in the lab experiment our incremental signal will be a sinusoid or a triangle wave.

(5) Assume that the low frequency corner on the frequency response should be less than 100 Hz and the
upper frequency corner should exceed 20 KHz.

(6) The signal should have a symmetrical swing at V+ for a sinusoid that has a 1 volt peak voltage. This
means that you would have an input sinusoid with a peak of 10 mV.

To begin your design you should worry about power dissipation first. The amount of power dissipated in
the transistor is determined by the product VCE x IC. This product is maximized when VCE is at half of the
supply voltage. If this happens then the resistance between the collector and the emitter is exactly
matched to RE + RC. This means that half of the power is dissipated across the transistor and half across
RE + RC. At any other value of VCE we guaranteed that the power lost in the transistor will be lower. This
means that the power dissipated in the transistor cannot exceed Pmax = 92/4(RE + RC). Therefore as long
as Pmax is less than 25 milliwatts we are safe. If we set Pmax equal to 25 milliwatts and solve for RE + RC
then this gives us a minimum value on the sum of the two resistors. Calculate this minimum and make
sure you don’t drop below it in your design.

Now you have a lot of design decisions to make. There are a lot of right answers but even more wrong
answers. You might want to start by selecting a value for ICQ. If we assume very roughly that we are
going to put our Q-point at roughly 9/2 volts then we know immediately that we cannot have an ICQ that
exceeds about 5 mA. This puts an upper bound on the ICQ. How about a lower bound? It is probably a
good idea to keep ICQ above 1 mA. One good reason for this is to keep re small. The larger it is in the
gain equation, the more its value affects the gain. It is better to keep it small relative to RE so that it
affects the gain less. At 1 mA its value is only about 26 Ω and it will get even smaller at higher current
levels. It is quite temperature dependent and we can reduce this liability to the extent we can keep it
small. So it’s a good idea to start out guessing an ICQ in the 1 to 5 mA range and then work from that
point backward to compute the rest of the values. Once you have a current, you should consider the
gain and how it is affected by the RC, RE and re if you assume α is about 1. This should let you compute RE
and RC. Now you are on your own.

Hint: See the demonstration problem in Chapter 7 of the Comer text and study his design techniques.
You may have to iterate things a few times to get the gain where you want it. You will need to construct
an incremental model of your design to fine tune your gain. In doing your design assume β = 150, Cu = 5
pF and f t = 100 MHz. From this model you should be able to compute a coupling capacitor C that’s big
enough to pass your low frequencies. Then estimate the high frequency breakpoint using the B and D
factors. (See the Comer text pp. 244 through 246)

You should also give some consideration to the voltage divider on the input and how it works. The input
signal Vs is provided by a signal generator. You do not want to load this generator with a small resistor
value. You want it to see a high impedance. The divider guarantees that it will see at least 220 kΩ.
This will help keep the output of the signal generator constant. You would also like to provide a low
impedance source to feed your input at Vin. This will help keep the input voltage constant. If we look at
the Thevenin equivalent of the divider at its output it’s easy to see that the parallel combination of the
resistors guarantees that the signal source impedance is less than 100 Ω. The other blessing of this
circuit is that it provides a very small signal that we need at the input of the amplifier for testing while
providing a much larger signal at the divider input that we can use for triggering the scope externally.
This is also helpful if we want to look at the relative phase shift between the input and output signals of
the amplifier. (We will not do that in this experiment.)

VI. Experiment

1. Before connecting the signal generator, prototype the common emitter circuit.
a. Measure all the resistors in your circuit with an Ohmmeter before you place them.
This will be helpful in making current measurements easily and explaining discrepancies
between theory and measurement.
b. Measure the quiescent voltages and compute the quiescent currents.
c. Compare these Q-point values to the ones estimated in the prelab.
d. Measure the static (or DC) β by measuring the base current and the collector current and
taking the ratio.
e. Measure the collector current by looking at the voltage drop across RC.
f. Use the voltages across the R1-R2 divider circuit to estimate currents in the divider resistors
and use Kirchoff’s law to get the base current.

2. Connect the signal generator and voltage divider to provide a sinusoidal waveform of 10 mV peak at
1 kHz at the divider output. (You may have to change your 220 KΩ resistor if you cannot get 10 mV.
Do not make this resistor any smaller than you need to.)
a. Measure the voltage on both sides of the capacitor and record the values. If they are
different you may this information to explain gain problems.
b. Observe the waveforms of the incremental input voltage at the base, Vb, and incremental
output voltage, Vc, at the collector.
While looking at the collector voltage, adjust the input voltage until you find the maximum
output voltage that you can get without any distortion in shape or lack of symmetry in the
positive and negative swings of the sinusoidal output.
Record the peak to peak voltages at the base and at the collector.
c. Repeat the same experiments in b using a triangle wave. As in the case of the sinusoid
adjust for maximum input signal with minimum output distortion if possible.
[For better triggering of the oscilloscope, connect the signal at the divider input to the external trigger
input of the oscilloscope and make appropriate triggering control adjustments]

3. Find another transistor that significantly changes the base current by noting the changes in the
voltages in the R1-R2 divider circuit. Then repeat steps 1 and 2 in this Experiment section.

4. Vary the frequency of your signal generator from about below 100 Hz to above 20 KHz while keeping
the input signal constant at node Vin.
a. Is the gain staying constant?
b. Are you meeting your frequency specifications?
c. If you failed to meet the low frequency specifications, try to experimentally find a capacitor
that meets the specifications.

VII. Report

1. Document all steps of your design procedure in detail. Be sure to include your incremental
model.
2. Did your Q-point estimates agree with your measurements? Where they did not, do measured
values of β explain these discrepancies. If not, what else might?
3. Determine the small-signal voltage gain, Vc/Vb using your peak to peak values. How well do they
agree with your design estimates? Did you meet specifications?
4. Recalculate the theoretical values for the voltage gains using the measured values of β. Does
this give better agreement? Compute the percentage error.
5. How well did you meet frequency specifications at the low and high frequencies? If you did not
meet specifications speculate why?