CHAPTER 1.

Z – SOURCE INVERTERS
1.1 INTRODUCTION
Based on the feeding source the converters can be traditionally classified as-
voltage source and current source converter. Fig 1 shows the traditional 3 phase
V-source converter. A dc voltage source supported by a relatively large capacitor
feeds the main converter circuit. The dc voltage source can be a fuel cell stack,
battery, diode rectifier and/or a capacitor. The main circuit is composed of six
semiconductor switches which traditionally included a power transistor and an
antiparallel diode to provide bidirectional current flow and unidirectional voltage
blocking capability.

Fig 1. Traditional Voltage Source converter

However, it suffers from some barriers and limitations. The ac output is limited
below the dc source voltage i.e. it possesses buck ability inherently for dc-to-ac
inverter application and boost ability for ac to dc power converter. For
applications requiring high ac voltages at output an additional boosting stage is
required adding to system cost and lowering efficiency. The upper and lower
device of a phase leg cannot be gated simultaneously either purposely or by EMI
noise. This may result in a short across the source even momentarily will damage
the switching devices. Shoot through problem by EMI noise misgating is a major
reliability issue for the converter. Dead time is provided to avoid this problem
which in turn causes waveform distortion. Additionally, a LC filter is needed to
provide a sinusoidal voltage compared to a CSI which causes additional power
loss and complexity.

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Fig 2 shows the traditional 3 phase current source converter. A dc current source
feeds the main circuit. The dc source can be a relatively large dc inductor fed by a
voltage source as a battery, fuel cell stack, diode rectifier or thyristor converter.
Traditionally the switches used in the main circuit is composed of a
semiconductor switching device with reverse blocking capability such as a gate
turn off thyristor(GTO) and a SCR or a power transistor with series diode to
provide unidirectional current flow and bidirectional voltage blocking ability.

Fig 2: Traditional current source inverter

However, the current-source converter has some limitations. The ac output voltage
has to be greater than the original dc voltage that feeds the dc inductor. Therefore,
the current-source inverter has a boosting ability for dc-to-ac power conversion
and it is a buck rectifier for ac-to-dc power conversion. Like the voltage source
converter CSI also requires additional boosting converter for wide voltage range
applications. The additional power conversion stage increases system cost and
lowers efficiency. CSI also suffers from EMI noise misgating threatening the
converter reliability. In addition to these problems the main switches of the
current source converter have to block reverse voltage that requires a series diode
to be used in combination with high-speed and high-performance transistors such
as insulated gate bipolar transistors (IGBTs). This prevents the direct use of low-
cost and high-performance IGBT modules and intelligent power modules (IPMs).

To overcome the above problems of the traditional voltage-source and current-

source converters, an impedance-source (or impedance-fed) power converter
(abbreviated as Z-source converter) is developed. Fig. 3 shows the general Z-

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source converter. It employs a unique impedance network (or circuit) to couple
the converter main circuit to the power source, load, or another converter.

Fig 3: General structure of a Z source converter

The two-port network shown above consists of a split-inductor L1 and L2 and

capacitors C1 and C2 connected in X shape employed to provide an impedance
source coupling to the dc source, load, or another converter. The inductance and
can be provided through a split inductor or two separate inductors. The dc
source/or load can be either a voltage or a current source/or load. Therefore, the dc
source can be a battery, diode rectifier, thyristor converter, fuel cell, an inductor, a
capacitor, or a combination of those. Switches used here in this converter can be a
combination of switching devices and diodes such as the anti-parallel combination
as in VSI (Fig 1), or the series combination of a CSI (Fig. 2), etc.

1.2 EQUIVALENT CIRCUIT AND OPERATING

PRINCIPLE
To describe the operating principle and control of the Z-source inverter, let us
examine the Z-source inverter structure. Fig. 4shows the three-phase Z-source
inverter bridge. Unlike the traditional VSI, Z source inverter has nine permissible
switching states compared to the eight states of the VSI. The traditional three-
phase VSI has six active vectors when the dc voltage is impressed across the load

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 Fig 4: A typical Z source inverter

And two zero vectors when the load terminals are shorted through either the lower
or upper three devices, respectively. However, the three-phase Z-source inverter
bridge has one extra zero state (or vector) when the load terminals are shorted
through both the upper and lower devices of any one phase leg (i.e., both devices
are gated on), any two phase legs, or all three phase legs. This shoot-through zero
state (or vector) is forbidden in the traditional VSI, because it would cause a
shoot-through (short circuit). We call this third zero state (vector) the shoot-
through zero state (or vector). This shoot through state can be generated by three
different ways which can be generated by seven different ways. This shoot-
through zero state provides the unique buck-boost feature to the inverter.

Shoot Devices on during this

through state state
number
1 T1,T4
2 T3,T6
3 T5,T2
4 T1,T4,T3,T6
5 T3,T6,T5,T2
6 T1,T4,T5,T2
7 T1,T2,T3,T4,T5,T6
Table 1: Number of ways in which shoot through state is achieved

Fig 5: Equivalent circuit Fig 6: Equivalent circuit during

during shoot through state non-shoot through states
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Fig. 5 shows the equivalent circuit of the Z-source inverter shown when viewed
from the dc link in its shoot through state. The inverter bridge is equivalent to a
short circuit when the inverter bridge is in the shoot-through zero state whereas
the inverter bridge becomes an equivalent current source as shown in Fig. 6 when
in one of the six active states. The inverter bridge can be also represented by a
current source with zero value (i.e., an open circuit) when it is in one of the two
traditional zero states.

1.3 BOOST FACTOR CALCULATION

Assuming that the inductors L1 and L2 and capacitors C1 and C2 have the same
inductance (L) and capacitance (C) respectively then the Z source network
becomes symmetrical. From the symmetry and equivalent circuits,

VC1=VC2=VC vL1=vL2=vL (1)

Let the inverter be in the shot through state zero state for an interval T 0 during a
switching cycle T and from the equivalent circuit in Fig 5 we have,

vL=VC vd=2VC vi=0 (2)

Now considering one of the eight non shoot through states existing for an interval
T1 during a switching cycle T. From equivalent circuit in Fig 6 we have

vL=V0-VCvd=V0 vi=VC-vL=2VC-V0 (3)

Where V0 is the dc source voltage and T=T0+T1.

The average voltage of the inductors over one switching period (T) should be zero
in steady state so from (2) and (3), we have

𝑇0 .𝑉𝐶 +𝑇1 .(𝑉0 −𝑉𝐶 )

VL=𝑣̅ L= =0 (4)
𝑇
𝑉𝐶 𝑇1
Or = (5)
𝑉0 𝑇1 −𝑇0

Similarly, the average dc link voltage across the inverter bridge can be found as
follows:

𝑇0 .0+𝑇1 .(2𝑉𝐶 −𝑉0 ) 𝑇

Vi=𝑣̅ i= = 1 V0=VC (6)
𝑇 𝑇1 −𝑇0

The peak dc link voltage across the inverter bridge expressed in (3) can now be
written as

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 𝑇
̂𝑣i=VC-vL=2VC-V0 = V0=B.V0 (7)
𝑇1 −𝑇0

Where,

𝑇 1
B= = ≥1, (8)
𝑇1 −𝑇0 1−2𝑇0
𝑇

is the boost factor resulting from the shoot-through zero state. The peak dc-link
voltage𝑣̂𝑖 is the equivalent dc-link voltage ofthe inverter. On the other side, the
output peak phase voltagefrom the inverter can be expressed as

𝑣̂ ̂𝑖 /2
𝑎𝑐 =M.𝑣 (9)

Where M is the modulation index. Using (7), (9) can be expressed as

𝑣̂
𝑎𝑐 =M.B.V0 /2 (10)

For traditional VSI PWM inverter the well-known relationship is 𝑣̂

𝑎𝑐 =M.V0 /2.
Equation (10) shows that the output voltage can be stepped up by choosing an
appropriate boost factor.

1.4 INDUCTOR AND CAPACITOR REQUIREMENTS

For the traditional VSI, the dc capacitor is the only energy storage and filtering
element to suppress voltage ripple and serve temporary storage. Similarly, for the
traditional CSI, the dc inductor is the sole energy storage/filtering element to
suppress current ripple and serve temporary storage. The Z-source network is a
combination of two inductors and two capacitors. This unique impedance
structure of the ZSI is the energy storage/filtering element. The Z-source network
provides a second-order filter and is more effective to suppress voltage and
current ripples than capacitor or inductor used alone in the traditional inverters.
Therefore, the inductor and capacitor requirement should be smaller than the
traditional inverters. When the two inductors (L1 and L2 ) are small and approach
zero, the Z-source network reduces to two capacitors (C1 and C2 ) in parallel and
becomes a traditional V-source. Therefore, a traditional V-source inverter’s
capacitor requirements and physical size is the worst case requirement for the Z-
source network. Considering additional filtering and energy storage provided by
the inductors, the Z-source network should require less capacitance and smaller
size compared with the traditional V-source inverter. Similarly, when the two
capacitors (C1 and C2) are small and approach zero, the Z-source network reduces
to two inductors (L1 and L2 ) in series and becomes a traditional current-source
inverter. Therefore, a traditional current-source inverter’s inductor requirements

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and physical size is the worst case requirement for the Z-source network.
Considering additional filtering and energy storage by the capacitors, the Z-source
network should require less inductance and smaller size compared with the
traditional CSI.

1.5 TOPOLOGY LIMITATIONS

1. Light-load operations

2. Unidirectional power flow

3. High inrush start up current

There exists a large inrush start up current at the starting of ZSI. During the initial
state, the voltage across the capacitor is zero in the ZSI, so there exists a high
inrush start up current at starting which causes the capacitors to charge up to half
the input voltage. Therefore, a resonance between Z-source capacitance and
inductor starts that might destroy the devices.

4. High voltage across capacitor in Z-network

5. Limited boosting ability

From the equation (8) one might assume infinite boosting ability based on the
equation but in reality the maximum boosting capability is limited by practical
considerations.

6. Discontinuous input current. During the shoot through states the source is
disconnected from the main circuit momentarily due to which the source current
becomes discontinuous in nature which injects harmonics into the line.

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 CHAPTER 2.
SWITCHED INDUCTOR ZSI
2.1 INTRODUCTION
The relation between dc-link voltages across the inverter bridge Vdc and the input
source voltage Vin can be expressed as

𝑉𝑑𝑐 𝑇 1 1
B= = =
𝑉𝑖𝑛 𝑇1 −𝑇0 1−2𝑇0
= (11)
1−2𝐷
𝑇

whereT0 is the interval of the shoot-through zero state during a switching cycle T
and D is the duty ratio of each cycle and is equal to T0/T .From (11), it is seen that
D is limited to the range from minimum value zero to the maximum value 0.5 in
which the impendence network can perform the step-up dc–dc conversion from
Vin to Vdc. For the practical applications, in order to provide a very high boost
factor for the low-voltage dc energy source, usually a large value of D needs to be
taken, i.e., the Z-source converter would have to be operated under the extreme
condition of a long interval of the shoot-through zero state. Consequently, the
modulation index of the main circuit will be decreased to a very low level, and the
numerical relation can be expressed by
M≤1−D (12)
Where
Amplitude of the modulation waveform
M= .
Amplitude of the carrier waveform

Unfortunately, the constraint of low M and high D will cause a new conflict of the
output power quality and system boost inversion ability. M has a linear relation to
the magnitude of the output voltage at the fundamental frequency. Beside M, the
modulation ratio p, defined as the ratio of the carrier frequency over the
modulation frequency, is also related to the power quality. The harmonics usually
appear in clusters with main components at frequencies of np(n = 1, 2, 3, . . .).
Therefore, on performing the harmonics computation by Fourier series, we can
draw the harmonics spectra for a qualitative observation.
According to the results in Fig. 7, the condition of low M will result in poor
inversion ability at the fundamental frequency with high total harmonic distortion
values, and consequently, the final ac output performance will be degraded
significantly. For an optimum system design of the Z-source inverter, the practical
values of M have to be made close to 1, and D has a small upper limit according

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 Fig 7: Normalised harmonic amplitudes for SPWM Z-source inverters
to (12). Therefore, the practical boost factor of Z-source impedance network is
usually restricted seriously by (11).
Advanced dc-dc conversion enhancement techniques such as switched capacitor
(SC), switched inductor (SL), hybrid SC/SL, voltage multiplier cells and voltage
lift techniques are used to get the high step-up capacity in transformer less and
cascade structures. The main objective is to reach a high efficiency, high power
density, and simple structures. Therefore, the combination of the Z-source inverter
and advanced dc–dc enhancement techniques could be a good solution for
improving impedance-type inverters’ performance and promoting their further
industrial applications.
The concept of the SL techniques has been integrated into the classical Z-source
impedance network, and consequently, a new SL Z-source impedance network is
proposed. The newly obtained topology is then termed the SL Z-source inverter
and is shown in Fig. 8.

Fig. 8: Switched inductor (SL) Z-source inverter topology

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2.2 EQUIVALENT CIRCUIT AND OPERATING
PRINCIPLE
As illustrated in Fig. 8, the SL Z-source inverter consists of four inductors (L1,
L2,L3 , and L4 ), two capacitors (C1 and C2 ), and six diodes (D1,D2,D3,D4,D5 , and
D6 ). The combination of L1–L3–D1–D3–D5 and the combination of L2–L4–D2–D4–
D6 performs the function of the top SL cell and the bottom SL cell, respectively.
Both of these two SL cells are used to store and transfer the energy from the
capacitors to the dc bus under the switching action of the main circuit. Like the Z
source inverter SL Z source also has two working states namely- shoot through
and non-shoot through state.

1. Shoot-Through State: Like in the ZSI this state is caused when the load
terminals are shorted through the upper and lower devices of any one phase leg,
any two or all the three phase legs. This state corresponds to the additional zero
state. For the top SL cell, D1and D2are ON, and D3is OFF. L1 and L3 are charged by
C1in parallel. For the bottom SL cell, D4 and D5 are ON, and D6 is OFF. L2 and
L4are charged by C2 in parallel. Its equivalent circuit is shown in Fig. 9. It is seen
that both the top and bottom SL cells perform the same function to absorb the
energy stored in the capacitors.

Fig.9: Equivalent circuit of a SL ZSI during shoot through

2. Non Shoot-Through State: This state corresponds to the six active states and
two zero states of the main circuit and the equivalent circuit is shown in Fig.10.
For the top SL cell, D1 and D3 are OFF, and D5 is ON. L1 and L2are connected in
series, and the stored energy is transferred to the main circuit. For the bottom SL
cell, D4 andD5 are OFF, andD5 is ON. L3and L4 are connected in series, and the
stored energy is transferred to the main circuit. At the same time, to supplement
the consumed energy of C1 and C2during the shoot-through state, C1 is charged by
Vin via the bottom SL cell, and C2is charged by Vin via the top SL cell.

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 Fig.10: Equivalent circuit of SL ZSI during non-shoot through states

2.3 BOOST FACTOR CALCULATION

Assuming all inductors and capacitors to have the same inductance (L) and
capacitance (C), respectively. Then, both the equivalent circuits in Fig. 9 and Fig.
10 now have symmetrical characteristics. Additionally, since C1 and C2 are
sufficiently large, in the steady state,
we have
VC1= VC2= VC (13)
The inductor current iL1increases during switching ON and decreases during
switching OFF. During switching ON, the corresponding voltage across L1 ,VL1-ON
is equal to VC . Applying the volt–second balance principle to L1, we can get the
corresponding voltage across L1during switching OFF, VL1-OFF, which is expressed
by
𝐷
VL1-OFF = − VC
1−𝐷
= VL3-OFF (14)

The inductor current iL3increases during switching ON and decreases during

switching OFF. The corresponding voltages across L3are equal to VC1and −(VC2−
Vin+ VL1-OFF).
Applying the volt–second balance principle to L3, we have

D.T.VC1 = (1 − D).T. (VC2− Vin+VL1-OFF) or

𝐷
D.T.Vin = (1 − D).T. (VC− Vin− VC ) (15)
1−𝐷

Rearranging equation (15) we will get,

1−𝐷
VC = Vin
1−3𝐷
= VC1 = VC2 (16)
During switching OFF, C1, L1, L3 , and the voltage source Vdc form a close loop
therefore we have

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 VC= Vdc+VL1-OFF + VL3-OFF (17)
Therefore,
1+𝐷
Vdc = Vin= BVin (18)
1−3𝐷

The boost factor of the SL Z-source impedance, B is thus expressed by

𝑇
1+𝐷
1+ 0
𝑇
B = 1−3𝐷 = 𝑇 (19)
1−3 0
𝑇
For the comparison of the individual boost ability, the curves of the boost factor B
versus the duty ratio D for classical Z-source impedance network and the
proposed SL Z-source impedance network, respectively, are shown in Fig. 11. As
shown in Fig. 11, the boost ability of the proposed SL impedance network is
significantly increased compared with that of the classical Z-source impendence
network.

Fig.11: Boost ability comparison of classical ZSI

And SL ZSI network

2.4 COMPARISION OF VARIOUS STRESSES

The current stresses of the impedance-type power converters are different under
different control and load conditions. For the purpose of comparison, both the SL
ZSI and the classical Z-source inverter are represented by the simplified
equivalent circuit as shown in Fig. 15

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 Fig.12: simplified equivalent circuit of impedance type power inverters

An inductive load impedance (Zl= Rl+ sLl) is paralleled with S directly in Fig.15.
As for the SL Z source inverter, the inductor currents IL1–IL4 are the same and can
be expressed by ILfor the convenience of analysis. Applying the steady-state
analysis method in a small signal ac model of the inverter to Fig. 15, we can
obtain the voltage and current stresses of the main components (passive power
switch Din , L, C, and dc link) .The results are tabulated in Table 2 based on the
assumption that both of these two inverters are working in the case of the same D
and Vin . Consequently, it can be known that the SL ZSI inverter has the higher
voltage and current stresses due to its stronger voltage boost ability

SL ZSI ZSI

Vdc 1+D 1
Vin Vin
1−3D 1−2D

VC 1−D (1-D)Vdc
Vdc
1−3D
VDin Vdc Vdc
IDin 2IL-Il 2IL-Il
Il Vdc Vdc
(1-D) (1-D)
Rl Rl
IL (1 − D)2 Vdc (1 − D)2 Vdc
. .
1 − 3D R l 1 − 2D R l

Table 2: Stress comparison in the case of same D and Vin

When the SL ZSI is used to replace the classical Z-source inverter in a particular
case, Vdc and Vin are usually fixed. If we assume that the detailed value of D in the
classical Z-source inverter is k, the corresponding D in the SL ZSI should be
k/(2−k) so as to obtain the same Vdc. Correspondingly, the voltage and current
stresses are tabulated in Table 3. It is seen from Table 3 that the voltage stresses of
the SL ZSI are the same to those of the classical Z-source inverter. The current

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stresses have a rise for the same load impedance, which indicates that the SL ZSI
has a stronger power processing capability. If the condition of the same load
currents is considered, the current stresses of these two topologies will be the
same.

SL ZSI ZSI
Vdc 1
Vin
1−2k

VC (1-k)Vdc
VDin Vdc
IDin 2IL -Il 2IL -Il

Il 2 2
I I
2 − k l0 2 − k l0
IL 2 2
I I
2 − k L0 2 − k L0

Table 3: Stress Comparison in cae of same Vdc,Vin and Rl

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 CHAPTER 3
SHOOT THROUGH CONTROL SCHEMES
There are different modulation techniques for controlling the z-source inverter.
The modulation techniques are classified based on diverse shoot through states
insertion approaches. Two of such modulation techniques are:

1. Simple Boost Control- In the simple boost control, a straight line equal to or
greater than the peak value of the three phase references is employed. When the
triangular waveform is larger than upper line or lower than bottom line, inverter
enters shoot through state. Else it operates as normal PWM inverter. The
obtainable duty ratio of the shoot-through state can be regarded as a constant
value, and its maximum value is limited to (1 − M). The voltage conversion ratio
of the whole inverter G can be expressed by

v̂
pn
G =V = MB (20)
in⁄
2
Where𝑣̂
𝑝𝑛 is the peak value of the output phase voltage

Therefore, based on (12) and (20), the maximum voltage conversion ratio Gmax
versus any desired modulation index M can be expressed by

M(2−M)
Gmax =M B|D=1−M= ≥ G0_s (21)
3M−2
where G0_s is defined as the maximum voltage conversion ratio of the classical Z-
source inverter and its expression depends on M, given as follows:

M
G0_s= (22)
2M−1

2. Maximum Boost Control-This scheme utilizes the entire shoot through states.
All zero states are converted to shoot through states. Whenever the triangular
waveform is larger than positive reference or lower than negative reference,
inverter enters shoot through state. This is done so as to make the duty ratio as
large as possible. Therefore, the shoot-through duty cycle varies in each cycle.
̅
Average shoot through duty ratio of this scheme is given by D

̅̅̅̅ 2π−3√3M
̅ =T 0 =
D (23)
T 2π
̅ under the
Substituting (23) to (19), we can get the equivalent boost factor B
condition of variable duty ratios
̅
1+D 4π−3√3M
̿=
B = (24)
1−3D̅ 9√3M−4π
Therefore, the maximum voltage conversion ratio Gmax versus any desired
modulation index M approximates to

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 v̂
pn M(4π−3√3M)
Gmax =V = MB̅ = >G0_m (25)
in⁄
2
9√3M−4π

Where G0_mis defined as the maximum voltage conversion ratio of the classical Z-
source inverter and its expression depends on M, given as follows:

πM
G0_m = (26)
3√3M−π

Fig. 13: waveforms and switching strategies of simple boost

And maximum boost PWM control

Fig. 14 given below shows the maximum obtainable voltage conversion ratios
versus the given modulation index under the simple boost control condition,
where curve 1 and curve 2 correspond to SL Z-source inverter and the classical Z-
source inverter, respectively. It is shown that the voltage boost ability is
unavailable at M = 1. However, if M <1, with the decreasing of M, the voltage
boost inversion ability of the proposed inverter becomes much stronger than that
of the classical Z-source inverter. It means that for a given voltage conversion
ratio, a higher modulation index can be used in the proposed inverter to improve
the inverter output performance.

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 Fig.14: Maximum voltage conversion ratios under simple
Boost control

Fig. 15 shows the maximum obtainable voltage conversion ratios versus the given
modulation index under the maximum boost control condition, where curve 1 and
curve 2 correspond to the proposed SL ZSI and the classical Z-source inverter,
respectively. It is shown that the voltage boost inversion abilities of both these two
inverters have been enhanced to a wider range by this method. Similar to the
observation in Fig. 14, the SL ZSI exhibits its advantage of stronger voltage boost
inversion ability at the low modulation index.

Fig.15: Maximum voltage conversion ratios under maximum boost control

condition

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 CHAPTER 4.
EXTENSION TO MUTILEVEL INVERTERS

The impedance source topologies can be extended to multilevel inverters to get

better boosting and cleaner output waveforms. Multilevel inverters help in
reducing harmonic content in the waveform. With improvement in the boost
factor, the semiconductor switches in SL ZSI struggles an extra stress under boost
operation. This extra stress necessitates to be examined during the Z source
multilevel inverter design. Neutral Point Clamped or NPC multilevel topology
helps in reducing the stress across the switch to half that of the two level
topologies. Moreover, the excellence of output waveform can be enhanced by
means of introducing multi voltage levels. Fig.16 shows the implementation of the
switched inductance Z source three level neutral point clamped inverter.

Fig.16: Switched Inductor Three Level Z source NPC inverter

In the 3 level NPC inverter there are 27 possible switching states, where 24 are the
active states and remaining 3 are the zero states. Unlike the two level inverters
here the shoot through state is of 3 types i.e. Full shoot through (FST), Upper
Shoot through (UST) and Lower Shoot through (LST).

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 Fig.17: (a)Full Shoot Through State (b)Upper Shoot through (c)Lower Shoot
Through

In the 3 level NPC inverter the various switching notations are: (a) P, when S a1
and Sa2 are gated, (b)O, when Sa2 and Sa3 are gated and (c)N, when Sa3 and Sa4 are
gated. Fig.18 shows the non shoot through states of SL-ZSI multilevel inverter.

Fig.18: (d)NST with Positive Pole Voltage(P), (e)NST with Zero Pole Voltage(O)
(f)NST with Negative Pole Voltage (N)

State Switching Diode Combination

State D1 D2 D3 D4 D5 D6 D7 D8
FST P,N ON ON OFF ON ON OFF OFF OFF
UST P,O ON ON OFF OFF OFF OFF ON OFF
LST N,O OFF OFF OFF ON ON OFF OFF ON
NST P OFF OFF ON OFF OFF ON ON ON
NST O OFF OFF ON OFF OFF ON ON ON
NS N OFF OFF ON OFF OFF ON ON ON
Table 4:Switching States of the diodes for one phase leg

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Both the DC link voItages of the NPC inverter must be approximately equal for
the low output THD. Therefore, the DC input voItages (VinU and VinL) must be
equal.Consequently, we can express the DC link voItage single Z-network
muItilevel inverter by:
𝑇
Vdc = BVin= 𝑇−2𝑇 Vin (27)
0
Where, B is the boost factor. T is the switching period and T0 is the total shoot
through interval and it is given as
T0 = TUST + TLST + TFST
Where TUST,TLST and TFST are the shoot through time intervals for upper shoot
through, lower shoot through and full shoot through respectively. The non shoot
through time TNST can be calculated by
TNST = T - TUST - TLST - TFST
The boost factor of this topology comes out to be same as that of the two level ZSI
i.e.
T
1+D 1+ T0
B = 1−3D = T
1−3 0
T
Various PWM techniques coupled with the control strategies previously discussed
can be used to get the maximum possible boosting available. As the modulation
index is increased the output load voltage is decreased because of decreased shoot
through interval just like the conventional ZSI.

More multilevel topologies can be realised by cascading various two level H-

bridge or by interleaving different topologies to get the output according to the
requirement of the application.

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 CHAPTER 5.

CONCLUSION

An elaborate study of the impedance source inverters was done. And based on our
study we can conclude that the classical Z source inverter opens up a new
possibility of single stage converters. Its versatile nature makes it thus suitable in
various applications. The limitations of the classical Z source inverter which led to
the invent of the new Switched Inductor Z source inverter were discussed. In the
new SL ZSI topology the basic X-shape structure is retained. As for the high
power quality and high boost inversion ability, their conflict caused by M and D
got an initial solution. Six diodes and two inductors are added compared to the
classical Z-source inverter. The boost factor has been increased from 1/(1 − 2D)
to(1 + D)/(1 − 3D). From the viewpoint of the voltage boost ability, it is seen that
the SL Z source inverter will be very competitive in the areas that need the high
voltage conversion ratios (usually G > 2). In the cases where high reliability of the
circuit is of greater priority, the proposed inverter will show distinct advantage
over all traditional topologies. SL-ZSI can be used effectively in distributed
renewable energy power systems. The original SL cells can be improved by
introducing the coupled inductor technique by which the compact structure can be
successfully obtained. All analysis results done for SL-ZSI will also be applicable
in the case with the coupled inductor structure, and only the transient
characteristics will be affected. The boost inversion ability can be further
enhanced by using tapped inductors. Thus by changing the tap position boost
factor will be increased to much higher levels. The impedance source inverters
have opened up a new area to be explored and research to meet our ever growing
demands.

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 REFERENCES
1. Fang Zheng Peng, “Z-Source Inverter”, IEEE TRANSACTIONS ON
INDUSTRY APPLICATIONS, VOL. 39, NO. 2, MARCH/APRIL 2003 pp.504-510

2. Miao Zhu, Kun Yu and Fang Lin Luo,“Switched Inductor Z-Source

Inverter”, IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO.
8, AUGUST 2010 pp. 2150-2158.

3. Deepshikha and Janardhana Kotturu, “Topology Analysis of Switched

Inductor Z-Source Multilevel Inverter”, 1st IEEE International Conference on
Power Electronics Intelligent Control and Energy Systems (ICPEICES-2016).

4. Miao ZHU, Xiuyi LI and Xu CAI, “Switched-Tapped-Inductor Z-source

Inverters” IEEE 2015

5. Mrudul A. Mawlikar, Sreedevi S Nair, “A Comparative analysis of shoot

through control schemes for Z-source inverter”, 2017 International
Conference on Electrical, Instrumentation and Communication Engineering
(ICEICE2017).

6. Shima Rashidi Aghdam, Ebrahim Babaei and Sara Laali, “Maximum Constant
Boost Control Method for Switched-Inductor Z-Source Inverter by using
Battery”, IEEE 2013

7. Barla pavani, Kanuri venkatesh ,Pudi sekhar and CH. Anand babu, “A Review
on Z-Source Inverter Topologies”, International Journal of Pure and Applied
Mathematics, Volume 114 No. 8 2017, 201-210

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