IIT Bombay

Beginning of Presentation

CDEEP
VLSI Technology
(EE 669)
Autumn 2010 Prof. V. Ramgopal Rao
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OVERVIEW
•
Environment for VLSI Technology
•
Impurity Incorporation
•
Oxidation
•
Lithography
•
CVD Techniques
•
Metal Film Deposition
•
Plasma and Rapid Thermal
Processing
•
Process Integration

Autumn 2010 Prof. V. Ramgopal Rao

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PRE-REQUISITES

Bachelors degree in any branch of

engineering

Autumn 2010 Prof. V. Ramgopal Rao

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REFERENCES
1.
James D.Plummer, Michael D.Deal, Peter
B.Griffin, Silicon VLSI Technology:
Fundamentals, Practice & Modeling,
Prentice Hall.
2.
T h e S c i e n c e a n d E n g i n e e r i n g o f
Microelectronic Fabrication, Stephen A.
Campbell, Oxford University Press.

3.
C.Y. Chang and S.M.Sze (Ed), ULSI

Technology, McGraw Hill Companies Inc,
1996.

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REFERENCES
1.
S.M. Sze (Ed), VLSI Technology, 2nd
Edition,McGraw Hill, 1988.

2.
Research Papers.

Autumn 2010 Prof. V. Ramgopal Rao

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VLSI Technology
Course Code : EE 669
Department : Electrical Engg.
Instructor : Prof. V. Ramgopal Rao

E-Mail ID/ Website : rrao@ee.iitb.ac.in

www.ee.iitb.ac.in/~rrao/

Autumn 2010 Prof. V. Ramgopal Rao

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Module #1
Sub-Topics:

•
World Semiconductor Industry

•
MOS Transistor Basics
•
Technology Scaling
•
IC Fabrication Overview

VLSI Technology Module No.1 Prof. V. Ramgopal Rao

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World Semiconductor Industry

VLSI Technology Module No.1 Prof. V. Ramgopal Rao

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G.Moore, Intel

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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MOS Transistors-Enhancement
Mode

VLSI Technology Module No.1 Prof. V. Ramgopal Rao

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MOS Transistor - Saturation

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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I-V Characteristics

VLSI Technology Module No.1 Prof. V. Ramgopal Rao

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Short-Channel Effects

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Applications of Transistors

(a) Multiplexer System

(b) Addressable array
Inverter (Memory or Display)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Applications of Transistors

Amplifier Oscillator

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Applications of Transistors

Impedance Variable attenuator Variable phase

Transformation
shifter

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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MOS Capacitors
•
“Metal” : metal, or
more frequently
heavily doped poly-
Si
•
“Oxide” : silicon
dioxide, or some
other high k
dielectric
•
“Semiconductor” :
Si , but can also
be SiGe, SiC

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Basic MOS Structure

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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MOSFET Operation – Linear Region

VDS < VGS-VT

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MOSFET Operation – Saturation

VLSI Technology Module No.1 Prof. V. Ramgopal Rao

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NMOS Transistor Equations

Linear Region:

Saturation Region: For VDS > VGS-VT

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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MOS Transistor Output

Characteristics

( S. M. Sze, Physics of Semiconductor Devices, John Wiley ,1981)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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MOS Transistor Subthreshold

Characteristics

Subthreshold Swing:
60 – 100 mV/decade

VLSI Technology Module No.1 Prof. V. Ramgopal Rao

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MOS Transistor Subthreshold

Characteristics

Subthreshold Swing:
60 – 100 mV/decade

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Scaling
W=0.7, L=0.7, Tox=0.7


L a t e r a l a n d v e r t i c a l
dimensions reduce 30 %


Area Cap = C
= (0.7 X 0.7)/0.7 = 0.7


Capacitance reduces
by 30 %

Die Area = X x Y = 0.7x0.7 = 0.72

=> Die area reduces by 50 %

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Scaling
Vdd=0.7, Vt=0.7, T ox=0.7,

= 0.7

T= (C x Vdd )/I = 0.7, Power = CV2f

= 0.7 x 0.72
0.7
= 0.72
=> Delay reduces by 30 % and Power reduces by
50 %

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Exercise

Assuming a constant scaling factor of 0.5 for

various critical MOSFET parameters, calculate the
performance improvement in terms of package
density, power and speed for an ideal CMOS
process as one scales the technologies from one
generation to the next. Compare the results for the
case where the scaling factor is 0.7.

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Solution

With a scaling factor of 0.5, the package density

increases by 4X, Capacitance decreases by a factor:
0.5 (50% reduction) , Drive current I decreases by
0.5 (50% reduction), Delay decreases by 0.5 (or
50% ), Dynamic power: CV2f = 0.25 (decreases by
4 times)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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IC Fabrication

•
Clean Room
•
Wafer Cleaning Technology
•
Oxidation
•
Lithography
•
Etching
•
Epitaxy
•
D i e l e c t r i c a n d P o l y s i l i c o n F i l m
Deposition

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IC Fabrication…
•
D i f f u s i o n a n d I o n I m p l a n t a t i o n
Processes
•
C onventional and Rapid Thermal
Annealing
•
Metallization
•
Planarization Techniques -Chemical-
Mechanical Polishing (CMP)
•
Salicidation
•
Process Integration

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Vt Control MOSFET –poly gate

process

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Fabrication-NMOSFET
(1)

(2)

(3)

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Fabrication-NMOSFET…
(4)

(5)

(6)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Fabrication-NMOSFET (cont’d)
(7)

(8)

(9)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Fabrication-NMOSFET (cont’d)

(10)

(11)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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(Stephen A. Campbell, “The science and engineering of microelectronic

fabrication,” Oxford Univ. Press.)

VLSI Technology Module No.1 Prof. V. Ramgopal Rao

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(Stephen A. Campbell, “The science and engineering of microelectronic

fabrication,” Oxford Univ. Press.)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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(Stephen A. Campbell, “The science and engineering of microelectronic

fabrication,” Oxford Univ. Press.)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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(Stephen A. Campbell, “The science and engineering of microelectronic

fabrication,” Oxford Univ. Press.)

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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NMOS Inverter with Depletion

Load

Inverter in IC form

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao

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Fabrication-NMOS inverter

Bird’s beak,
limitation in LOCOS

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Fabrication-NMOS inverter…

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Inverter Fabrication (Cont’d)

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Inverter Fabrication (Cont’d)

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Inverter Fabrication (Cont’d)

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Process Integration - Exercise

VLSI Technology Module No. 1 Prof. V. Ramgopal Rao