Power States

[edit] Global states

The ACPI specification defines the following seven states (so-called global states) for an ACPI-
compliant computer-system:

 G0 (S0): Working
 G1, Sleeping subdivides into the four states S1 through S4:
o S1: All processor caches are flushed, and the CPU(s) stop executing instructions.
Power to the CPU(s) and RAM is maintained; devices that do not indicate they
must remain on may be powered down.
o S2: CPU powered off
o S3: Commonly referred to as Standby, Sleep, or Suspend to RAM. RAM remains
powered
o S4: Hibernation or Suspend to Disk. All content of main memory is saved to non-
volatile memory such as a hard drive, and is powered down.
 G2 (S5), Soft Off: G2 is almost the same as G3 Mechanical Off, but some components
remain powered so the computer can "wake" from input from the keyboard, clock,
modem, LAN, or USB device.
 G3, Mechanical Off: The computer's power consumption approaches close to zero, to the
point that the power cord can be removed and the system is safe for dis-assembly
(typically, only the real-time clock is running off its own small battery).

Furthermore, the specification defines a Legacy state: the state on an operating system which
does not support ACPI. In this state, the hardware and power are not managed via ACPI,
effectively disabling ACPI.

[edit] Device states

The device states D0-D3 are device-dependent:

 D0 Fully On is the operating state.

 D1 and D2 are intermediate power-states whose definition varies by device.
 D3 Off has the device powered off and unresponsive to its bus.

[edit] Processor states

The CPU power states C0-C3 are defined as follows:

 C0 is the operating state.

 C1 (often known as Halt) is a state where the processor is not executing instructions, but
can return to an executing state essentially instantaneously. All ACPI-conformant
processors must support this power state. Some processors, such as the Pentium 4, also
support an Enhanced C1 state (C1E or Enhanced Halt State) for lower power
consumption.[7]
  C2 (often known as Stop-Clock) is a state where the processor maintains all software-
visible state, but may take longer to wake up. This processor state is optional.
 C3 (often known as Sleep) is a state where the processor does not need to keep its cache
coherent, but maintains other state. Some processors have variations on the C3 state
(Deep Sleep, Deeper Sleep, etc.) that differ in how long it takes to wake the processor.
This processor state is optional.

[edit] Performance states

While a device or processor operates (D0 and C0, respectively), it can be in one of several
power-performance states. These states are implementation-dependent, but P0 is always the
highest-performance state, with P1 to Pn being successively lower-performance states, up to an
implementation-specific limit of n no greater than 16.

P-states have become known as SpeedStep in Intel processors, as PowerNow! or Cool'n'Quiet in

AMD processors, and as PowerSaver in VIA processors.

 P0 max power and frequency

 P1 less than P0, voltage/frequency scaled
 Pn less than P(n-1), voltage/frequency scaled

[edit] Hardware Interface

ACPI-compliant systems interact with hardware through either a "Function Fixed Hardware
(FFH) Interface" or a platform-independent hardware programming model which relies on
platform-specific ACPI Machine Language (AML) provided by the original equipment
manufacturer (OEM).

Function Fixed Hardware interfaces are platform-specific features, provided by platform

manufacturers for the purposes of performance and failure recovery. Standard Intel-based PCs
have a fixed function interface defined by Intel,[8] which provides a set of core functionality that
reduces an ACPI-compliant system's need for full driver stacks for providing basic functionality
during boot time or in the case of major system failure.

[edit] Firmware interface

ACPI defines a large number of tables that provide the interface between an ACPI-compliant
operating system and system firmware. For example:[9]

 DSDT – Differentiated System Description Table

 SSDT – Secondary System Description Table
 SRAT – System Resource Affinity Table
The tables allow description of system hardware in a platform-independent manner, and are
presented as either fixed-formatted data structures or in AML. The main AML table is the DSDT
(differentiated system description table).

The Root System Description Pointer is located in a platform-dependent manner, and describes
the rest of the tables.

[edit] ACPI Component Architecture (ACPICA)

The ACPI Component Architecture (ACPICA) provides an open-source OS-independent
reference implementation of the ACPI specification.[10]

[edit] History
The first revision of the ACPI specification was released in December 1996 supporting 16 and
32-bit addressing spaces. It wasn't until August 2000 that ACPI received 64-bit address support
as well as support for multiprocessor workstations and servers with revision 2.0. In September
2004, revision 3.0 gave the ACPI specification support for SATA connectors, PCI Express bus,
>256 multiprocessor support, ambient light sensors and user-presence devices, as well as
extending the Thermal model beyond the previous processor centric support. The latest of the
major publications is that of revision 4.0. Released in June 2009, the 4.0 specification added
many new features to the design; most notable are USB 3.0 support, logical processor idling
support, and x2APIC support.[1]