8 Outline syllabus CO
Mapping
Unit 1 Practical based on Logic
Simplification
A Concept of pos cc and ground, CO1
verification of the truth tables of logic
gates using TTL ICS
B Implementation of the given Boolean CO1
function using logic gates in sop form.
C Implementation of the given Boolean CO1
function using logic gates in pos form.
Unit 2 Practical related to Combinational
Logic Design
A Implementation and verification of all CO1, CO2
logic gates.
B Implementation and verification of CO1, CO2
half adder.
C Implementation and verification of CO1, CO2
4:1 multiplexer
Unit 3 Practical related to Sequential Logic
Design
A Verification of state tables of RS, JK, T CO3
and D flip-flops using 3 NAND gate
B Design and verify the 4-bit synchronous CO3
counter.
C Design and verify the 4-bit asynchronous CO3
counter.
Unit 4 Practical related to Logic Families
A Design & verify the all logic gates using CO2
TTL.
B Design & verify the all logic gates using CO2
ECL.
C Design & verify the all logic gates using CO2
CMOS.
Unit 5 Practical related to VLSI & HDL
A Design AND,OR & NOT gate using CO4
HDL.
B Design NAND & NOR gate using CO4
HDL.
C Design Half Adder Using HDL CO4
Mode of Jury/Practical/Viva
examination
Weightage CA MTE ETE
Distribution 60% 0% 40%
Text book/s* - R.P. Jain, “Modern digital
Electronics”, Tata McGraw Hill, 4th
edition, 2009.
Other 1. Douglas Perry, “VHDL”, Tata
References McGraw Hill, 4th edition, 2002.
2. W.H. Gothmann, “Digital
Electronics- An introduction to theory
and practice”, PHI, 2nd edition, 2006.
3. D.V. Hall, “Digital Circuits and
Systems”, Tata McGraw Hill, 1989
4. Charles Roth, “Digital System
Design using VHDL”, Tata McGraw
Hill 2nd edition 2012.