U
TYPICAL APPLICATIO
Boost Converter (5V to 12V)
Maximum Output Power*
5V L1** L2
50µH OUTPUT
10µH FILTER 100 * ROUGH GUIDE ONLY. BUCK MODE
LT1170 POUT = (5A)(VOUT)
C3 SPECIAL TOPOLOGIES DELIVER
D1 100µF 80 MORE POWER.
VIN MBR330 ** DIVIDE VERTICAL POWER SCALE
12V BUCK-BOOST BY TWO FOR LT1171, BY FOUR
VSW
POWER (W) **
100µF FB 40
GND VC
R2
R3 1.24k 20
1k 1% BUCK-BOOST
C1 VO = 5V
1µF 0
0 10 20 30 40 50
*REQUIRED IF INPUT LEADS ≥ 2" ** COILTRONICS 50-2-52 1170/1/2 TA01 INPUT VOLTAGE (V)
PULSE ENGINEERING 92114
1
LT1170/LT1171/LT1172
W W W U
ABSOLUTE AXI U RATI GS (Note 1)
U W U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
ORDER PART TOP VIEW
ORDER PART
GND 1 8 E2
NUMBER NC 1 16 NC
NUMBER
VC 2 7 VSW NC 2 15 NC
FB 3 6 E1 LT1172MJ8 GND 3 14 E2
LT1172CSW
VC 4 13 VSW
NC* 4 5 VIN
LT1172CJ8 FB 5 12 E1
J8 PACKAGE
8-LEAD CERDIP
N8 PACKAGE
8-LEAD PDIP
LT1172CN8 NC 6 11 VIN
S8 PACKAGE
8-LEAD PLASTIC SO
LT1172IN8 NC 7 10 NC
NC 8 9 NC
* Do not connect Pin 4 of the LT1172 DIP or SO to external
LT1172CS8
SW PACKAGE
circuitry. This pin may be active in future revisions. LT1172IS8 16-LEAD PLASTIC SO WIDE
TJMAX = 150°C, θJA = 100°C/W (J) TJMAX = 100°C, θJA = 150°C/W
TJMAX = 100°C, θJA = 100°C/W (N) S8 PART MARKING
TJMAX = 100°C, θJA = 120°C/W to 150°C/W Based on continuous operation.
TJMAX = 125°C for intermittent fault conditions.
depending on board layout (S) 1172 1172I
BOTTOM VIEW ORDER PART ORDER PART
FRONT VIEW
VSW VC
NUMBER 5 VIN
NUMBER
1
2 CASE 4 VSW
4 3 IS GND LT1170MK 3 GND
LT1170CT
VIN FB LT1170CK 2 FB LT1170IT
K PACKAGE 1 VC
4-LEAD TO-3 METAL CAN LT1171MK LT1170HVCT
T PACKAGE
TJMAX θJC θJA LT1171CK 5-LEAD PLASTIC TO-220 LT1170HVIT
LT1170MK 150°C 2°C/W 35°C/W
LT1170CK 100°C 2°C/W 35°C/W LT1172MK TJMAX θJC θJA LT1171CT
LT1171MK
LT1171CK
150°C 4°C/W
100°C 4°C/W
35°C/W
35°C/W
LT1172CK LT1170CT/LT1170HVCT
LT1171CT/LT1171HVCT
100°C 2°C/W 75°C/W
100°C 4°C/W 75°C/W
LT1171IT
LT1172MK
LT1172CK
150°C 8°C/W
150°C 8°C/W
35°C/W
35°C/W
LT1172CT/LT1172HVCT 100°C 8°C/W 75°C/W LT1171HVCT
Based on continuous operation.
Based on continuous operation. TJMAX = 125°C for intermittent fault conditions. LT1172CT
TJMAX = 125°C for intermittent fault conditions.
LT1172HVCT
*θ will vary from
approximately
ORDER PART
FRONT VIEW
5 VIN
25°C/W with 2.8 NUMBER
sq. in. of 1oz.
4 VSW copper to 45°C/W
3 GND
with 0.20 sq. in. of LT1170CQ LT1171HVCQ
2 FB
1oz. copper.
1 VC
Somewhat lower
LT1170IQ LT1172CQ
Q PACKAGE
5-LEAD DD
values can be LT1171CQ LT1172HVIQ
obtained with
TJMAX = 100°C, θJA = *°C/W additional copper LT1171IQ
layers in multilayer
boards.
2
LT1170/LT1171/LT1172
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating tem-
perature range, otherwise specifications are at TA = 25°C. VIN = 15V, VC = 0.5V, VFB = VREF, output pin open, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VREF Reference Voltage Measured at Feedback Pin 1.224 1.244 1.264 V
VC = 0.8V ● 1.214 1.244 1.274 V
IB Feedback Input Current VFB = VREF 350 750 nA
● 1100 nA
gm Error Amplifier ∆IC = ±25µA 3000 4400 6000 µmho
Transconductance ● 2400 7000 µmho
Error Amplifier Source or VC = 1.5V 150 200 350 µA
Sink Current ● 120 400 µA
Error Amplifier Clamp Hi Clamp, VFB = 1V 1.80 2.30 V
Voltage Lo Clamp, VFB = 1.5V 0.25 0.38 0.52 V
Reference Voltage Line 3V ≤ VIN ≤ VMAX ● 0.03 %/V
Regulation VC = 0.8V
AV Error Amplifier Voltage Gain 0.9V ≤ VC ≤ 1.4V 500 800 V/V
Minimum Input Voltage (Note 5) ● 2.6 3.0 V
IQ Supply Current 3V ≤ VIN ≤ VMAX, VC = 0.6V 6 9 mA
Control Pin Threshold Duty Cycle = 0 0.8 0.9 1.08 V
● 0.6 1.25 V
Normal/Flyback Threshold 0.4 0.45 0.54 V
on Feedback Pin
VFB Flyback Reference Voltage IFB = 50µA 15.0 16.3 17.6 V
(Note 5) ● 14.0 18.0 V
Change in Flyback Reference 0.05 ≤ IFB ≤ 1mA 4.5 6.8 9 V
Voltage
Flyback Reference Voltage IFB = 50µA 0.01 0.03 %/V
Line Regulation (Note 5) 7V ≤ VIN ≤ VMAX
Flyback Amplifier ∆IC = ±10µA 150 300 650 µmho
Transconductance (gm)
Flyback Amplifier Source VC = 0.6V Source ● 15 32 70 µA
and Sink Current IFB = 50µA Sink ● 25 40 70 µA
BV Output Switch Breakdown 3V ≤ VIN ≤ VMAX, LT1170/LT1171/LT1172 ● 65 90 V
Voltage ISW = 1.5mA LT1170HV/LT1171HV/LT1172HV ● 75 90 V
LT1172S8 ● 60 80 V
VSAT Output Switch LT1170 ● 0.15 0.24 Ω
“On” Resistance (Note 3) LT1171 ● 0.30 0.50 Ω
LT1172 ● 0.60 1.00 Ω
Control Voltage to Switch LT1170 8 A/V
Current Transconductance LT1171 4 A/V
LT1172 2 A/V
ILIM Switch Current Limit (LT1170) Duty Cycle = 50% TJ ≥ 25°C ● 5 10 A
Duty Cycle = 50% TJ < 25°C ● 5 11 A
Duty Cycle = 80% (Note 4) ● 4 10 A
(LT1171) Duty Cycle = 50% TJ ≥ 25°C ● 2.5 5.0 A
Duty Cycle = 50% TJ < 25°C ● 2.5 5.5 A
Duty Cycle = 80% (Note 4) ● 2.0 5.0 A
(LT1172) Duty Cycle = 50% TJ ≥ 25°C ● 1.25 3.0 A
Duty Cycle = 50% TJ < 25°C ● 1.25 3.5 A
Duty Cycle = 80% (Note 4) ● 1.00 2.5 A
3
LT1170/LT1171/LT1172
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating tem-
perature range, otherwise specifications are at TA = 25°C. VIN = 15V, VC = 0.5V, VFB = VREF, output pin open, unless otherwise noted.
Note 1: Absolute Maximum Ratings are those values beyond which the life Transformer designs will tolerate much higher input voltages because
of the device may be impaired. leakage inductance limits rate of rise of current in the switch. These
Note 2: Minimum effective switch “on” time for the LT1170/71/72 (in current designs must be evaluated individually to assure that current limit is well
limit only) is ≈ 0.6µs. This limits the maximum safe input voltage during an controlled up to maximum input voltage.
output shorted condition. Buck mode and inverting mode input voltage during Boost mode designs are never protected against output shorts because
an output shorted condition is limited to: the external catch diode and inductor connect input to output.
(R)(IL) + Vf Note 3: Measured with VC in hi clamp, VFB = 0.8V. ISW = 4A for LT1170,
VIN (max, output shorted) = 15V +
(t)(f) 2A for LT1171, and 1A for LT1172.
buck and inverting mode
Note 4: For duty cycles (DC) between 50% and 80%, minimum
R = Inductor DC resistance
guaranteed switch current is given by ILIM = 3.33 (2 – DC) for the LT1170,
IL = 10A for LT1170, 5A for LT1171, and 2.5A for LT1172 ILIM = 1.67 (2 – DC) for the LT1171, and ILIM = 0.833 (2 – DC) for the
Vf = Output catch diode forward voltage at IL LT1172.
t = 0.6µs, f = 100kHz switching frequency Note 5: Minimum input voltage for isolated flyback mode is 7V. VMAX =
Maximum input voltage can be increased by increasing R or Vf. 55V for HV grade in fully isolated mode to avoid switch breakdown.
External current limiting such as that shown in AN19, Figure 39, will
provide protection up to the full supply voltage rating. C1 in Figure 39
should be reduced to 200pF.
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Switch Current Limit vs Duty Cycle* Minimum Input Voltage Switch Saturation Voltage
16 2.9 1.6
SWITCH CURRENT = IMAX
SWITCH SATURATION VOLTAGE (V)
1.4
2.8 150°C
MINIMUM INPUT VOLTAGE (V)
12 1.2
SWITCH CURRENT (A)
100°C
2.7
1.0
–55°C 25°C
25°C
8 2.6 0.8
–55°C
125°C SWITCH CURRENT = 0A 0.6
2.5
4 0.4
* DIVIDE VERTICAL SCALE BY TWO FOR 2.4
0.2 * DIVIDE CURRENT BY TWO FOR
LT1171, BY FOUR FOR LT1172. LT1171, BY FOUR FOR LT1172.
0 2.3 0
0 10 20 30 40 50 60 70 80 90 100 –75 –50 –25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8
DUTY CYCLE (%) TEMPERATURE (°C) SWITCH CURRENT (A)*
1170/1/2 G01 1170/1/2 G02 1170/1/2 G03
4
LT1170/LT1171/LT1172
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Feedback Bias Current vs
Line Regulation Reference Voltage vs Temperature Temperature
5 1.250 800
4
REFERENCE VOLTAGE CHANGE (mV)
1.248 700
1170/1/2 G07
* AVERAGE LT1170 POWER SUPPLY CURRENT IS * UNDER VERY LOW OUTPUT CURRENT CONDITIONS,
FOUND BY MULTIPLYING DRIVER CURRENT BY DUTY CYCLE FOR MOST CIRCUITS WILL APPROACH
DUTY CYCLE, THEN ADDING QUIESCENT CURRENT. 10% OR LESS.
160 4000
SUPPLY CURRENT (µA)
5
LT1170/LT1171/LT1172
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Idle Supply Current vs
Temperature Feedback Pin Clamp Voltage Switch “Off” Characteristics
11 500 1000
VC = 0.6V
10 450 900
IDLE SUPPLY CURRENT (mA)
9 400 800
1.8
250 – 250 20
TIME (µs)
480 –20
FEEDBACK PIN VOLTAGE (mV)
5000 30
470 –18
4000 gm 60 FEEDBACK PIN VOLTAGE
PHASE (DEG)
6
LT1170/LT1171/LT1172
W
BLOCK DIAGRA
SWITCH
VIN OUT
16V
2.3V FLYBACK
REG ERROR
AMP LT1172
5A, 75V
SWITCH
100kHz
OSC LOGIC DRIVER
MODE ANTI-
SELECT SAT
COMP
FB –
ERROR VC
AMP
+
+
0.02 Ω
SHUTDOWN CURRENT (0.04 Ω LT1171) 0.16 Ω
CIRCUIT AMP (0.16 Ω LT1172)
–
GAIN ≈ 6
1.24V
REF 0.15V
E1† E2
† ALWAYS CONNECT E1 TO THE GROUND PIN ON MINIDIP, 8- AND 16-PIN SURFACE MOUNT PACKAGES.
E1 AND E2 INTERNALLY TIED TO GROUND ON TO-3 AND TO-220 PACKAGES. 1170/1/2 BD
U
OPERATIO
The LT1170/LT1171/LT1172 are current mode switchers. protection under output overload or short conditions. A
This means that switch duty cycle is directly controlled by low dropout internal regulator provides a 2.3V supply for
switch current rather than by output voltage. Referring to all internal circuitry on the LT1170/LT1171/LT1172. This
the block diagram, the switch is turned “on” at the start of low dropout design allows input voltage to vary from 3V to
each oscillator cycle. It is turned “off” when switch current 60V with virtually no change in device performance. A
reaches a predetermined level. Control of output voltage is 100kHz oscillator is the basic clock for all internal timing.
obtained by using the output of a voltage sensing error It turns “on” the output switch via the logic and driver
amplifier to set current trip level. This technique has circuitry. Special adaptive anti-sat circuitry detects onset
several advantages. First, it has immediate response to of saturation in the power switch and adjusts driver
input voltage variations, unlike ordinary switchers which current instantaneously to limit switch saturation. This
have notoriously poor line transient response. Second, it minimizes driver dissipation and provides very rapid turn-
reduces the 90° phase shift at midfrequencies in the off of the switch.
energy storage inductor. This greatly simplifies closed- A 1.2V bandgap reference biases the positive input of the
loop frequency compensation under widely varying input error amplifier. The negative input is brought out for
voltage or output load conditions. Finally, it allows simple output voltage sensing. This feedback pin has a second
pulse-by-pulse current limiting to provide maximum switch
7
LT1170/LT1171/LT1172
U
OPERATIO
function; when pulled low with an external resistor, it when switch currents exceed 300mA. Also, note that chip
programs the LT1170/LT1171/LT1172 to disconnect the dissipation will actually increase with E2 open during
main error amplifier output and connects the output of the normal load operation, even though dissipation in current
flyback amplifier to the comparator input. The LT1170/ limit mode will decrease. See “Thermal Considerations”
LT1171/LT1172 will then regulate the value of the flyback next.
pulse with respect to the supply voltage.* This flyback
pulse is directly proportional to output voltage in the Thermal Considerations When Using the MiniDIP and
traditional transformer coupled flyback topology regula- SW Packages
tor. By regulating the amplitude of the flyback pulse, the The low supply current and high switch efficiency of the
output voltage can be regulated with no direct connection LT1172 allow it to be used without a heat sink in most
between input and output. The output is fully floating up to applications when the TO-220 or TO-3 package is se-
the breakdown voltage of the transformer windings. Mul- lected. These packages are rated at 50°C/W and 35°C/W
tiple floating outputs are easily obtained with additional respectively. The miniDIPs, however, are rated at 100°C/W
windings. A special delay network inside the LT1170/ in ceramic (J) and 130°C/W in plastic (N).
LT1171/LT1172 ignores the leakage inductance spike at
Care should be taken for miniDIP applications to ensure
the leading edge of the flyback pulse to improve output
that the worst case input voltage and load current condi-
regulation.
tions do not cause excessive die temperatures. The follow-
The error signal developed at the comparator input is ing formulas can be used as a rough guide to calculate
brought out externally. This pin (VC) has four different LT1172 power dissipation. For more details, the reader is
functions. It is used for frequency compensation, current referred to Application Note 19 (AN19), “Efficiency Calcu-
limit adjustment, soft starting, and total regulator shut- lations” section.
down. During normal regulator operation this pin sits at a
voltage between 0.9V (low output current) and 2.0V (high Average supply current (including driver current) is:
output current). The error amplifiers are current output IIN ≈ 6mA + ISW (0.004 + DC/40)
(gm) types, so this voltage can be externally clamped for
ISW = switch current
adjusting current limit. Likewise, a capacitor coupled DC = switch duty cycle
external clamp will provide soft start. Switch duty cycle
goes to zero if the VC pin is pulled to ground through a Switch power dissipation is given by:
diode, placing the LT1170/LT1171/LT1172 in an idle mode. PSW = (ISW)2 • (RSW)(DC)
Pulling the VC pin below 0.15V causes total regulator
shutdown, with only 50µA supply current for shutdown RSW = LT1172 switch “on” resistance (1Ω maximum)
circuitry biasing. See AN19 for full application details. Total power dissipation is the sum of supply current times
input voltage plus switch power:
Extra Pins on the MiniDIP and Surface Mount Packages
PD(TOT) = (IIN)(VIN) + PSW
The 8- and 16-pin versions of the LT1172 have the
emitters of the power transistor brought out separately In a typical example, using a boost converter to generate
from the ground pin. This eliminates errors due to ground 12V at 0.12A from a 5V input, duty cycle is approximately
pin voltage drops and allows the user to reduce switch 60%, and switch current is about 0.65A, yielding:
current limit 2:1 by leaving the second emitter (E2) discon- IIN = 6mA + 0.65(0.004 + DC/40) = 18mA
nected. The first emitter (E1) should always be connected
to the ground pin. Note that switch “on” resistance doubles PSW = (0.65)2 • (1Ω)(0.6) = 0.25W
when E2 is left open, so efficiency will suffer somewhat PD(TOT) = (5V)(0.018A) + 0.25 = 0.34W
8
LT1170/LT1171/LT1172
U
OPERATIO
Temperature rise in a plastic miniDIP would be 130°C/W LT1170/LT1171/LT1172 Synchronizing
times 0.34W, or approximately 44°C. The maximum am- The LT1170/LT1171/LT1172 can be externally synchro-
bient temperature would be limited to 100°C (commercial nized in the frequency range of 120kHz to 160kHz. This is
temperature limit) minus 44°C, or 56°C. accomplished as shown in the accompanying figures.
In most applications, full load current is used to calculate Synchronizing occurs when the VC pin is pulled to ground
die temperature. However, if overload conditions must with an external transistor. To avoid disturbing the DC
also be accounted for, four approaches are possible. First, characteristics of the internal error amplifier, the width of
if loss of regulated output is acceptable under overload the synchronizing pulse should be under 0.3µs. C2 sets
conditions, the internal thermal limit of the LT1172 will the pulse width at ≅ 0.2µs. The effect of a synchronizing
protect the die in most applications by shutting off switch pulse on the LT1170/LT1171/LT1172 amplifier offset can
current. Thermal limit is not a tested parameter, however, be calculated from:
and should be considered only for noncritical applications KT VC
with temporary overloads. A second approach is to use the
larger TO-220 (T) or TO-3 (K) package which, even without
q
tS fS( )( )
I C +
R3
∆VOS =
a heat sink, may limit die temperatures to safe levels under IC
overload conditions. In critical situations, heat sinking of KT = 26mV at 25°C
these packages is required; especially if overload condi- q
tions must be tolerated for extended periods of time. tS = pulse width
fS = pulse frequency
The third approach for lower current applications is to IC = VC source current (≈ 200µA)
leave the second switch emitter (miniDIP only) open. This VC = operating VC voltage (1V to 2V)
increases switch “on” resistance by 2:1, but reduces R3 = resistor used to set mid-frequency “zero” in
switch current limit by 2:1 also, resulting in a net 2:1 frequency compensation network.
reduction in I2R switch dissipation under current limit
conditions. With tS = 0.2µs, fS = 150kHz, VC = 1.5V, and R3 = 2k, offset
voltage shift is ≈ 3.8mV. This is not particularly bother-
The fourth approach is to clamp the VC pin to a voltage less some, but note that high offsets could result if R3 were
than its internal clamp level of 2V. The LT1172 switch reduced to a much lower value. Also, the synchronizing
current limit is zero at approximately 1V on the VC pin and transistor must sink higher currents with low values of R3,
2A at 2V on the VC pin. Peak switch current can be so larger drives may have to be used. The transistor must
externally clamped between these two levels with a diode. be capable of pulling the VC pin to within 200mV of ground
See AN19 for details. to ensure synchronizing.
Synchronizing with Bipolar Transistor
Synchronizing with MOS Transistor
VIN VIN
LT1170 LT1170
GND VC GND VC
C2 C2
39pF R1 D1
1N4158 100pF
R3 3k
2N2369 R3
VN2222*
C1 R2 C1 D2
FROM 5V R2 FROM 5V
2.2k LOGIC 2.2k 1N4158 LOGIC
9
LT1170/LT1171/LT1172
U
TYPICAL APPLICATIO S
Flyback Converter
C4
100µF V + Vf
a PRIMARY FLYBACK VOLTAGE = OUT
VIN N
N* = 1/3 D1 b LT1170 SWITCH VOLTAGE
VIN VOUT AREA “a” = AREA “b” TO MAINTAIN
0V
20V TO 30V 5V VOUT + Vf ZERO DC VOLTS ACROSS PRIMARY
D3 1 N* 6A
25V c SECONDARY VOLTAGE
1W + C1
N • VIN
0V AREA “c” = AREA “d” TO MAINTAIN
2000µF d ZERO DC VOLTS ACROSS SECONDARY
D2
R1 ∆I
VIN MUR110 IPRI
3.74k
VSW
C4*
+ PRIMARY CURRENT
0
100µF LT1170
IPRI/N
FB SECONDARY CURRENT
GND VC 0
IPRI
R3 R2
1.5k 1.24k LT1170 SWITCH CURRENT
C2 0
0.15µF IPRI
5V* L1**
50µH
VBAT*
VIN 3V TO 20V
E2 VSW
+ C1
D1 1µF
LT1172 1N914 TANTALUM
R2 R1
100k 200k
VOUT
E1 FB
–10V TO –26V
GND VC D2
R3 C3 C2***
15k 0.0047µF D3 2µF
OPTIONAL + TANTALUM
VN2222 C4
SHUTDOWN 0.047µF
D2, D3 = ER82.004 600mA SCHOTTKY. OTHER FAST SWITCHING TYPES MAY BE USED.
* VIN AND BATTERY MAY BE TIED TOGETHER. MAXIMUM VALUE FOR VBAT IS EQUAL TO THE NEGATIVE OUTPUT + 1V. WITH HIGHER
BATTERY VOLTAGES, HIGHEST EFFICIENCY IS OBTAINED BY RUNNING THE LT1172 VIN PIN FROM 5V. SHUTTING OFF THE 5V SUPPLY
WILL AUTOMATICALLY TURN OFF THE LT1172. EFFICIENCY IS ABOUT 80% AT IOUT = 25mA.
R1, R2, R3 ARE MADE LARGE TO MINIMIZE BATTERY DRAIN IN SHUTDOWN, WHICH IS APPROXIMATELY VBAT /(R1 + R2 + R3).
** FOR HIGH EFFICIENCY, L1 SHOULD BE MADE ON A FERRITE OR MOLYPERMALLOY CORE. PEAK INDUCTOR CURRENTS ARE ABOUT
600mA AT POUT = 0.7Ω. INDUCTOR SERIES RESISTANCE SHOULD BE LESS THAN 0.4Ω FOR HIGH EFFICIENCY.
*** OUTPUT RIPPLE IS ABOUT 200mVP-P TO 400mVP-P WITH C2 = 2µF TANTALUM. IF LOWER RIPPLE IS DESIRED, INCREASE C2, OR ADD
A 10Ω , 1µF TANTALUM OUTPUT FILTER. 1170/1/2 TA04
10
LT1170/LT1171/LT1172
U
TYPICAL APPLICATIO S (Note that maximum output currents are divided by 2 for LT1171, by 4 for LT1172.)
D
G
Q1
VX
D1
VIN LT1170
VSW
R2
+ ≈ 2V
10V TO LT1170 GND VC
20V D1
R1
500Ω
GND
1170/1/2 TA05
1170/1/2 TA06
L1** L2
50µH VIN
VSW
OPTIONAL C3
OUTPUT
FILTER LT1170
+
VIN D1 VOUT VIN
12V FB
VSW – GND VC
+ C2 R1 2A
C4*
+ 11.3k
1000µF
LT1170 R1
100µF
Q1 1k R2
OPTIONAL Q1
FB
INPUT FILTER GND VC C1 C2
1000pF
L3
R3 R2
2.2k 1.24k RS
C1 NOTE THAT THE LT1170 1170/1/2 TA08
+ C2
D1 1000µF
R1 LOAD
L1**
* REQUIRED IF INPUT LEADS ≥ 2" VIN 50µH 4.64k
** PULSE ENGINEERING 92114 –5.2V
VSW 4.5A
COILTRONICS 50-2-52 R4
C3*
+ 12k
LT1170 Q1
100µF 2N3906
OPTIONAL FB
INPUT FILTER VC OPTIONAL
GND + C4
L3 OUTPUT
C1 FILTER 200µF
R2 L2
R3 1.24k 4µH
VIN
–20V 1170/1/2 TA09
11
LT1170/LT1171/LT1172
U
TYPICAL APPLICATIO S
Positive-to-Negative Buck-Boost Converter
D3† R5†
1N4001 470Ω, 1W VIN
10V TO * REQUIRED IF INPUT LEADS ≥ 2"
+ C5
30V ** PULSE ENGINEERING 92114, COILTRONICS 50-2-52
VIN † TO AVOID STARTUP PROBLEMS FOR INPUT VOLTAGES
100µF*
VSW BELOW 10V, CONNECT ANODE OF D3 TO VIN, AND
REMOVE R5. C1 MAY BE REDUCED FOR LOWER OUTPUT
+ CURRENTS. C1 ≈ (500µF)(IOUT).
C4
LT1170 FOR 5V OUTPUTS, REDUCE R3 TO 1.5k, INCREASE C2 TO
1µF D2
R1 R4 0.3µF, AND REDUCE R6 TO 100Ω.
10.7k 1N914 47Ω
FB
GND VC
R3 R2
+ C3
+ C1† R6
5k 1.24k 2µF 1000µF 470Ω
C2
0.1µF D1 VOUT
–12V
2A
L1**
50µH
1170/1/2 TA10
R3 1.244V • R4
ICHRG = = 1A AS SHOWN
INPUT VOLTAGE 25k R3 • R5
> VBAT + 2V < 35V VSW
* L2 REDUCES RIPPLE CURRENT INTO
D1 THE BATTERY BY ABOUT 20 :1.
LT1171 V +
IT MAY BE OMITTED IF DESIRED.
1N5819 R2 –
1k
VIN FB LT1006
GND VC R4
C1 +
C2
+ + 1k
2.2µF C4 V–
200µF + 0.01µF
35V L1 L2*
35V C3
TANTALUM 100µH, 1A 10µH, 1A
0.47µF
RUN = 0V R5 1A
SHUTDOWN = 5V
2N3904 0.05Ω + C4 +
R6 200µF BATTERY
78k R7 R8 D2 25V
MBR340 2V TO 25V
22k 1k
1170/1/2 TA11
1k
L1** 33pF
1N5818 300µH 3kV LAMP
A
Q1*
V IN
E2 VSW D1 D2
0.02µF
10µF
+ 1N914 1N914 50k
INTENSITY
TANT LT1172 Q2* ADJUST
B R3 R1
10k 560Ω
E1 GND VC FB
C6 * Q1,Q2 = BCP56 OR MPS650/561
+
12
LT1170/LT1171/LT1172
U
TYPICAL APPLICATIO S
Positive Buck Converter
VIN
* REQUIRED IF INPUT LEADS ≥ 2"
D3 ** PULSE ENGINEERING 92114
COILTRONICS 50-2-52
L2
VIN 4µH
C3
+ VSW
2.2µF OPTIONAL C5
OUTPUT 200µF
LT1170 FILTER
D2
+ C5*
R1
1N914
3.74k
100µF FB
GND VC
+ C2
R3 R2
R4
470Ω 1.24k 1µF
10Ω
C1 L1**
1µF 50µH
r
5V, 4.5A
C4
+ 100mA
D1
1000µF MINIMUM
1170/1/2 TA13
D2
VIN
VSW
R1
27k + + RO
LT1170 C3 C1
(MINIMUM
10µF 1000µF
+ LOAD)
C4* FB
470µF VC
GND
R3 R2
3.3k 1.24k
L1 C2
50µH D1
VIN 0.22µF VOUT
–15V –28V, 1A
1170/1/2 TA14
* REQUIRED IF INPUT LEADS ≥ 2"
D2
R2**
R1*
Q1
VIN D1
VSW
LT1170
* SETS IB (ON)
** SETS IB (OFF)
GND
1170/1/2 TA15
13
LT1170/LT1171/LT1172
U
TYPICAL APPLICATIO S
Forward Converter
L1
D1 25µH
T1 VOUT
5V, 6A
C2 1 M N
R4 +
C1
D2
2000µF
R1
VIN D3 3.74k
VSW
VIN D4
20V TO 30V LT1170
FB
GND VC R6
330Ω
Q1 R2
1.24k
R3 R5
C4
1Ω
C3
1170/1/2 TA16
VIN
10µH
VSW VIN 3A
+ C1 LT1170
330µF
FB
+ OPTIONAL
35V 100µF OUTPUT
VC GND D2 16V
1N4148 FILTER
C6
0.02µF
R1 C5 C3 +
680Ω 0.03µF 4.7µF
TANT L1
C4 R2*
50µH 0.013Ω
0.1µF VOUT
× 5V
D1 + C2
3A**
MBR330p VC DIODE V+ 390µF
16V
VIN VLIM
LT1432
MODE VOUT
MODE LOGIC
220pF GND * R2 IS MADE FROM PC BOARD
COPPER TRACES.
<0.3V = NORMAL MODE ** MAXIMUM CURRENT IS DETERMINED
>2.5V = SHUTDOWN BY THE CHOICE OF LT1070 FAMILY.
SEE APPLICATION SECTION.
OPEN = BURST MODE
1170/1/2 TA17
14
LT1170/LT1171/LT1172
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
J8 Package
8-Lead CERDIP (Narrow 0.300, Hermetic)
(LTC DWG # 05-08-1110)
0.015 – 0.060
(0.381 – 1.524)
0.008 – 0.018
0° – 15°
(0.203 – 0.457)
0.045 – 0.065
0.125
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143 – 1.651)
OR TIN PLATE LEADS 3.175
0.014 – 0.026 MIN
0.100
(0.360 – 0.660) (2.54)
BSC J8 1298
15
LT1170/LT1171/LT1172
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
K Package
4-Lead TO-3 Metal Can
(LTC DWG # 05-08-1311)
1.177 – 1.197
(29.90 – 30.40)
0.760 – 0.775 0.655 – 0.675
0.320 – 0.350
(19.30 – 19.69) (16.64 – 19.05)
(8.13 – 8.89) 0.470 TP
0.060 – 0.135 P.C.D.
(1.524 – 3.429) 0.151 – 0.161
(3.84 – 4.09)
DIA 2 PLC
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8 7 6 5
0.255 ± 0.015*
(6.477 ± 0.381)
1 2 3 4
0.065
(1.651)
0.009 – 0.015 TYP
(0.229 – 0.381) 0.125
(3.175) 0.020
+0.035 MIN (0.508)
0.325 –0.015
( )
0.100 0.018 ± 0.003 MIN
+0.889
8.255 (2.54) (0.457 ± 0.076)
–0.381 BSC N8 1098
16
LT1170/LT1171/LT1172
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
Q Package
5-Lead Plastic DD Pak
(LTC DWG # 05-08-1461)
0.060
(1.524) 0.390 – 0.415
0.256 0.060 TYP (9.906 – 10.541) 0.165 – 0.180
(6.502) (1.524) (4.191 – 4.572) 0.045 – 0.055
15° TYP (1.143 – 1.397)
+0.008
0.004 –0.004
0.060 0.183 0.059
( )
0.330 – 0.370
(1.524) (4.648) (1.499) +0.203
(8.382 – 9.398) 0.102 –0.102
TYP
0.095 – 0.115
(2.413 – 2.921)
0.075
(1.905)
0.300 0.067 0.050 ± 0.012
+0.012 0.013 – 0.023
(7.620) 0.143 –0.020 (1.70) (1.270 ± 0.305)
(0.330 – 0.584)
( )
0.028 – 0.038 BSC
BOTTOM VIEW OF DD PAK +0.305
3.632 –0.508 (0.711 – 0.965) Q(DD5) 1098
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8 7 6 5
1 2 3 4
0.010 – 0.020
× 45° 0.053 – 0.069
(0.254 – 0.508)
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
0°– 8° TYP (0.101 – 0.254)
(0.203 – 0.254)
0.016 – 0.050
0.014 – 0.019 0.050
(0.406 – 1.270)
(0.355 – 0.483) (1.270)
TYP BSC
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE SO8 1298
17
LT1170/LT1171/LT1172
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
SW Package
16-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
0.398 – 0.413*
(10.109 – 10.490)
16 15 14 13 12 11 10 9
1 2 3 4 5 6 7 8
0.291 – 0.299**
(7.391 – 7.595)
0° – 8° TYP
0.050
0.009 – 0.013 (1.270) 0.004 – 0.012
(0.229 – 0.330) NOTE 1 BSC (0.102 – 0.305)
0.014 – 0.019
0.016 – 0.050
(0.356 – 0.482)
(0.406 – 1.270)
TYP
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. S16 (WIDE) 1098
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
18
LT1170/LT1171/LT1172
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
T Package
5-Lead Plastic TO-220 (Standard)
(LTC DWG # 05-08-1421)
0.230 – 0.270
(5.842 – 6.858)
0.570 – 0.620
0.620
0.460 – 0.500 (14.478 – 15.748)
(15.75)
(11.684 – 12.700) TYP
0.330 – 0.370
0.700 – 0.728
(8.382 – 9.398)
(17.78 – 18.491)
0.095 – 0.115
SEATING PLANE
(2.413 – 2.921)
0.152 – 0.202
0.260 – 0.320 (3.861 – 5.131) 0.155 – 0.195*
(6.60 – 8.13) (3.937 – 4.953)
0.013 – 0.023
(0.330 – 0.584)
0.067
BSC 0.028 – 0.038 0.135 – 0.165
(1.70)
(0.711 – 0.965) (3.429 – 4.191) * MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
19
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1170/LT1171/LT1172
U
TYPICAL APPLICATIO
Positive Current Boosted Buck Converter
VIN
28V
470Ω C3 R6
2W 0.47µF 470Ω
C6
D2 0.002µF
VIN 1: N
VSW
LT1170 N ≈ 0.25
R7 R2
1k 1.24k D1
FB
VC VIN
GND
7 2
–
+ R3 C4 6
C5* 680Ω 0.01µF LM308 R5
100µF 3 5k
C1 4 +
0.33µF
8
200pF R4
1.24k
VOUT
5V, 10A
R1 + C2
5k
5000µF
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