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5508 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

12, DECEMBER 2013

An Advanced Power Electronics Interface for Electric


Vehicles Applications
Omar Hegazy, Member, IEEE, Ricardo Barrero, Joeri Van Mierlo, Member, IEEE, Philippe Lataire,
Noshin Omar, and Thierry Coosemans

Abstract—Power electronics interfaces play an increasingly im-


portant role in the future clean vehicle technologies. This paper
proposes a novel integrated power electronics interface (IPEI) for
battery electric vehicles (BEVs) in order to optimize the perfor-
mance of the powertrain. The proposed IPEI is responsible for the
power-flow management for each operating mode. In this paper, an
IPEI is proposed and designed to realize the integration of the dc/dc
converter, on-board battery charger, and dc/ac inverter together in
the BEV powertrain with high performance. The proposed con-
cept can improve the system efficiency and reliability, can reduce
the current and voltage ripples, and can reduce the size of the
passive and active components in the BEV drivetrains compared Fig. 1. Schematic diagram of the battery electric vehicles.
to other topologies. In addition, low electromagnetic interference
and low stress in the power switching devices are expected. The
proposed topology and its control strategy are designed and ana-
lyzed by using MATLAB/Simulink. The simulation results related cles. However, the BEVs still have some challenges, which need
to this research are presented and discussed. Finally, the proposed to be solved. These challenges are limited driving range, long
topology is experimentally validated with results obtained from the
prototypes that have been built and integrated in our laboratory charging time, battery lifetime, power electronics performance,
based on TMS320F2808 DSP. and high initial cost. Fig. 1 illustrates the schematic diagram of
the BEV powertrain.
Index Terms—Battery electric vehicles (BEVs), interleaved dc/dc
converter, on-board battery charger, powertrain control strategies, In the literature, limited research work on integrated power
powertrain modeling, small-signal model. electronics interface (IPEI) has been reported to interface a
low-voltage (LV) energy source (such as fuel cells, battery
systems, and supercapacitors) to electric motor (EM) in elec-
tric vehicle (EV) and plug-in hybrid electric vehicle (PHEV)
I. INTRODUCTION
powertrains [5]–[9]. In [8] and [9], the authors proposed the
UE to rising concerns about environmental issues, such
D as climate change and urban pollution, as well as energy
issues, automobile manufacturers are being forced to shift their
Z-source inverter (ZSI) for EV applications. ZSI is considered
as an emerging topology for dc/ac converters, due to its boost-
ing capability, and it saves component cost by utilizing a single
attention toward clean vehicle technologies. Recently, battery conversion stage. However, the major drawbacks of the ZSI
electric vehicles (BEVs) can be an alternative to the internal are that it has a complex control and high current and voltage
combustion engine vehicles due to advances in battery technolo- stresses [10]. Furthermore, it has a limited boost ratio and less
gies, power electronics interfaces (PEIs), and control strategies. reliability compared to the other topologies. Owing to these dis-
In general, the BEVs are powered by electric batteries, which advantages, the ZSI is still under investigation and developing.
need to be recharged with electricity from the grid. Further- On the other hand, there are a number of research efforts on
more, the BEVs can provide an ideal solution to reduce the developing the PEIs that can be used in vehicular applications.
environmental impact of transports and reduce energy depen- These studies are focused on improving the efficiency, reliabil-
dence because they have low energy consumption and zero local ity, cost, and size of the PEIs [5], [11], [12]. As can be seen
emissions [1]–[4]. In other words, BEVs are zero-emission vehi- from Fig. 1, the conventional structure of the PEI that is utilized
in the BEV powertrains has three different kinds of converters.
These converters are given as follows:
1) bidirectional dc/dc converter, which interfaces an LV en-
Manuscript received November 1, 2012; revised December 24, 2012 and
February 17, 2013; accepted March 22, 2013. Date of current version June 6, ergy storage systems (such as batteries or supercapacitors)
2013. Recommended for publication by Associate Editor S. Wirasingha. to the dc-Link;
The authors are with the Department of Electrical Engineering and En- 2) bidirectional ac/dc converter, which is used to connect the
ergy Technology, Vrije Universiteit Brussel, 1050 Brussels, Belgium (e-mail:
Omar.Hegazy@vub.ac.be; ricardo.Barrero@vub.ac.be; jvmierlo@vub.ac.be; battery to the grid during charging or discharging operat-
Philippe.lataire@vub.ac.be; noshomar@vub.ac.be; Thierry.Coosemans@vub. ing modes;
ac.be). 3) bidirectional dc/ac inverter, which is used to transfer the
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. energy from the dc-link to the traction motor [such as
Digital Object Identifier 10.1109/TPEL.2013.2256469 three-phase induction motor (IM)].
0885-8993/$31.00 © 2013 IEEE
HEGAZY et al.: AN ADVANCED POWER ELECTRONICS INTERFACE FOR ELECTRIC VEHICLES APPLICATIONS 5509

Fig. 3. Detailed circuit diagram of the proposed IPEI.

Fig. 2. Block diagram of the proposed BEV powertrain.

In practice, the integration of the dc/dc converter and dc/ac


inverter is an attractive option to form the hybrid electric vehi-
cle (HEV) powertrain. Therefore, the proper selection of these
converters and their integration together play an essential role
for the successful development of efficient and high perfor-
Fig. 4. Switching pattern of the BMDIC in boost mode.
mance BEVs and PHEVs. As reported in academic and in-
dustry studies [6], [13]–[16], battery chargers are another key
component required for the emergence and acceptance of BEVs
II. THE PROPOSED BEV POWERTRAIN
and PHEVs. Especially, an on-board battery charger has to be
small and light. Therefore, several bidirectional ac/dc converter Fig. 2 presents the block diagram of the proposed BEV pow-
topologies can be utilized as on-board battery charger. With an ertrain, while the detailed circuit of the proposed IPEI is shown
on-board charger, the BEVs and PHEVs can be recharged from in Fig. 3. In this powertrain, the battery pack is connected to the
any outlet that is available at home garages or at work. The dc-link through the BMDIC. As shown in Fig. 3, the BMDIC
availability of such charging places can increase the feasibility comprises two inductors, eight switches (IGBTs), and eight
of the BEV and PHEV topologies [5], [14]. antiparallel diodes for boost and buck operating modes. The
The major concerns of the IPEIs are efficiency, reliability, size BMDIC has the ability to reduce the size of the passive com-
of the passive components, compact system, high power factor, ponents (such as inductors and capacitor), and to reduce input/
low total harmonic distortion (THD), and input/output ripples output EMI filters by means of increasing the frequency of
[4], [12], [17], [18]. Furthermore, the IPEI performance directly inductor current ripple and the output voltage ripple without in-
influences the characteristics of the battery system. Indeed, the creasing the switching frequency. To achieve the control strategy
current ripple is one of the various phenomena, which may have of the BMDIC, a phase-shift interleaved control between phases
an influence on the battery lifespan and performances. and parallel devices is used to generate the switching patterns.
In this paper, the main objective is to present the design and These switching patterns are shifted by 360◦ /(n × m) (or Ts/
control of an advanced power electronics interface (APEI) and (2 × 2)) as shown in Fig. 4, where n is the number of phases
to verify its feasibility for BEV applications. The proposed IPEI or channels per port, while m is the number of the switches per
incorporates the features of the bidirectional multidevice in- phase. As can be seen from Fig. 4, the sequence of the driving
terleaved dc/dc converter (BMDIC) and eight-switch inverter signals is very crucial to achieve a doubled ripple frequency in
(ESI). The proposed IPEI can realize all operating modes for inductor current at the same switching frequency, and to pro-
BEVs, such as traction mode, regenerative mode, and charg- vide the interleaved control between inductors as well as power
ing/discharging modes from the ac grid. To validate the per- switching devices. This sequence can contribute to a higher sys-
formance of the proposed topology, three control strategies are tem bandwidth compared to bidirectional-interleaved converter
designed and investigated. These control strategies are indirect (BIC) with four switches (IGBTs) and four diodes. Furthermore,
field-oriented controller (IFOC) based pulse-width-modulated this control strategy can achieve a fast dynamic response for the
(PWM) voltage and particle swarm optimization (PSO), dual- proposed converter. In the proposed powertrain, the ESI is the
loop control for the BMDIC control, and PWM current control only means to transfer the energy from/to the traction motor dur-
based PI compensators for charging/discharging modes. The dy- ing traction and braking modes or to transfer the energy from/to
namic modeling of the powertrain is presented in detail. More- the ac grid during charging and discharging modes. Thereby,
over, the simulation and experimental results are presented to the proposed IPEI combines the merits of the BMDIC and ESI,
verify the proposed IPEI. which can improve the powertrain efficiency and reliability as
5510 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 12, DECEMBER 2013

TABLE I
SUMMARY OF THE OPERATING MODES OF THE PROPOSED IPEI

Fig. 5. Thevenin battery model.


well as minimizing the size of the passive components (such as
inductors, capacitors, and filters).
As can be seen from Fig. 3, in the structure of the BMDIC,
the power switching devices are operated by using an inter-
leaved technique, which leads to share the current between these
power-switching devices. As a result, the current ratings of these
switches can be reduced. It means that the proposed topology
can decrease the current stress on the switches and EMI espe-
cially at transients. In addition, this structure can also provide
a high reliability compared to other topologies, thanks to mul-
tichannel and multidevice topology. As can be observed from
Table VI in the Appendix, the BMDIC can reduce the size of
the passive components and the input/output ripples compared
to BIC at the same experimental operating conditions (such as
output power, switching frequency, and temperature).
The proposed IPEI can be mainly operated in four operating
modes. These operating are given as follows:
1) In Mode 1, the ESI will operate as a dc/ac inverter to trans- Fig. 6. Li-Ion battery (10 Ah) parameters from experimental test.
fer the power from dc-link to the IM, while the BMDIC
operates in boost mode to set-up the LV battery to the
high-voltage dc-Link. tery package used in the simulation program is defined as a
2) In Mode 2, the ESI operates as a three-phase PWM ac/dc Thevenin battery model. The Thevenin battery model, the most
rectifier to transfer the power from motor to dc-link, commonly used battery model, consists of an internal resistance
whereas the BMDIC works in buck mode to transfer the Rint , polarization capacitance Cp , and over voltage resistance
energy from the high-voltage dc-Link to the battery pack. (Rp , polarization resistance), and open circuit voltage Vo c [21].
3) In Mode 3, the ESI works as a single-phase PWM ac/dc All elements that are used in this model are functions of the
converter to charge the battery from the ac grid, while the battery state of charge (SoC). Fig. 5 illustrates the Thevenin
BMDIC operates in buck mode to transfer the energy from battery model. The battery system comprises a package with
the dc-link to the battery pack. Nbatts cells that are connected in series and Nbattp that are
4) In Mode 4, the ESI operates as a single-phase dc/ac inverter connected in parallel. The parameters of the battery, Li-Ion, are
to deliver the power from the dc-link to the ac grid during determined by using look-up tables based on experimental data.
peak load, whereas the BMDIC works in boost mode. The terminal voltage of the battery pack, VBatt , can be de-
These operating modes are summarized in Table I. noted as follows:
In order to investigate the proposed BEV powertrain, the
VBatt = NBatts [ Vo c − IBatt Rint − Vcp ] (1)
dynamic modeling of the powertrain (such as battery and EM), 
small-signal model of the BMDIC, and the powertrain control 1 IBatt
SoC = SoC0 + dt (2)
strategies will be described in detail in the following sections. 3600 Cb
where
III. DYNAMIC MODELING OF POWERTRAIN
ILoad
A. Dynamic Modeling of the Battery System IBatt = (3)
NBattp
The battery stores energy in the electrochemical form and dVcp −Vcp IBatt
is the most widely used device for energy storage system in = + . (4)
dt Cp Rp Cp
the variety of applications such as EVs, HEVs, and PHEVs.
Lithium-Ion batteries are increasingly accepted to be an opti- The MATLAB/Simulink-based battery system is designed
mal choice for energy storage in automotive applications [20]. and modeled in this paper by using the aforementioned equa-
In this paper, the mathematical modeling of the Li-Ion bat- tions. The parameters of the battery are determined by using
HEGAZY et al.: AN ADVANCED POWER ELECTRONICS INTERFACE FOR ELECTRIC VEHICLES APPLICATIONS 5511

TABLE II
LI-ION BATTERY SPECIFICATIONS

look-up tables based on experimental data reported in Fig. 6.


Table II illustrates the specifications of the Li-Ion battery.

B. Dynamic Modeling of EM
IMs have widely been regarded as one of the most suitable
options in automotive industry for electric propulsion systems,
due to their reliability, ruggedness, and low cost. In the past,
poor dynamic response of IMs was a key constraint that limited
their capability in applications that require speed tracking and
fast positioning. However, the development of field-oriented
control (FOC) made it possible to decouple the stator current into
Fig. 7. The dq equivalent circuit of the induction motor in synchronous refer-
flux and torque producing components, enabling an independent ence frame.
command on the motor torque for a simpler, more accurate speed
control, making the control much similar to that of a separately
e diedr die
excited DC motor [22]. It is important to point out that the vdr = 0 = Rr iedr + Llr + Lm dm
major benefit of the IFOC is that there is a complete decoupling dt dt
between the direct and quadrature currents. This implies that a − ωsl (Llr ieq r e
+ Lm iq m ) (8)
change in torque may be undertaken by changing the quadrature
where the magnetizing currents can be given as
current. Likewise, a change in direct current will only affect the
flux linkage magnitude. Thereby, the dq model of the IM in ieq m = ieq s + ieq r − ieq f e (9)
synchronous reference frame is required to realize the concept
iedm = ieds + iedr − iedf e . (10)
of the FOC.
The dynamic equivalent circuit of the IM, which will be de- The electrical torque equation can be expressed as [27]
fined in the following, is based on the common simplification 3 P Lm  e e 
that the magnetomotive force distribution along the air gap of Te = i i − ieds ieq r (11)
2 2 Lr q s dr
the machine is sinusoidal. In this section, the dq model of three-
phase IM in a synchronous reference frame is used for a dy- where:
namic analysis. As shown in Fig. 7, dq model of the motor in 1) P is the pole number of the machine;
synchronous reference frame considers the core losses, which 2) Vds and Vq s denote the dq axes of the stator voltages;
is represented as core resistance (called “Rf e ”) [23]–[25]. It is 3) idr and iq r are the rotor currents;
necessary to transform all machine variables to the synchronous 4) idm and iq m are the dq axes magnetizing currents, which
reference frame. Then, the stator and rotor voltage in the syn- flow through the magnetizing inductance;
chronous reference frame is written in the expanded form as 5) Rs and Rr are the stator and rotor resistances, respectively;
follows [26]: 6) Lls and Llr are the self-inductance of the stator and rotor,
respectively.
dieq s dieq m The superscript e on V and i indicates the values in the
vqes = Rs ieq s + Lls + Lm synchronous reference frame. The subscript s and r are referred
dt dt
to the stator and rotor, respectively.
+ ωe (Lls ied s e
+ Lm id m ) (5)

e dieds die IV. SMALL-SIGNAL MODEL OF BMDIC (SSM)


vds = Rs ieds + Lls + Lm dm
dt dt SSM is a well-known method used to analyze the performance
− ωe (Lls ieq s + Lm ieq m ) (6) of nonlinear systems such as PWM dc/dc converters. To obtain
a certain performance objective, the SSM is crucial to the design
dieq r dieq m
vqer = 0 = Rr ieq r + Llr + Lm of the closed-loop control for PWM dc/dc converters [19], [28].
dt dt In continuous current mode (CCM), a generalized small-signal
+ ωsl (Llr iedr e
+ Lm idm ) (7) model is derived in order to design the appropriate controller
5512 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 12, DECEMBER 2013

using bode-diagram. In this paper, the transfer function between


the duty cycle and the inductor current for the proposed concepts
is presented. Similarly, the transfer function between the duty
cycle and the output voltage is also presented. In this paper,
the small-signal transfer functions from duty cycle to inductor
current and from duty cycle to output voltage in CCM are derived Fig. 8. Speed control system.
as follows:
V. POWERTRAIN CONTROL STRATEGIES
ν̂o (s) (1 + s
ωz v 1 )(1 − s
ωz v 2 )
Gv d (s) = = Gdv (12) In this section, to validate the performance of the proposed
ˆ
d(s) Δ(s) powertrain, three control strategies have been designed and in-
îL (s)
s
(1 + ω z i ) vestigated using MATLAB/Simulink software. These control
Gid (s) = = Gdi . (13) strategies are IFOC based PWM voltage and PSO for motor
ˆ
d(s) Δ(s)
control, dual-loop digital controller for the BMDIC control,
and PWM current controller based PI compensators for charg-
To simplify the analysis in this study, it is assumed that the ing/discharging modes.
parameters of each channel are ideally the same values. It means
that L1 = L2 = L, RL 1 = RL 2 = RL , and IL 1 = IL 2 = IL . A. IFOC Based on PWM Voltage and PSO
Therefore
Recently, the development of FOC has opened the possibil-
  ity of using IMs for high precision control. The IFOC provides
Vo −2RL + 2 (1 − 2D)2 Ro a decoupling between the torque and flux currents [12], [22].
Gdv = (14)
(1 − D) δ RL + 2 (1 − 2D)2 Ro Moreover, the IFOC that consists of controlling the stator current
is represented by a vector control. IFOC allows the stator current
1 to be decoupled into torque producing and flux producing com-
ωz v 1 = (15)
C RC ponents that can be independently controlled and maintained
2 (1 − 2D)2 Ro − 2RL of each other. Consequently, the control scheme will be similar
ωz v 2 = (16) to that of a separately excited DC motor. The required d-axis
2L
component of the stator current ids to achieve a given rotor flux
s2 s magnitude demand λ∗r can be determined by
Δ(s) = + +1 (17)
ω02 Qω0
 λer = Lm ∗ ieds . (24)
δRL + n (1 − mD)2 Ro The required q-axis component of the stator current, iq s , for
ωo = (18)
δLC(Ro + RC ) a given torque demand (Te∗ ), can be determined as follows:

δ L + C δ RL (Ro + RC ) + 2 (1 − 2D)2 Ro RC 3 P Lm  e e 
Te = i λ . (25)
ζ=
2 2 Lr q s r
2 δ L C (Ro + RC ) δ RL + 2 (1 − 2D)2 Ro For the d-axis of the synchronously rotating reference frame
aligned with the rotor flux, the slip speed should be maintained
(19) as shown in the following equation:

1 1 − 2D Lm e
Q= , and δ = (20) ωsl = ωe − ωr = i . (26)
2ξ 1−D τr λer q s
Vo (2 + δ) The torque demand (Te∗ ) can be calculated from speed con-
Gdi = (21)
δ RL + 2 (1 − 2D)2 Ro troller (PI controller) as follows:

ωz i = 
1
(22) Te∗ = Kp Δω + Ki Δωdt (27)
δ Ro
C RC + (2+δ )
where the speed control system with proportional (Kp ) and
Vo V2 integral (Ki ) controller is illustrated in Fig. 8 [29]. As explained
IL = , and Ro = o (23)
2(1 − 2D)Ro Po in [29], the proportional (Kp ) and integral (Ki ) constants of the
speed controller can be derived as follows:
where Vo is output voltage, C is the capacitance, L is the in- Kp = 2J · ξ · ωn − B (28)
ductance, and RL is the internal resistance of the inductor. RC
Ki = J · ωn2 (29)
is the internal resistance of the capacitor, n is the number of
phases, m is the number of the parallel switches per phase, Vin where J is the moment of motor inertia, B is the friction coef-
is input voltage, D is the duty ratio, Po is the output power, and ficient, ξ is the damping ratio, and ωn is the natural frequency
Ro is the resistance of the load. (in radians).
HEGAZY et al.: AN ADVANCED POWER ELECTRONICS INTERFACE FOR ELECTRIC VEHICLES APPLICATIONS 5513

In this paper, IFOC is designed based on voltage PWM con-


trol, which has a fixed switching frequency. This method can
be defined as a hybrid IFOC and voltage scheme. In the hybrid
IFOC and voltage PWM scheme, Ids and Iq s components are
compared to the references Id∗ (the flux references) and Iq∗ (the
torque reference). Therefore, the current regulator outputs are
Vds and Vq s , which are applied to the inverse park transforma-
tion. The reference dq voltages with back electromotive force
compensation (Eq and Ed ) are calculated by [30], [31]
∗ kii ∗
Vds = (kpi + )(Ids − Ids ) − ωe σ Ls Iq∗s (30)
s

kii Lm ∗
Vq∗s = kpi + (Iq∗s − Iq s )+ωe σ Ls Ids

+ωr λ (31)
s Lr r
where σ = 1−(L2m /Ls Lr ), Kii and Kpi are the proportional
and integral constants of the current regular, respectively. ωe
is the synchronous speed of the rotating field. The design of
the proportional and integral constants of the current regular is Fig. 9. Proposed control strategy: (a) the IFOC based on PWM Voltage and
derived as follows: PSO control strategy, and (b) inside IFOC block.

kpi = (2 ζi Ta ωn i − 1) R1 (32)
kii = R1 ωn2 i Ta (33)
L 2m
where R1 = Rs + Lr τr ; τr = Lr
Rr and Ta = σ Ls
R1 ; σ = (1 −
L 2m
Lr Ls ). The subscript i is referred to the current controller.
It is noticed that the IFOC operated at rated rotor flux gen-
erally exhibits a poor efficiency for the IM at low load. At low
loads, the iron losses increase dramatically, reducing consid- Fig. 10. Schematic diagram of the control strategy based on PI controllers.
erably the efficiency [12], [22]. The motor efficiency can be
improved by minimizing the losses. The minimization of the structure of the IFOC based on PWM voltage and PSO control
motor loss is directly related to the selection of the flux level strategy. This control strategy is used to control the power flow
at any operating point. In this paper, the PSO can be applied to from/to the EM during traction and braking modes.
evaluate the optimal flux that minimizes the total losses (called
cost function). It has the straightforward goal of minimizing the B. Vehicle-To-Grid Control Strategy
total losses of the motor for any operating point [12], [22]. To
Based on international standards such as IEC 1000-3-2, IEC
realize the minimum losses of the IM, it is necessary to evaluate
1000-3-3, and IEC 61000-3-2, the ac/dc converters with power
the total losses of the IM and the ESI. Hence, the total losses of
factor correction is desirable in order to optimize the perfor-
the motor and the ESI can be written as follows:
mance of the battery charger [32], [33]. In this mode, the ESI
3 in the proposed IPEI operates as a single-phase PWM ac/dc
PLosses(IM &ESI) =
2 converter, while the BMDIC operates in buck mode to charge
⎡    2 ⎤
the battery pack from grid and vice versa. It is characterized
Rs ie2 + ie2 + Rr LLmr ieq s
⎢ 
q s ds
⎥ by high performance when evaluating the input power factor
⎢ ⎥
⎢ 1 ωe Llr Lm 2 ⎥ and dc-voltage regulation. To control the ESI in this operating
⎢+ e e 2 ⎥
×⎢ R iq s + (ωe Lm ids ) ⎥ +Pfric (34) mode, the PI controllers are designed to achieve the unity power
⎢ fe Lr ⎥
⎢   ⎥ factor correction (UPFC). Fig. 10 indicates the block diagram
⎣  e2 e2   ⎦
+ K1in v iq s +ids +K2in v ie2 e2 of the control scheme using for V2G or G2V (battery charging
q s + ids
mode). In this scheme, as shown in Fig. 10, the output of voltage
where K1in v and K2in v are the coefficients of the ESI, which regulator (PI), limited to a safe value, forms the amplitude of
may be experimentally estimated from the efficiency map of the input reference current. This reference amplitude is then multi-
ESI. Rf e represents the core losses. Then, the total efficiency plied to the output of the phase-locked loop to synchronize the
can be expressed by: reference with the ac input voltage (grid voltage), as required
for unity power factor operation. The inductor current is forced
Pout
Efficiency (η) = . (35) to track its reference current using current regulator (PI), which
Pout + PLosses generates appropriate gating signals. The main advantage of this
In this paper, PSO is applied to determine the optimal flux that controller is that it has a fixed switching frequency. The trans-
minimizes the total losses (cost function). Fig. 9 illustrates the fer function of the current PI and voltage PI controllers can be
5514 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 12, DECEMBER 2013

Fig. 12. Dual-loop control of the BMDIC.

e−sT d are given as follows [19], [36]:


 
1 − e−sT s −sT d
Gv d (z) = Z .e . Gv d (s) (38)
Fig. 11. Digital Control: (a) Dual loop structure and (b) sampling scheme and s
computation delay.  
1 − e−sT s −sT d
Gid (z) = Z .e . Gid (s) . (39)
s
written as follows:
The loop gains for inner current loop and outer voltage loop
Kii can be expressed as
Gi (s) = Kpi + (36)
s
Ti (z) = Hi (z). Gid (z) (40)
Kiv
Gv (s) = Kpv + (37) Hv (z). Hi (z). Gv d (z)
s Tv (z) = . (41)
1 + Ti (z)
where Kpi and Kii are the proportional and integral gains of
the current control, respectively, whereas Kpv and Kiv are the In this paper, the digital PI controllers are designed based
voltage control parameters. These controllers are designed based on the required phase margin Φm and critical frequency ω cz
on the required phase margin and the critical frequency by using by using bode-diagram in the discrete time domain. Then, by
bode-diagram. using the Euler method, the transfer function of the digital PI
controller in the z-domain is given by [19]
C. Dual-Loop Digital Control ki Ts z
H(z) = kp + (42)
z−1
In order to design the proper dual-loop digital controller for
the BMDIC, the continuous time transfer functions (Gv d (s) where
and Gid (s)) of the converter are first discretized using one cos θ
kp = (43)
of the discretization methods, such as zero-order-hold (ZOH), |Gp (z)|
matched pole-zero, backward difference, and bilinear transfor-
− ωcz sin θ
mation methods [34]–[36]. Therefore, the appropriate trans- ki = (44)
formation method to be utilized here is the ZOH method. |Gp (z)|
Once the discrete transfer functions of the system are avail- θ = 180 + ϕm − ∠Gp (z) (45)
able, the digital controller H(z) can be directly designed in the
where the Gp (z) is the discrete-time transfer function of the
z-domain using methods similar to the continuous-time fre-
open loop system (e.g., Gv d (z), or Gid (z)).
quency response methods or root locus or other methods
According to this design, the BMDIC controller is imple-
[34]–[36]. Fig. 11(a) depicts the entire dual-loop system con-
mented to maintain the dc-link voltage of 500 V in the BMDIC
taining the voltage loop controller Hv(z) current loop controller
output, irrespective of the variations in load and battery voltage.
Hi(z), the ZOH and computational delay e−sT d and the con-
Fig. 12 illustrates the dual-loop control of the BMDIC, which
trol to output transfer functions (Gv d (s) and Gid (s)) of the con-
is implemented in MATLAB/Simulink. As can be seen from
verter [19]. It should be pointed out that in practical applications,
Fig. 12, the generated PWM signals of the BMDIC switches
the feedback signals can be obtained by using an analog to digi-
are operated in a complementary manner to achieve the bidirec-
tal converter (ADC) and ZOH. As can be seen in Fig. 11(b), the
tional operating mode.
computational time delay Td models the time delay between the
ADC sampling instant and the subsequent PWM duty update.
VI. LOSSES MODEL OF THE PROPOSED IPEI
This time delay is half the PWM period, where the PWM period
and the sampling period TS are equal, so the computation delay The main losses of the proposed IPEI comprise the switch-
is Td = 0.5TS [36]. ing losses, conduction losses, core losses, and driving losses.
The discrete-time transfer functions (Gv d (z) and Gid (z)) of However, the driving losses are too small to be considered and
the converter that include the ZOH and computational delay can be neglected when compared with switching, conduction,
HEGAZY et al.: AN ADVANCED POWER ELECTRONICS INTERFACE FOR ELECTRIC VEHICLES APPLICATIONS 5515

and core losses. Consequently, in order to estimate the BMDIC TABLE III
THE PARAMETERS OF THE PROPOSED IPEI
and ESI losses, the switching, conduction, and core losses are
analytically calculated using the manufacturer datasheets. The
switching losses are generated when the switches are turned ON
and OFF. Thereby, the switching losses are obtained by using
the turn-on energy loss and the turn-off energy loss, which are
given in the datasheet of the power switching device. On the
other hand, the conduction losses are generated by either the
switching device (IGBT) or the freewheeling diode (FWD), ac-
cording to the saturation voltage and the device current. In addi-
tion, the inductor core losses are produced from the flux density
ripple which is proportional to the inductor current ripples. The
core losses depend on the flux density ripple, the switching fre-
quency, and the core type. Thus, the power losses are calculated
in order to estimate the BMDIC efficiency, ESI efficiency, and
APEI efficiency. These efficiencies can be expressed as follows:
Pdc-link
ηBM DIC =
Pdc-link + PLosses,BM DIC
Pout,ESI
ηESI =
Pout,ESI + PLosses,ESI
ηAPEI = ηBM DIC .ηESI (46)
where Pdc-link is the dc link power, which is given by
Pdc-link = Vdc-link · Idc-link (47)
whereas the BMDIC losses PLosses,BM DIC are expressed by

n ∗m
PLosses,BM DIC = (Pcond,IGBTk
k =1

+ Psw ,IGBTk + Pcond,FW Dk + PErr,FW Dk )



n
Fig. 13. Dynamic performances of the proposed powertrain during traction
+ (Pcond,Lk + PCore,Lk ) and braking modes (simulation results).
k =1

+ Pcond,C (48) where PESI,cond,IGBTk and PESI,sw ,IGBTk are the conduction
where Pcond,IGBTk and Psw ,IGBTk are the conduction and and switching losses of the IGBT of the ESI, respectively, while
switching losses of the IGBT, respectively, while Pcond,FW Dk PESI,cond,FW Dk and PESI,Err,FW Dk are the conduction and en-
and PErr,FW Dk are the conduction and energy reverse recovery ergy reverse recovery losses of the FWD, respectively.
(Err) losses of the FWD, respectively. Pcond,Lk is the ohmic
losses of the inductor, PCore,Lk is the core losses of the induc- VII. SIMULATION RESULTS
tor, and Pcond,C is the ohmic losses of the dc link capacitor. n To verify the performance of the proposed powertrain, as
is the number of phases and m is the number of the parallel shown in Fig. 3, simulations have been performed by using
switches per phase. In addition, the output power of the ESI is MATLAB/Simulink software. The main objective of this study
calculated by is to investigate the dynamic performances of the proposed
√ powertrain during traction, braking, and V2G operating modes.
Pout,ESI = 3VLL · IL · cos ϕ (49)
These simulations are carried out on three-phase IM whose pa-
where VLL is the line-to-line output voltage, IL is the line output rameters are mentioned in the Appendix (see Table V), while
current, and cos ϕ is the power factor. Furthermore, the ESI the parameters of the proposed IPEI are reported in Table III.
losses can be expressed as follows: Fig. 13 demonstrates the dynamic response of the proposed
IPEI during traction and braking modes after applying the con-

8
PLosses,ESI = (PESI,cond,IGBTk trol strategies, as mentioned in Section V. As can be observed
k =1 in Fig. 13, in this study, the simulation time is divided into
seven time intervals. In the time interval 0–0.06 s, the motor is
+ PESI,sw ,IGBTk + PESI,cond,FW Dk
at standstill, whereas the motor runs in acceleration mode dur-
+ PESI,Err,FW Dk ) (50) ing the time interval 0.05–0.4 s at rated load torque. Moreover,
5516 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 12, DECEMBER 2013

TABLE IV
PERFORMANCE COMPARISON BETWEEN THE MOTOR CONTROL STRATEGIES

Fig. 14. Dynamic performance of the battery pack and the proposed IPEI
(simulation result).

Fig. 16. Efficiencies of the power electronics interfaces in the proposed pow-
ertrain (simulation result).

Fig. 15. Comparative efficiency of the ac drive system (Motor & ESI) in the
proposed powertrain (simulation result).

the motor operates at constant speed of 600 r/min and constant


load, which is defined as steady state operating mode during in-
terval 0.4–1 s. In the time interval 1–1.2 s, the motor runs again
in acceleration mode at rated load torque. The motor works at
steady state operating mode of 1000 r/min during time interval
1.2–1.8 s. In the time interval 1.8–2.3 s, the motor operates as
a generator, this is known by regenerative braking. Finally, the
motor is standing in the time interval 2.3–2.5 s. One can see
from Fig. 13 that there is an excellent matching between the Fig. 17. Powertrain efficiency without including the battery efficiency (simu-
reference and actual speeds. The dynamic response of the bat- lation result).
tery pack and the proposed IPEI is illustrated in Fig. 14 during
traction and braking modes. The response of the proposed IPEI during charging mode
Fig. 15 presents the comparative efficiency between two con- from the grid is indicated in Fig. 18 when the PI controller is
trol strategies, which are defined as IFOC based on PWM Volt- implemented to achieve UPFC. As shown in Fig. 18, the THD
age and IFOC based on PWM voltage and PSO. The PSO is of the input current can be reduced to be 2.88%. It is clear that
used to determine the optimal rotor flux. The performance com- the proposed IPEI provides a high performance during battery
parison between the motor control strategies is illustrated in charging mode from the grid.
Table IV. As can be seen from Fig. 15, the proposed control
strategy, IFOC based on PWM voltage and PSO, is more effi-
cient than IFOC based on PWM voltage which is operated at VIII. EXPERIMENTAL VALIDATION
rated rotor flux. It means that the proposed control strategy can In this section, to verify the concept of the proposed topol-
provide a high efficiency for the ac drive system in the pro- ogy, the prototypes of 30 kW BMDIC and ESI are built and
posed BEV powertrain. On the other hand, the efficiencies of integrated together to form the proposed IPEI. The proposed
the ESI, BMDIC, and APEI are illustrated in Fig. 16, while the IPEI drives a 19 kW three-phase wound-rotor induction mo-
powertrain efficiency is shown in Fig. 17. tor in order to investigate its dynamic performances during
HEGAZY et al.: AN ADVANCED POWER ELECTRONICS INTERFACE FOR ELECTRIC VEHICLES APPLICATIONS 5517

Fig. 18. Battery charging mode with PI controller: (a) Unity power factor of
the grid side voltage and the input current; (b) the reference input current and
the actual input current (simulation results).

Fig. 19. Simulink model of the controllers of the IPEI based on DSP.
dynamic load change. During this test, a digital signal processor,
which is defined as eZdspTM F2808 DSP, is used to implement
the control strategies of the proposed IPEI. The main feature
of the eZdspTM F2808 DSP is that this type can be directly
programmed by MATLAB/Simulink software, which is com-
bined with a Code Composer Studio (CCS V3.3) in Real-Time
Workshop (RTW). It means that the CCS is the only means to
convert the Simulink model to RTW files. In this research, the
control strategies that are mentioned earlier in Section V are
Fig. 20. The photo of the proposed IPEI and the complete drivetrain.
implemented using TI C2000 package in MATLAB/Simulink
and eZdsp TMS320F2808 toolbox. During the test procedure,
the input voltage of the proposed IPEI is around 200 V. Thus, the In addition, the steady state operation of the motor is demon-
main function of the BMDIC in the proposed IPEI is to maintain strated in Fig. 22, while the harmonic spectrums of the stator
a constant dc link voltage of 400 V irrespective of the variations current and the line-to-line voltage of the IM are shown in
in the load and input voltage. While the main function of the Fig. 23.
ESI in the proposed IPEI is to transfer the electric power from One can observe from Fig. 21(a) that the dc-link is kept at a
the dc-link to the EM. In addition, the switching frequencies constant value of 400 V irrespective of the variations in input
of the BMDIC and ESI are chosen to be 20 and 10 kHz, re- voltage and load torque. Furthermore, as illustrated in Fig. 21(b),
spectively. The measurements were recorded using a Tektronix the output voltages of the proposed IPEI are also constant during
TDS5054B Oscilloscope with accuracy (±1%) and a FLUKE the load torque transients. It is clearly shown that the proposed
225C Scopemeter with accuracy (±2.1%). Fig. 19 shows the IPEI can provide a fast dynamic response due to the high sys-
Simulink model of the controllers, which are implemented in tem bandwidth, which is the main advantage of the BMDIC
MATLAB/Simulink based on the DSP blocks. based on interleaved control. The IPEI efficiency is computed
Fig. 20 depicts the proposed IPEI, which is loaded by IM. by measuring the input dc power and the output ac power. The
Fig. 21 illustrates the dynamic response of the IPEI when the dc input power is evaluated by measuring the input voltage and
load torque of the motor is changed from 25% to 100% (defined input current, while the ac output power is measuring by us-
as rated load torque). ing a three-phase digital wattmeter with accuracy (±0.2%). The
5518 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 12, DECEMBER 2013

Fig. 23. The harmonic spectrums of the line-to-line voltage and stator current
of the motor (experimental results).

Fig. 21. The dynamic response of the proposed IPEI under load toque change
(experimental results).

Fig. 24. Measured efficiency of the proposed IPEI at V in , D C =


200 V, V D C -L in k = 400 V, and Fs = 10 kHz (experimental result).

power factor and high THD for the ac input current. One can
notice from Fig. 25(b) that the proposed IPEI can provide a high
power factor and low THD for the ac input current. Due to the
low harmonics and THD of the ac input current that are gener-
ated during the charging mode from the grid, the conducted and
Fig. 22. Steady state current (10 mV/A) and line-to-line voltage (500 V/div) radiated EMI can be reduced.
of the motor (experimental result). In addition, it should be pointed out that the proposed dig-
ital control based on a DSP greatly simplifies the design of
input current is measured by using 120 A/60 mV shunt resis- the control system of the proposed powertrain. In RTW, one
tance, while the input voltage is measured by digital multimeter can select the operating modes (such as motoring/braking and
with accuracy ± (0.09%). Fig. 24 shows the measured efficiency charging/discharging modes) by using graphical user interface
of the proposed IPEI at Vin,DC = 200 V, VDC-Link = 400 V, or hardware selector. Furthermore, the benefits of the proposed
and Fs = 10 kHz. IPEI and its control strategies can be summarized as follows:
By comparing Fig. 16 with Fig. 24, the simulated efficiency 1) overall efficiency and reliability are significantly im-
of the APEI is higher than the measured efficiency. This error proved;
may be due to measurements error and parameters change. Fur- 2) input current and output voltage ripples of the dc/dc con-
thermore, Fig. 25 illustrates the performance of the proposed verter are reduced;
IPEI during the charging mode from the grid. As can be ob- 3) low EMI can be achieved;
served from Fig. 25(a), the diode rectifier operation has a low 4) compact size can be achieved;
HEGAZY et al.: AN ADVANCED POWER ELECTRONICS INTERFACE FOR ELECTRIC VEHICLES APPLICATIONS 5519

APPENDIX

TABLE V
THE PARAMETERS OF 19 KW WOUND-ROTOR INDUCTION MOTOR

TABLE VI
COMPARISON BETWEEN BIC (WITH FOUR IGBTS, FOUR DIODES AND TWO
INDUCTORS) AND THE PROPOSED CONVERTER
(BMDIC) (EXPERIMENTAL TEST)

Fig. 25. Response of the proposed IPEI during charging mode from the grid
(experimental result).

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CA, USA, 2010. neering (ETEC), Vrije Universiteit Brussel (VUB),
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Lille, France, 2010. and MOBI team at VUB. He is the author of more
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Italy, Sep. 6–8, 2010. research interests include power electronics, drive systems, hybrid electric vehi-
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cell/battery/ultra-capacitor electric vehicle energy storage system,” pre- tronics and industrial automation engineering from
sented at the Veh. Power Propulsion Conf., Lille, France, 2010. the Universidad Pública de Navarra, Navarra, Spain,
[19] O. Hegazy, J. Van Mierlo, and P. Lataire, “Analysis, modeling, and im- in 2004, and the Ph.D. degree from the Department of
plementation of a multidevice interleaved DC/DC converter for fuel cell Electrical Machines and Power Engineering (ETEC),
hybrid electric vehicles,” IEEE Trans. Power Electron., vol. 27, no. 11, Vrije Universiteit Brussel, Brussels, Belgium.
pp. 4445–4458, Nov. 2012. His research interests include energy recovery
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swarm intelligence,” IEEE Trans. Energy Convers., vol. 24, no. 1, pp. 12– gree in electromechanical engineering sciences from
20, Mar. 2009. the Vrije Universiteit Brussel, Brussels, Belgium, in
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Conf. Elect. Mach. Syst. (ICEMS), Beijing, China, 2011. Secretary of the Board of the Belgian Section of AVERE (ASBE) (www.asbe.be)
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3rd ed. New York, NY, USA: Wiley, 2008. tomotive Research Partner Association. Furthermore, he is a member of Flanders
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USA: Springer Science+Business Media, LLC, 2007. was the Chairman of the International Program Committee of the International
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Elect. Control Eng., Wuhan, China, Jun. 2010.
[32] Compliance Testing to the IEC 1000-3-2 (EN 61000-3-2) and IEC 1000-
3-3 (EN 61000-3-3) Standards, Hewlett Packard Co., Palo Alto, CA, USA, Philippe Lataire received a degree in electrome-
Application Note 1273, Dec. 1995 chanical engineering in 1975 and a degree in
[33] Electromagnetic Compatibility (EMC)—Part 3–2: Limits—Limits for Har- doctor in applied sciences in 1982 from the Vrije
monic Current Emissions, IEC-61000-3-2, 2000. Universiteit Brussel (VUB), Brussels, Belgium.
[34] S. Buso and P. Mattavelli, Digital Control in Power Electronics. San He is currently a Full Professor at the VUB in
Rafael, CA, USA: Morgan & Claypool, 2006. the field of power electronics, automatic control, and
[35] T. Reiter, D. Polenov, H. Pröbstle, and H. Herzog, “PWM dead time op- electric drives. The research interests are in the field
timization method for automotive multiphase DC/DC-Converters,” IEEE of electric drives, power electronics, and control. The
Trans. Power Electron., vol. 25, no. 6, pp. 1604–1614, Jun. 2010. Department FirW—ETEC, headed by him, developed
[36] C. Shamim, “Designing a TMS320F280x based digitally controlled DC- research activities in the fields of sustainable mobil-
DC switching power supply,” Texas Instruments Inc., Dallas, USA, Jul. ity, computational electrochemistry, lighting, electric
2005, pp. 1–15. machines, and power electronics applications.
HEGAZY et al.: AN ADVANCED POWER ELECTRONICS INTERFACE FOR ELECTRIC VEHICLES APPLICATIONS 5521

Noshin Omar was born in Kurdistan, in 1982. He Thierry Coosemans received the Ph.D. degree in
received the M.S. degree in electronics and mechan- engineering sciences from Ghent University, Ghent,
ics from Hogeschool Erasmus, Brussels, Belgium, Belgium, in 2006.
and the Ph.D. degree from the Department of Electri- After several years in the industry, he became a
cal Machines and Power Engineering (ETEC), Vrije member of the MOBI VUB research team on trans-
Universiteit Brussel, Brussels. port technology at Vrije Universiteit Brussel, Brus-
His research interests include applications of su- sels, Belgium, where he works as a Scientific Project
percapacitors and batteries in HEVs. Manager and Coordinator. His main research inter-
ests include electric and hybrid propulsion systems.
He is currently involved in the FP7 projects Safedrive,
Opera4FEV,SuperLIB, Smart EV VC, and the Euro-
pean Electro mobility Observatory, as well as in the Flemish Living labs for
Electric Vehicles. He is an active member of EARPA.

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