594 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 57, NO.

3, MARCH 2010

The Superjunction Insulated Gate Bipolar

Transistor Optimization and Modeling
Marina Antoniou, Florin Udrea, and Friedhelm Bauer, Senior Member, IEEE

Abstract—In this paper, we present a detailed analysis and

optimization of the superjunction (SJ) insulated gate bipolar tran-
sistor (IGBT). The SJ IGBT is a new device that breaks the IGBT
limits, i.e., it delivers performance that is dramatically better.
More specifically, we demonstrate here that the optimized SJ
IGBT can deliver turn-off losses that are at least 50% lower than
those of the state-of-art IGBT while maintaining a similarly low
ON -state performance, both at room temperature and at higher
temperatures. The presence of alternating p- and n-pillars in the
drift region gives rise to unique characteristics that when opti-
mized can deliver superior performance. This paper also presents
a SPICE model of the SJ IGBT under optimized conditions. Its
results are in good agreement with the DESSIS simulation results
under direct current conditions. This model consists of an intrinsic
MOSFET and a parallel combination of wide- and narrow-base
p-n-p bipolar junction transistors.
Index Terms—Field stop (FS) insulated gate bipolar transistor Fig. 1. The 1.2 kV (a) FS IGBT and the (b) SJ IGBT half-cell structures.
(IGBT), SPICE modeling, superjunction (SJ).

I. I NTRODUCTION distribution, which allows maximum breakdown per drift unit

length.

T HE INSULATED gate bipolar transistor (IGBT) is a main-

stream power device in medium high-voltage applications,
and its use is continuously expanding due to the improvement
of the basic structure. The recent advancements in IGBTs have
been almost exclusively based on the following three basic
innovations: 1) the trench technology [1]; 2) the field stop
(FS) technology [also known as soft punch through (SPT) or
light punch through] [2], [3]; and 3) the injection enhancement
effect (injection enhanced gate transistor (IEGT), carrier store
trench bipolar transistor (CSTBT), etc.) [4], [5]. Some of the
most advanced IGBTs are now incorporating all these three
innovations, and beyond this, the field is reaching a virtual limit
with very little improvement.
The introduction of the superjunction (SJ) technology [6]
in power MOSFETs [7], [8] featuring n- and p-pillars in the
drift region resulted in breaking the so-called “limit of silicon”
and enabled the realization of devices with drastically reduced
ON -resistance. The multiple junctions between pillars facilitate
the depletion of the entire drift region at a lower voltage than
a standard 1-D junction. This results in a uniform potential
Manuscript received August 7, 2009; revised November 17, 2009. First
published February 2, 2010; current version published February 24, 2010. The
review of this paper was arranged by Editor G.-T. Jeong.
M. Antoniou and F. Udrea are with the Department of Electrical
Engineering, University of Cambridge, CB2 1TN Cambridge, U.K. (e-mail:
ma308@cam.ac.uk; fu@eng.cam.ac.uk).
F. Bauer is with the Corporate Research, ABB Switzerland Ltd, 5405 Baden-
Dättwil, Switzerland (e-mail: friedhelm.bauer@ch.abb.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TED.2009.2039260
The SJ IGBT [9]–[12] is a MOS-controlled device, having
its drift region built from alternating p- and n-pillars. Here, we
show that the use of coupled FS and SJ technology concepts
results in an IGBT with potentially significantly superior static
and dynamic performance. For this to happen, there is, however,
a need for a very careful optimization of the doping levels of
the n- and p-pillars. While in conventional IGBTs the doping
of the drift region dictates the breakdown of the device but has
virtually no effect on the ON-state and turn-off performance, in
the SJ IGBT structure, the choice of the doping levels of the
n- and p-pillars hugely affects the static and dynamic char-
acteristics of the device. For an accurate comparison between
devices, we compare a 1.2-kV FS IGBT with a 1.2-kV SJ IGBT
both having the same MOS structure (geometry and doping), as
will be explained later in this paper.
Furthermore, we develop a novel equivalent circuit with an
associated analytical model to describe the behavior of the
optimized SJ IGBT. The model is based on a combination of a
wide-base p-n-p transistor in parallel with a narrow-base p-n-p
transistor, both driven by a channel MOSFET. An additional
junction field-effect transistor (JFET) is introduced to account
for the parasitic effect introduced by the p-well and the reverse
biased part of the n-p junction at the upper side of the drift
region.
II. D EVICE S TRUCTURE
Fig. 1 shows the 1.2 kV simulated devices structure. They
both have a cross-sectional half-cell dimension of 3 μm, and

0018-9383/$26.00 © 2010 IEEE

ANTONIOU et al.: SUPERJUNCTION INSULATED GATE BIPOLAR TRANSISTOR OPTIMIZATION AND MODELING 595

the thicknesses of the SJ and SPT IGBTs are 100 and 120 μm,
respectively. The SJ IGBT [Fig. 1(a)] structure is very similar
to the SJ MOSFET structure, i.e., the drift layer is made
of alternating p- and n-doped pillars. As with the FS IGBT
structure, the anode side of this device comprises a transparent
p-layer and a thin lightly doped n-buffer layer (Fig. 1).
In this study, we vary the doping concentration of the n- and
p-pillars of the SJ IGBT from 5 × 1013 to 1 × 1016 cm−3 . As
expected, the SJ effect allows the doping concentration of the
n- and p-pillars to be significantly increased compared to the
doping level of the drift region of a conventional IGBT. Indeed,
given that the n- and p-pillars are very thin, their maximum
doping that still allows the device to attain a breakdown voltage
Fig. 2. Electron flow lines while the SJ IGBT operates in the ON-state
of 1.2 kV is approximately 1 × 1016 cm−3 . In order to achieve a (I = 100 A/cm2 ). (a) High (1 × 1016 ), (b) medium (3 × 1015 ), and (c) low
completely flat electric field distribution across the drift region (1 × 1014 ) n- and p-pillar doping levels.
before avalanche occurs, (Ec ≈ 3 × 105 V · cm−1 ), the width
(half-cell pitch) of the device in this case is taken to be 3 μm,
with each pillar half-width of 1.5 μm. Fig. 1(a) shows the
FS IGBT structure that we have simulated. The n-drift region
doping concentration is 5 × 1013 cm−3 .

III. O FF -S TATE
In the blocking mode, the electric field distribution of the
FS IGBT has a trapezoidal shape, decreasing from the cathode
to the anode with no variation in the x-direction. In the case
of the SJ IGBT, the electric field is flat across the drift region
with a small increase around the reversed biased junction in
the middle of the device. It is therefore easy to see that the
breakdown voltage (which is the area under the electric field
curve when the maximum electric field is equal to the avalanche
field) for the SJ IGBT is always higher than that of the FS IGBT
for the same device dimensions. Therefore, in order to match
the breakdown voltage of the two devices, we use a thicker drift
region for the FS IGBT, i.e., the thickness of the FS IGBT is
120 μm, whereas that of the SJ IGBT is 100 μm.
The breakdown voltage of the SJ structures shows significant
dependence on the net charge balance of the drift region pillars
[13]. The maximum voltage can be achieved if the charge of the
pillars cancels each other perfectly.
IV. F ORWARD C ONDUCTION
In the ON-state, the behavior of the two devices is very
different. The doping charge level in the n- and p-pillars of
the SJ IGBT changes the ratio between bipolar and unipolar
conduction within the drift region and, therefore, alters very
significantly the speed and ON-state performance of the device.
This is a unique effect that is uncharacteristic to any other power
devices known in the field.
When the gate–source voltage exceeds the threshold, an
inversion layer forms beneath the gate of the MOS structure.
When VA is greater than approximately 0.7 V electron current
flows through the inversion layer into the base (i.e., n-drift
region) of the p-n-p transistor, which, in turn, causes substantial
hole injection from the p+ anode contact layer into the n-drift
region. The FS IGBT features a single (wide-base) p-n-p tran-
sistor with a short collector path. The p-emitter, n-drift, and
p-well form a wide-base p-n-p transistor structure with the base
Fig. 3. Hole flow lines of the SJIGBT operates in the ON-state
(I = 100 A/cm2 ). (a) High (1 × 1016 ), (b) medium (1 × 1015 ), and (c) low
(1 × 1014 ) n- and p-pillar doping levels.
current being provided by the n-drift region. Therefore, the FS
IGBT drift layer is fully modulated with plasma concentrations
being well above the background doping.
For the SJ IGBT, in the ON-state, the p-emitter, n-buffer,
and p-pillar form a parallel network of narrow- to wide-base
p-n-p transistor structures depending on the pillar doping. The
p-pillar provides a resistive contact to the collector (cathode).
This is, in fact, the basis of the model that we developed and
will demonstrate later in this paper.
A. Pillar Doping Impact
In this section, we investigate and explain the effect of
varying the pillar doping concentration on the ON-state and
switching performance. The modes of operation lie in three
categories.
For high doping levels of the n- and p-pillars (above 3 ×
1015 cm−3 ), the unipolar effect across the drift region is more
pronounced with a low IR drop and faster removal of the
charge from the bottom side due to low p-pillar (collector) resis-
tance. Fig. 2(a) shows the electron flow lines while the SJ IGBT
(high n- and p-pillar doping levels) operates in the ON-state
(I = 100 A/cm2 ). A similar picture is observed for the holes
traveling through the p-pillar of the drift region [Fig. 3(a)]. It is
obvious that the conduction of current is mainly unipolar, with
the pillars primarily conducting majority carriers (holes in the
p-pillars and electrons in the n-pillars). Fig. 4(a) and (b) shows
596 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 57, NO. 3, MARCH 2010

Fig. 4. Minority carrier distribution along cross-cuts in the p- and n-pillars for
the SJIGBT medium (3 × 1015 ) n- and p-pillar doping levels.

Fig. 5. Minority carrier distribution switching off along the medium p-pillar
(1 × 1015 ) of the device.
the minority carrier distribution along cross-cuts in the p- and
n-pillars. Therefore, we confirm that current conduction is
mainly unipolar as the minority carrier concentrations are
very low.
On the opposite, if the n- and p-pillar doping levels are in the
range of 3 × 1014 to 3 × 1015 cm−3 , the current conduction is
bipolar in nature at the anode of the device turning into unipolar
at the cathode side. The extension of the plasma in the drift
region toward the anode depends on the pillar doping. Figs. 2(b)
and 3(b) show the electron and hole flow lines, respectively,
while the SJ IGBT operates in the ON-state (I = 100 A/cm2 ).
The unipolar effect results in an increase in the ON-state voltage
drop, due to high IR drops at the cathode side. Therefore,
for the same ON-state voltage drop as the equivalent FS IGBT, Fig. 6. Normalized peak charge at the anode side against switching off time
the plasma must now be increased and, therefore, the longer for the FS and the SJ IGBT 3 × 1015 n- and p-pillars doping levels.
the time needed to turn off the device. Fig. 4(a) and (b) also
shows the minority carrier distribution along cross-cuts in the
p- and n-pillars for medium doping. Therefore, we confirm
that current conduction is unipolar at the cathode side of the
device as the minority carrier concentrations are very low,
whereas the current conduction turns bipolar at the anode side
as the minority carrier concentration becomes higher than the
background doping.
At low doping levels (below 3 × 1014 ), the effect of the n-p
junctions in the drift region tends to fade away, and the bipolar
conduction tends to dominate the whole of the drift region and
the device behaves similarly to an FS IGBT. Figs. 2(c) and 3(c)
show the electron and hole flow lines while the SJ IGBT
operates in the ON-state (I = 100 A/cm2 ). Fig. 4(a) and (b)
shows the minority carrier distribution along cross-cuts in the
p- and n-pillars for low doping. Therefore, we confirm that
current conduction is bipolar throughout the drift region as the
minority carriers concentration becomes orders of magnitude
higher than the background doping.
In switching conditions (simulations), both devices (SJ IGBT
and FS IGBT) switch from an ON-state current density of
100 A/cm2 . Fig. 5 shows how the plasma in a 1 × Fig. 7. Static and dynamic characteristics of the SJ and the FS IGBT
as a function of the doping levels in the drift region for T = 300 K.
1015 atoms/cm3 pillar doping is removed from the drift region (a) ON-state voltage drop (for constant Eoff = 5 mJ/cm2 ). (b) Turn-off energy
after the gate signal is removed. Hence, for the device to turn losses (for constant Von = 1.2 V). (c) Degradation in breakdown for a 5%
off, the excess carriers need to be removed. Fig. 6 shows how charge imbalance.
the normalized peak charge (located at the anode side; see
Fig. 5) varies as a function of the turn-off time for the FS and Fig. 7(a) and (b) shows the ON-state voltage drop for the
the SJ IGBT 3 × 1015 n- and p-pillar doping levels. Hence, the same turn-off energy losses (which is equal to 5 mJ/cm2 ) and
reduced plasma in the drift and the p- and n-pillar junction helps the turn-off energy losses for the same ON-state voltage drop
reduce the plasma much faster. (which is equal to 1.2 V), respectively, as a function of the
ANTONIOU et al.: SUPERJUNCTION INSULATED GATE BIPOLAR TRANSISTOR OPTIMIZATION AND MODELING
Fig. 8. ON -state characteristics of an SJ MOSFET and an SJ IGBT.
pillar doping of the SJ IGBT. Similarly, Fig. 7(c) shows the
breakdown voltage degradation (for 5% charge imbalance) as
the pillar doping increases. On the same graphs [Fig. 7(a)
and (b)], we plotted the corresponding values of the FS IGBT
with thicknesses of 100 and 120 μm (n-drift layer doping
5 × 1013 cm−3 ). This is done in order to investigate the impact
that this difference in length has on the switching losses and on
the ON-state voltage drop. As a result, at drift layer low doping,
where the SJIGBT behaves in a bipolar current conduction
fashion, the reduction in power losses is due to the reduced
length, whereas, the ON state voltage drop remains almost equal
to that of the FSIGBT.
Therefore, we can specify two regions where the SJ IGBT
can operate with better performance than the FS IGBT.
1) At drift layer pillar doping levels of 6 × 1013 to 2 ×
1014 cm−3 , where the charge imbalance effects are negli-
gible and the reduction in switching losses at Von = 1.2 V
are about 50%. The SJ IGBT behaves as an FS IGBT with
a reduced cell thickness due to the SJ technology present
in the drift region to almost flat. Therefore, for the same
Von = 1.2 V, the SJ IGBT needs less plasma in the drift
region so the switching losses are much lower than the
FS IGBT. The presence of the p- and n-pillar junction in
the drift region also helps collect the plasma much faster.
2) At drift layer pillar doping levels of 3 × 1015 to 5 ×
1015 cm−3 , where the unipolar conduction of the current
is dominant and both the switching losses and ON-state
voltage are reduced. The charge imbalance effects are
present, but the voltage degradation is still less than 20%.
At the second optimum region, the background doping
helps the unipolar conduction to become more efficient
at the top of the device. Hence, although the plasma is
confined at the anode side [as shown in Fig. 5(a) and (b)],
the reduced resistance of the pillars compensates, leading
to lower ON state losses. Hence, the switching losses are
also reduced as the plasma concentration is low and the
conduction of majority carriers is dominant in the device.
Furthermore, we also consider the behavior of the SJ
MOSFET with a pillar structure similar to that of the SJ IGBT
and a pillar doping concentration equal to 5 × 1015 cm−3 .
Figs. 8 and 9 show the ON-state output characteristic and the
energy losses of such a device, respectively. The corresponding
optimized SJ IGBT results are plotted on the same graphs. It
597
Fig. 9. Energy losses versus ON-state voltage drop of an SJ MOSFET and an
SJ IGBT (100 A/cm2 , T = 300 K).
can clearly be seen that for these operating conditions (I =
100 A/cm2 ), the SJ MOSFET performs worse than the SJ
IGBT due to the unipolar conduction of current in the drift
region [8]. Fig. 9 also shows the technology curve of the
optimized SJ IGBT−ycell = 120 μm. This latter device length
achieves the 1.2-kV breakdown voltage despite the breakdown
degradation at high pillar doping levels, and at the same time,
the switch-off energy losses are still considerably lower than the
that of the FS IGBT (at the same ON-state voltage level equal
to 1.2 V).
Note that the optimum SJ IGBT doping regions are identified
for a given width of the n- and p-pillars. Changing the width
will alter the absolute values of these regions, but we expect
a similar behavior. Nevertheless, to take full advantage of the
SJ effect, the width of these pillars needs to be kept to a
minimum—a limit imposed by the fabrication technology.
This paper does not aim at addressing fabrication issues. For
the current status of SJ technology, one can refer to [14].
V. T EMPERATURE I MPACT
The performance of the SJ IGBT is also examined under
an increased operating temperature. In order to assess its per-
formance, we compared it to an FS IGBT under the same
operating conditions. Fig. 10 (similarly to Fig. 7) shows the SJ
IGBT switching behavior for an increased operating tempera-
ture equal to 400 K. The increase in the ON-state voltage drop
(for the same energy losses equal to 5 mJ/cm2 ) for the SJ and
FS IGBTs are 25.3% and 9.4%, respectively. This is expected
as the ON-state unipolar transport is affected due to mobility
degradation while the bipolar gain in the drift remains almost
unchanged with the temperature (as the ambipolar mobility
degradation in temperature is somewhat canceled out by the
lifetime increase in temperature).
VI. M ODEL S TRUCTURE
A well-established model for the standard IGBT is an in-
trinsic MOSFET in series with a wide-base p-n-p bipolar
junction transistor (BJT) [Fig. 11(a)]. Improvements to this
model include the introduction of a JFET connected in series
to the MOSFET. This component models the neck region (with
adjacent depletion regions to the p-wells), which forms at the
cathode side of the device in the drift region. The industry
598
Fig. 10. Static and dynamic characteristics of the SJ IGBT and the FS
IGBT as a function of the doping levels in the drift region for T = 400 K.
(a) ON-state voltage drop (for constant Eoff = 5 mJ/cm2 ). (b) Turn-off energy
losses (for constant Von = 1.2 V). (c) Degradation in breakdown for a 5%
charge imbalance.
Fig. 11. (a) Basic IGBT model. (b) BJTs’ configuration in the SJ IGBT.
has favored the Kraus IGBT model [15], [16] since it offers
a good tradeoff between complexity in simulations and speed.
Therefore, this model was our starting point.
As already explained, for the SJ IGBT, in the ON -state,
the p-emitter, n-buffer, and p-pillar form a parallel network of
narrow- to wide-base p-n-p transistor structures [Fig. 11(b)].
The p-pillar provides a resistive contact to the collector (cath-
ode). The SJ IGBT configuration is therefore based on the par-
allel conduction of p-n-p transistors (with the base increasing
gradually toward the anode). The narrow-base transistors have
a high gain (resulting in high plasma at the anode side of the
drift region), but they feature a longer collector path while the
wide-base transistors feature lower gain but a shorter collector
path. For simplicity, without sacrificing too much accuracy, we
reduce the network of the p-n-p transistors to just two. Hence,
we added to the Kraus-based IGBT model a second narrow-
base p-n-p BJT with a wide collector, approximating the p-pillar
region. Particular attention is given to the injection charge in the
collector layer of the narrow-base wide-collector p-n-p BJT, as
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 57, NO. 3, MARCH 2010
Fig. 12. Complete PSPICE model for an SJ IGBT. Added components to the
Kraus model (narrow-base p-n-p BJT and JFET) are included in the dashed
boxes.
this charge determines the behavior of the device. A submodel
[18] is added to the standard BJT model to approximate its
behavior under the investigated conditions (Fig. 10, model
included in the right red dashed box). Of course, for the first
optimum window of pillar doping as specified in Figs. 6 and 7,
the standard IGBT models can be used as this device behaves
approximately as an IGBT with a reduced cell thickness. This
model is appropriate in cases where we have increased pillar
doping concentrations.
VII. K RAUS M ODEL
Fig. 12 shows the Kraus model (excluding the additional
components in the red dashed boxes), as implemented in [17].
The Kraus model is a physical IGBT model. Therefore, the
output of this model depends on the physical parameters of
the structure such as the MOSFET threshold voltage, drift
region width, the lifetime in the drift region, and the injection
efficiency of the anode junction.
For the MOSFET part, a PSPICE level 1 MOSFET is used
with added gate–source and gate–drain capacitances. A subcir-
cuit is used to model the bipolar part of the IGBT. Two diodes
are used to represent the p-anode–n-buffer and the n-pillar–
p-well junctions. Inc and Ipc correspond to the MOS-electron
and hole current injected from the anode reaching the cath-
ode (p-well), respectively. The voltage drop in the MOSFET
channel is dependent upon the MOS current Inc , the MOSFET
threshold voltage, and its gain factor Kp , which, in turn, re-
flects the dimensions and the gate density of the IGBT. The
collected hole current Ipc and the n-pillar resistance Rb are both
dependent on the n-pillar charge Qb calculated from the charge
subcircuit.
It should be noted that for the bipolar part, a standard BJT
model cannot be used as it cannot reproduce the high-level
injection effects. An equivalent circuit is therefore used for the
bipolar part of the IGBT. The n-pillar charge subcircuit models
the accumulation of carriers in the n-pillar through an RC
circuit using the difference between the collector (cathode) and
emitter (anode) electron currents. The values of the resistance
and capacitance are chosen so that the time constant of the
subcircuit RC is equal to the ambipolar n-pillar lifetime τb . The
ANTONIOU et al.: SUPERJUNCTION INSULATED GATE BIPOLAR TRANSISTOR OPTIMIZATION AND MODELING
Fig. 13. Simulated (DESSIS) output characteristics for the SJ IGBT and the
PSPICE-based Kraus and power BJT models.
instantaneous charge Qb stored in the n-pillar region is the prod-
uct of the capacitance with the voltage at the base subcircuit
node. The full justification of this model implementation can be
found in [17]. The PSPICE simulation results, obtained using
this model, are shown in Fig. 13. These results are compared to
the DESSIS simulation results.
VIII. X U AND S CHRODER M ODEL —A P OWER BJT M ODEL
The next challenge in this model is how to capture the com-
plex mixed unipolar and bipolar conduction in the drift region
of the SJ IGBT. Hence, in order to improve the model, we mod-
eled the narrow-base wide-collector p-n-p bipolar transistor
formed between p-anode–n-buffer–p-pillar. This configuration,
known as power BJT (PBJT), is considerably different from the
standard signal BJT. The charge in the doped p-pillar (acting as
the collector layer) determines the behavior in the ON-state and
during switching.
A PBJT model containing a standard BJT model and two
additional elements, namely, the collector resistance Rcc and
the current source Icp , was used. Rcc describes the voltage drop
in the collector layer (p-pillar) Vcc , and Icp describes the elec-
tron current from the base (n-buffer) into the collector (p-pillar).
The full network model is shown in Fig. 12 (model included in
the right red dashed box). The full theoretical justification and
derivation of these components values are found in [18]. The
relevant parameter extraction methods are also given. It should
be noted that the device parameters w, Nd , and Rco are width,
doping, and resistance without charge injection of the p-pillar,
respectively. This network model is connected directly to the
MOSFET drain node. Therefore, the Inc electron current now
splits between the narrow- and wide-base BJTs. The PSPICE
simulation results obtained under this model are also shown in
Fig. 13. It is obvious that the deviation between the two curves
is smaller than in the case of using the Kraus model only.
IX. JFET C OMPONENT
Finally, in order to improve our model, we included a JFET
component connected in series to the MOSFET drain node.
This component models the neck region between two adjacent
p-wells. This effect is also present in standard IGBTs. However,
the effect in SJ IGBT is more prominent due to presence of
the transverse junction. At high ON-state voltages, a depletion
599
Fig. 14. Simulated (DESSIS) output characteristics for the SJ IGBT (pillars
doping equal to 3 × 1015 atoms/cm3 ) and the PSPICE-based complete model
for different Vg ’s.
region is formed along the transverse junction at the upper side
of the drift region, which restricts the flow of the majority
carriers through both n- and p-pillars. The complete model
used is shown in Fig. 12. The new PSPICE simulation results,
which include the Kraus model, the network PBJT, and the
JFET component, are shown in Fig. 14. These results are also
compared to the DESSIS simulation results. To verify this
model, we simulated the device under different gate voltages.
The output characteristics are simulated, and Vg = 14 V. Again,
excellent agreement between the model and simulation results
was obtained.
X. C ONCLUSION AND F UTURE W ORK
In this paper, we have shown that the SJ IGBT has a tremen-
dous potential in achieving a favorable tradeoff between the ON-
state and turn-off performance. Unlike the FS IGBT structure,
where the doping of the drift region has little influence on
the static and dynamic characteristics of the device, we have
shown here that the SJ IGBT overall efficiency is dramatically
influenced by the doping charge in the n- and p-pillars. We
have identified the following two distinctive doping regions
where the SJ IGBT offers improved performance when com-
pared to a FSIGBT: 1) at low doping levels, where the
SJ IGBT offers a higher breakdown voltage/drift unit length
and indirectly lower dynamic losses, and 2) at high doping
levels, where the SJ IGBT benefits from additional unipolar
conduction at the cathode of the drift region coupled with fast
removal of the excess charge from the anode side of the drift
region through the highly doped p-pillar.
We have also developed a novel equivalent circuit and an
associated physical SPICE model for the optimized SJ IGBT.
This new model is able to capture the complex behavior of the
unipolar and bipolar conduction within the drift region. The
parasitic JFET effect is more pronounced in the SJ IGBT, and its
presence in the equivalent circuit is necessary to account for the
extra depletion region formed at the reverse-biased transverse
junction.
The SPICE model shows good agreement with the DESSIS
simulations. While the current model is focusing on the direct
current characteristics, work is in progress to model the tran-
sient behavior that takes into account the huge reduction in the
plasma level in the drift region of the SJ IGBT.
600 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 57, NO. 3, MARCH 2010

R EFERENCES Florin Udrea received the M.Sc. degree in smart

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sensors from the University of Warwick, Coventry,
U.K., in 1992 and the Ph.D. degree in power devices
from the University of Cambridge, Cambridge, U.K.,
in 1995.
He is a Professor in semiconductor engineering
and the Head of the High Voltage Microelectronics
and Sensors Laboratory, University of Cambridge.
Since October 1998, he has been an academic with
the Department of Electrical Engineering, University
of Cambridge. Between August 1998 and July 2003,
he was an advanced EPSRC Research Fellow and, prior to this, a College
Fellow at Girton College, University of Cambridge. He is currently leading
a research group in power semiconductor devices and solid-state sensors,
which has won an international reputation during the last 15 years. He co-
founded two companies, namely, Cambridge Semiconductor (Camsemi) and
Cambridge CMOS Sensors (CCS), in the fields of power ICs and smart sensors,
respectively. He is the author of over 250 papers published in journals and
international conference proceedings. He is the holder of 50 patents, with 30
more patent applications, in power semiconductor devices and sensors.
Prof. Udrea cofounded two companies, namely, Cambridge Semiconductor
(Camsemi) and Cambridge CMOS Sensors (CCS), in the fields of power ICs
and smart sensors, respectively. In 2009, in the Rosenblatt New Energy Awards,
Camsemi received the “University Spin-out of the Year” Award, which reflected
Camsemi’s disruptive energy-saving technologies, “cost-efficient” products,
and sustained commitment to the green agenda. Previously, in 2008, the com-
pany received the Startup of the Year Award from National Microelectronics
Institute and was listed in the top 100 cleantech companies, in third position,
by the Guardian.
Friedhelm Bauer (M’96–SM’09) received the
M.S. and Ph.D. degrees in electrical engineering
from Rheinisch Westfälische Technische Hochschule
(RWTH) in Aachen, Germany, in 1979 and 1984,
respectively.
He joined the Corporate Research Center of
Brown Bovery Company (BBC) in Switzerland in
1986. BBC merged with ASEA, Sweden, in 1987 to
become ABB. He was involved in the research and
development of high-voltage high-power semicon-
ductor switches such as MOS-controlled thyristors,
IGCTs, and IGBTs at ABB Corporate Research, Switzerland, and later at
ABB Semiconductors AG, Lenzburg. In 2000, he became a consultant in the
development of high-voltage (6.5 kV) IGBTs. Since 2004, he has been a Senior
Principal Scientist with the Corporate Research, ABB Switzerland Ltd, Baden-
Dättwil, Switzerland. He is the author of a number of published scientific papers
in the field of modern power semiconductor devices. He is also the holder of
several patents in this field.
Dr. Bauer is a Senior Member of the IEEE Electron Devices Society.

Marina Antoniou received the B.A. degree and

the M.Eng. degree in electrical and information en-
gineering in 2005 and the Ph.D. degree in 2009
from the University of Cambridge, Trinity College,
Cambridge, U.K. The topic of her Ph.D. was on the
analysis of ultrafast power semiconductor switches.
She is currently with the Department of Electrical
Engineering, University of Cambridge. Her main
research interests include the analysis, development,
and modeling of medium- to high-voltage power
semiconductor devices, particularly the development
of novel devices for addressing issues of energy efficiency, reliability, switching
speed, and cost effectiveness of power semiconductor switches for medium- and
high-voltage applications.
Dr. Antoniou was elected to the Donal Morphy Research Fellowship in
Electrical Engineering, Selwyn College, Cambridge, on October 1, 2009.