IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO.

5, SEPTEMBER 2007 1949

Soft Switched Full Bridge DC–DC Converter With

Reduced Circulating Loss and Filter Requirement
Xinke Wu, Xiaogao Xie, Junming Zhang, Rongxiang Zhao, and Zhaoming Qian, Senior Member, IEEE

Abstract—A new soft switched full bridge converter with phase-

shift control is proposed to reduce the circulating loss in primary
and the voltage stress in secondary side. Using a coupled winding
of the filter inductor, two auxiliary voltage sources are generated
to reset the primary current at circulating interval. An auxiliary
clamp diode is used to clamp the voltage spike across the recti-
fier diode, which releases the voltage stress of the rectifier diode.
Therefore, low break down voltage diodes are utilized to reduce
the conducting loss and the reverse recovery loss. Also, the filter
requirements are lowered due to the auxiliary voltage sources. A
prototype is built up to verify the theoretical analysis.
Index Terms—Phase shift full bridge (PSFB), zero voltage
switching (ZVS).

I. INTRODUCTION
N A low power uninterruptible power supply (UPS) or
I driver system, a high voltage dc bus is generally needed
to feed a dc–ac converter. Generally, the source of the dc bus
converter is a battery group or other renewable sources with
the voltage level about 40–60 V. To boost the low voltage
to a high voltage (300–400 V) an isolated dc–dc converter is
necessary. At a power level higher than 500 W the phase shift
full bridge (PSFB) dc–dc converter [1] is preferred due to its
high efficiency and low electromagnetic interference (EMI).
But the circulating loss in primary is high for a conventional
PSFB converter especially in high input current application.
The zero-voltage and zero-current switching (ZVZCS) [2]–[20]
Fig. 1. Previous secondary side current set circuits.
technique is proposed based on PSFB converter to reduce the
circulating loss. The key point of this technique is to build a
voltage source in primary or secondary side to reset the primary
current during the passive interval. The conduction loss is high application. Moreover, in high output voltage application,
[7] for the diode in series with primary switch due to the large the voltage rinings is serious [9] caused by reverse recovery
primary current, though the circulating loss can be eliminated. of the rectifier diode because the leakage inductance of the
Inserting an auxiliary inductor with three coupling windings in transformer is large, which leads to large snubber loss. By an
primary side of the transformer [15], primary current is reset by active switch in secondary side [12], [14], the primary current
input voltage source through the auxiliary coupling windings in transformer can be reduced. But the control is complex
in the transformer, but the conduction loss in auxiliary circuits because the auxiliary switch should be driven corresponding to
is large because of high input current, and the voltage ringings the driving logic of the primary switches. Using tapped filter
across the rectifier diodes are still high. In [4], [8], and [11], inductor to reset primary current [20], [21] is very simple,
the auxiliary sources are made using the windings of trans- whereas the current ripple increases. Using resonant network
former, which increase the complexity of the transformer. The at secondary side to reset primary current, the voltage across
rectifierstructure in [8] is not suitable for high output voltage the rectifier diodes can also be clamped [2]–[6], [11], but the
clamping voltage values are different. Fig. 1 shows six previous
secondary side current reset circuits. These techniques also can
Manuscript received November 23, 2006; revised April 23, 2007. Recom-
mended for publication by Associate Editor V. Massimo.
be utilized to reduce the circulating loss in three level dc–dc
The authors are with the College of Electrical Engineering, Zhejiang Univer- converters.[15], [17]–[19]
sity, Hangzhou 310027, China (e-mail: qian@zju.edu.cn; zhangjm@zju.edu.cn; Using a transformer auxiliary winding [4] to charge the
wuxinke@zju.edu.cn; vrm@zju.edu.cn; rongxiang@cee.zju.edu.cn).
Color versions of one or more of the figures in this paper are available online
resonant capacitor, the voltage across the capacitor is reduced
at http://ieeexplore.ieee.org. compared with that in [3] and [16], and the voltage across
Digital Object Identifier 10.1109/TPEL.2007.904211 the rectifier diode is without considering the ringings
0885-8993/$25.00 © 2007 IEEE
1950 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 5, SEPTEMBER 2007

Fig. 2. Proposed converter with secondary side reset circuits.

TABLE I
VREC WITHOUT CONSICERING AUXILIARY SNUBBERS

caused by intrinsic capacitance. However, in practice the

peak of the voltage ringing across rectifier diodes can reach
almost two times of steady state value because of the parasitic
resonance between the intrinsic capacitance and the leakage
inductance of the transformer, as well as the voltage ringings
of the rectifier diodes in the conventional PSFB converter.
Therefore an additional RC/RCD snubber is needed to release Fig. 3. Key waveforms in one switching cycle.
the voltage spike, which causes additional losses, especially
for high output voltage application. By adding a clamp diode
in [2], [6], [11] the voltage spike across rectifier diode can be of the large capacity. The parasitic capacitors of diode
clamped at low value. The peak voltage across diode is twice are represented by . To simplify the analysis the par-
of output voltage in [11], and is in [6]. The asitic capacitors of and are neglected because they
voltage in [2] is 2 , which is lowest among can be integrated into in equivalent circuits.
these converters for conventional input voltage range, such is the leakage inductance of the transformer. Because the turns
as 4/3. The voltage across the resonant of the two coupled windings in the filter inductor are same, the
capacitor can also be reduced by using a coupled winding in voltage across the auxiliary winding is identical to that of the
the filter inductor in [5], but the voltage across rectifier diode is main winding. Therefore, the voltage equals to
identical to that in [2]. In Section III Table I shows the voltage Vo, and equal to 2. The derivation is given in
stresses across the rectifier diodes using different reset circuits. Section III. The turn ratio of the transformer is n .
This paper proposes a PSFB converter without circulating
loss in primary side. Furthermore, the voltage stress of the recti- II. OPERATION PRONCIPLES
fier diode is reduced to a much lower value compared with pre- In following analysis, it is assumed that the currents and
vious ZVZCS converters. Thus, lower break down voltage diode are constant during switching cycle, and the output is sup-
can be utilized as rectifier diode. The circuit diagram is shown posed as a voltage source . Fig. 3 shows the key steady state
in Fig. 2. are main rectifier diodes, and are waveforms in one switching cycle. Fig. 4 shows the equivalent
auxiliary rectifier diodes with low current stress. Diode is circuits according to Fig. 3 during half switching cycle. The
used to clamp the voltage across rectifier diodes. and can magnetic current of the transformer is neglected due to its rela-
be seen as voltage sources during one switching cycle because tive small value.
WU et al.: SOFT SWITCHED FULL BRIDGE DC–DC CONVERTER 1951

Fig. 4. Equivalent circuits of the stages during half switching cycle. (a) Stage 1 (t 0 t ). (b) Stage 2 (t 0 t ). (c) Stage 3 (t 0 t ). (d) Stage 4 (t 0 t ).
(e) Stage 5 (t 0 t ). (f) Stage 6 (t 0 t ).

Stage 1 : At turns on, the input voltage Vin

is across the transformer winding, and the current commuta-
tion between the auxiliary diodes and rectifier diodes
begins. The equivalent circuit of this stage is shown
in Fig. 4(a). The current begins increasing, and the diodes
and begin to conduct. When the current increases to
/n, the current commutation completes, and this stage
ends. The voltage across diode and is clamped to 2.
The slope of current increasing is described as Fig. 5. Simplified equivalent circuit of stage 2.

(1)

Stage 2 At the diodes cut off. The

leakage inductor of the transformer is resonant with the para-
(3)
sitic capacitors . The equivalent circuit of this interval
is shown in Fig. 4(b). In order to calculate the magnitude of the (4)
resonant voltage and current, the equivalent circuit can be sim-
plified into a resonant circuit as shown in Fig. 5, where is
where
the voltage across the equivalent intrinsic capacitor. The voltage
2.
. This interval ends when the voltage increases
Stage 3 When the voltage reaches to 3 /2,
to 3 2
the clamping diode conducts. Thus, the voltage is
clamped to 3 /2. The equivalent circuit of this stage is shown
in Fig. 4(c). Because reflected voltage Vin/n from input is lower
(2) than 3 /2, the current in begins decreasing at . The
1952 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 5, SEPTEMBER 2007

Fig. 6. Steady State equivalent circuits (a) secondary side filter circuits and (b) D 3 T (c) (1-D)3T .

voltage across is (3 /2- ). This stage ends when the

current decreases to ).

(5)

Stage 4 When cut off a , keeps at

. The voltage across filter inductor is ( – ).
During this interval the current charges the capacitors
and and should be equal due to the charge balance
in and . During this interval it can be seen as a converter
with two same output voltages using coupled filter inductors. Fig. 7. Normalized steady state transfer gain versus duty cycle.
Stage 5 At turns off. The intrinsic capacitors
of and are charged by reflected load current. When the
voltage across S4 reaches to Vin, the body diode of conducts. III. DESIGN CONSIDERATIONS
Thus, can achieve ZVS turning on. The voltage transition
mode of leading leg switches is similar to conventional PSFB A. Steady State Analysis
converter. Furthermore, the voltage increases very fast because
of large primary current reflected from load current. Therefore From the analysis presented in above section, the steady state
the equivalent circuit of the voltage transitions of drain to source characteristic of the proposed converter can be derived. By
across primary switches is omitted in the equivalent circuits in neglecting the transition intervals the converter can be divided
Fig. 4. When the body diode of S3 conducts, the voltage across into two normal modes according to the voltage across the filter
primary winding is clamped at zero. The auxiliary diodes inductors. Fig. 6(b) and 6(c) show the simplified equivalent
and are on, and the voltage sources and are across circuits of two modes, and (1-D) interval respectively.
. Thus, the current begins decreasing, and the decreasing Because the turn ratio is 1 between the windings of and
slope is described as (6). This interval ends when current is its leakage inductance is neglected, the voltages across the
reset to zero windings are identical. Therefore, from the equivalent circuit
in Fig. 6(b), the voltage equals to . In Fig. 6(c)
should be equal to because of the parallel connection
(6) during the interval (1-D) . Hence, the steady state dc gain of
the converter can be derived according to the voltage-second
balance of the filter inductor
Stage 6 After the converter is in freewheeling
stage. Because the primary circulating current is reset to zero,
the circulating loss in primary side is eliminated without consid-
ering the transformer magnetizing current circulating loss. Due (7)
to the auxiliary voltage source the voltage across rectifier diode
is , and the voltage across the filter inductor is . (8)
This stage ends when turns on at .
After the other half switching cycle begins. Due to the sym- where and are defined in Fig. 6(a).
metry operation characteristic, the principles and the equivalent Normalized transfer gain function (supposing 1) is
circuits of the other half switching cycle are same to that men- shown in Fig. 7. The gain of the proposed converter is higher
tioned above. than that of the conventional PSFB.
WU et al.: SOFT SWITCHED FULL BRIDGE DC–DC CONVERTER 1953

TABLE II
KEY COMPONENTS LIST

Fig. 8. Calculated peak to peak current ripple in filter inductors with Lo =

800 H.

The dc current in the windings of the filter inductor can also

be determined. Taking into accounting the charge balance of
and the current is derived as

(9)

where is the load current.

B. Voltage Stress of the Rectifier Diode

Due to the clamp diode the voltage stress across the
rectifier diodes is reduced to 3 /2. In order to show
the improvement of the converter in reducing the voltage stress,
a prototype with low input and high output voltage is designed.
The input is (45–60) VDC, and output is 300 V. Considering
the duty cycle loss caused by the leakage inductance, the turn
ratio of the transformer in prototype is higher than the ideal
calculation result. From Table I it can be seen that the voltage
stress in the proposed converter is minimum. Thus, the diode Fig. 9. Measured primary current and V rec.
with lower break down voltage can be utilized to reduced the
conduction loss and reverse recovery loss.
IV. EXPERIMENTAL RESULTS
C. Filter Requirements
Based on the design process mentioned above a 500 W proto-
The filter requirements of the proposed converter are different
type is built up to verify the analysis. The switching frequency is
from that of conventional PSFB converter because there is an
125 kHz. The key components are listed in Table II. To demon-
auxiliary voltage source at the input of the filter inductors during
strate the improvements of the converter a conventional PSFB
the freewheeling interval. The current ripple (peak to peak) is
prototype is tested with same input and output voltage. An aux-
derived in (10) according to different duty cycle
iliary RCD snubber across diodes is needed in the conventional
PSFB prototype. Fig. 9 shows the primary current and output of
(10) rectifier diodes Vrec. Fig. 10 shows the voltage across the aux-
iliary freewheeling diode and voltage source . From
From (8) and (10), the current ripple in function of input is the figures the voltage Vrec is clamed very well without any
derived as RC snubbers in the proposed converter. The maximum voltage
is lower than 500 V. Fig. 11 shows the measured cur-
rents in diodes and which are corresponding to the
(11)
voltage Vrec. ZVS on for leading leg switches are achieved as
shown in Fig. 12.
Fig. 8 shows the current ripple value (peak to peak) in func- The efficiencies of the prototypes are measured as shown in
tion of the input voltage. The ripple reduction in the proposed Fig. 13. Using low break down voltage diode (600 V) the ef-
converter is about 40%–60% during the input voltage range ficiency of proposed prototype increases about 3% compared
compared with the conventional PSFB. with conventional PSFB at full load.
1954
Fig. 10. Voltages across D and V .
Fig. 11. Currents in diode D and D and voltage V rec.
V. CONCLUSION
A new soft switched full bridge converter is presented. By
employing secondary side auxiliary source, which is produced
from an auxiliary coupled winding of filter inductor, the primary
circulating loss is eliminated. With an auxiliary clamp diode the
voltage stress across rectifier diode is reduced, and low voltage
rate diode can be utilized to reduce the conduction loss. Also,
the lead leg switches achieve ZVS on. A prototype verifies the
theoretical analysis, and the efficiency is improved about 3% at
full load. Although the count of the auxiliary circuit is large, it is
still attractive in efficiency improvement for high input current
and high output voltage application.
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 5, SEPTEMBER 2007
Fig. 12. ZVS operation for leading leg switch 3.S
Fig. 13. Measured efficiencies at 55 V input.
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Xinke Wu was born in Jiangsu, China, in 1978. He
received the B.S. and M.S. degrees in electrical en-
gineering from the Harbin Institute of Technology,
Harbin, China, in 2000 and 2002, respectively, and
the Ph.D. degree in electrical engineering from Zhe-
jiang University, Hangzhou, China, in 2006.
He is now an Assistant Researcher with the
National Engineering Research Center (NERC) for
Applied Power Electronics, Zhejiang University. His
research covers soft switching of power conversion,
power factor correction, high efficiency dc–dc
converters, and power electronics system integration.
1955
Xiaogao Xie was born in Leiyang, China, in 1975. He
received the M.S. and Ph.D degrees in electrical engi-
neering from Zhejiang University, Hangzhou, China,
in 2000 and 2005 respectively.
His research interests include dc–dc converters and
soft-switching techniques.
Junming Zhang was born in Zhejiang, China, in
1975. He received the M.S. and Ph.D. degrees in
electrical engineering from Zhejiang University,
Hangzhou, China, in 2000 and 2004, respectively.
He is an Associate Professor with the Institute
of Power Electronics, Zhejiang University. He is
the holder of one patent. His research interests
include power electronics system integrations, PFC
techniques, dc–dc converter, synchronous rectifiers,
and high power inverters.
Rongxiang Zhao was born in Zhejiang, China, in
1962. He received the B.Sc., M.Sc., and Ph.D. de-
grees in electrical engineering from Zhejiang Uni-
versity, Hangzhou, China, in 1984, 1987, and 1991,
respectively.
Currently, he is a Professor in the Department of
Electrical Engineering, Zhejiang University, where
he is also the Director of the National Engineering
Research Center for Applied Power Electronics. His
main interests and research fields are motor, motor
control, and power converter system.
Zhaoming Qian (SM’92) received the M.S. degree
in radio engineering from the Electrical Engineering
Department, Zhejiang University, Hangzhou, China
in 1961 and the Ph.D. degree in applied science
from the Catholic University of Leuven and the
Interuniversity Microelectronics Center (IMEC),
Leuven, Belgium, in 1989.
Since 1961, he has been doing teaching and re-
search work on electronics and power electronics in
Zhejiang University of China. He was promoted as a
Professor of the Electrical Engineering Department,
Zhejiang University in 1992. He is currently the Deputy Director of National
Engineering Research Center for Applied Power Electronics, Zhejiang Univer-
sity and the Deputy Director of Scientific Committee, National Key Laboratory
of Power Electronics, Zhejiang University. He has published one book on EMC
design and more than 200 papers. His main professional interests include power
electronics and its industrial applications, power electronic system integration,
and EMC in power electronic systems etc.
Dr. Qian received Excellent Education Awards from the China Education
Commission and from Zhejiang University in 1993, 1997, and 1999, respec-
tively, the Science and Technology Development Awards from the China Edu-
cation Commission, in 1999 and 2003, respectively.