KTH ROYAL INSTITUTE

OF TECHNOLOGY

Open Source Software Tools

for Power System Real-Time Monitoring, Control and Protection using Synchrophasors

Luigi Vanfretti and M.S. Almas

https://www.kth.se/profile/luigiv/
Associate Professor & Docent
Department of Electric Power & Energy Systems (EPE)

Aachen, Germany - September 27, 2016

DOI: 10.5281/zenodo.155358
 Acknowledgements
To all Students @KTH SmarTS Lab., and in particular for this presentation to:
Almas &

Hossein Jan Ali

Reza Eldrich
Almas, Maxime, Gudrun, Luigi, Francisco, Vedran

Funding & Projects:

2
 Outline
• SmarTS Lab – Arch. and Implementation
• OSS Tools for Synchrophasor Application Development
• S3DK & BabelFish (IEEE C37.118.2 Toolkit and Client(s) for Labview)
• Khorjin (IEC 61850-90-5 Traffic Generator / Client)

• WAMPAC Applications Developed in SmarTS-Lab

• Monitoring
• Control
• Protection

• Conclusions

3
Platform for developing WAMPAC Applications

SMART TRANSMISSION SYSTEM LABORATORY (SmarTS-Lab)

4
 Architecture post 2012

ECS

BabelFish
Most Important SW
Technologies Developed

Khorjin

S3DK

M. S. Almas, M. Baudette, L. Vanfretti, S. L⊘vlund and J. O. Gjerde, "Synchrophasor network, laboratory and software applications
developed in the STRONg2rid project," 2014 IEEE PES General Meeting | Conference & Exposition, National Harbor, MD, 2014, pp.
1-5. doi: 10.1109/PESGM.2014.6938835 5
Our Implementation

6
OSS TOOLS
S3DK, BABELFISH AND KHORJIN
(PROTOCOL PARSERS AND APP DEV. TOOLS)

BFv1
BabelFish
Synchrophasor
Parsers + Tool kit BFE
S3DK
OSS
Tools Synchrophasor and
IEC 61850-90-5 Khorjin
Parser/Traffic Generator

7
 Motivation
A bridge to take the next step in the “last mile” in PMU App Development
Data in IEEE C37.118 Protocol
PMU 1
Interfaces
Real-time data locked
into vendor specific using standard
PMU 2 software system protocols and a
Communication
PDC flexible
Network
development
Historical Data in
Proprietary Database environment are
needed
PMU n

Infrastructure Last Mile in PMU

App Development
• PMU SW Apps require real-time data acquisition.
• PMU data is sent to these SW Apps using many different comm. protocols.
• For fast software prototyping and testing, communication protocol parsing is
required.
• Low level data management routines (windowing, etc.) do not need to be
reinvented N times.
• To assist students and researchers with a background in power systems, but
lacking proficient software development and programming skills.
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 Background
Synchrophasor Fundamentals
Sinusoidal waveform GPS Satellite
1

0.8

0.6

0.4

Represented GPS Receiver

0.2

-0.2
as
Substation Clock
-0.4

-0.6

Phasors Synchronized Time-Tag

-0.8

-1
0 2 4 6 8 10 12 14

Synchrophasors

UDP/IP or TCP/IP connection between

PMU and Workstation (Client)

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 IEEE Std. C37.118.2 :
Synchrophasor Data Transfer for Power Systems
Underlying Protocol Info. Actual Phasor Info. In Frame
Application Layer Protocol
that uses TCP/UDP over IP for
network communication

Frame Format for Synchrophasor Data Protocol

Total number of bytes in Second of century (SOC) counts Measured values that are to be transmitted/received by
the frame including CHK the number of seconds that have the PMU/PCD . The measurements can be phasors,
occured since January 1, 1970 frequency, rate of change of frequency, analog, digital
etc.

SYNC FRAMESIZE IDCODE SOC FRAC SEC DATA 1 DATA 2 DATA N CHK
(2 byte) (2 byte) (2 byte) (4 byte) (4 byte) (2/4/8 byte) (2/4/8 byte) (2/4/8 byte) (2 byte)

All frames start with Identifies unit which is Fraction of a second (3byte) Time Quality Flas (1 byte) All frames terminate
SYNC which provides sending or receiving with CHK which is 2
24 bit integer which is 8 bit time quality flag that byte CRC-CCIT.
synchronization and message. It is identification
actual fraction of second determines quality of time
identifies the type of number of the PMU / PDC
count being reported i.e. 10
messge i.e. data, assigned by user
maximum time error as
configuration, header or
determined by PMU clock
command
SmarTS Lab OSS Tools Evolution
BabelFishV1 S3DK BabelFish Engine Khorjin
(LabView & C++) (LabView & C++) (LabView Only) (C++)

Khorjin (LabView, C++)

CMD C37.118.2

BabelFish Engine (Labview Only)

BabelFish V1 (LabView and C++)
Module
Reading Interfacing GUI
Module Module Module PMU_CFG-
(C++) (Active X) (LabView)
2_PACK
IEC 61850
S3DK (LabView and C++)

NamesofPMUs Mapping
Elements

PMU_DA 61850-90-5
TA_PACK Module
• Real-time reading from • Developed entirely in
PMU/PDC (DLL) • Client/Server LabView. • Focus on Performance
• Interfacing with LabView Architecture • Only requires IP • Not necessary to be user
via ActiveX (minimum • Multi-Threading address, Port number friendly
delay) • LabView VI/API and Device ID of the • Gateway for IEC
• LabView presentation • Calls C++ Methods PMU/PDC stream transition
layer • Toolbox-like • Potentially applicable • Executes on embedded
functions for NI cRIO systems with low
Why only Labview? requirements
Why Khorjin?
Derive Requirements for Embedded Computers
Support for COTS Embedded Computers
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Development: 2011 - 2013 Development: 2014 – 2016 …
 SmarTS Lab OSS Tools Comparison
BabelFish BabelFish V1 S3DK Khorjin
OSS Engine (LabView and C++) (LabView (C++)
Feature (Labview Only) and C++)
Core C37.118.2 C37.118.2 Parser C37.118.2 C37.118.2 and
Functionality Parser Parser IEC 61850-90-5
Operating Windows Windows Windows Windows, Linux,
System VXworks
Platform Labview 2012 or Labview 2012, C++, LV, C++ GNU C Compiler
newer .Net, Active X, VS
Support Only NI LabView Anything
Embedded support (in principle)
User
Friendliness
Skills LV Basics LabView, C++ Expert LabView (+) C++ Expert
Executes PC PC PC PC, Embedded
Performance and Functionalities
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Friendliness and Programming Skills
 BabelFish Engine (BFE)
(Graphical User Interface)

IV I

III II

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 S3DK – LabView API, UI and Tools
Graphical User Interfaces
GUI Communication Configuration

Development Tooling

Many blocks to
access and handle
RT data

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S3DK LabVIEW
Library
 Khorjin’s Functionalities

• The Khorjin library is an Open Source

code providing following functionalities:
à IEEE C37.118.2 Traffic Parser
à IEEE C37.118.2 to IEC 61850-90-5 Protocol Linux
Converter Mac
Windows
à IEC 61850-90-5 Traffic Generation
à Routed-Sampled Value
à Routed-GOOSE Khorjin
à IEC 61850-90-5 Traffic Parser
à Routed-Sampled Value
à Routed-GOOSE Raspberry Pi

• The Khorjin library supports different

NI cRIO
platforms.
à Will be publicly available by the end of 2016.

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 Khorjin’s Gateway Architecture

• The Gateway functionality of “Khorjin”

library is getting use of its modular
architecture:
à Easier for future development

• The Khorjin Gateway is designed and

implemented in three main
components of:
1) IEEE C37.118.2 Module,
2) IEC 61850 Mapping Module, and
3) IEC 61850-90-5 R-SV / R-GOOSE Publisher
Module.

• The Khorjin Gateway is designed and • In order to be platform-independent:

implemented in three main
components of: à A Platform Abstraction Layer is Implemented.
1) IEEE C37.118.2 Module, à Depending on the platform, the relevant
2) IEC 61850 Mapping Module, and platform-dependent functions are utilized
3) IEC 61850-90-5 R-SV / R-GOOSE Publisher (i.e. Socket, Thread, Time and …).
Module. 17
DEMOS!

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 Integration of OSS Tools in

ECS

Khorjin now allows us to provide

RT data to a variety of application
and embedded systems

Khorjin Smar
Khorjin
t

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 Wide-Area Near-Real-Time
Monitoring Applications
(1) Monitoring & Visualization (2) Mobile Apps (3) Inter-Area Oscillation Assessment

(4) Forced Oscillation Detection (5) Real-Time Voltage Stability Assessment

(6) Real-Time PV-Curve Voltage Stability Assessment

(1)-(2) M. S. Almas, et al, "Synchrophasor network, laboratory and software applications developed in the STRONg2rid project," 2014 IEEE PES General Meeting | Conference & Exposition, National Harbor, MD, 2014, pp. 1-5. doi: 10.1109/PESGM.2014.6938835
(3) V. S. Perić, M. Baudette, L. Vanfretti, J. O. Gjerde and S. Løvlund, "Implementation and testing of a real-time mode estimation algorithm using ambient PMU data,"Power Systems Conference (PSC), 2014 Clemson University, Clemson, SC, 2014, pp. 1-5.
doi: 10.1109/PSC.2014.6808116
(4) M. Baudette et al., "Validating a real-time PMU-based application for monitoring of sub-synchronous wind farm oscillations," Innovative Smart Grid Technologies Conference (ISGT), 2014 IEEE PES, Washington, DC, 2014, pp. 1-5.
doi: 10.1109/ISGT.2014.6816444
(5) J. Lavenius and L. Vanfretti, “Real-Time Voltage Stability Monitoring using PMUs”, Workshop on Resiliency for Power Networks of the Future, May 8th 2015. Online: http://www.eps.ee.kth.se/personal/vanfretti/events/stint-capes-resiliency-
2015/07_JanLav_Statnett.pdf
(6) A. Bidadfar, H. Hooshyar, M. Monadi, L. Vanfretti, Decoupled Voltage Stability Assessment of Distribution Networks using Synchrophasors,” IEEE PES General Meeting 2016, Boston, MA, USA. Pre-print: link.

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 Real-Time Control Applications
S3DK is executed on a PC with a
non real-time operating system =>
Non-deterministic delay S3DK
Khorjin NI-cRIO

The hardware prototype controller design

Three level design
Two level design NI-cRIO
PC
RT processor FPGA
NI-cRIO
RT processor Phasor SVC Analog
FPGA Control signal
C37.118 Network Input Signal POD Output
Raw
Phasor SVC Analog
synchrophasors communication Selection Control signal
POD Phasor Output
Load Control Load Analog
C37.118
KhorjinLabVIEW Network POD Algorithm Modulation Output
20ms published Shared Variables
Phasor 20ms
Load Control Load Analog 100µs
POD Algorithm Modulation Output
20ms 100µs

Remotely run VI
Real-Time Software VI Real-Time Software VI Core FPGA Software VI
Core FPGA Software VI
•• Runs on a PC. • Runs on the real-time processor
Runs on the real-time processor of the cRIO. • Runs on the FPGA
• Runs on the FPGA
•• S3DK used to unwrap PDC of the cRIO.
Khorjin used to unwrap PDC stream. • The load control and SVC
• The load control and SVC control
stream. • Manages the signal selection control implemented.
• Input signal selected implemented.
 Control applications (S3DK vs Khorjin)
S3DK is executed on a PC with a
non real-time operating system =>
Non-deterministic delay S3DK NI-cRIO

The hardware prototype controller design

Three level design
Two level design NI-cRIO
PC
RT processor FPGA
Phasor SVC Analog
POD Control signal Output
C37.118 Raw Network Input Signal
synchrophasors communication Selection
Phasor Load Control Load Analog
LabVIEW Network
20ms published Shared Variables
POD Algorithm Modulation Output
20ms 100µs

Remotely run VI Real-Time Software VI Core FPGA Software VI

• Runs on a PC. • Runs on the real-time processor • Runs on the FPGA
• S3DK used to unwrap PDC of the cRIO. • The load control and SVC
stream. • Manages the signal selection control implemented.
 Control applications (S3DK vs Khorjin)

Khorjin NI-cRIO

The hardware prototype controller design

Three level design
Two level design
NI-cRIO
RT processor FPGA
Phasor SVC Analog
POD Control signal Output
C37.118
Khorjin
Phasor Load Control Load Analog
POD Algorithm Modulation Output
20ms 100µs

Remotely run VI
Real-Time Software VI Real-Time Software VI Core FPGA Software VI
Core FPGA Software VI
•• Runs on a PC. • Runs on the real-time processor
Runs on the real-time processor of the cRIO. • Runs on the FPGA
• Runs on the FPGA
•• S3DK used to unwrap PDC of the cRIO.
Khorjin used to unwrap PDC stream. • The load control and SVC
• The load control and SVC control
stream. • Manages the signal selection control implemented.
• Input signal selected implemented.
 Power Transfer
Area 1 Area 1 to Area 2 Area 2

Results
900 MVA 900 MVA 220 Km Parallel 900 MVA 900 MVA
20 kV / 230 kV Bus1 Transmission Lines Bus2 20 kV / 230 kV

ΔV#$%
10 Km 25 Km
G1 25 Km 10 Km G3

SVC

Hardware prototype
900 MVA Local
Loads G4
G2 967 MW 900 MVA
100 MVAR (Inductive) 20 kV / 230 kV 900 MVA

controllers tested:
900 MVA -387 MVAR (Capacitive) Load Local 1767 MW
20 kV / 230 kV Control Load Loads 100 MVAR (Inductive)
Modulation -537 MVAR (Capacitive)

Test Power System

• In RT-SIL and RT-HIL.
• In RT-HIL using S3DK and Total delay in RT-HIL setup:
S3DK: 200-500 ms Khorjin: 50-76 ms
Khorjin.

Conclusion
S3DK is good for beginners.
Problem: runs on PC which
adds to the latency.
Solution: Khorjin, in princible
can run on any platform.
Allows you to perform unwrap
Scenario: 5% change in Vref of G1
the PMU stream on the
controller platform.
 Repositories Currently Available at GitHub

• S3DK: https://github.com/SmarTS-Lab-Parapluie/S3DK
• BabelFish: https://github.com/SmarTS-Lab-Parapluie/BabelFish
• Khorjin: Will be available at GitHub end of 2016.
L. Vanfretti, V. H. Aarstrand, M. S. Almas, V. S. Perić and J. O. Gjerde, "A software development toolkit for real-time synchrophasor
applications," PowerTech (POWERTECH), 2013 IEEE Grenoble, Grenoble, 2013, pp. 1-6.
doi: 10.1109/PTC.2013.6652191

L. Vanfretti, I. A. Khatib and M. S. Almas, "Real-time data mediation for synchrophasor application development compliant with IEEE
C37.118.2," Innovative Smart Grid Technologies Conference (ISGT), 2015 IEEE Power & Energy Society, Washington, DC, 2015, pp. 1-5.
doi: 10.1109/ISGT.2015.7131910

L. Vanfretti, M.S. Almas and M. Baudette, “BabelFish – Tools for IEEE C37.118.2-compliant Real-Time Synchrophasor Data Mediation,” SoftwareX,
submitted, June 2016.

S.R. Firouzi, L. Vanfretti, A. Ruiz-Alvarez, F. Mahmood, H. Hooshyar, I. Cairo, “An IEC 61850-90-5 Gateway for IEEE C37.118.2 Synchrophasor Data
Transfer,” IEEE PES General Meeting 2016, Boston, MA, USA. Pre-print: link.

S.R. Firouzi, L. Vanfretti, A. Ruiz-Alvarez, H. Hooshyar and F. Mahmood, “Interpretation and Implementation of IEC 61850-90-5 Routed-Sampled
Value and Routed-GOOSE Protocols for IEEE C37.118.2 Compliant Wide-Area Synchrophasor Data Transfer,” Electric Power Systems Research. March
2016. Submitted. August 2016. First Revision.

G.M. Jonsdottir, E. Rebello, S.R. Firouzi, M.S. Almas, M. Baudette and L. Vanfretti, “Audur – Templates for Custom Synchrophasor-Based Wide-Area
Control System Implementations,” SoftwareX, in preparation, 2016.

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 Other Contributions to Open Science: RaPId and OpenIPSL
Now Available as OSS!

• Our work on OpenIPSL and RaPId has

been published in an Open Access
Journal, available on-line:
• http://dx.doi.org/10.1016/j.softx.201
6.05.001
• http://www.sciencedirect.com/scienc
e/article/pii/S235271101630019X
• The OpenIPSL library can be found on-
line at Github:
• https://github.com/SmarTS-
Lab/OpenIPSL
• The RaPId software can be found at:
• https://github.com/SmarTS-
Lab/iTesla_RaPId

… and more to come! See our Github accounts: https://github.com/SmarTS-Lab/

And coming soon with more synchrophasor-related applications: https://github.com/SmarTS-Lab-Parapluie 26
 Conclusions
– What did presentation cover?
– The Smart Transmission System Laboratory, which serves as a test-bench where new
WAMPAC software applications are developed and tested.
– We showed how OSS Tools provides users the freedom real-time synchrophasor streams in
the LabView environment for rapid application prototyping.

– What is the future in WAMPAC?

– A more open market needs to be developed, and the foundational building blocks for the
technology need to be openly available (open standards, their implementations, etc.)
– The future, to me, seems quite limited if the status quo continues.
– We hope to bridge this gap through our open source tools, to empower other researchers.

– What is the most important aspects for the future of synchrophasor

technology?
– Nothing would have been possible without investing time in training my students, the
highest value of a lab is the individuals in it.
– Taking the next step was a 5 year process, and we believe that our work can help others –
that’s why we are sharing our tools as open source software

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Thank you!
• Questions?
• Our group’s website:
• https://www.kth.se/en/ees/omskolan
/organisation/avdelningar/epe/resear
ch/smart-transmission-systems-
laboratory-smarts-lab-1.627203

The scientific man does not aim at an immediate result.

He does not expect that his advanced ideas will be readily taken up.
His work is like that of the planter - for the future.
His duty is to lay the foundation for those who are to come, and point the way.
- Nikola Tesla -

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