Analog to Digital Converter: a Key Concept in the Implementation of

a 3G Software Defined Radio Receiver

V. Christofilakis1, A. A. Alexandridis1, P. Kostarakis2, K. Dangakis1

Tel: +30 10 6503145, email: vchrist@iit.demokritos.gr

1
National Centre of Scientific Research “DEMOKRITOS”
Institute of Informatics and Telecommunications
15310, Ag.Paraskevi, Athens, Greece
2
Electronics-Telecommunications and Applications Lab., Physics Department
University of Ioannina, 45110, Ioannina, Greece

ABSTRACT required sampling rates [5]. The latest technology in

With the dawn of a new millennium we find ourselves
one step before the emergence of the third generation
(3G) mobile communications systems in the world
market. The implementation of the 3G and furthermore
4G mobile communications systems is included within
the intentions of the so-called software defined radio
(SDR) systems [1]. The design, development and the
implementation of SDR systems are based on a
combination and evolution of technologies and
techniques including mainly: smart antennas, radio
frequency (RF) down/up converters, analog to digital
converters (ADCs) and digital to analog converters
(DACs), digital signal processors (DSPs), modelling
and system description languages. In this paper a
quantitative analysis of the basic parameters of one of
the most important segments of an SDR receiver, the
Analog to Digital Converter, is presented. ADC's of the
latest technology and their basic specifications are also
indicated.
I. INTRODUCTION
The ADC constitutes an essential component for the
implementation of an SDR receiver. In figure 1 we can
see the block diagram of an ideal SDR receiver, in
which the ADC is placed as close to the antenna as
possible. As we can see, the ideal case is the one in
which the digitization of the incoming high frequency
signal (RF) occurs just after the antenna [2,3].
The question evidently arisen is whether the established
technology can succeed the right sampling and
quantization of RF signals that come from 3G mobile
communication systems, also known as Universal
Mobile Telecommunications System (UMTS). Taking
into account that the frequency band of 3G mobile
communication systems lies around 2.5 GHz, we
conclude that we need ADCs with sampling rate at least
silicon integrated circuits (Si ICs) ADCs has reached
such levels of sampling rates that can handle band
limited signals having no frequency components above
750 MHz. It is noted that there are modules, III-V ICs
(semiconductors are synthesized using elements from
third and fifth group of periodic table) and SuperC
(superconductors) ADCs [6] which can handle band
limited signals with frequency components above 750
MHz, but even if the sampling frequency satisfies the
Nyquist criterion, there are other parameters affecting
the performance of an ADC. Some of these parameters
are bit resolution, aperture jitter, differential
nonlinearity error (DNL), integral nonlinearity error
(INL), full-power analog input bandwidth (FPBW),
spurious free dynamic range (SFDR), effective number
of bits (ENOB). The parameters just mentioned can play
a significant role in real situations and can affect the
performance of an ADC and thereby the implementation
of an ideal SDR receiver.
In this paper, we consider the ADC as a physically
realizable system with a performance depending on
various parameters. More specifically, in section II there
is a theoretical analysis considering three of the basic
parameters of an ADC, which are: the sampling rate, the
bit resolution and the aperture jitter. In section III,
through appropriate simulation programs, a quantitive
relation among these three basic parameters of the ADC
is derived. Besides, it becomes clear that these
parameters affect the performance of the ADC, and as a
measure we use the Signal to Noise Ratio (SNR) at the
ADC's output. Finally, in section IV, the sampling rate
of ADCs (Si ICs) of the latest technology is given
versus bit resolution and a comparison with older ADCs
(Si ICs) is presented.
Antenna
ADC DSP
USER
INTERFACE

5 GHz, according to the sampling theorem [4]. In

practical SDR solutions, ADCs are placed after the first
Figure 1: Block diagram of an ideal SDR receiver.
down-conversion stage thus significantly reducing the
 II. THEORETICAL ANALYSIS OF THE BASIC
CHARACTERISTICS OF AN ADC

A. Sampling Rate

According to the sampling theorem, every band-limited

signal of finite energy, having no spectral components
above a frequency of fc, may be reproduced from its
samples taken at a rate exceeding twice the highest
frequency in the band [4]. The sampling rate fs=2fc is
called the Nyquist rate (fNyquist). The sampled signal xs(t)
is given by the relation:
n=∞
xs (t ) = x(t ) ∑ δ (t − nTs ) (1)
n = −∞
where x(t) is the analog signal, δ(t) stands for Dirac Figure 2: (a) Spectrum of the analog signal x(t), (b)
delta function, Ts is the sampling period and is equal to Spectrum of the sampling signal xs(t), with sampling
1/fs. The Fourier transform Xs(f) of the sampled signal rate fs= fNyquist.
xs(t) is given by the relation:
+∞
X s ( f ) = fs ∑ X ( f − nf )
n = −∞
s (2)

where X(f) is the Fourier transform of the analog signal

x(t). For sampling rate fs = fNyquist, if the Fourier
transform X(f) of the analog signal x(t) is the one shown
in figure 2(a), then the Fourier transform Xs(f) of the
sampled signal is as shown in figure 2(b). It is obvious
that with the help of a Low Pass Filter (LPF), the
retrieval of the initial signal is possible. In practice it is
rather preferred not to use sampling rates fs=fNyquist, but
fs=kfNyquist with k>1, for the following reasons:
• to avoid aliasing of the sampled signal
• easier implementation of the appropriate filter
• decrease of quantization noise.
We will work out these parameters in the following
paragraphs.
Aliasing of the sampled signal: Let's consider the
Fourier transform X(f) in figure 2(a). If in that spectrum
there was an interfering (spectral) frequency
component, for example, fc0=1.1fc as shown in figure
3(a) and if the sampling was performed at the Nyquist
rate then the spectrum of the sampled signal would be Figure 3: (a) Spectrum of the analog signal with
the one in figure 3(b). It would therefore be impossible undesirable component, (b) Distortion in the spectrum
to retrieve the initial signal, without the disturbance of sampled signal (fs=fNyquist), (c) Spectrum of the
caused by the specific spectral component. But if the sampled signal (fs=1.5fNyquist).
sampling was performed with frequency 1.5fNyquist, then
the spectrum of the sampled signal would be as shown
in figure 3(c). Then, using the appropriate filter, we
could retrieve the initial signal.
Easier filter implementation: An ideal low pass filter has
an orthogonal response, while the response of a real
LPF of the same cut off frequency is different (figure 4).
If the spectrum of the analog signal was as the one
shown in figure 5(a) with frequency fc=100 KHz, then
with sampling frequency equal to 1.5fNiquist (300 KHz),
the spectrum of the sampled signal is shown in
figure 5(b). Using the LPF which has cut-off frequency
128 KHz [7], we cannot take the initial signal, because,
as shown in figure 4, there is a transition area of high
gain in the filter from 128 KHz – 1000 KHz, which
disables the reproduction of the initial signal. That Figure 4: Response of width of an ideal and a real
problem could easily be solved if we had the ability to transit filter of low frequencies.
perform a sampling with frequency 6fNyquist.

Figure 5: Spectrum of the analog signal x(t) with fc =
100 KHz, (b) Spectrum of the sampled signal xs(t) (fs=
300 KHz).
B. Bit Resolution
An ADC, except for taking samples of the analog
signal, quantizes them as well. Quantization, in an
ADC, is the procedure of transforming the samples of
continuous amplitude range into samples of discrete
amplitude levels [8]. According to the uniform
quantization method the area of continuous amplitude
range is divided in Q=2b parts of width
∆=x(t)max-x(t)min/Q, where x(t)min, x(t)max is the
minimum and the maximum values of the analog signal
respectively and b stands for the number of the bit
resolution of the ADC.
The process of transforming the sample amplitude of
continuous amplitude range x(nTs) of an analog signal
x(t) into a discrete amplitude qi follows the rule:
x(nTs ) → qi , if si −1 < x(nTs ) ≤ si (3)
si −1 + si
where, qi = , si = x (t ) min + i∆ and
2
s0 = x(t ) min , i =1,2,….,Q
The variation between the quantized value and that of
the analog signal is called quantization error. Therefore,
during the analog signal conversion into digital, the
quantization error or quantization noise, being the
difference between the input and the output signal
should be taken into account.
It can be proved [9] that if the analog signal amplitude
does not exceed the Full Scale Range (FSR) of the ADC
and quantization error is a uniformly random variable,
the variance of the quantization error (σ2q) is given by
the relation:
∆2
σ 2q = (4)
12
From equation (4), we can conclude that when b tends
to infinity, then σ2q tends to zero.
Usually, as a measure for the performance of an ADC,
we use the signal to noise ratio (SNR) in the ADC’s
output. For a sinusoidal signal which does not exceed
the FSR of the ADC, the SNR due to the quantization
error is:
 f 
SNRq = 6.02b + 1.76 + 10 log10  s  (dB) (5)
 2 fc 
where b stands for the bit resolution of the ADC, fs is
the sampling rate, fc is the maximum frequency of the
analog signal at the ADC’s input [10].
In relation (5), if fs is replaced by kfNyquist (k≥1), we
take:
SNR q = 6.02b + 1.76 + 10 log 10 (k ) (6)
For a sampling rate equal to the Nyquist rate (k=1), the
relation (6) becomes:
SNR q = 6.02b + 1.76 (7)
Decrease of quantization noise: the term 10log10(k) in
(6) indicates that it is preferable to use sampling rates as
greater than the Nyquist rate as possible (oversampling)
because the SNRq is increased. In figure 6 we can see
the SNRq versus k for 4 different bit resolutions 6, 8, 10,
12 bits. From that figure it becomes obvious that an
increase of 2 bits in the bit resolution implies an
increase of the SNRq of approximately 12 dB. The same
improvement in the SNRq maybe obtained when
fs=16fNyquist.
Figure 6: SNRq versus k, for b=6, 8, 10, 12 bits.
C. Aperture jitter
In the analysis till now we have considered that there is
not sampling instant uncertainty and the duration of
samples is infinitesimal. For the case of simplicity we
still consider that the duration of samples tends to 0.
Thus, there is only uncertainty concerning the sampling
instant. The uncertainty in sampling instant is denoted
by a random amount of time τ, which maybe considered
as a random variable with zero mean value, following
normal distribution. The root mean square (RMS) value
of τ is what we specified as aperture jitter or aperture
time uncertainty taj. Assuming that the analog signal is
x(t) = sin(2πfct), we will try to find out how the aperture
jitter affects the sampled signal. The uncertainty in
sample time nTs (ut) implies an uncertainty ux in the
amplitude of the signal (figure 7). The relation between
ut and ux is:
dx
ux = u t = 2πf c cos(2πf c t )u t (8)
dt
Therefore, we conclude that the uncertainty ux is
proportional to the frequency of the input analog signal
and to the uncertainty ut expressed by the aperture jitter
[11]. It can be proved that the SNR of an ADC is also
affected by the aperture jitter.
It can be proved [10] that the SNR due to the aperture
jitter error is:
 1 
SNRaj = 20 log10   (9)
 2πf t 
 c aj 
where taj is the aperture jitter and fc is the maximum
frequency of the analog signal at the input of the ADC.
Figure 7: Uncertainty in sample time nTs (ut) causes an
uncertainty ux in the amplitude of the sampled signal.
III. SIMULATION
In order to survey how the sampling rate, the
quantization error and the aperture jitter error affect the
performance of the ADC, we consider it as a physically
realizable system, having an analog signal, x, as input
and a signal y as output (figure 8(a)). A measure of the
ADC performance is the SNR at the system’s output,
given by:
E{ y 2 }
SNR = (10)
E{( x − y ) 2 }
where E{y2} is the mean square value of y.
2 2
By definition E{y2}= RMS [ y ] , where RMS [ y ] is
the root mean square value of y.
Therefore, the relation (10) can be written as:
2
 RMS[ y ] 
SNR =   (11)
 RMS[ x − y ] 
The equation (11) in dB becomes:
 RMS[ y ] 
SNR = 20 log (dB) (12)
 RMS[ x − y ] 
We can, furthermore, assume that the ADC consists of 2
subsystems: the sampling subsystem and the
quantization subsystem, as shown in figure 8(b) where
xs is the output of the sampling subsystem.
The SNR has been estimated at the output of the whole
ADC system using a simulation program.
Simulations were made for the following three cases:
• Jitter error and no quantization error.
• Quantization error and no jitter error.
• Quantization error and jitter error.
For the simulation it is assumed that the analog signal at
the input of the ADC system is x=cos(2πfct) and the
number of samples is 104.
Figure 8: Block diagram of an ADC.
A. Jitter error and no quantization error
Keeping the analog input signal frequency fixed at
fc=100 MHz and assuming that the aperture jitter is
constant and equal to 2 ps, we let the sampling rate fs
vary from 200 MHz to 300 MHz in steps of 1 MHz.
Only the aperture jitter error is present in this case, so
the SNR ratio is denoted by SNRaj. We estimate the
SNRaj at the system’s output as a function of fs. From
the diagram of figure 9, it is obvious that the SNRaj is
independent of the sampling rate, thus complying with
the theory (equation (9)).
Keeping the sampling rate fixed at fs=200 MHz and the
aperture jitter error also fixed at taj=2 ps, we let the
frequency of the analog signal fc vary from 1 to 100
MHz in steps of 1 MHz. The estimated SNRaj at the
system’s output is shown in figure 10 as a function of fc.
It is clear that increasing the frequency fc, the SNRaj is
decreasing. In the same figure the plot of
equation (9) is also given where taj equals to 2 ps. The
coincidence of the two curves, representing theory
(ideal) and simulation, is obvious.
Keeping the sampling rate fixed at fs=200 MHz and the
input analog signal also fixed at fc=100 MHz, we let the
aperture jitter taj vary from 1 ps to 100 ps with in steps
of 1ps. The estimated SNRaj at the system’s output is
shown in figure 11 as a function of taj. From the
diagram, we conclude that an increase in aperture jitter
leads to a decrease of SNRaj. In the same figure the plot
of the equation (9) is also given where fc equals to
100 MHz. As we can see, the theoretical curve and the
one of the simulation coincide.
Figure 9: SNRaj versus sampling rate fs of ADC.
Figure 10: SNRaj versus frequency fc of the analog
signal at the input of ADC.
Figure 11: SNRaj versus aperture jitter taj of ADC.
B. Quantization error and no jitter error
It is assumed that the error is due only to quantization
and not to aperture jitter. We estimate the SNR at the
ADC’s output for an input frequency fc and a sampling
frequency fs=2fc, while varying the bit resolution. The
diagram of the SNRq (SNR due to quantization) as a
function of bit resolution is shown in figure 12. As we
can see, the values approach the theoretical (ideal) ones
obtained from equation (7).
For frequencies above the Nyquist rate, the equation (5)
is valid. An increase in the sampling rate leads to an
increase in the SNRq. That happens because the power
of the quantization noise, which is fixed and
independent of the sampling rate, is spread over a wider
bandwidth when the sampling rate is increased.
Figure 12: SNRq versus bit resolution.
C. Quantization error and jitter error
With this simulation we estimate the overall SNR
(SNRt) at the ADC system’s output considering that
both the aperture jitter error and the quantization error
are not negligible. It is assumed that the frequency of
the analog signal at the ADC’s input is equal to 100
MHz and the sampling rate is equal to Nyquist rate,
fs=200 MHz. The SNRt at the output of the ADC is
estimated as a function of the bit resolution for aperture
jitter values taj=0.25, 0.5, 1.0 and 2.0 ps. The
corresponding diagram is shown in figure 13. From this
we conclude that for all 4 curves there are 3 zones.
Specifically, for the lower curve (taj=2.0 ps) the first
zone reaches 9 bits and the SNRt increases linearly with
b (linear zone). The second zone is from 9 to 11 bits,
where SNRt continues to increase but not linearly with b
(transition zone). In the third zone from 11-16 bits
SNRt remains constant and independent of b (constant
zone). In the linear zone SNRq is less than SNRaj, hence
SNRt depends mainly on SNRq (figure 14). In the
transition zone, the SNRt values depend on both SNRaj
and SNRq since in that area the SNRaj values are
comparable with the SNRq values (figure 14). Finally, in
the constant zone SNRt depends exclusively on SNRaj
which is independent of the bit resolution (figure 14).
From these 4 curves it is concluded that as taj increases,
the linear zone becomes narrower and SNRt in the
constant zone decreases. This is expected since, as we
saw earlier, SNRaj is inversely proportional to taj. By
repeating the procedure for frequencies of the analog
signal fc=200, 300, 400 and 500 MHz (figure 15(a), (b),
(c) and (d) respectively) it is concluded that as fc
increases the linear zone become narrower and the SNRt
in the constant zone decreases since the SNRaj is
inversely proportional to fc.
From the above diagrams it is obvious that, for a fixed
frequency fc and sampling at the Nyquist rate, there is a
specific value of bit resolution (b0) above which the
performance of ADC depends only on the aperture jitter
error, which becomes greater than the quantization
error. In this case, an increment in aperture jitter implies
a degradation of the ADC performance. As shown in
figure 14 for this specific value b0 of bit resolution we (a)
have the SNR due to aperture jitter (SNRaj) equal to
SNR due quantization (SNRq). Therefore, from
equations (7) and (9) it is derived that:

 1 
b0 = −2.94 + 3.32 log  (13)
ft 
 c aj 

(b)

Figure 13: SNRt as a function of bit resolution for 4

aperture jitter values and for frequency fc=100 MHz

(c)

Figure 14: SNRt, SNRq, SNRaj as a function of bit

resolution for fc=100 MHz.

(d)

Figure 15: SNRt as a function of bit resolution for 4

aperture jitter values and for frequencies fc (a)200 MHz,
(b)300 MHz, (c)400 MHz, (d)500 MHz.
In Table 1 we give a comparison of aperture jitter values
(taj) requirements for an ideal SDR receiver for systems
operating in UHF, GSM-900, GSM-1800 and UMTS
frequency bands. It is assumed that the desired SNRt is
60 dB and sampling is done at the Nyquist rate.
Therefore it is derived (equation 7) that the minimum
required bit resolution is 10 bits. It is can be seen that
for 3G systems as well as for some 2G systems (e.g.
GSM1800) the required performance is far away from
that of current state-of-the-art ADCs [6].
Table 1
SNR=60dB, f s = 2fc, b=10bits
Frequency band fc (MHz) taj (ps)
UHF 500 0.32
GSM900 900 0.18
GSM1800 1800 0.088
UMTS 2500 0.064
IV. NEW GENERATION ADCs
As previously mentioned, the new technology ADCs (Si
ICs) cannot handle yet RF signals in the band of 3G
mobile communication systems. The highest possible
sampling rates that can be accomplished by the state of
the art ADCs (Si ICs) for bit resolution 8, 10, 12, 14 and
16 bits are shown in figure 16. It can be seen that the
maximum sampling rate is 1.5 GHz at a bit resolution of
8. Based on the Nyquist criterion, the sampling rate
fs=1.5 GHz limits the input analog signal frequency to
750 MHz. According to equation (7), for bit resolution
b=12 bits the SNRq of the ADC will be approximately
24 dB higher than the SNRq of the ADC for b=8. On the
other hand, as it is noticed from figure 16, for higher bit
resolution the accomplished sampling rate decreases.
For the specific bit resolution (b=12) the sampling rate
is only 200 MHz limiting the maximum frequency of
the analog signal to 100 MHz.
Figure 16 depicts also the highest sampling rates usable
by ADCs of 1997 for the same bit resolutions as above.
From the diagram, the increase in the sampling rate of
the ADCs accomplished during the last 4 years becomes
obvious. At this point it is noted that the data given in
this figure concern exclusively ADCs ICs of Si
technology.
Figure 16: State of the Art ADCs (Si ICs) for the years
1997, 2001.
V. CONCLUSIONS
In this paper we present a quantitative analysis of some
basic parameters of an ADC, which is one of the most
important parts of a SDR receiver. Summarizing the
simulation results it is concluded that: An increase in
the sampling rate upgrades the performance of the ADC
and also increases the maximum frequency value of the
analog signal that can be handled. An increase in bit
resolution, which means a decrease in quantization
error, does not always improves the performance of the
ADC. For a specific frequency of input signal and
sampling at Nyquist rate, an increase in bit resolution
upgrades the performance of the ADC only when the
error due to aperture jitter is less than the quantization
error. Furthermore, there is a bit resolution value above
which the performance of ADC improves only by
decreasing the aperture jitter.
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