DS

Vt Vt
CGS S CSB
Vt
Vt
CD
active,
.(|V |-|V |)2
GS TH

.(|V |-|V |)2

GS TH
input
Take in-class notes: shunt-series feedback theory (how to tell shunt/series feedback)
Exercise:
An amplifier has three poles and one right-half-plane (RHP) zero with the following
frequencies: ωp1 = 10 MHz, ωp2 = 400 MHz, and ωp3 = 6 GHz, ωz = 400 MHz. The gain-
crossover point (where small signal gain = 0dB) is 400 MHz.
(1) Plot the frequency response on Bode plot from DC to 6 GHz (both magnitude and phase).
(2) Estimate the small signal gain at DC.
(3) Write down the transfer function that describes the amplifier frequency response (without
feedback).
(4) If the amplifier is used in a feedback loop to function as a unit-gain buffer, what is the
approximate phase margin of the system? (hint: β = 1 for unit-gain configuration)
Now, let’s assume the RHP zero is replaced by a LHP zero at the same frequency of 400 MHz.
(5) Plot the frequency response on Bode plot from DC to 6 GHz (both magnitude and phase).
(6) What is the phase margin of a unit-gain buffer configuration now?

P35-B
C
W

Note:
L Body terminal is needed for every transistor.
NMOS: body terminal connects to P-sub.
PMOS: body terminal connects to N-well.
L
Charge Injection

One major limitation on the accuracy of switched-capacitor circuit is charge injection, which is also called clock
feedthrough. The problem is due to unwanted charges being injected into the circuit when the transistors turn
off. When MOSFET switches turn off, charge errors occur by two mechanisms: 1. Channel charge must flow
out from the channel to the drain and source junctions, which is typically dominant; 2. Charge due to the
overlap capacitance between the gate and the junctions, which is typically smaller.

Consider the following example. When Q3 turns off, half of the charge goes to the inverting-input node of the
opamp, and will cause the voltage across C to change, which eventually leads to an error. The charge injection
due to Q1 and Q2 may cause temporary glitches, but it will have much less effect than the charge injection due
to Q3 if Q2 turns off slightly after Q3. This is why the clock of Q3 is denoted as 1a ( 1 advanced).

Generally speaking, there are two approaches to reduce the effects of charge injection in switched-capacitor
circuits: 1. Realize all switches connected to ground or virtual ground as n-channel switches only; 2. Turn off
the switches near the virtual ground node of the opamps first. This will minimize distortion and gain error as
well as keeping dc offset low.

Here is an example of a first-order switched-capacitor circuit with a clock arrangement to reduce charge-
injection errors:

P 80
P 81
P 82
P 83
P 84
P 85
P 86
P 87