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TL03x, TL03xA

ENHANCED-JFET LOW-POWER LOW-OFFSET


OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

D Direct Upgrades for the TL06x Low-Power D Higher Slew Rate and Bandwidth Without
BiFETs Increased Power Consumption
D Low Power Consumption . . . D Available in TSSOP for Small Form-Factor
6.5 mW/Channel Typ Designs
D On-Chip Offset-Voltage Trimming for
Improved DC Performance
(1.5 mV, TL031A)

description
The TL03x series of JFET-input operational amplifiers offer improved dc and ac characteristics over the TL06x
family of low-power BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision
grades as low as 1.5 mV (TL031A) for greater accuracy in dc-coupled applications. The Texas Instruments
improved BiFET process and optimized designs also yield improved bandwidths and slew rates without
increased power consumption. The TL03x devices are pin-compatible with the TL06x and can be used to
upgrade existing circuits or for optimal performance in new designs.
BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors without
sacrificing the output drive associated with bipolar amplifiers. This higher input impedance makes the TL3x
amplifiers better suited for interfacing with high-impedance sensors or very low-level ac signals. These devices
also feature inherently better ac response than bipolar or CMOS devices having comparable power
consumption.
The TL03x family has been optimized for micropower operation, while improving on the performance of the
TL06x series. Designers requiring significantly faster ac response should consider the Excalibur TLE206x
family of low-power BiFET operational amplifiers.
Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to
observe common-mode input-voltage limits and output swing when operating from a single supply. DC biasing
of the input signal is required, and loads should be terminated to a virtual-ground node at midsupply. The TI
TLE2426 integrated virtual-ground generator is useful when operating BiFET amplifiers from single supplies.
The TL03x devices are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply
systems, the TI LinCMOS families of operational amplifiers (TLC prefix) are recommended. When moving from
BiFET to CMOS amplifiers, particular attention should be paid to slew rate, bandwidth requirements, and output
loading.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of –55°C to 125°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Excalibur is a trademark of Texas Instruments.


PRODUCTION DATA information is current as of publication date. Copyright  2001, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL031x, TL031Ax TL032x, TL032Ax TL034x, TL034Ax


D, JG, OR P PACKAGE D, JG, OR P PACKAGE D, J, N, OR PW PACKAGE
(TOP VIEW) (TOP VIEW) (TOP VIEW)

OFFSET N1 1 8 NC 1OUT 1 8 VCC+ 1OUT 1 14 4OUT


IN– 2 7 VCC+ 1IN– 2 7 2OUT 1IN– 2 13 4IN–
IN+ 3 6 OUT 1IN+ 3 6 2IN– 1IN+ 3 12 4IN+
VCC– 4 5 OFFSET N2 VCC – 4 5 2IN+ VCC+ 4 11 VCC–
2IN+ 5 10 3IN+
2IN– 6 9 3IN–
2OUT 7 8 3OUT
TL031M, TL031AM
FK PACKAGE
(TOP VIEW) TL032M, TL032AM TL034M, TL034AM
OFFSET N1

FK PACKAGE FK PACKAGE
(TOP VIEW) (TOP VIEW)

1OUT

VCC+

1OUT

4OUT
1IN–

4IN–
NC

NC

NC

NC
NC

NC
NC
NC

3 2 1 20 19 3 2 1 20 19 3 2 1 20 19
NC 4 18 NC NC 4 18 NC 1IN+ 4 18 4IN+
IN– 5 17 VCC+ 1IN– 5 17 2OUT NC 5 17 NC
NC 6 16 NC NC 6 16 NC VCC+ 6 16 VCC–
IN+ 7 15 OUT 1IN+ 7 15 2IN– NC 7 15 NC
NC 8 14 NC NC 8 14 NC 2IN+ 8 14 3IN+
9 10 11 12 13 9 10 11 12 13 9 10 11 12 13
VCC–

2IN+
NC

NC

NC

2IN–

3IN–
NC
3OUT
OFFSET N2
NC

NC

NC

2OUT
VCC–

NC – No internal connection

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

AVAILABLE OPTIONS
PACKAGED DEVICES
VIOMAX SMALL CHIP CERAMIC CERAMIC PLASTIC PLASTIC
TA TSSOP
AT 25°C OUTLINE CARRIER DIP DIP DIP DIP
(PW)
(D) (FK) (J) (JG) (N) (P)
TL031ACD TL031ACP
0.8 mV — — — — —
TL032ACD TL032ACP
TL031CD
0°C to 70°C TL031CP
1.5 mV TL032CD — — — TL034ACN —
TL032CP
TL034ACD
4 mV TL034CD — — — TL034CN — TL034CPW
TL031AID TL031AIP
0.8 mV — — — — —
TL032AID TL032AIP
TL031ID
–40°C to 85°C TL031IP
1.5 mV TL032ID — — — TL034AIN —
TL032IP
TL034AID
4 mV TL034ID — — — TL034IN — —
TL031AMD TL031AMFK TL031AMJG TL031AMP
0.8 mV — — —
TL032AMD TL032AMFK TL032AMJG TL032AMP
TL031MD TL031MFK
–55°C to 125°C TL031MJG TL031MP
1.5 mV TL032MD TL032MFK TL034AMJ TL034AMN —
TL032MJG TL032MP
TL034AMD TL034AMFK
4 mV TL034MD TL034MFK TL034MJ — TL034MN — —
The D and PW packages are available taped and reeled and are indicated by adding an R suffix to device type (e.g., TL034CDR or TL034CPWR).

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

symbol (each amplifier)

IN– –
OUT
IN+ +

equivalent schematic (each amplifier)


VCC+

Q5 Q14

Q2
D1
Q3

R4
Q6 Q11
IN+
Q8 Q10 OUT
IN– R7
JF1 JF2
R3 Q17
R6 Q15

C1 Q12
JF3 JF4
Q1 Q4 Q9

See Note A OFFSET N1 R8


OFFSET N2
Q7 Q16
R1 R2 R5 Q13

VCC–
NOTE A: OFFSET N1 and OFFSET N2 are available only on the TL031, TL031A.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage (see Note 1): VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Input voltage, VI (any input) (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V
Input current, II (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 mA
Output current, IO (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±40 mA
Total current into VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
Total current out of VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
Duration of short-circuit current at (or below) 25°C (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Package thermal impedance, θJA (see Note 5): D package (8 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
D package (14 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Lead temperature 1,6 mm (1 /16 inch) from case for 10 seconds: D, N, P, or PW package . . . . . . . . . 260°C
Lead temperature 1,6 mm (1 /16 inch) from case for 60 seconds: J or JG package . . . . . . . . . . . . . . . 300°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–.
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
5. The package thermal impedance is calculated in accordance with JESD 51-7.

DISSIPATION RATING TABLE


TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C TA = 125°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING POWER RATING POWER RATING
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW

recommended operating conditions


C SUFFIX I SUFFIX M SUFFIX
UNIT
MIN MAX MIN MAX MIN MAX
VCC± Supply voltage ±5 ±15 ±5 ±15 ±5 ±15 V
VCC± = ±5 V –1.5 4 –1.5 4 –1.5 4
VIC Common mode input voltage
Common-mode V
VCC± = ±15 V –11.5 14 –11.5 14 –11.5 14
TA Operating free-air temperature 0 70 –40 85 –55 125 °C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL031C and TL031AC electrical characteristics at specified free-air temperature


TL031C, TL031AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.54 3.5 0.5 1.5
VO = 0, TL031C
Full range† 4.5 2.5
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.41 2.8 0.34 0.8
TL031AC
Full range† 3.8 1.8
25°C to
VO = 0, TL031C 71
7.1 59
5.9
70°C
aV Temperature coefficient of
VIC =0,
0 µV/°C
IO input offset voltage
RS = 50 Ω 25°C to
TL031AC 71
7.1 59
5.9 25
70°C
VO = 0,
Input offset voltage
VIC =0, 25°C 0.04 0.04 µV/mo
long-term drift‡
RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100
IIO Input offset current pA
See Figure 5 70°C 9 200 12 200
VO = 0,, VIC = 0 25°C 2 200 2 200
IIB Input bias current pA
See Figure 5 70°C 50 400 80 400
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14
25°C 3 4.3 13 14
Maximum
M i positive
iti peak
k
VOM+ RL = 10 kΩ 0°C 3 4.2 13 14 V
out ut voltage swing
output
70°C 3 4.3 13 14
25°C –3 –4.2 –12.5 –13.9
Maximum
M i negative
ti peak
k
VOM– RL = 10 kΩ 0°C –3 –4.1 –12.5 –13.9 V
output
out ut voltage swing
70°C –3 –4.2 –12.5 –14
25°C 4 12 5 14.3
Large-signal
L i l diff
differential
ti l
AVD RL = 10 kΩ 0°C 3 11.1 4 13.5 V/mV
voltage am lification§
amplification
70°C 4 13.3 5 15.2
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 4 pF
25°C 70 87 75 94
Common-mode
C d VIC = VICRmin,
i
CMRR 0°C 70 87 75 94 dB
rejection ratio 0, RS = 50 Ω
VO = 0
70°C 70 87 75 94

Supply-voltage
Su ly voltage 25°C 75 96 75 96
kSVR rejection ratio VO = 0, RS = 50 Ω 0°C 75 96 75 96 dB
( VCC±/∆V
(∆V / VIO) 70°C 75 96 75 96
† Full range is 0°C to 70°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL031C and TL031AC electrical characteristics at specified free-air temperature (continued)


TL031C, TL031AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 1.9 2.5 6.5 8.4
PD Total power dissipation VO = 0, No load 0°C 1.8 2.5 6.3 8.4 mW
70°C 1.9 2.5 6.3 8.4
25°C 192 250 217 280
ICC Supply current VO = 0, No load 0°C 184 250 211 280 µA
70°C 189 250 210 280

TL031C and TL031AC operating characteristics at specified free-air temperature


TL031C, TL031AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ 0°C 1.8 1 2.6 V/µs
unity gain† See Figure 1
70°C 2.2 1.5 3.2
25°C 3.9 1.5 5.1
Negative
N ti slew
l rate
t att RL = 10 kΩ,
kΩ CL = 100 pF
F
SR– 0°C 3.7 1.5 5 V/µs
unity gain† See Figure 1
70°C 4 1.5 5

VI(PP) = ±10 mV, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF 0°C 134 127 ns
See Figures 1 and 2 70°C 150 142

VI(PP) = ±10 mV, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF 0°C 134 127 ns
See Figure 1 70°C 150 142

VI(PP) = ±10 mV, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF 0°C 10% 4%
See Figures 1 and 2 70°C 12% 6%
f = 10 Hz 61 61
TL031C 25°C
Equivalent
q input RS = 20 Ω f = 1 kHz 41 41
Vn nV/√H
nV/√Hz
noise voltage See Figure 3 f = 10 Hz 61 61
TL031AC 25°C
f = 1 kHz 41 41 60
Equivalent input noise
In f = 1 kHz 25°C 0.003 0.003 pA/√Hz
current

VI = 10 mV 25°C 1 1.1
B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF 0°C 1 1.1 MHz
See Figure 4 70°C 1 1

VI = 10 mV 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF 0°C 61° 65°
S Fi
See Figure 4 70°C 60° 64°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL031I and TL031AI electrical characteristics at specified free-air temperature


TL031I, TL031AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.54 3.5 0.5 1.5
VO = 0, TL031I
Full range† 5.3 3.3
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.41 2.8 0.34 0.8
TL031AI
Full range† 4.6 2.6
25°C to
Temperature coefficient VO = 0, TL031I 65
6.5 62
6.2
85°C
aV of VIC = 0
0, µV/°C
IO
input
in ut offset voltage RS = 50 Ω 25°C to
TL031AI 65
6.5 62
6.2 25
85°C
VO = 0,
Input offset voltage
g
VIC = 0
0, 25°C 0 04
0.04 0 04
0.04 µV/mo
long-term drift‡
RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100 pA
IIO Input offset current
See Figure 5 85°C 0.02 0.45 0.02 0.45 nA
VO = 0,, VIC = 0 25°C 2 200 2 200 pA
IIB Input bias current
See Figure 5 85°C 0.2 0.9 0.2 0.9 nA
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14
25°C 3 4.3 13 14
Maximum
M i positive
iti peak
k
VOM+ RL = 10 kΩ –40°C 3 4.1 13 14 V
out ut voltage swing
output
85°C 3 4.4 13 14
25°C –3 –4.2 –12.5 –13.9
M i
Maximum ti peak
negative k
VOM– RL = 10 kΩ –40°C –3 –4.1 –12.5 –13.8 V
out ut voltage swing
output
85°C –3 –4.2 –12.5 –14
25°C 4 12 5 14.3
Large-signal
L i l diff
differential
ti l
AVD RL = 10 kΩ –40°C 3 8.4 4 11.6 V/mV
voltage am lification§
amplification
85°C 4 13.5 5 15.3
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 4 pF
25°C 70 87 75 94
Common-mode
C d VIC = VICRmin,
i
CMRR –40°C 70 87 75 94 dB
rejection ratio 0, RS = 50 Ω
VO = 0
85°C 70 87 75 94

Supply-voltage
Su ly voltage 25°C 75 96 75 96
kSVR rejection ratio VO = 0, RS = 50 Ω –40°C 75 96 75 96 dB
( VCC±/∆V
(∆V / VIO) 85°C 75 96 75 96
† Full range is –40°C to 85°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL031I and TL031AI electrical characteristics at specified free-air temperature (continued)


TL031I, TL031AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 1.9 2.5 6.5 8.4
PD Total power dissipation VO = 0, No load –40°C 1.4 2.5 5.4 8.4 mW
85°C 1.9 2.5 6.2 8.4
25°C 192 250 217 280
ICC Supply current VO = 0, No load –40°C 144 250 181 280 µA
85°C 189 250 207 280

TL031I and TL031AI operating characteristics at specified free-air temperature


TL031I, TL031AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ –40°C 1.6 1 2.1 V/µs
unity gain† See Figure 1
85°C 2.3 1.5 3.3
25°C 3.9 1.5 5.1
N ti slew
Negative l t att unity
rate it kΩ CL = 100 pF
RL = 10 kΩ, F
SR– –40°C 3.3 1.5 4.8 V/µs
gain† See Figure 1
85°C 4.1 1.5 4.9

VI(PP) = ±10 mV, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF –40°C 132 123 ns
See Figures 1 and 2 85°C 154 146

VI(PP) = ±10 mV, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF –40°C 132 123 ns
See Figure 1 85°C 154 146

VI(PP) = ±10 mV, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF –40°C 12% 5%
See Figures 1 and 2 85°C 13% 7%
f = 10 Hz 61 61
TL031I 25°C
Equivalent
RS = 20 Ω f = 1 kHz 41 41
Vn input nV/√H
nV/√Hz
See Figure 3 f = 10 Hz 61 61
noise voltage TL031AI 25°C
f = 1 kHz 41 41 60
Equivalent
q input noise
In f = 1 kHz 25°C 0 003
0.003 0 003
0.003 pA/√H
pA/√Hz
current

VI = 10 mV 25°C 1 1.1
B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF –40°C 1 1.1 MHz
See Figure 4 85°C 0.9 1

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF –40°C 60° 65°
S Fi
See Figure 4 85°C 60° 64°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL031M and TL031AM electrical characteristics at specified free-air temperature


TL031M, TL031AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.54 3.5 0.5 1.5
VO = 0, TL031M
Full range† 6.5 4.5
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.41 2.8 0.34 0.8
TL031AM
Full range† 5.8 3.8
25°C to
VO = 0, TL031M 5.1 4.3
Temperature coefficient of 125°C
aV VIC = 0
0, µV/°C
IO input offset voltage RS = 50 Ω 25°C to
TL031AM 5.1 4.3
125°C
VO = 0,
Input offset voltage
VIC = 0, 25°C 0.04 0.04 µV/mo
long-term drift‡
RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100 pA
IIO Input offset current
See Figure 5 125°C 0.2 10 0.2 10 nA
VO = 0,, VIC = 0 25°C 2 200 2 200 pA
IIB Input bias current
See Figure 5 125°C 7 20 8 20 nA
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14
25°C 3 4.3 13 14
Maximum
M i positive
iti peak
k
VOM+ RL = 10 kΩ –55°C 3 4.1 13 14 V
out ut voltage swing
output
125°C 3 4.4 13 14
25°C –3 –4.2 –12.5 –13.9
M i
Maximum ti peak
negative k
VOM– RL = 10 kΩ –55°C –3 –4 –12.5 –13.8 V
out ut voltage swing
output
125°C –3 –4.3 –12.5 –14
25°C 4 12 5 14.3
Large-signal
L i l diff
differential
ti l
AVD RL = 10 kΩ –55°C 3 7.1 4 10.4 V/mV
voltage am lification§
amplification
125°C 3 12.9 4 15
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 4 pF
25°C 70 87 75 94
Common-mode
C d VIC = VICRmin,
i
CMRR –55°C 70 87 70 94 dB
rejection ratio 0, RS = 50 Ω
VO = 0
125°C 70 87 70 94

Supply-voltage
Su ly voltage 25°C 75 96 75 96
kSVR rejection ratio VO = 0, RS = 50 Ω –55°C 75 96 75 95 dB
(∆VCC±/∆VIO) 125°C 75 96 75 96
25°C 1.9 2.5 6.5 8.4
PD Total power dissipation VO = 0, No load –55°C 1.1 2.5 4.7 8.4 mW
125°C 1.8 2.5 5.8 8.4
† Full range is –55°C to 125°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL031M and TL031AM electrical characteristics at specified free-air temperature (continued)


TL031M, TL031AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 192 250 217 280
ICC Supply current VO = 0, No load –55°C 114 250 156 280 µA
125°C 178 250 197 280

TL031M and TL031AM operating characteristics at specified free-air temperature


TL031M, TL031AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ –55°C 1.4 1 1.9 V/µs
unity gain† See Figure 1
125°C 2.4 1 3.5
25°C 3.9 1.5 5.1
Negative
N ti slew
l rate
t att RL = 10 kΩ,
kΩ CL = 100 pF
F
SR– –55°C 3.2 1 4.6 V/µs
unity gain† See Figure 1
125°C 4.1 1 4.7

VI(PP) = ±10 mV, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF –55°C 142 123 ns
See Figures 1 and 2 125°C 166 158

VI(PP) = ±10 mV, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF –55°C 142 123 ns
See Figure 1 125°C 166 158

VI(PP) = ±10 mV, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF –55°C 16% 6%
See Figures 1 and 2 125°C 14% 8%
f = 10 Hz 61 61
TL031M 25°C
Equivalent
q input RS = 20 Ω f = 1 kHz 41 41
Vn nV/√H
nV/√Hz
noise voltage See Figure 3 f = 10 Hz 61 61
TL031AM 25°C
f = 1 kHz 41 41
Equivalent
q input noise
In f = 1 kHz 25°C 0 003
0.003 0 003
0.003 pA/√H
pA/√Hz
current

VI = 10 mV, 25°C 1 1.1


B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF –55°C 1 1.1 MHz
See Figure 4 125°C 0.9 0.9

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF –55°C 57° 64°
S Fi
See Figure 4 125°C 59° 62°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL032C and TL032AC electrical characteristics at specified free-air temperature


TL032C, TL032AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.69 3.5 0.57 1.5
VO = 0, TL032C
Full range† 4.5 2.5
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.53 2.8 0.39 0.8
TL032AC
Full range† 3.8 1.8
25°C to
Temperature VO = 0, TL032C 11.5 10.8
aV 70°C
IO coefficient of input VIC = 0
0, µV/°C
offset voltage RS = 50 Ω 25°C to
TL032AC 11.5 10.8 25
70°C
VO = 0,
Input offset voltage
VIC = 0, 25°C 0.04 0.04 µV/mo
long-term drift‡
RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100
IIO Input offset current pA
See Figure 5 70°C 9 200 12 200
VO = 0,, VIC = 0 25°C 2 200 2 200
IIB Input bias current pA
See Figure 5 70°C 50 400 80 400
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14

Maximum positive
ositive 25°C 3 4.3 13 14
VOM+ peak output voltage RL = 10 kΩ 0°C 3 4.2 13 14 V
swing 70°C 3 4.3 13 14

Maximum negative 25°C –3 –4.2 –12.5 –13.9


VOM– peak output voltage RL = 10 kΩ 0°C –3 –4.1 –12.5 –13.9 V
swing 70°C –3 –4.2 –12.5 –14
25°C 4 12 5 14.3
Large signal
Large-signal
AVD differential voltage RL = 10 kΩ 0°C 3 11.1 4 13.5 V/mV
amplification§ 70°C 4 13.3 5 15.2
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 14 pF
25°C 70 87 75 94
Common-mode
C d VIC = VICRmin,
i
CMRR 0°C 70 87 75 94 dB
rejection ratio 0, RS = 50 Ω
VO = 0
70°C 70 87 75 94

Supply-voltage
Su ly voltage 25°C 75 96 75 96
VCC± = ±5 V to ±15 V,
V
kSVR rejection ratio 0°C 75 96 75 96 dB
VO = 0, RS = 50 Ω
( VCC±//∆V
(∆V VIO) 70°C 75 96 75 96
† Full range is 0°C to 70°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL032C and TL032AC electrical characteristics at specified free-air temperature (continued)


TL032C, TL032AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 3.8 5 13 17
Total
T t l power di
dissipation
i ti
PD VO = 0, No load 0°C 3.7 5 12.7 17 mW
(two amplifiers)
am lifiers)
70°C 3.8 5 12.6 17
Supplyy current 0°C 368 500 422 560
ICC VO = 0
0, No load µA
(two amplifiers) 70°C 378 500 420 560
VO1/VO2 Crosstalk attenuation AVD = 100 dB 25°C 120 120 dB

TL032C and TL032AC operating characteristics at specified free-air temperature


TL032C, TL032AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 1.2 1.5 2.9
Positive
P iti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ 0°C 1.8 1 2.6 V/µs
gain† See Figure 1
70°C 2.2 1.5 3.2
25°C 3.9 1.5 5.1
N ti slew
Negative l t att unity
rate it kΩ CL = 100 pF
RL = 10 kΩ, F
SR– 0°C 3.7 1.5 5 V/µs
gain† See Figure 1
70°C 4 1.5 5

VI(PP) = ±10 V, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF 0°C 134 127 ns
See Figures 1 and 2 70°C 150 142

VI(PP) = ±10 V, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF 0°C 134 127 ns
See Figures 1 and 2 70°C 150 142

VI(PP) = ±10 V, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF 0°C 10% 4%
See Figures 1 and 2 70°C 12% 6%
f = 10 Hz 49 49
TL032C 25°C
Equivalent
q input RS = 20 Ω f = 1 kHz 41 41
Vn √
nV/√Hz
noise voltage See Figure 3 f = 10 Hz 49 49
TL032AC 25°C
f = 1 kHz 41 41 60
In Equivalent input noise current f = 1 kHz 25°C 0.003 0.003 pA/√Hz

VI = 10 mV, 25°C 1 1.1


B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF 0°C 1 1.1 MHz
See Figure 4 70°C 1 1

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF 0°C 61° 65°
S Fi
See Figure 4 70°C 60° 64°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL032I and TL032AI electrical characteristics at specified free-air temperature


TL032I, TL032AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.69 3.5 0.57 1.5
VO = 0, TL032I
Full range† 5.3 3.3
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.53 2.8 0.39 0.8
TL032AI
Full range† 4.6 2.6
25°C to
Temperature VO = 0, TL032I 11.4 10.8
85°C
aV coefficient of input VIC = 0
0, µV/°C
IO
offset voltage RS = 50 Ω 25°C to
TL032AI 11.4 10.8 25
85°C
VO = 0,
Input offset voltage
VIC = 0, 25°C 0.04 0.04 µV/mo
long-term drift‡
RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100 pA
IIO Input offset current
See Figure 5 85°C 0.02 0.45 0.02 0.45 nA
VO = 0,, VIC = 0 25°C 2 200 2 200 pA
IIB Input bias current
See Figure 5 85°C 0.2 0.9 0.3 0.9 nA
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14

Maximum positive
ositive 25°C 3 4.3 13 14
VOM+ peak output voltage RL = 10 kΩ –40°C 3 4.2 13 14 V
swing 85°C 3 4.4 13 14

Maximum negative 25°C –3 –4.2 –12.5 –13.9


VOM– peak output voltage RL = 10 kΩ –40°C –3 –4.1 –12.5 –13.8 V
swing 85°C –3 –4.2 –12.5 –14
Large-signal
g g differential –40°C 3 8.4 4 11.6
AVD RL = 10 kΩ V/mV
voltage amplification§ 85°C 4 13.5 5 15.3
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 4 pF
25°C 70 87 75 94
Common-mode
C d VIC = VICRmin,
i
CMRR –40°C 70 87 75 94 dB
rejection ratio 0, RS = 50 Ω
VO = 0
85°C 70 87 75 94

Supply-voltage
Su ly voltage 25°C 75 96 75 96
VCC± = ±5 V to ±15 V,
V
kSVR rejection ratio –40°C 75 96 75 96 dB
VO = 0, RS = 50 Ω
( VCC±/∆V
(∆V / VIO) 85°C 75 96 75 96
† Full range is –40°C to 85°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL032I and TL032AI electrical characteristics at specified free-air temperature (continued)


TL032I, TL032AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX

Total power
ower 25°C 3.8 5 13 17
PD dissipation VO = 0, No load –40°C 2.9 5 10.9 17 mW
(two amplifiers) 85°C 3.7 5 12.4 17
25°C 384 500 434 560
Supply
S l currentt
ICC VO = 0, No load –40°C 288 500 362 560 µA
(two amplifiers)
am lifiers)
85°C 372 500 414 560
Crosstalk
VO1/VO2 AVD = 100 dB 25°C 120 120 dB
attenuation

TL032I and TL032AI operating characteristics at specified free-air temperature


TL032I, TL032AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att unity
it
SR+ RL = 10 kΩ, CL = 100 pF –40°C 1.6 1 2.1 V/µs
gain†
85°C 2.3 1.5 3.3
25°C 3.9 1.5 5.1
Negative
N ti slew
l rate
t att unity
it
SR– RL = 10 kΩ, CL = 100 pF –40°C 3.3 1.5 4.8 V/µs
gain†
85°C 4.1 1.5 4.9

VI(PP) = ±10 V, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF –40°C 132 123 ns
See Figures 1 and 2 85°C 154 146

VI(PP) = ±10 V, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF –40°C 132 123 ns
See Figure 1 85°C 154 146

VI(PP) = ±10 V, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF –40°C 12% 5%
See Figures 1 and 2 85°C 13% 7%
f = 10 Hz 49 49
TL032I 25°C
Equivalent
q input RS = 20 Ω f = 1 kHz 41 41
Vn √
nV/√Hz
noise voltage See Figure 3 f = 10 Hz 49 49
TL032AI 25°C
f = 1 kHz 41 41 60
Equivalent input noise
In f = 1 kHz 25°C 0.003 0.003 pA/√Hz
current

VI = 10 mV, 25°C 1 1.1


B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF –40°C 1 1.1 MHz
See Figure 4 85°C 0.9 1

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF –40°C 61° 65°
S Fi
See Figure 4 85°C 60° 64°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL032M and TL032AM electrical characteristics at specified free-air temperature


TL032M, TL032AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.69 3.5 0.57 1.5
VO = 0, TL032M
Full range† 6.5 4.5
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.53 2.8 0.39 0.8
TL032AM
Full range† 5.8 3.8
25°C to
VO = 0, TL032M 9.7 9.7
Temperature coefficient 125°C
aV VIC = 0
0, µV/°C
IO of input offset voltage 25°C to
RS = 50 Ω TL032AM 9.7 9.7
125°C
VO = 0,
Input offset voltage
VIC = 0, 25°C 0.04 0.04 µV/mo
long-term drift‡
RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100 pA
IIO Input offset current
See Figure 5 125°C 0.2 10 0.2 10 nA
VO = 0,, VIC = 0 25°C 2 200 2 200 pA
IIB Input bias current
See Figure 5 125°C 7 20 8 20 nA
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14
25°C 3 4.3 13 14
Maximum
M i positive
iti peak
k
VOM+ RL = 10 kΩ –55°C 3 4.1 13 14 V
out ut voltage swing
output
125°C 3 4.4 13 14
25°C –3 –4.2 –12.5 –13.9
Maximum
M i negative
ti peak
k
VOM– RL = 10 kΩ –55°C –3 –4 –12.5 –13.8 V
out ut voltage swing
output
125°C –3 –4.3 –12.5 –14
25°C 4 12 5 14.3
Large-signal
L i l diff
differential
ti l
AVD RL = 10 kΩ –55°C 3 7.1 4 10.4 V/mV
voltage am lification§
amplification
125°C 3 12.9 4 15
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 4 pF
25°C 70 87 75 94
Common-mode
C d rejection
j ti VIC = VICRmin,
i
CMRR –55°C 70 87 70 94 dB
ratio 0, RS = 50 Ω
VO = 0
125°C 70 87 70 94

Su ly voltage
Supply-voltage 25°C 75 96 75 96
VCC± = ±5 V to ±15 V,
V
kSVR rejection ratio –55°C 75 95 75 95 dB
VO = 0, RS = 50 Ω
( VCC±/∆V
(∆V / VIO) 125°C 75 96 75 96
† Full range is –55°C to 125°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = 2.3 V; at VCC± = ±15 V, VO = ±10 V

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL032M and TL032AM electrical characteristics at specified free-air temperature (continued)


TL032M, TL032AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX

Total power
ower dissi
dissipation
ation 25°C 3.8 5 13 17
PD (two amplifiers) VO = 0, No load –55°C 2.3 5 9.4 17 mW
VO = 0, 125°C 3.6 5 11.8 17
25°C 384 500 434 560
Supply
S l currentt
ICC VO = 0, No load –55°C 228 500 312 560 µA
(two amplifiers)
am lifiers)
125°C 356 500 394 560
VO1/VO2 Crosstalk attenuation AVD = 100 dB 25°C 120 120 dB

TL032M and TL032AM operating characteristics at specified free-air temperature


TL032M, TL032AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ –55°C 1.4 1 1.9 V/µs
gain† See and Figure 1
125°C 2.4 1 3.5
25°C 3.9 1.5 5.1
Negative
N ti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR– –55°C 3.2 1 4.6 V/µs
gain† See and Figure 1
125°C 4.1 1 4.7

VI(PP) = ±10 V, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF –55°C 142 123 ns
See Figures 1 and 2 125°C 166 58

VI(PP) = ±10 V, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF –55°C 142 123 ns
See Figure 1 125°C 166 158

VI(PP) = ±10 V, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF –55°C 16% 6%
See Figures 1 and 2 125°C 14% 8%
f = 10 Hz 49 49
Equivalent TL032M 25°C
RS = 20 Ω f = 1 kHz 41 41
Vn input noise √
nV/√Hz
See Figure 3 f = 10 Hz 49 49
voltage TL032AM 25°C
f = 1 kHz 41 41
Equivalent input noise
In f = 1 kHz 25°C 0.003 0.003 pA/√Hz
current

VI = 10 mV, 25°C 1 1.1


B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF –55°C 1 1.1 MHz
See Figure 4 125°C 0.9 0.9

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF –55°C 57° 64°
S Fi
See Figure 4 125°C 59° 62°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 17


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL034C and TL034AC electrical characteristics at specified free-air temperature


TL034C, TL034AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.91 6 0.79 4
VO = 0, TL034C
Full range† 8.2 6.2
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.7 3.5 0.58 1.5
TL034AC
Full range† 5.7 3.7
25°C to
VO = 0, TL034C 11.6 12
Temperature coefficient 70°C
aV VIC = 0
0, µV/°C
IO of input offset voltage 25°C to
RS = 50 Ω TL034AC 11.6 12 25
70°C

Input offset voltage VO = 0,


VIC = 0, 25°C 0.04 0.04 µV/mo
long-term drift‡ RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100
IIO Input offset current pA
See Figure 5 70°C 9 200 12 200
VO = 0,, VIC = 0 25°C 2 200 2 200
IIB Input bias current pA
See Figure 5 70°C 50 400 80 400
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14
25°C 3 4.3 13 14
Maximum
M i positive
iti peak
k
VOM+ RL = 10 kΩ 0°C 3 4.2 13 14 V
out ut voltage swing
output
70°C 3 4.3 13 14
25°C –3 –4.2 –12.5 –13.9
Maximum
M i negative
ti peak
k
VOM– RL = 10 kΩ 0°C –3 –4.1 –12.5 –13.9 V
out ut voltage swing
output
70°C –3 –4.2 –12.5 –14
25°C 4 12 5 14.3
Large-signal
L i l diff
differential
ti l
AVD RL = 10 kΩ 0°C 3 11.1 4 13.5 V/mV
voltage am lification§
amplification
70°C 4 13.3 5 15.2
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 14 pF

VIC = VICRmin, 25°C 70 87 75 94


Common-mode
C d
CMRR VO = 0, 0°C 70 87 75 94 dB
rejection ratio
RS = 50 Ω 70°C 70 87 75 94

Su ly voltage
Supply-voltage 25°C 75 96 75 96
kSVR rejection ratio VO = 0, RS = 50 Ω 0°C 75 96 75 96 dB
( VCC±//∆V
(∆V VIO) 70°C 75 96 75 96
† Full range is 0°C to 70°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL034C and TL034AC electrical characteristics at specified free-air temperature (continued)


TL034C, TL034AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 7.7 10 26 34
Total
T t l power di
dissipation
i ti
PD VO = 0, No load 0°C 7.4 10 25.3 34 mW
(two amplifiers)
am lifiers)
70°C 7.6 10 25.2 34
25°C 0.77 1 0.87 1.12
Supply
S l currentt (four
(f
ICC VO = 0, No load 0°C 0.74 1 0.85 1.12 mA
am lifiers)
amplifiers)
70°C 0.76 1 0.84 1.12
VO1/VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB

TL034C and TL034AC operating characteristics at specified free-air temperature


TL034C, TL034AC
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ 0°C 1.8 1 2.6 V/µs
gain† See Figure 1
70°C 2.2 1.5 3.2
25°C 3.9 1.5 5.1
Negative
N ti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR– 0°C 3.7 1.5 5 V/µs
gain† See Figure 1
70°C 4 1.5 5

VI(PP) = ±10 V, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF 0°C 134 127 ns
See Figures 1 and 2 70°C 150 142

VI(PP) = ±10 V, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF 0°C 134 127 ns
See Figure 1 70°C 150 142

VI(PP) = ±10 V, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF 0°C 10% 4%
See Figures 1 and 2 70°C 12% 6%
f = 10 Hz 83 83
TL034C 25°C
Equivalent
q input RS = 20 Ω f = 1 kHz 43 43
Vn √
nV/√Hz
noise voltage See Figure 3 f = 10 Hz 83 83
TL034AC 25°C
f = 1 kHz 43 43 60
In Equivalent input noise current f = 1 kHz 25°C 0.003 0.003 pA/√Hz

VI = 10 mV 25°C 1 1.1
B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF 0°C 1 1.1 MHz
See Figure 4 70°C 1 1

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF 0°C 61° 65°
S Fi
See Figure 4
70°C 60° 64°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 19


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL034I and TL034AI electrical characteristics at specified free-air temperature


TL034I, TL034AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.91 3.6 0.79 4
VO = 0, TL034I
Full range† 9.3 7.3
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.7 3.5 0.58 1.5
TL034AI
Full range† 6.8 4.8
25°C to
VO = 0, VIC TL034I 11.5 11.6
Temperature coefficient 85°C
aV = 0,
0 µV/°C
IO of input offset voltage 25°C to
RS = 50 Ω TL034AI 11.5 11.6 25
85°C
VO = 0,
Input offset voltage
VIC = 0, 25°C 0.04 0.04 µV/mo
long-term drift‡ RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100 pA
IIO Input offset current
See Figure 5 85°C 0.02 0.45 0.02 0.45 nA
VO = 0,, VIC = 0 25°C 2 200 2 200 pA
IIB Input bias current
See Figure 5 85°C 0.2 0.9 0.3 0.9 nA
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14
25°C 3 4.3 13 14
Maximum
M i positive
iti peak
k
VOM+ RL = 10 kΩ –40°C 3 4.1 13 14 V
out ut voltage swing
output
85°C 3 4.4 13 14

Maximum negative 25°C –3 –4.2 –12.5 –13.9


VOM– peak RL = 10 kΩ –40°C –3 –4.1 –12.5 –13.8 V
output voltage swing 85°C –3 –4.2 –12.5 –14
Large-signal
g g differential –40°C 4 12 5 14.3
AVD RL = 10 kΩ V/mV
voltage amplification§ 85°C 3 8.4 4 11.6
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 4 pF

VIC = VICRmin, 25°C 70 87 75 94


Common-mode
C d
CMRR VO = 0, –40°C 70 87 75 94 dB
rejection ratio
RS = 50 Ω 85°C 70 87 75 94

Supply-voltage
Su ly voltage 25°C 75 96 75 96
kSVR rejection ratio VO = 0, RS = 50 Ω –40°C 75 96 75 96 dB
( VCC±/ ∆V
(∆V VIO) 85°C 75 96 75 96
† Full range is –40°C to 85°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V

20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL034I and TL034AI electrical characteristics at specified free-air temperature (continued)


TL034I, TL034AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 7.7 10 26 34
Total
T t l power di
dissipation
i ti
PD VO = 0, No load –40°C 5.8 10 21.7 34 mW
(four amplifiers)
am lifiers)
85°C 7.4 10 24.8 34
25°C 0.77 1 0.87 1.12
Supply
S l currentt
ICC VO = 0, No load –40°C 0.58 1 0.72 1.12 mA
(four amplifiers)
am lifiers)
85°C 0.74 1 0.83 1.12
VO1/VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB

TL034I and TL034AI operating characteristics


TL034I, TL034AI
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ –40°C 1.6 1 2.1 V/µs
gain† See Figure 1
85°C 2.3 1.5 3.3
25°C 3.9 1.5 5.1
Negative
N ti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR– –40°C 3.3 1.5 4.8 V/µs
gain† See Figure 1
85°C 4.1 1.5 4.9

VI(PP) = ±10 V, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF –40°C 132 123 ns
See Figures 1 and 2 85°C 154 146

VI(PP) = ±10 V, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF –40°C 132 123 ns
See Figures 1 and 2 85°C 154 146

VI(PP) = ±10 V, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF –40°C 12% 5%
See Figures 1 and 2 85°C 13% 7%
f = 10 Hz 83 83
TL034I 25°C
Equivalent
q input RS = 20 Ω f = 1 kHz 43 43
Vn √
nV/√Hz
noise voltage See Figure 3 f = 10 Hz 83 83
TL034AI 25°C
f = 1 kHz 43 43 60
Equivalent input noise
In f = 1 kHz 25°C 0.003 0.003 pA/√Hz
current

VI = 10 mV, 25°C 1 1.1


B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF –40°C 1 1.1 MHz
See Figure 4 85°C 0.9 1

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF –40°C 61° 65°
S Fi
See Figure 4 85°C 60° 64°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 21


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL034M and TL034AM electrical characteristics at specified free-air temperature


TL034M, TL034AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.91 3.6 0.78 4
VO = 0, TL034M
Full range† 11 9
VIO Input offset voltage VIC = 0
0, mV
RS = 50 Ω 25°C 0.7 3.5 0.58 1.5
TL034AM
Full range† 8.5 6.5
25°C to
VO = 0, TL034M 10.6 10.9
Temperature coefficient of 125°C
aV VIC = 0
0, µV/°C
IO input offset voltage 25°C to
RS = 50 Ω TL034AM 10.6 10.9
125°C
VO = 0,
Input offset voltage
VIC = 0, 25°C 0.04 0.04 µV/mo
long-term drift‡ RS = 50 Ω
VO = 0,, VIC = 0 25°C 1 100 1 100 pA
IIO Input offset current
See Figure 5 125°C 0.2 10 0.2 10 nA
VO = 0,, VIC = 0 25°C 2 200 2 200 pA
IIB Input bias current
See Figure 5 125°C 7 20 8 20 nA
–1.5 –3.4 –11.5 –13.4
25°C
Common-mode input to 4 to 5.4 to 14 to 15.4
VICR V
voltage range –1.5 –11.5
Full range†
to 4 to 14
25°C 3 4.3 13 14
Maximum
M i positive
iti peak
k
VOM+ RL = 10 kΩ –55°C 3 4.1 13 14 V
out ut voltage swing
output
125°C 3 4.4 13 14
25°C –3 –4.2 –12.5 –13.9
Maximum
M i negative
ti peak
k
VOM– RL = 10 kΩ –55°C –3 –4 –12.5 –13.8 V
out ut voltage swing
output
125°C –3 –4.3 –12.5 –14
25°C 4 12 5 14.3
Large-signal
L i l diff
differential
ti l
AVD RL = 10 kΩ –55°C 3 7.1 4 10.4 V/mV
voltage am lification§
amplification
125°C 3 12.9 4 15
ri Input resistance 25°C 1012 1012 Ω
ci Input capacitance 25°C 5 4 pF
25°C 70 87 75 94
Common-mode
C d VIC = VICRmin,
i
CMRR –55°C 70 87 70 94 dB
rejection ratio 0, RS = 50 Ω
VO = 0
125°C 70 87 70 94

Su ly voltage
Supply-voltage 25°C 75 96 75 96
kSVR rejection ratio VO = 0, RS = 50 Ω –55°C 75 95 75 95 dB
( VCC±/∆V
(∆V / VIO) 125°C 75 96 75 96
† Full range is –55°C to 125°C.
‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
§ At VCC± = ±5 V, VO = ±2.3 V; at VCC± = ±15 V, VO = ±10 V

22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TL034M and TL034AM electrical characteristics at specified free-air temperature (continued)


TL034M, TL034AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 7.7 10 26 34
Total
T t l power di
dissipation
i ti
PD VO = 0, No load –55°C 4.6 12 18.7 45 mW
(two amplifiers)
am lifiers)
125°C 7.1 12 23.6 45
25°C 0.77 1 0.87 1.12
Supply
S l currentt
ICC VO = 0, No load –55°C 0.46 1.2 0.62 1.5 mA
(two amplifiers)
am lifiers)
125°C 0.71 1.2 0.79 1.5
VO1/VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB

TL034M and TL034AM operating characteristics at specified free-air temperature


TL034M, TL034AM
PARAMETER TEST CONDITIONS TA VCC± = ±5 V VCC± = ±15 V UNIT
MIN TYP MAX MIN TYP MAX
25°C 2 1.5 2.9
Positive
P iti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR+ –55°C 1.4 1 1.9 V/µs
gain† See Figure 1
125°C 2.4 1 3.5
25°C 3.9 1.5 5.1
Negative
N ti slew
l rate
t att unity
it RL = 10 kΩ,
kΩ CL = 100 pF
F
SR– –55°C 3.2 1 4.6 V/µs
gain† See Figure 1
125°C 4.1 1 4.7

VI(PP) = ±10 V, 25°C 138 132


tr Rise time RL = 10 kΩ, CL = 100 pF –55°C 142 123 ns
See Figures 1 and 2 125°C 166 58

VI(PP) = ±10 V, 25°C 138 132


tf Fall time RL = 10 kΩ, CL = 100 pF –55°C 142 123 ns
See Figure 1 125°C 166 158

VI(PP) = ±10 V, 25°C 11% 5%


Overshoot factor RL = 10 kΩ, CL = 100 pF –55°C 16% 6%
See Figures 1 and 2 125°C 14% 8%
f = 10 Hz 83 83
TL034M 25°C
Equivalent
q input RS = 20 Ω f = 1 kHz 43 43
Vn √
nV/√Hz
noise voltage See Figure 3 f = 10 Hz 83 83
TL034AM 25°C
f = 1 kHz 43 43
Equivalent input noise
In f = 1 kHz 25°C 0.003 0.003 pA/√Hz
current

VI = 10 mV, 25°C 1 1.1


B1 Unity-gain bandwidth RL = 10 kΩ, CL = 25 pF –55°C 1 1.1 MHz
See Figure 4 125°C 0.9 0.9

VI = 10 mV, 25°C 61° 65°


φm Phase margin at unity gain RL = 10 kΩ, CL = 25 pF –55°C 57° 64°
S Fi
See Figure 4 125°C 59° 62°
† For VCC± = ±5 V, VI(PP) = ±1 V; for VCC± = ±15 V, VI(PP) = ±5 V

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 23


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

PARAMETER MEASUREMENT INFORMATION

VCC+

Overshoot
+ VO
VI 90%
VCC–
CL RL
(see Note A)

10%

NOTE A: CL includes fixture capacitance. tr


Figure 1. Slew-Rate and Overshoot Test Circuit Figure 2. Rise Time and Overshoot Waveform

10 kΩ

VCC+
10 kΩ
VI –

VCC+ 100 Ω + VO


VCC–
VO
CL RL
(see Note A)
VCC–
RS RS

NOTE A: CL includes fixture capacitance.

Figure 3. Noise-Voltage Test Circuit Figure 4. Unity-Gain Bandwidth and


Phase-Margin Test Circuit

VCC+
Ground Shield

VCC–
Picoammeters

Figure 5. Input-Bias and Offset-Current Test Circuit

24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

PARAMETER MEASUREMENT INFORMATION

typical values
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.

input bias and offset current


At the picoampere bias current level typical of the TL03x and TL03xA, accurate measurement of the bias current
becomes difficult. Not only does this measurement require a picoammeter, but test-socket leakages easily can
exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses
a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with
no device in the socket. The device is then inserted into the socket and a second test that measures both the
socket leakage and the device input bias current is performed. The two measurements are then subtracted
algebraically to determine the bias current of the device.

noise
With the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage density
is performed at f = 1 kHz, unless otherwise noted.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 25


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

Table of Graphs
FIGURE
Distribution of TL03x input offset voltage 6–11
Distribution of TL03x input offset-voltage temperature coefficient 12–14
Input bias current vs Common-mode input voltage 15
Input bias current and input offset current vs Free-air temperature 16
Common-mode input voltage vs Supply voltage 17
Common-mode input voltage vs Free-air temperature 18
Output voltage vs Differential input voltage 19, 20
Maximum peak output voltage vs Supply voltage 21
Maximum peak-to-peak output voltage vs Frequency 22
Maximum peak output voltage vs Output current 23, 24
Maximum peak output voltage vs Free-air temperature 25, 26
Large-signal differential voltage amplification vs Load resistance 27
Large-signal differential voltage amplification and Phase shift vs Frequency 28
Large-signal differential voltage amplification vs Free-air temperature 29
Output impedance vs Frequency 30
Common-mode rejection ratio vs Frequency 31, 32
Common-mode rejection ratio vs Free-air temperature 33
Supply-voltage rejection ratio vs Free-air temperature 34
Short-circuit output current vs Supply voltage 35
Short-circuit output current vs Time 36
Short-circuit output current vs Free-air temperature 37
Equivalent input noise voltage vs Frequency (TL031 and TL031A) 38
Equivalent input noise voltage vs Frequency (TL032 and TL032A) 39
Equivalent input noise voltage vs Frequency (TL034 and TL034A) 40
Supply current vs Supply voltage (TL031 and TL031A) 41
Supply current vs Supply voltage (TL032 and TL032A) 42
Supply current vs Supply voltage (TL034 and TL034A) 43
Supply current vs Free-air temperature (TL031 and TL031A) 44
Supply current vs Free-air temperature (TL032 and TL032A) 45
Supply current vs Free-air temperature (TL034 and TL034A) 46
Slew rate vs Load resistance 47, 48
Slew rate vs Free-air temperature 49, 50
Overshoot factor vs Load capacitance 51
Total harmonic distortion vs Frequency 52
Unity-gain bandwidth vs Supply voltage 53
Unity-gain bandwidth vs Free-air temperature 54
Phase margin vs Supply voltage 55
Phase margin vs Load capacitance 56
Phase margin vs Free-air temperature 57
Voltage-follower small-signal pulse response 58
Voltage-follower large-signal pulse response 59, 60

26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TL031

ÎÎÎÎÎÎÎÎÎÎ
INPUT OFFSET VOLTAGE DISTRIBUTION OF TL031A

ÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
14
INPUT OFFSET VOLTAGE
1681 Units Tested From 1 Wafer Lot 16

ÎÎÎÎÎ
ÎÎÎÎ
VCC± = ±15 V 1433 Units Tested From 1 Wafer Lot
VCC± = ±15 V

ÎÎÎÎ ÎÎÎÎÎ
12 TA = 25°C 14
P Package TA = 25°C
P Package
Percentage of Units – %

10 12

Percentage of Units – %
10
8

8
6
6
4
4

2
2

0 0
–1.2 –0.6 0 0.6 1.2 –900 –600 –300 0 300 600 900
VIO – Input Offset Voltage – mV VIO – Input Offset Voltage – µV
Figure 6 Figure 7

DISTRIBUTION OF TL032 DISTRIBUTION OF TL032A

ÎÎÎÎÎÎÎÎÎÎÎ
INPUT OFFSET VOLTAGE INPUT OFFSET VOLTAGE

ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ
12 15
1681 Amplifiers Tested From 1 Wafer Lot 1321 Amplifiers Tested From 1 Wafer Lot

ÎÎÎÎÎ
ÎÎÎÎ
VCC± = ±15 V VCC± = ±15 V

ÎÎÎÎ
TA = 25°C TA = 25°C
Percentage of Amplification – %

P Package 12 P Package
Percentage of Amplifiers – %

3
3

0 0
–1.2 –0.6 0 0.6 1.2 –900 –600 –300 0 300 600 900
VIO – Input Offset Voltage – mV VIO – Input Offset Voltage – µV
Figure 8 Figure 9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 27


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TL034 DISTRIBUTION OF TL034A


INPUT OFFSET VOLTAGE
ÎÎÎÎÎÎÎÎÎÎÎÎ INPUT OFFSET VOLTAGE

ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎ
12 15
1681 Amplifiers Tested From 1 Wafer Lot 1716 Amplifiers Tested From 3 Wafer Lots

ÎÎÎÎÎ ÎÎÎÎÎÎ
VCC± = ±15 V VCC± = ±15 V

ÎÎÎÎ ÎÎÎÎÎ
TA = 25°C TA = 25°C
Percentage of Amplifiers – %

D Package 12 N Package

Percentage of Amplifiers – %
9

3
3

0 0
–1.2 –0.6 0 0.6 1.2 –1.8 –1.2 0.6 0 0.6 1.2 1.8
VIO – Input Offset Voltage – mV VIO – Input Offset Voltage – mV
Figure 10 Figure 11

DISTRIBUTION OF TL031
DISTRIBUTION OF TL032
INPUT OFFSET-VOLTAGE
INPUT OFFSET-VOLTAGE
TEMPERATURE COEFFICIENT

ÎÎÎÎÎÎÎÎÎÎÎÎÎ
TEMPERATURE COEFFICIENT
24

ÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎ
76 Units Tested From 1 Wafer Lot 30 160 Amplifiers Tested From 2 Wafer Lots
VCC± = ±15 V

ÎÎÎÎÎÎÎ
VCC± = ±15 V
TA = 25°C to 125°C
TA = 25°C to 125°C
P Package 25 P Package
Percentage of Amplifiers – %

18
Percentage of Units – %

20

12 15

10

6
5

0
0
–30 –20 –10 0 10 20 30 –40 –30 –20 –10 0 10 20 30 40
a V – Input Offset-Voltage Temperature Coefficient – µV/°C a V – Temperature Coefficient – µV/°C
IO IO
Figure 12 Figure 13

28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TL034 INPUT BIAS CURRENT


INPUT OFFSET-VOLTAGE vs

ÎÎÎÎÎÎÎÎÎÎÎÎ
TEMPERATURE COEFFICIENT COMMON-MODE INPUT VOLTAGE

ÎÎÎÎÎÎÎÎÎÎÎÎ
30 10
160 Amplifiers Tested From 2 Wafer Lots
VCC± = ±15 V

ÎÎÎÎÎÎ
VCC± = ±15 V
TA = 25°C
25 TA = 25°C to 125°C
Percentage of Amplifiers – %

D Package

I IB – Input Bias Current – nA


5
20

15 0

10

IIB
–5
5

0 –10
–40 –30 –20 –10 0 10 20 30 40 –15 –10 –5 0 5 10 15
aV – Temperature Coefficient – µV/°C VIC – Common-Mode Input Voltage – V
IO
Figure 14 Figure 15

INPUT BIAS CURRENT AND


COMMON-MODE INPUT VOLTAGE
INPUT OFFSET CURRENT†
vs
vs
SUPPLY VOLTAGE

ÁÁÁÁÁ
FREE-AIR TEMPERATURE
I IO – Input Bias and Input Offset Current – nA

16
10

ÁÁÁÁÁ ÎÎÎÎÎ
TA = 25°C
VCC± = ±15 V

ÁÁÁÁÁ ÎÎÎÎÎ
12
IC – Common-Mode Input Voltage – V

VO = 0
Positive Limit
VIC = 0
8
1

ÎÎÎ
ÎÎÎ
IIB 4

0.1 0

ÎÎ ÎÎÎÎÎ
ÎÎ ÎÎÎÎÎ
–4
Negative Limit

ÁÁ
IIO
0.01 –8

ÁÁ
IB and IIO

VIC

ÁÁ
V

–12
IIIB

0.001 –16
25 45 65 85 105 125 0 2 4 6 8 10 12 14 16
TA – Free-Air Temperature – °C |VCC±| – Supply Voltage – V
Figure 16 Figure 17

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 29


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

COMMON-MODE INPUT VOLTAGE† OUTPUT VOLTAGE


vs vs

ÎÎÎÎÎ
FREE-AIR TEMPERATURE DIFFERENTIAL INPUT VOLTAGE

ÎÎÎÎÎ
ÎÎÎÎ
20 1.5
VCC± = ±15 V RL = 1 kΩ

ÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎÎ
RL = 2 kΩ
15
IC – Common-Mode Input Voltage – V

ÎÎÎÎÎ
Positive Limit 1 RL = 5 kΩ
RL = 10 kΩ

ÎÎÎÎÎ
10

VO – Output Voltage – V
RL = 20 kΩ
0.5
5

0 0
VCC± = ±5 V
–5
ÎÎÎÎ TA = 25°C

ÎÎÎÎ
–0.5 RL = 20 kΩ

ÁÁÁ ÎÎÎÎ
ÎÎÎ
RL = 10 kΩ
–10
RL = 5 kΩ

ÁÁÁ ÎÎÎÎÎ ÎÎÎ


–1
VIC

RL = 2 kΩ

ÎÎÎÎÎ
V

–15
Negative Limit RL = 1 kΩ
–1.5
–20
–75 –50 –25 0 25 50 75 100 125 –5 –4 –3 –2 –1 0 1 2 3 4 5
TA – Free-Air Temperature –°C VID – Differential Input Voltage – V
Figure 18 Figure 19

OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE


vs vs
DIFFERENTIAL INPUT VOLTAGE SUPPLY VOLTAGE
1.5 16
VCC± = ±15 V RL = 5 kΩ
TA = 25°C RL = 10 kΩ RL = 10 kΩ
VOM – Maximum Peak Output Voltage – V

RL = 20 kΩ 12 TA = 25°C
1
RL = 50 kΩ VOM+
8
VO – Output Voltage – V

0.5
4

0 0

ÎÎÎ
ÎÎÎ
–0.5 –4
VOM–

ÈÈÈÈ
ÈÈÈÈ ÁÁ
–8
–1 RL = 50 kΩ

ÈÈÈÈ ÁÁ
VOM

RL = 20 kΩ
–12
RL = 10 kΩ
–1.5
–15 –10 –5 ÈÈÈÈ
RL = 5 kΩ
0 5 10
VID – Differential Input Voltage – V
15
–16
0 2 4 6 8 10 12
|VCC±| – Supply Voltage – V
14 16

Figure 20 Figure 21

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE† MAXIMUM PEAK OUTPUT VOLTAGE


vs vs
FREQUENCY OUTPUT CURRENT

ÎÎÎÎÎ
5
VOPP – Maximum Peak-to-Peak Output Voltage – V

30
VCC± = ±5 V

ÎÎÎÎÎ

|VOM | – Maximum Peak Output Voltage – V


RL = 10 kΩ
VCC± = ±15 V VOM+ TA = 25°C
25 4

20 VOM–
3

15
TA = –55°C 2
10
TA = 125°C
VCC± = ±5 V 1

ÁÁ 5

ÁÁ
VO(PP)

ÁÁ 0 0
1k 10 k 100 k 1M 0 5 10 15 20
f – Frequency – Hz |IO| – Output Current – mA
Figure 22 Figure 23

MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE†


vs vs
OUTPUT CURRENT FREE-AIR TEMPERATURE
16 5

ÎÎÎÎ
VCC± = ±15 V
4
|VOM | – Maximum Peak Output Voltage – V

VOM – Maximum Peak Output Voltage – V

14 TA = 25°C VOM+

ÎÎÎ
3
12

ÎÎÎ
VOM– 2

ÎÎÎÎÎ
10 1

ÎÎÎÎ ÎÎÎÎÎ
VCC± = ±5 V
8 0 RL = 10 kΩ

6 ÎÎÎÎ VOM+ –1

ÎÎÎ
–2
4

ÁÁÁ ÎÎÎ
–3
VOM–
VOM

ÁÁÁ
2 –4

0 –5
0 5 10 15 20 25 30 –75 –50 –25 0 25 50 75 100 125
|IO| – Output Current – mA TA – Free-Air Temperature – °C
Figure 24 Figure 25

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 31


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

MAXIMUM PEAK OUTPUT VOLTAGE† LARGE-SIGNAL DIFFERENTIAL


vs VOLTAGE AMPLIFICATION
FREE-AIR TEMPERATURE vs
LOAD RESISTANCE
16
40
VO = ±1 V
VOM – Maximum Peak Output Voltage – V

12 VOM+
35 TA = 25°C

A VD – Large-Signal Differential
8

Voltage Amplification – V/mV


30 VCC± = ±15 V

ÎÎÎÎÎ
25
VCC± = ±15 V

ÎÎÎÎÎ
0 RL = 10 kΩ 20
VCC± = ±5 V
–4
15

ÁÁ –8
ÎÎÎ 10

ÁÁ ÎÎÎ
VOM

VOM–

ÁÁ
–12
5

–16
–75 –50 –25 0 25 50 75 100 125 0
10 k 100 k 1M
TA – Free-Air Temperature –°C RL – Load Resistance – Ω
Figure 26 Figure 27
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
100 k 0°
VCC± = ±15 V
RL = 10 kΩ
10 k CL = 25 pF 30°
A VD – Large-Signal Differential

ÎÎÎ
TA = 25°C
Voltage Amplification

ÎÎÎ
1k 60°
AVD

ÎÎÎÎ
Phase Shift

ÎÎÎÎ
100 90°
Phase Shift

10 120°

1 150°

0.1 180°
10 100 1k 10 k 100 k 1M 10 M
f – Frequency – Hz

Figure 28

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION† OUTPUT IMPEDANCE
vs vs
FREE-AIR TEMPERATURE FREQUENCY
50
ÎÎÎÎ 200

ÎÎÎÎ
RL = 10 kΩ

ÁÁ
AVD = 100
A VD – Large-Signal Differential
Voltage Amplification – V/mV

o – Output Impedence – Ω
100
VCC± = ±15 V
80

10 60
VCC± = ±5 V
AVD = 10
40

ÁÁ
ÁÁ
zzo
20 AVD = 1
VCC± = ±15 V

1 10
ÎÎÎÎÎro (open loop) ≈ 250 Ω
TA = 25°C

–75 –50 –25 0 25 50 75 100 125 1k 10 k 100 k


TA – Free-Air Temperature – °C f – Frequency – Hz
Figure 29 Figure 30

COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIO


vs vs
FREQUENCY FREQUENCY

ÎÎÎÎ ÎÎÎÎ
100 100
VCC± = ±5 V VCC± = ±15 V
CMRR – Common-Mode Rejection Ratio – dB

CMRR – Common-Mode Rejection Ratio – dB

ÎÎÎÎ ÎÎÎÎ
90 TA = 25°C 90 TA = 25°C
80 80

70 70

60 60

50 50

40 40

30 30

20 20

10 10

0 0
10 100 1k 10 k 100 k 1M 10 M 10 100 1k 10 k 100 k 1M 10 M
f – Frequency – Hz f – Frequency – Hz
Figure 31 Figure 32

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 33


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

COMMON-MODE REJECTION RATIO† SUPPLY-VOLTAGE REJECTION RATIO†


vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
95 100
CMRR – Common-Mode Rejection Ratio – dB

VCC± = ±5 V to ±15 V

kSVR – Supply Voltage Rejection Ratio – dB


VCC± = ±15 V
98
90

96
VCC± = ±5 V
85

94

80

ÎÎÎÎÎ
92

ÎÎÎÎÎ
VIC = VICRmin

75 90
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 33 Figure 34

SHORT-CIRCUIT OUTPUT CURRENT SHORT-CIRCUIT OUTPUT CURRENT


vs vs
SUPPLY VOLTAGE TIME
30 30
VO = 0
OS – Short-Circuit Output Current – mA

OS – Short-Circuit Output Current – mA

TA = 25°C VID = 100 mV


20
20
VID = 100 mV

10
10

0
VID = –100 mV
0
–10
VID = –100 mV

ÁÁ ÁÁÎÎÎÎÎÎ –10

ÁÁ ÁÁÎÎÎÎÎÎ
–20
IIOS

IIOS

VCC± = ±15 V

ÎÎÎÎÎÎ
TA = 25°C
–30 –20
0 2 4 6 8 10 12 14 16 0 5 10 15 20 25 30
|VCC±| – Supply Voltage – V t – Time – s
Figure 35 Figure 36

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

TL031 and TL031A


SHORT-CIRCUIT OUTPUT CURRENT† EQUIVALENT INPUT NOISE VOLTAGE

ÁÁ
vs vs
FREE-AIR TEMPERATURE

ÎÎÎÎÎ ÁÁ ÁÁÁÁÁ
FREQUENCY
25 70

nV/ Hz
ÎÎÎÎÎ ÁÁ ÁÁÁÁÁ
VCC± = ±15 V VCC± = ±15 V

V n– Equivalent Input Noise Voltage – nVHz


20 RS = 20 Ω

ÎÎÎÎÎ ÎÎÎÎÎ ÁÁ ÁÁÁÁÁ


I OS – Short-Circuit Output Current – mA

TA = 25°C

ÎÎÎÎÎ ÎÎÎÎÎ
15 See Figure 3
VID = 100 mV VCC± = ±5 V
10 60

0
ÎÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎÎÎ
VID = –100 mV
VCC± = ±5 V

ÎÎÎÎÎ
–5 50

ÎÎÎÎÎ
–10 VCC± = ±15 V

–15

–20
ÎÎÎ Vn

ÎÎÎ
VO = 0
–25 40
–75 –50 –25 0 25 50 75 100 125 10 100 1k 10 k 100 k
TA – Free-Air Temperature – °C f – Frequency – Hz
Figure 37 Figure 38

TL032 and TL032A TL034 and TL034A


EQUIVALENT INPUT NOISE VOLTAGE EQUIVALENT INPUT NOISE VOLTAGE
vs vs

ÁÁ ÁÁÁÁÁ ÁÁ ÁÁÁÁ
FREQUENCY FREQUENCY
60 90

ÁÁ ÁÁÁÁÁ ÁÁ ÁÁÁÁ
VCC± = ±15 V VCC± = ±15 V
nVHzHz
nV/ Hz

RS = 20 Ω RS = 20 Ω
V n – Equivalent Input Noise Voltage – nVHz

ÁÁ ÁÁÁÁÁ ÁÁ ÁÁÁÁ
80
V n– Equivalent Input Noise Voltage – nV/

TA = 25°C TA = 25°C
See Figure 3 See Figure 3
50 70

60

40

50
Vn
Vn

30 40
10 100 1k 10 k 100 k 10 100 1k 10 k 11 k
f – Frequency – Hz f – Frequency – Hz
Figure 39 Figure 40

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 35


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

TL031 and TL031A


SUPPLY CURRENT† TL032 and TL032A
vs SUPPLY CURRENT†
vs

ÁÁÁÁ
SUPPLY VOLTAGE
250 SUPPLY VOLTAGE

ÁÁÁÁ ÁÁÁ
VO = 0 500

ÁÁÁÁ ÁÁÁ
No Load VO = 0
200 No Load
AA

400

CC – Supply Current –Aµ A


CC – Supply Current – µ

TA = 25°C
TA = 25°C
150
300

TA = 125°C

ÁÁ ÁÁ
100 TA = 125°C
200

ÁÁ ÁÁ
TA = –55°C
IICC

IICC
TA = –55°C
50
ÁÁ 100

0
0 2 4 6 8 10 12 14 16 0
0 2 4 6 8 10 12 14 16
|VCC±| – Supply Voltage – V
|VCC±| – Supply Voltage – V
Figure 41 Figure 42

TL034 and TL034A TL031 and TL031A


SUPPLY CURRENT† SUPPLY CURRENT†
vs vs

ÎÎÎ ÁÁÁ
SUPPLY VOLTAGE FREE-AIR TEMPERATURE

ÎÎÎ ÁÁÁ
1000 250

ÎÎÎ ÁÁÁ
VO = 0 VO = 0
VCC± = ±15 V
No Load No Load
AA

800 200
CC – Supply Current – µ
CC – Supply Current –Aµ A

VCC± = ±5 V
TA = 25°C
600 150

TA = 125°C

ÁÁ 400
ÁÁ 100

ÁÁ ÁÁ
IICC

TA = –55°C
IICC

ÁÁ 200 50

0 0
0 2 4 6 8 10 12 14 16 –75 –50 –25 0 25 50 75 100 125
|VCC±| – Supply Voltage – V TA – Free-Air Temperature – °C
Figure 43 Figure 44

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

TL034 and TL034A


TL032 and TL032A
SUPPLY CURRENT†
SUPPLY CURRENT†
vs
vs

ÁÁÁÁ ÎÎÎÎ
FREE-AIR TEMPERATURE

ÎÎÎÎÎ
FREE-AIR TEMPERATURE
1000

ÁÁÁÁ ÎÎÎÎ ÎÎÎÎÎ


500
VO = 0
VO = 0 VCC± = ±15 V

ÁÁÁÁ
VCC± = ±15 V No Load
No Load

ÎÎÎÎÎ
800
400
µA

CC – Supply Current –Aµ A


ÎÎÎÎÎ
VCC± = ±5 V
CC – Supply Current –A

VCC± = ±5 V
600
300

ÁÁ ÁÁ
200 400

ÁÁ ÁÁ
IICC

IICC
100 200

0 0
–75 –50 –25 0 25 50 75 100 125 –75 –50 –25 0 25 50 75 100 125
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 45 Figure 46

SLEW RATE SLEW RATE


vs vs

ÎÎÎÎÎ
LOAD RESISTANCE LOAD RESISTANCE

ÎÎÎÎÎ ÎÎÎ
6 6
VCC± = ±5 V

ÎÎÎÎÎ
SR–
CL = 100 pF

ÎÎÎÎÎ
5 TA = 25°C 5
See Figure 1
SR – Slew Rate – V/sµ s

SR – Slew Rate – V/sµ s

4 4
SR–

ÎÎ
3 3
SR+

ÎÎÎÎÎÎ
2 2
SR+

ÎÎÎÎÎÎ
VCC± = ±15 V
CL = 100 pF

ÎÎÎÎÎÎ
1 1
TA = 25°C
See Figure 1

0 0
1 10 100 1 10 100
RL – Load Resistance – kΩ RL – Load Resistance – kΩ
Figure 47 Figure 48

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 37


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

SLEW RATE† SLEW RATE†


vs vs

ÎÎÎÎÎ
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE

ÎÎÎÎÎ
6 6
VCC± = ±5 V

ÎÎÎÎÎRL = 10 kΩ

ÎÎÎÎÎ
5 CL = 100 pF 5
See Figure 1 SR–
SR – Slew Rate – V/sµ s

SR – Slew Rate – V/sµ s


4 4

SR–
3 3
SR+

ÎÎÎÎÎÎ
2 2

ÎÎÎÎÎÎ
SR+
VCC± = ±15 V

ÎÎÎÎÎÎ
1 1 RL = 10 kΩ
CL = 100 pF

0
–75 –50 –25 0 25 50 75 100 125
ÎÎÎÎÎÎ
0
–75
See Figure 1

–50 –25 0 25 50 75 100 125


TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 49 Figure 50

OVERSHOOT FACTOR TOTAL HARMONIC DISTORTION


vs vs
LOAD CAPACITANCE FREQUENCY
60 0.5
VI(PP) = ±10 mV
VCC± = ±15 V
RL = 10 kΩ
AVD = 1
TA = 25°C
THD – Total Harmonic Distortion – %

50 0.4 VO(rms) = 6 V
See Figure 1 TA = 25°C

ÎÎÎÎÎ
Overshoot Factor – %

40 0.3

30 ÎÎÎÎÎ
VCC± = ±5 V

0.2

20
ÎÎÎÎÎÎ VCC± = ±15 V

10

0 0.1
0 50 100 150 200 250 100 1k 10 k 100 k
CL – Load Capacitance – pF f – Frequency – Hz
Figure 51 Figure 52

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

UNITY-GAIN BANDWIDTH UNITY-GAIN BANDWIDTH†


vs vs

ÁÁÁÁÁ
SUPPLY VOLTAGE FREE-AIR TEMPERATURE

ÁÁÁÁÁ ÁÁÁÁÁ
1.1 1.3
VI = 10 mV

ÁÁÁÁÁ ÁÁÁÁÁ
VI = 10 mV RL = 10 kΩ
RL = 10 kΩ CL = 25 pF

ÁÁÁÁÁ ÁÁÁÁÁ
CL = 25 pF 1.2 See Figure 4

B1 – Unity-Gain Bandwidth – MHz


B1 – Unity-Gain Bandwidth – MHz

ÁÁÁÁÁ
1.05 TA = 25°C
See Figure 4 VCC+ = ±15 V

1.1

1.0

1.0
VCC± = ±5 V

0.95
0.9

B1
B1

0.9 0.8
0 2 4 6 8 10 12 14 16 –75 –50 –25 0 25 50 75 100 125
|VCC±|– Supply Voltage – V TA – Free-Air Temperature – °C
Figure 53 Figure 54

PHASE MARGIN

ÁÁÁÁ
vs
PHASE MARGIN LOAD CAPACITANCE

ÁÁÁÁ
vs 70°

ÁÁÁÁÁ ÎÎÎÎÎ ÁÁÁÁ


VI = 10 mV
SUPPLY VOLTAGE
68° RL = 10 kΩ
VCC± = ±15 V

ÁÁÁÁÁ ÁÁÁÁ
ÎÎÎÎ
65°
VI = 10 mV TA = 25°C
66°

ÁÁÁÁÁ ÁÁÁÁ
ÎÎÎÎ
RL = 10 kΩ See Figure 4
CL = 25 pF See Note A

ÁÁÁÁÁ
TA = 25°C 64°
φm – Phase Margin

63° See Figure 4


62°
φm – Phase Margin

60°

ÁÁ 58°

ÁÁ ÁÁ ÎÎÎÎ
61°
56°

ÁÁ ÎÎÎÎ
VCC± = ±5 V

ÁÁ
54°
59°
52°

50°
0 10 20 30 40 50 60 70 80 90 100
57° CL – Load Capacitance – pF
0 2 4 6 8 10 12 14 16
NOTE A: Values of phase margin below a load capacitance of 25 pF
|VCC±| – Supply Voltage – V were estimated.
Figure 55 Figure 56

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 39


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

TYPICAL CHARACTERISTICS

PHASE MARGIN† VOLTAGE-FOLLOWER


vs SMALL-SIGNAL

ÁÁÁÁÁ
FREE-AIR TEMPERATURE PULSE RESPONSE

ÎÎÎÎÎ ÁÁÁÁÁ
67° 16
VCC± = ±15 V

ÎÎÎÎÎ ÁÁÁÁÁ
VCC± = ±15 V RL = 10 kΩ
12

ÁÁÁÁÁ
65° CL = 100 pF
TA = 25°C

ÁÁÁÁÁ

O – Output Voltage – mV
8 See Figure 1
φ m – Phase Margin

63°
4
VCC± = ±5 V

61° 0

ÁÁ –4

ÎÎÎÎÎ ÁÁ
59°

ÎÎÎÎÎ VO
V
VI = 10 mV –8

ÎÎÎÎÎ
57° RL = 10 kΩ
CL = 25 pF –12

55°
–75 –50 –25 0 25
ÎÎÎÎÎ
50
See Figure 4

75 100 125
–16
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
TA – Free-Air Temperature –°C t – Time – µs
Figure 57 Figure 58

VOLTAGE-FOLLOWER
LARGE-SIGNAL VOLTAGE-FOLLOWER
PULSE RESPONSE LARGE-SIGNAL
2
PULSE RESPONSE
8

1
4
VO – Output Voltage – V

VO – Output Voltage – V

VCC± = ±5 V
2
ÁÁÁÁÁ
RL = 10 kΩ
ÁÁÁÁÁ
VCC± = ±15 V

ÁÁÁÁÁ
0
CL = 100 pF 0 RL = 10 kΩ

ÁÁ ÁÁ ÁÁÁÁÁ
TA = 25°C CL = 100 pF
See Figure 1 –2 TA = 25°C

ÁÁ ÁÁ ÁÁÁÁÁ
See Figure 1
VO

VO

–1 –4

–6

–2 –8
0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 12 14 16 18
t – Time – µs t – Time – µs
Figure 59 Figure 60

† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.

40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

input characteristics
The TL03x and TL03xA are specified with a minimum and a maximum input voltage that, if exceeded at either
input, could cause the device to malfunction.
Due to of the extremely high input impedance and resulting low bias-current requirements, the TL03x and
TL03xA are well suited for low-level signal processing; however, leakage currents on printed circuit boards and
sockets easily can exceed bias-current requirements and cause degradation in system performance. It is a good
practice to include guard rings around inputs (see Figure 61). These guard rings should be driven from a
low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded unity-gain followers to avoid oscillation.

VI +
VO –
VI

VO
+

VO
VI
+

(a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER

Figure 61. Use of Guard Rings

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 41


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

output characteristics
All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance.
The TL03x and TL03xA drive higher capacitive loads; however, as the load capacitance increases, the resulting
response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of
the load capacitance at which oscillation occurs varies with production lots. If an application appears to be
sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate
the problem (see Figure 63). Capacitive loads of 1000 pF and larger can be driven if enough resistance is added
in series with the output (see Figure 62).

(a) CL = 100 pF, R = 0 (b) CL = 300 pF, R = 0 (c) CL = 350 pF, R = 0

(d) CL = 1000 pF, R = 0 (e) CL = 1000 pF, R = 50 Ω (f) CL = 1000 pF, R = 2 kΩ

Figure 62. Effect of Capacitive Loads

15 V

R
5V VO
+
–5 V
– 15 V
CL
10 kΩ
(see Note A)

NOTE A: CL includes fixture capacitance.

Figure 63. Test Circuit for Output Characteristics

42 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

high-Q notch filter


In general, Texas Instruments enhanced-JFET operational amplifiers serve as excellent filters. The circuit in
Figure 64 provides a narrow notch at a specific frequency. Notch filters are designed to eliminate frequencies
that are interfering with the operation of an application. For this filter, the center frequency can be calculated as:

fO + 2p 1
R1 C1
With the resistors and capacitors shown in Figure 64, the center frequency is 1 kHz. C1 = C3 = C2 + 2 and
R1 = R3 = 2 × R2. The center frequency can be modified by varying these values. When adjusting the center
frequency, ensure that the operational amplifier has sufficient gain at the frequency required.

15 V


R1 R3 VO
VI +
TL03x
1.5 MΩ 1.5 MΩ
C2 –15 V
220 pF

R3 750 kΩ

C1 C3

110 pF 110 pF

–1

–2
Gain – dB

–3

–4

–5

–6

–7

–8
0.2 0.4 0.6 0.8 1 0.2 0.4 0.6 0.8 2
f – Frequency – kHz

Figure 64. High-Q Notch Filter

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 43


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

transimpedance amplifier
The low-power precision TL03x allows accurate measurement of low currents. The high input impedance and
low offset voltage of the TL03xA greatly simplify the design of a transimpedance amplifier. At room temperature,
this design achieves 10-bit accuracy with an error of less than 1/2 LSB.

ǒ Ǔ
Assuming that R2 is much less than R1 and ignoring error terms, the output voltage can be expressed as:

V + – IIN R
F
R1 ) R2
O R2
Using the resistor values shown in the schematic for a 1-nA input current, the output voltage equals –0.1 V. If
the VO limit for the TL03xA is measured at ±12 V, the maximum input current for these resistor values is ±120 nA.
Similarly, one LSB on a 10-bit scale corresponds to 12 mV of output voltage, or 120 pA of input current.

ƪ ǒ Ǔƫǒ Ǔ
The following equation shows the effect of input offset voltage and input bias current on the output voltage:

V
O
+– V
IO
) RF IIO ) IIB R1 ) R2
R2
If the application requires input protection for the transimpedance amplifier, do not use standard PN diodes.
Instead, use low-leakage Siliconix SN4117 JFETs (or equivalent) connected as diodes across the TL03xA
inputs (see Figure 65).
As with all precision applications, special care must be taken to eliminate external sources of leakage and
interference. Other precautions include using high-quality insulation, cleaning insulating surfaces to remove
fluxes and other residue, and enclosing the application within a protective box.
RF

10 MΩ
15 V

Input Current + TL03xA


VO

–15 V R1 90 kΩ

SN4117

R2 10 kΩ

Figure 65. Transimpedance Amplifier

44 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

4-mA to 20-mA current loops


Often, information from an analog sensor must be sent over a distance to the receiving circuitry. For many
applications, the most feasible method involves converting voltage information to a current before transmission.
The following circuits give two variations of low-power current loops. The circuit in Figure 66 requires three wires
from the transmitting to receiving circuitry, while the second variation in Figure 67 requires only two wires, but
includes an extra integrated circuit. Both circuits benefit from the high input impedance of the TL03xA because
many inexpensive sensors do not have low output impedance.

ǒ Ǔ ǒ Ǔ
Assuming that the voltage at the noninverting input of the TL03xA is zero, the following equation determines
the output current:

I
O
+ VI R1
R3
R
) 5V R2
R3
R
+ 0.16 V
I
) 4 mA
S S

The circuits presently provide 4-mA to 20-mA output current for an input voltage of 0 to 100 mV. By modifying
R1, R2, and R3, the input voltage range or the output current range can be adjusted.

ǒ Ǔ ǒ Ǔ ǒ Ǔ
Including the offset voltage of the operational amplifier in the above equation clearly illustrates why the low offset
TL03xA was chosen:

I
O
+ VI R1 R3R ) 5 V R2 R3R * VI R1
R3
R
) R2 R3R ) RR1
S S S S S
+ 0.16 VI ) 4 mA – 0.17 VI
For example, an offset voltage of 1 mV decreases the output current by 0.17 mA.
Due to the low power consumption of the TL03xA, both circuits have at least 2 mA available to drive the actual
sensor from the 5-V reference node.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 45


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

VCC+ = 10 V

100 kΩ R6

TL431

100 kΩ R7

5 V Ref

R2 1 MΩ


R5
R1 2N3904
VI +
3.3 kΩ
5 kΩ TL03xA
VEE = –5 V
R4 5 kΩ 1N4148
R3 80 kΩ
RS
IO
Signal Common
100 Ω
RL 50 Ω

Figure 66. Three-Wire 4-mA to 20-mA Current Loop

IN VCC+ = 10 V

OUT
LT1019-5

GND
5 V Ref
2 8
3
R2 1 MΩ 10 µF 4 LTC1044
5

10 µF R5
R1 + 2N3904
VI 3.3 kΩ
5 kΩ TL03xA

R4 5 kΩ 1N4148
R3 80 kΩ
RS
IO
Signal Common
100 Ω
RL 50 Ω

Figure 67. Two-Wire 4-mA to 20-mA Current Loop

46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

low-level light-detector preamplifier


Applications that need to detect small currents require high input-impedance operational amplifiers; otherwise,
the bias currents of the operational amplifier camouflage the current being monitored. Phototransistors provide
a current that is proportional to the light reaching the transistor. The TL03x allows even the small currents
resulting from low-level light to be detected.
In Figure 68, if there is no light, the phototransistor is off and the output is high. As light is detected, the
operational amplifier output begins pulling low. Adjusting R4 both compensates for offset voltage of the amplifier
and adjusts the point of light detection by the amplifier.

15 V

R6

R1 10 kΩ
10 kΩ TL03x
+
R3 10 kΩ C1 VO
100 pF

R7
R4
TIL601 10 kΩ 10 kΩ

R5 10 kΩ

R2 5 kΩ

–15 V

Figure 68. Low-Level Light-Detector Preamplifier

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 47


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

audio-distribution amplifier
This audio-distribution amplifier (see Figure 69) feeds the input signal to three separate output channels. U1A
amplifies the input signal with a gain of 10, while U1B, U1C, and U1D serve as buffers to the output channels.
The gain response of this circuit is very flat from 20 Hz to 20 kHz. The TL03x allows quick response to the input
signal while maintaining low power consumption.
R4
1 MΩ
U1B

VCC+ VOA
+
C1
1 µF –
VI + U1C
U1A

VOB
R1 R2 +
100 kΩ 100 kΩ
VCC+
R5
U1D
10 kΩ
C2 R3 –
VOC
100 µF 100 kΩ +

NOTE A: U1A through U1D = TL03x; VCC+ = 5 V

Figure 69. Audio-Distribution Amplifier Circuit

48 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


TL03x, TL03xA
ENHANCED-JFET LOW-POWER LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS180C – FEBRUARY 1997 – REVISED DECEMBER 2001

APPLICATION INFORMATION

instrumentation amplifier with linear gain adjust


The low offset voltage and low power consumption of the TL03x provide an accurate but inexpensive
instrumentation amplifier (see Figure 70). This particular configuration offers the advantage that the gain can
be linearly set by one resistor:
R6
VO = × (VB – VA)
R5

Adjusting R6 varies the gain. The value of R6 always should be greater than, or equal to, the value of R5 to
ensure stability. The disadvantage of this instrumentation amplifier topology is the high degree of CMRR
degradation resulting from mismatches between R1, R2, R3, and R4. For this reason, these four resistors
should be 0.1%-tolerance resistors.

VCC+ R1 R3
10 kΩ 10 kΩ
– 0.1% 0.1%

VA +
U1A

U1C

VO
+
R5 R6
100 kΩ 1 MΩ

U1B U1D
– –
VB + +
R2 R4
R7
10 kΩ 10 kΩ
VCC– 100 kΩ
0.1% 0.1%
NOTE A: U1A through U1D = TL03x; VCC± = ±15 V

Figure 70. Instrumentation Amplifier With Linear Gain-Adjust Circuit

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 49


PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2005

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-9086102Q2A OBSOLETE LCCC FK 20 None Call TI Call TI
TL031ACD OBSOLETE SOIC D 8 None Call TI Call TI
TL031ACP OBSOLETE PDIP P 8 None Call TI Call TI
TL031AID OBSOLETE SOIC D 8 None Call TI Call TI
TL031AIP OBSOLETE PDIP P 8 None Call TI Call TI
TL031CD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL031CDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL031CP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL031CPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TL031ID ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL031IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL032ACD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032ACDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032ACP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL032AID ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032AIDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032AIP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL032CD ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032CDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032CP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL032CPSR ACTIVE SO PS 8 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL032CPWLE OBSOLETE TSSOP PW 8 None Call TI Call TI
TL032ID ACTIVE SOIC D 8 75 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032IDR ACTIVE SOIC D 8 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL032IP ACTIVE PDIP P 8 50 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL032MFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TL032MJGB OBSOLETE CDIP JG 8 None Call TI Call TI
TL034ACD ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL034ACDR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR

Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2005

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
(RoHS)
TL034ACN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL034AID ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL034AIDR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL034AIN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL034CD ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL034CDR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL034CN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL034CNSR ACTIVE SO NS 14 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
TL034CPW ACTIVE TSSOP PW 14 90 Pb-Free CU NIPDAU Level-1-250C-UNLIM
(RoHS)
TL034CPWLE OBSOLETE TSSOP PW 14 None Call TI Call TI
TL034CPWR ACTIVE TSSOP PW 14 2000 Pb-Free CU NIPDAU Level-1-250C-UNLIM
(RoHS)
TL034ID ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-250C-1 YEAR
(RoHS)
TL034IDR OBSOLETE SOIC D 14 None Call TI Call TI
TL034IN ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
TL034MD OBSOLETE SOIC D 14 None Call TI Call TI
TL034MFKB OBSOLETE LCCC FK 20 None Call TI Call TI
TL034MJB OBSOLETE CDIP J 14 None Call TI Call TI
TL034MN OBSOLETE PDIP N 14 None Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2005

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 3
MECHANICAL DATA

MCER001A – JANUARY 1995 – REVISED JANUARY 1997

JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE

0.400 (10,16)
0.355 (9,00)

8 5

0.280 (7,11)
0.245 (6,22)

1 4
0.065 (1,65)
0.045 (1,14)

0.063 (1,60) 0.310 (7,87)


0.020 (0,51) MIN
0.015 (0,38) 0.290 (7,37)

0.200 (5,08) MAX


Seating Plane

0.130 (3,30) MIN

0.023 (0,58)
0°–15°
0.015 (0,38)
0.100 (2,54) 0.014 (0,36)
0.008 (0,20)

4040107/C 08/96

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER


28 TERMINAL SHOWN

NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX

0.342 0.358 0.307 0.358


19 11 20
(8,69) (9,09) (7,80) (9,09)
20 10 0.442 0.458 0.406 0.458
28
(11,23) (11,63) (10,31) (11,63)
21 9
B SQ 0.640 0.660 0.495 0.560
22 8 44
(16,26) (16,76) (12,58) (14,22)
A SQ
23 7 0.739 0.761 0.495 0.560
52
(18,78) (19,32) (12,58) (14,22)
24 6
0.938 0.962 0.850 0.858
68
(23,83) (24,43) (21,6) (21,8)
25 5
1.141 1.165 1.047 1.063
84
(28,99) (29,59) (26,6) (27,0)
26 27 28 1 2 3 4

0.020 (0,51) 0.080 (2,03)


0.010 (0,25) 0.064 (1,63)

0.020 (0,51)
0.010 (0,25)

0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)

0.028 (0,71) 0.045 (1,14)


0.022 (0,54) 0.035 (0,89)
0.050 (1,27)

4040140 / D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE

0.400 (10,60)
0.355 (9,02)
8 5

0.260 (6,60)
0.240 (6,10)

1 4
0.070 (1,78) MAX

0.325 (8,26)
0.020 (0,51) MIN
0.300 (7,62)

0.015 (0,38)

Gage Plane
0.200 (5,08) MAX
Seating Plane

0.125 (3,18) MIN 0.010 (0,25) NOM

0.100 (2,54) 0.430 (10,92)


MAX
0.021 (0,53)
0.010 (0,25) M
0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).


B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE


14 PINS SHOWN

0,30
0,65 0,10 M
0,19
14 8

0,15 NOM
4,50 6,60
4,30 6,20

Gage Plane

0,25
1 7
0°– 8°
A 0,75
0,50

Seating Plane

1,20 MAX 0,15 0,10


0,05

PINS **
8 14 16 20 24 28
DIM

A MAX 3,10 5,10 5,10 6,60 7,90 9,80

A MIN 2,90 4,90 4,90 6,40 7,70 9,60

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.


B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


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