Design and Implementation of Three Phase Three
Level Shunt Active Power Filter for Harmonic
Reduction
Elango Sundaram and Manikandan Venugopal
Electrical and Electronics Engineering Department
Coimbatore Institute of Technology
Coimbatore, Tamilnadu, India
selangocit@gmail.com
Abstract— This paper presents simulation and hardware
implementation of Three Phase Three Level Shunt Active Power
Filter to mitigate the supply current harmonics and inject the
required reactive power to non-linear loads. The standard
operating principle of shunt active filter is to inject current
harmonics into the point of common coupling. This scheme consists
of three phase three level diode clamped multilevel inverter which
can be used to reduce the source current harmonics. The proposed
pulse width modulation (PWM) scheme generates the inverter leg
switching times, from the sampled reference phase voltage
amplitudes and centres the switching times for the middle vectors,
in a sampling interval, as in the case of conventional space vector
PWM (SVPWM). Effectiveness of the system is verified by the
experimental results obtained from the prototype model.
Keywords— Shunt Active Power Filter; Multilevel Inverter;
Harminics; Nonlinear loads; SVPWM.
I. Introduction
The use of non linear loads in industry and domestic
application such as variable electrical drives, computers,
furnaces, electronic ballast, etc. have led to the flow of load
currents encompassing odd harmonics, which are integral
multiples of the fundamental frequency. The harmonic currents
do not contribute to active power and need to be eliminated to
enhance power quality. The shunt passive filters consisting of
tuned LC filters and/or high-pass filters are used to suppress the
harmonics, and power capacitors are employed to improve the
Power Factor (PF) of the utility/mains. But they have the
limitations of fixed compensation and large size and can also
excite resonance conditions [1]. Active Power Filter (APF) is the
accepted solution used to eliminate the undesired current
components by injection of compensation currents in opposition
to them. Two level PWM-VSI have been used to implement
active power filter connected to the AC bus through a
transformer [2]. This is mainly used to compensate medium
power range nonlinear load due to limitation of semiconductor
devices. Jain and Agarwal [1] have proposed a shunt active
power filter with complete design, simulation and experimental
investigation for mitigating harmonics and reactive power of
non - linear load using two level inverter and compensating the
k,((( 
current is determined using hysteresis control algorithm.
Vodyakho and Mi [3] have proposed direct current-space-vector
control of an active power filter (APF) based on a three-level
neutral-point-clamped voltage-source inverter. This method
indirectly generates the reference compensation current by using
an equivalent conductance of the fundamental component using
APF’s DC-link voltage control. In addition, in [3], new control
method is proposed to regulate the split DC-capacitor voltages
using sign cubical hysteresis controller. Multilevel inverters
have been increased in medium and high power application in
active power filters. The output voltage of the multilevel inverter
must be able to generate an almost sinusoidal output current. In
order to generate a near sinusoidal output current, the output
voltage should not contain low frequency harmonic components.
This paper presents complete simulation and experimental study
on shunt active power filter to reduce the harmonics and
compensate the reactive power of non linear load. In this
proposed method three level diode clamed multilevel inverter
can be employed as active filter. The advantages of three-level
VSIs include lower harmonic distortion, lower switching
frequency, and lower power loss [3]. The PWM signal
generation is calculated for the active filter is directly derived
from the sampled amplitudes of the reference phase voltages.
The advantages of this scheme is similar to the space vector
pulse SVPWM including the over modulation. This scheme is
computationally efficient when compared to conventional
multilevel SVPWM schemes, making it superior for real-time
implementation [4].
II. Shunt Active Power Filter
Shunt active power filters compensate current harmonics by
injecting equal-but-opposite harmonic compensating current.
The shunt active power filter operates as a current source
injecting the harmonic components generated by the load but
phase shifted by 1800. The components of harmonic currents
contained in the load current are cancelled by the effect of the
active filter, and the source current remains sinusoidal and in
phase with the respective phase to neutral voltage. With an
appropriate control scheme, the active power filter can also
compensate the load power factor [5].
A. Compensation Principle of Shunt Active Power Filter ‫݌‬௙ ሺ‫ݐ‬ሻ ൌ  ܸ௠ ‫ܫ‬ଵ ‫݊݅ݏ‬ଶ ߱‫׎ •‘… כ ݐ‬ଵ ൌ  ‫ݒ‬௦ ሺ‫ݐ‬ሻ ‫݅  כ‬௦ ሺ‫ݐ‬ሻ (9)
The basic compensation principle of the shunt active power
filter is shown in Fig.1. It is controlled to draw or supply a ௣೑ ሺ௧ሻ
݅௦ ሺ‫ݐ‬ሻ ൌ  ൌ  ‫ܫ‬ଵ •‹ ߱‫׎ •‘… ݐ‬ଵ ൌ  ‫ܫ‬௦௠ •‹ ߱‫ݐ‬ (10)
compensating current Ic from or to the utility, so that it cancels ௩ೞ ሺ௧ሻ
current harmonics on the AC side. ‫݁ݎ݄݁ݓ‬ǡ ‫ܫ‬௦௠ ൌ  ‫ܫ‬ଵ …‘• ‫׎‬ଵ

Total peak current supplied by the source is

‫ܫ‬௦௣ ൌ  ‫ܫ‬௦௠ ൅  ‫ܫ‬௦௅ (11)

If the active filter provides the total reactive and harmonic

power, then is (t) will be in phase with the source voltage and
pure sinusoidal [6]. The compensation current of the active filter
should be
݅௖ ሺ‫ݐ‬ሻ ൌ  ݅௅ ሺ‫ݐ‬ሻ െ  ݅௦ ሺ‫ݐ‬ሻ (12)

Hence, for the accurate and instantaneous compensation of

Fig.1 Shunt Active Power Filter
A shunt active power filter can be used to eliminate current
harmonics and reactive power compensation in source side. The
instantaneous current can be expressed by (1). The source
voltage can be written as (2).
݅௦ ሺ‫ݐ‬ሻ ൌ  ݅௅ ሺ‫ݐ‬ሻ െ  ݅஼ ሺ‫ݐ‬ሻ
reactive and harmonic power, it is necessary to calculate݅௦ ሺ‫ݐ‬ሻ,
the fundamental component of load current, as the reference
current. Where,݅௦ ሺ‫ݐ‬ሻ,݅௅ ሺ‫ݐ‬ሻ, ݅஼ ሺ‫ݐ‬ሻ - Instantaneous value of
source, load, and filter current. ‫ݒ‬௦ ሺ‫ݐ‬ሻ, ܸ௠ - Instantaneous and
peak value of source voltage. ‫ܫ‬௦ଵ ǡ ‫ܫ‬ଵ ǡ ‫ܫ‬௖ଵ - Fundamental
component of source, load, and filter current. pL(t) Instantaneous
load power. ‫݌‬௙ ሺ‫ݐ‬ሻǡ ‫݌‬௥ ሺ‫ݐ‬ሻǡ ‫݌‬௛ ሺ‫ݐ‬ሻ - Instantaneous fundamental
(real), reactive, and harmonic power. …‘• ‫׎‬ଵ - Displacement
factor. ‫ܫ‬௦௣ ǡ ‫ܫ‬௦௅ - Peak value of reference current and loss
(1) component.

‫ݒ‬௦ ሺ‫ݐ‬ሻ ൌ  ܸ௠ •‹ ߱‫ݐ‬ (2)

B. Estimation of Reference Source Current
If a nonlinear load is applied, then the load current includes The peak value of the reference current ‫ܫ‬௦௣ can be estimated
fundamental component, and the harmonic components which
by controlling the DC side capacitor voltage. The ideal
can be represented in (3) and (4). Instantaneous load power can
compensation requires the main current to be sinusoidal and in
be written as (5).
phase with the source voltage irrespective of the loads current
nature. The desired source currents after compensation can be
݅௅ ሺ‫ݐ‬ሻ ൌ  σஶ
௡ୀଵ ‫ܫ‬௡ •‹ሺ݊߱‫ ݐ‬൅ ‫׎‬ଵ ሻ (3) given as
‫כ‬
݅௅ ሺ‫ݐ‬ሻ ൌ  ‫ܫ‬ଵ •‹ሺ߱‫ ݐ‬൅ ‫׎‬ଵ ሻ ൅  σஶ
௡ୀଶ ‫ܫ‬௡ •‹ሺ݊߱‫ ݐ‬൅ ‫׎‬௡ ሻ (4) ݅௦௔ ൌ  ‫ܫ‬௦௣ •‹ ߱‫ݐ‬ (13)
‫כ‬
‫݌‬௅ ሺ‫ݐ‬ሻ ൌ  ‫ݒ‬௦ ሺ‫ݐ‬ሻ ‫݅  כ‬௅ ሺ‫ݐ‬ሻ (5) ݅௦௕ ൌ  ‫ܫ‬௦௣ •‹ሺ߱‫ ݐ‬െ ͳʹͲ଴ ሻ (14)
‫כ‬
‫݌‬௅ ሺ‫ݐ‬ሻ ൌ ܸ௠ •‹ ߱‫ כ ݐ‬ሼ‫ܫ‬ଵ •‹ሺ߱‫ ݐ‬൅ ‫׎‬ଵ ሻ ൅ ݅௦௖ ൌ  ‫ܫ‬௦௣ •‹ሺ߱‫ ݐ‬൅ ͳʹͲ଴ ሻ (15)
‫כ‬ ‫כ‬ ‫כ‬
σ’௡ୀଶ ‫ܫ‬௡ •‹ሺ݊߱‫ ݐ‬൅ ‫׎‬௡ ሻሽ (6) Where, ݅௦௔ ǡ ݅௦௕ ǡ ݅௦௖ , - Three-phase reference source currents.
݅௦௣ ൌ ሺ݅ଵ௖௢௦‫׎‬ଵ ൅  ݅௦௅ ሻ is the amplitude of the desired source
current, while the phase angles can be obtained from the source
‫݌‬௅ ሺ‫ݐ‬ሻ ൌ  ܸ௠ ଵ •‹ଶ ߱‫׎•‘…ݐ‬ଵ ൅ voltages. Hence, the waveform and phases of the source currents
are known; only the magnitude of the source currents needs to
ܸ௠ ଵ •‹߱‫׎ ‹• ݐ߱ •‘… ݐ‬ଵ ൅
୫ •‹ ߱‫  כ ݐ‬σஶ
௡ୀଶ ‫ܫ‬௡ •‹ሺ݊߱‫ ݐ‬൅ ‫׎‬௡ ሻ
‫݌‬௅ ሺ‫ݐ‬ሻ ൌ  ‫݌‬௙ ሺ‫ݐ‬ሻ ൅  ‫݌‬௥ ሺ‫ݐ‬ሻ ൅  ‫݌‬௛ ሺ‫ݐ‬ሻ
From (7), real power drawn by the load is
be determined. This peak value of the reference current has been
estimated by regulating the DC side capacitor voltage of the
(7) PWM converter. This capacitor voltage is compared by a
reference value, and the error is processed in a PI controller. The
(8) output of the PI controller has been considered as the amplitude
of the desired source current, and the reference currents are
estimated by multiplying this peak value with the unit sine
vectors in phase with the source voltages [7].

C. Selection of filter inductance ሺ‫ܮ‬௖ ሻ and Vdc, reff signals with a number of symmetriccal level-shifted carrier waves
for PWM generation. It has been n shown that for an n-level
As per the compensation principle, the acttive power filter
inverter, n-1 level-shifted carrieer waves are required for
adjusts the current ‫ܫ‬௖ଵ to compensate the reacttive power of the
comparison with the sinusoidal references [11] [12] [13]. The
load. The three phase reactive power deliveredd from the active
reference voltage and triangular caarriers for a PWM generation
filter can be calculated from a vector diagram shown in Fig. 2.
is shown in Fig.3.
The active filter can compensate the reactive poower from utility
only when Vc1 > Vs.

Fig.2 Vector diagram

The value of Lc and Vdc can be calculated [1] by solving the Fig.3 Reference voltage an
nd triangular carriers
following simultaneous equations (16) and (177). The DC side for a PWM generation
capacitor can be found from (18). For 2kVA compensation
E. Role of the DC Capacitor
capacity, the parameters shown in Table.1 for simulation study.
The DC side capacitor serves too maintain a DC voltage with
͵ܸ௦ ‫ܫ‬௖ଵ ൌ ͵ܸ௦ ቀ
௏೎భ
ቁ ቀͳ െ
௏ೞ
ቁ (16) a small ripple in steady state and itt serves as an energy storage
ఠ௅೎ ௏೎భ element to supply the real power difference between load and
௏೎భ source during the transient period. In
I steady state the real power
‫ܫ‬௖ଵ ൌ  (17)
௠೑ ఠ௅೎ supplied by the source is equal to the
t real power demand of the
గூ೎భ load. In case any change in load d conditions, the real power
‫ܥ‬ௗ௖ ൌ  (18) demand in load side changes [14]. The difference in real power
ξଷఠ௏೏ೝǡುషುሺ೘ೌೣሻ
between source and load is compen nsated by DC capacitor. If the
DC capacitor voltage is attained thhe reference voltage, the real
Table.1 Simulation parameterrs power supplied by the source is eq qual to load demand. The real
and reactive power injection results in the ripple voltage of the
Filter Inductance (‫ܮ‬௖ ) 8.89 μH
capacitor which introduces finite delay. The performance of
DC Voltage ( ܸௗ௖ ) 220 V different reference voltage, time deelay and the power factor of
DC-capacitor ሺ‫ܥ‬ௗ௖ ) 1100 μF the circuit is shown Table.2.
Input AC Voltage 100VP Table.2 Performance of system
m as reference capacitor
Frequency 50 Hz Voltage varies

D. Proposed SVPWM Vdc, ref % THD Settlin

ng Time (sec) P.F
In proposed scheme, each reference phhase voltage is 150 15.92 0.025 0.997
compared with the triangular carrier signall in which the 220 2.67 0.016 0.998
individual pole voltages are generated, indeppendent of each 300 2.12 0.017 0.998
other [8]. To obtain the maximum possible peeak amplitude of
the fundamental phase voltage, a common modee voltage, Voffset1, F. Proposed Control Scheme
is added to the reference phase voltages [9]][10], where the
magnitude of Voffset1 is given by Figure.4 represents the control circuit and generation of PWM
pulses for one leg of multilevel in nverter. The actual capacitor
voltage is compared with referencee voltage and the error signal
ܸ௢௙௙௦௘௧ ൌ  െሺܸ௠௔௫ ൅  ܸ௠௜௡ ሻሻȀʹ (19) is given to PI controller. The ou utput of the PI controller is
measured as the peak value of th he input supply current. The
Vmax is the maximum magnitude of thee three sampled input three phase source voltage is converted into per unit value
reference phase voltages, while Vmin is the miniimum magnitude that can be multiplied with PI controller output, which will
of the three sampled reference phase voltagess, in a sampling provide the reference current for the filter circuit. The actual
interval. The addition of the common mode voltage, Voffset1, source current is measured and su ubtracted with the reference
results in the active inverter switching vectors bbeing centered in current which generates the filter compensation current. The
a sampling interval, making the SPWM techniqque equivalent to minimum and maximum value of th he compensation current is to
the SVPWM technique. The SPWM techniquue, for multilevel be measured using min-max contro oller and it can be added with
inverters, involves comparing the referencee phase voltage negative gain amplifier.


The gain output is added with R- phase of filtter compensation
current. The required PWM pulses for R-phasee leg is generated
by comparing the signal from min-max controlller and triangular
signal. The other two legs of multilevel inverter PWM pluses are
generated the same with corresponding com mpensation phase
currents.
G. Design of process control loop
The block diagram of the voltage control lloop is shown in
Fig.5. The overall transfer function for the DC voltage is given
in (20).
‫כ‬ ீ೎ሺೞሻ಼ ‫כ‬
௏೏೎ ೎ሺೞሻ ο಺೎ ಺ೞ
ൌ
ο௏೏೎ ଵା௄೎ሺೞሻ οூ೎ ூೞାீ೎ሺೞሻ಼
೎ሺೞሻ ο಺಺೎ ಺ೞ
Where, Gc is the gain of PI controller and Kc is the transfer
function of PWM controller. From the voltaage loop transfer
function the second order transfer function can be found for the
closed loop system. The voltage control looop characteristic
equation has been found for the PI controller. T
The characteristic
equation is used to find the components of PI ccontroller and the
components are Kp and Ki. Kp determines the voltage response
and Ki defines the damping factor of the voltaage control loop.
The parameters of PI controller are obtained aas Kp = 0.71 and
Ki = 134 for the selected system.
H. Three Level Diode Clamped Multilevel Inverrter
The most commonly used multilevel topology is the diode
The resistance and inductance vaalue for the filter network are
Rc = 0.1 Ÿ and Lc = 8.89 μH respecctively. The non Linear Load
used for the simulation model aree R = 15Ÿ and L = 40mH
connected with a bridge rectifier circuit.
c The value of DC link
capacitor is 1100 μF, and referencce voltage Vdc is 220 V. To
generate the reference current by y comparing minimum and
maximum value of each phase cu urrent is shown in Fig. 6, in
which the blue coloured waveform m indicates thepositive peak
value of the current and the green coloured waveform indicates
the negative peak value of the current. The red coloured
waveform is the sum of both positiive and negative peak values.
Due to the presence of non linear looad connected with the shunt
active power filter, the source current waveform becomes
(20) nonlinear and the total harmoinc distortion is higher and its
‫כ‬
value is 24.16%. In Fig.7 deptics the value of reactive power and
power factor. At time Ͳ ൑ – ൑ ͲǤͲ Ͳ͸•, the filter circuit is not
enabled and therefore the reacctive power is high and
corresponding power factor is 0.912 2. If time – ൒ ͲǤͲ͸•, the filter
circuit is enabled and enhace the reeactive power is low and the
corresponding power factor is 0.997 7. When the filter is switched
on after 0.06s, the input source currrent is found to be sinusoidal
and the capacitor voltage reaches th he steady state value and the
THD value is reduced to 1.86% . TheT input source voltage (Vs),
source current (Is), load current (IL), filter current(If) and
capcitor voltage (Vc) are as shown in Fig.8. The total harmonic
spectrum with and without filter are shown in Fig. 9 and Fig.10
respectively.
clamped inverter, in which the diode is used as clamping device Ǥƒ”†™ƒ”‡
’Ž‡‡–ƒ–‹‘
to clamp the DC bus voltage to achieve the steps in output A prototype model for shunt acttive power filter is developed
voltage. A three level inverter, also knownn as a “neutral to validate the proposed simulation n model. The hardware setup
clamped” inverter, consists of two capacitor vvoltages in series is designed with specifications as given
g in Table 3. The PWM
and uses the center tap as the neutral. Each phasse leg of the three pulses are generated using Spartan n-3A DSP Trainer Kit which
level inverter has two pairs of switching devicces in series. The includes Xilinx XC3SD1800A – FG G676 -4. The waveforms are
center of each device pair is clamped to the neutral through observed from the hardware modu ule are given in Fig. 11 and
clamping diodes [5]. which the first wave illustrates the source
s voltage and the second
wave represents the input source cu urrent which is non sinusoidal
Ǥ‹—Žƒ–‹‘‡•—
—Ž–• before the activation of filter netwoork and it becomes sinusoidal
after the filter network is activ vated at 0.06ms. The third
The proposed simulation model for shunt acctive power filter waveform illustrates the injected cu urrent to the load by the filter
is carried out using MATLAB/SIMULINK K software. The network and the fourth waveform represents
r the output voltage.
simulation parameters used for the proposed sysstem are given as The hardware results and waveforms are obtained from
follows: Input supply voltage is 100 Vp, 500Hz and source YOKOGAWA power analyzer.
impedances are Rs = 0.1 Ÿ and Ls = 0.002H.

Fig.4. Control circuit for generation of PWM pulses


Fig.12 shows the waveform for voltage across tthe capacitor and
source current obtained from Agilent digital storage
oscilloscope. The total harmonic distortion obbtained from the
hardware module is 3.21 %. The numerical values of total
harmonic distortion with and without filter aree illustrated from
the Fig. 13 and Fig. 14 respectively and the three phases are
connected with the channels 4, 5 and 6 of the power analyzer.
The comparison of simulation and hardwaree parameters are
mentioned in Table.4.

Table.3 SAPF Hardware specificaations

Rating 2 kVA, 3-Phase, 100V(p-p)), 50Hz system
SK100MLI066T (4 IGBTs + Diodes) 600V,
IGBT
100A-Semikron
Firing Pulse Generator Xilinx XC3SD1800A – FG G676 -4 Spartan 3A
CT LTS 25 NP – 25 Amps
PT LV 25 – NP (0-500V) Fig. 6. Waveform of mximmum,minimum of each phase
Filter / Source Inductor 10μH, 10A / 100μH, 10A current and addin
ng both signals
Capacitor 1100μF, 900V

Table.4 Comparison of simulation & harrdware results

Simulation Hardware
Parameters With Without Withh Without
filter filter filteer filter
THD 1.86 24.16 3.211 24.86
PF 0.997 0.912 0.9770 0.953

Fig.7. Waveforms of Apparent Power, Real Power and

Fig. 5. Block diagram of voltage conttrol loop Reactive Po
ower

Fig.8. Simulation waveforms for inputt source voltage, source current,load current, filter currentt and capcitor voltage.


Fig.9. Total Harmonic Spectrum with filter Fig.10. Total Harmonic Spectrum without filter

Fig.11. Hardware Outpput waveforms (source voltage, source current, filter current, filter voltage)

Fig.112. Waveform for capacitor voltage and source current


 Fig.13. Numeric Values of Source Current THD with filter obtained from YOKOGAWA power analyzer

Fig.14. Numeric Values of Source Current THD without filter obtained from YOKOGAWA power analyzer

Ǥ‘…Ž—•‹‘

The simulation results of total harmonic distortion, reactive
power and power factor are compared with hardware outputs.
On comparison the parameters values of simulation and
hardware are very close and it satisfies the IEEE standards. The
proposed shunt active filter reduces the total harmonic distortion
from 24.5% to below 5% with encouraging results.
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