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energies

Article
A Digitally Controlled Power Converter for
an Electrostatic Precipitator
Pedro J. Villegas * ID , Juan A. Martín-Ramos ID
, Juan Díaz, Juan Á. Martínez, Miguel J. Prieto ID

and Alberto M. Pernía ID


Department of Electrical Engineering, University of Oviedo, 33204 Gijón, Asturias, Spain;
jamartin@uniovi.es (J.A.M.-R.); jdiazg@uniovi.es (J.D.); jamartinez@uniovi.es (J.Á.M.);
majpri@uniovi.es or mike@uniovi.es (M.J.P.); amartinp@uniovi.es (A.M.P.)
* Correspondence: pedroj@uniovi.es; Tel.: +34-985-182-381

Received: 13 October 2017; Accepted: 12 December 2017; Published: 15 December 2017

Abstract: Electrostatic precipitators (ESPs) are devices used in industry to eliminate polluting particles
in gases. In order to supply them, an interface must be included between the three-phase main line
and the required high DC voltage of tens of kilovolts. This paper describes an 80-kW power supply
for such an application. Its structure is based on the series parallel resonant converter with a
capacitor as output filter (PRC-LCC), which can adequately cope with the parasitic elements of
the step-up transformer involved. The physical implementation of the prototype includes the
use of silicon carbide—SiC—semiconductors, which provide better switching capabilities than
their traditional silicon—Si—counterparts. As a result, a new control strategy results as a better
alternative in which the resonant current is maintained in phase with the first harmonic of the
inverter voltage. Although this operation mode imposes hard switching in one of the inverter legs,
it minimizes the reactive energy that circulates through the resonant tank, the resonant current
amplitude itself and the switching losses. Overall efficiency of the converter benefits from this.
These ideas are supported mathematically using the steady state and dynamic models of the topology.
They are confirmed with experimental measurements that include waveforms, Bode plots and thermal
behavior. The experimental setup delivers 80 kW with an estimated efficiency of 98%.

Keywords: electrostatic precipitator; silicon carbide; digital control

1. Introduction
ESPs have been industrially used to eliminate polluting particles in gases since the beginning of
the 20th century [1–4]. They are durable, relatively simple to maintain, cost-effective and present a
high collection efficiency, typically 80% per step. ESPs have found application in power generation
plants, steelworks, cement-free building materials, chemical process factories, incinerators, etc. Thus,
by using three steps placed in series, it is possible to reach an efficiency in particle elimination above
99%. Its mode of operation is as follows: A very high DC voltage of 45–150 kV negative is applied
to a wire located in the center of the precipitator, known as a discharge electrode. The outer walls of
the precipitator, called the collector electrode, are grounded to zero potential. The gas to be purified
is injected through the precipitator. The electric field around the wire reaches high enough values to
cause a discharge crown, ionizing the gas around it and injecting electrons. Negative electrons and
ions are accelerated by the electric field to the collector electrode. By collision and ion capture, particles
suspended in the gas are charged and also deposited by the electric field in the collector electrode.
The gas then exits the precipitator free of impurities. Since particles larger than 10 µm in diameter
absorb several times more load than those smaller than 1 µm, the electrical forces are much lower in
the latter. As the particles begin to settle into the collector, the thickness of the material layer in the

Energies 2017, 10, 2150; doi:10.3390/en10122150 www.mdpi.com/journal/energies


Energies 2017, 10, 2150 2 of 24

collector increases. As a consequence, the electric field decreases, so it is necessary to periodically clean
the collector surfaces. The material falls and collects at the bottom.
The complete filtrate is divided into several sections that are sequentially crossed by the gas.
Each of them is controlled by a different voltage source and can be considered an independent
precipitator. Depending on the physical proportions of each section and the power and voltage levels
applied, different harvesting efficiencies are achieved in each section. They are generally optimized
for dust collection of different sizes. The sum of the individual performances gives the final total
performance figure for the system. For it to reach 99% the precipitator must have three or more sections.
They must be supplied by using a DC power source that provides around 100 kV and 100 kW
to the ESP electrodes. The design of such power sources commonly relies on low-frequency phase
regulators [5]. A typical structure includes thyristors, low frequency transformers working at 50–60 Hz,
and a rectifier bridge at the output. A coil in series limits the current peaks in the input when a short
circuit occurs at the output. These short circuits are frequent (up to 90 per minute) due to the dielectric
rupture of the gas flowing through the ESP electrodes. In this sort of DC power sources, the triggering
of the thyristors regulates the average voltage level at the electrodes. One of the problems associated
to this technique is the very large low-frequency ripple it gives rise to [6], which makes the change
to High Frequency Switched Mode Power Supplies (HF-SMPS) become a very attractive solution for
ESPs. Some of the advantages are:

• Reduction of weight and volume due to the use of high frequency in the step-up transformer.
• Decrease of the volume of oil in the tank containing the high-voltage equipment, i.e., the
transformer and the rectifier output.
• Better performance from the point of view of the input network because of its three-phase
connection and its higher power factor (above 0.9).
• Operation independent of the input frequency.
• Lower ripple at the output voltage for a given specification of the precipitator. This is so because
the output capacitance between the electrodes remains the same, whereas the output rectifier
frequency experiments a great increment. Additionally, this ripple reduction means an increment
in the average output voltage for the same peak (breakdown) in the operating voltage.
• Possibility to supply the ESP with pure DC voltage, or to include different pulses or degrees of
intermittency due to the source faster dynamic response.

Despite all these advantages, the construction of high-frequency power sources was not addressed
until the last decade, due to problems related to the design of equipment involving high current
levels [7,8]. Nowadays, its use is still incipient [5] with limitations in voltage (less than 80 kV) and
current (less than 1 A). With the advantages provided by HF-SMPS, the ESP itself may evolve to operate
with new voltage waveforms that are more convenient from the process point of view. New operating
capabilities can provide greater purification efficiency. The effect of these new sources is even more
evident in cases where the phenomenon of “back corona” appears. This phenomenon, generally linked
to high-resistivity impurities [9], takes place when the potential drop across the dust layer is so large
that corona discharges begin to appear in the gas trapped within the dust layer.
In [10,11] a series-parallel resonant tank (SPRC) and IGBTs as the switch are used to implement the
ESP. In this paper, a series-parallel resonant converter (PRC-LCC) as HF-SMPS is proposed and studied
for ESPs. Additionally, a “new” control strategy is also proposed that minimizes reactive energy
through the resonant tank and improves the switching losses by using SiC MOSFETs. Two versions
of the inverter (Si IGBTs vs. SiC MOSFETS) have been assembled in order to compare their features.
Their output voltage and power are regulated by means of only one control variable: the duty cycle, d.
The design of the closed-loop operation is based on the topology small signal model developed.
2. The Model for the Series-Parallel Topology

2.1. Power Stage


There
Energies 2017,are several resonant topologies described in the literature [12–15] that use LCC resonant
10, 2150 3 of 24
Energies 2017, 10, 2150 3 of 24
tanks, i.e., LLC resonant converter [16], soft switching technology [17] and a secondary-side resonant
2. The Model
converter [18]. for
Butthe theSeries-Parallel Topologyconverter (PRC-LCC) with an inductive output filter
series-parallel resonant
is2.especially
The Model well
forsuited for the type of
the Series-Parallel application considered in this paper [19]. This topology has,
Topology
2.1. Powerone
however, Stage
drawback in our case: it is not easy to design the inductor in the output filter when the
2.1. Power
output Stage is very high. Thus, for the sake of simplicity, many high-output DC voltage
voltage
There are several resonant topologies described in the literature [12–15] that use LCC resonant
applications
tanks,There useseveral
are
i.e., LLC a PRC-LCC
resonant resonant resonant
converter [16],topology
topologies with in
softdescribed
switching only
thealiterature
capacitor
technology as output
[17] [12–15]
and thatfilter,
use LCC
a secondary-side as shown
resonant
resonant in
Figure
tanks, 1 [20–23].
i.e., [18].
converter LLC But The
resonant price to pay for this
converter [16],resonant
the series-parallel simplification
soft switching in
technology
converter the
(PRC-LCC) assembly
[17] with
and aan is a more
secondary-side complicated
inductive output resonant
filter
performance
converter
is especially of But
[18].
well the topology,
the
suited for thesince
typethe
series-parallel use of converter
resonant
of applicationa purely capacitive
(PRC-LCC)
considered in thisfilter
with
paperresults
an[19]. in
inductive
Thisdiscontinuous-
output filter
topology has,
conduction-mode
is especially
however, onewell operation.
suited for
drawback Nevertheless,
thecase:
in our this
type itofisapplicationis not much
not easy toconsidered of a problem,
in this paper
design the inductor for
in the the
[19]. behavior
Thisfilter
output topologyof this
whenhas, the
topology
however, has
onealready
output voltage drawback been
is very described
inhigh. Thus,itand
our case: is developed
fornot easy
the by
of means
to design
sake the of different
inductor
simplicity, many mathematical
in the output filter
high-output models
DC when for
the
voltage
aoutput
half-bridge
voltage
applications [20,24]
useis very where
high. several
a PRC-LCC Thus, topologies
for
resonant sake ofare
thetopology compared,
simplicity,
with a for
onlymany a PRC-LCC
high-output
capacitor topology
DC
as output filter,[21,23,25,26];
voltage applications
as shown in
for
use high
Figure voltage
a PRC-LCC
1 [20–23]. pulse
resonant loads
The price [22]
topology
to payand
with full
for only bridge Zero Current
this asimplification
capacitor as output Switching
in thefilter, Pulse
as shown
assembly Wide
is a in Modulation
Figure
more 1 [20–23].
complicated
(ZCS PWM)
performance
The price toapplication
of the
pay thisinsimplification
for topology, [27]. since
Otherthe models
inuse have
theof been developed
a purely
assembly iscapacitive infilter
[28–31]
a more complicated forperformance
results LCC-type parallel
in discontinuous-
of the
resonant
topology, converter.
conduction-mode
since the use operation.
of a purely Nevertheless, this is
capacitive filter not much
results of a problem, for the behavior
in discontinuous-conduction-mode of this
operation.
topology has this
Nevertheless, already
is notbeen
much described and developed
of a problem, by means
for the behavior of thisoftopology
differenthas
mathematical
already beenmodels for
described
a half-bridge
and developed Q1
[20,24]
by means D1
where of several
different D3
topologies are
mathematical compared,
models for
for aa PRC-LCC
half-bridge iD
topology
[20,24] iO
[21,23,25,26];
where several
Transformer DA
for high voltage pulse loadsforQ a3 PRC-LCC
[22] and full topology PulseDWide
topologies are compared,
Cbridge Zero Current Switching
[21,23,25,26];
LSbeen
for high voltage CpulseModulation
loads [22]
iniLP n1:n2 (ZCS
S
(ZCSfull
and PWM) application
bridge Zero Current [27].Switching
Other models
Pulsehave
Wide developed
Modulation in [28–31]
PWM) forapplication
LCC-type parallel
in [27].
resonant
Other converter.
models have been developed in [28–31] for LCC-type parallel resonant converter.
CO
VIN VAB CP V1 V2 ViOD iO
Q1 D1 D3 Transformer DA
Q3 DC
Q2 D2 D4 CS LS
iLPQ4 n1:n2
DB DD
CO
VIN C V1 V
VAB P 2 V
Figure 1. Series–parallel resonant topology, PRC-LCC, with a capacitor as outputOfilter.

In the optimal Q2 current D2control traditionally D4 used (Figure 2a), the current through the resonant
Q 4
tank, iL, is high because it has a reactive component, due to the fact D that
B it is not in DDphase with the
input voltage to the tank, VAB. On the other hand, the switching current of the switches Q3–Q4 is much
greater than that in switches Q1–Q2, and, therefore, so are the switching losses.
Figure 1. Series–parallel resonant topology, PRC-LCC, with a capacitor as output filter.
In the Figure
centered 1. Series–parallel
current control resonant topology,
(Figure PRC-LCC,
2b), the resonantwithcurrent,
a capacitoriL, as
is output
smallerfilter.
than the one
obtained
In the optimal current control traditionally used (Figure 2a), the current through voltage,
with the optimal current control, since this current is in phase with the input VAB.
the resonant
This In the
allows optimal
conduction current
losses control
to be traditionally
reduced. On used
the (Figure
other hand,2a),
forthe
highcurrent
tank, iL, is high because it has a reactive component, due to the fact that it is not in phase with the duty through
cycles, thethe resonant
switching
input ivoltage
tank,
currentsL , will
is high
be because
tosimilar
the tank,initVboth
has alegs
reactive
of thecomponent,
inverter, anddue to thethan
smaller fact those
that itproduced
is not in phase
AB. On the other hand, the switching current of the switches Q3–Q4 is much
in the with the
optimal
input
currentvoltage
control to the tank,
(Figure V
2a); AB . On
these the other
results in hand,
lower the switching
switching
greater than that in switches Q1–Q2, and, therefore, so are the switching losses. current
losses. In of
thisthe switches
paper, the Q –Q
control
3 4 is much
mode
greater
used In than
sets the that in switches
a switching
centered currentQcontrol
frequency 1 –Q 2 , and,
that therefore,
guarantees
(Figure that
2b), sothe
the are the switching
inverter
resonant is working
current, losses. in smaller
iL, is the centered
than current
the one
mode.
obtained with the optimal current control, since this current is in phase with the input voltage, VAB.
This allows conduction losses to be reduced.
T On the other hand, for high duty cycles, the switching
d
currents will be similar in both legs of the inverter, and smaller than those produced in the optimal
MAX
iLP
VIN 2a); these results inVlower
current control (Figure AB switching losses. In this paper, the control mode
used sets a switching frequency that guarantees
iL that the inverter is working in the centered current
mode. t
T
MAX d
iLP Switchings
VIN Q1-Q2 Q3-Q4
VAB
iL (a)
t
Figure 2. Cont.

Switchings
Q1-Q2 Q3-Q4

(a)
Energies 2017, 10, 2150 4 of 24

T
Energies 2017, 10, 2150 d 4 of 24
Energies 2017, 10, 2150 VIN VAB 4 of 24
MAX
iLP iL
T
d t
VIN VAB
MAX
iLP Switchings iL
Q1-Q2 Q3-Q4
t
(b)

Figure 2. Waveforms for (a) Optimum switching control and (b) Centered-current control.
Switchings
Q1-Q2 Q3-Q4
2.2. Large-Signal Model and Steady-State Condition
(b)
Not all the models describing the performance of a PRC-LCC with capacitive output filter are
Figure
Figure 2. Waveforms
Waveforms for
for(a) Optimum
(a)InOptimum switching
switching control and
and(b)
controloperation (b)Centered-current
Centered-current control.
control.
equally easy to 2.work with [32]. some cases, different regions are identified in the
performance of the topology. Each of these regions is adequately modeled, but the only way to
2.2. Large-Signal Model and Steady-State Condition
identify thecentered
In the operation regioncontrol
current the converter
(Figure 2b), thatthe is working
resonantiscurrent,
by means iL , is
ofsmaller
a trial-and-error
than the one procedure.
obtained
withNot
This is
thenotallpractical
the models
optimal current describing
to carry out since
control, thethis
a full performance
analysiscurrent of is ofconverter,
thein a PRC-LCC
phase withmainlywith
the capacitive
because
input voltage,theoutput
Vadequate filter
AB . This allowssetare
of
equally
equations
conduction easy to used
to losses
be work toisbewith
not [32]. In
known
reduced. at
On some
thethe cases,hand,
beginning
other different
of the operation
forcalculation.
high regionsthe
duty cycles, areswitching
identifiedcurrents in the
performance
will There
be similar is of
one the
in bothtopology.
model, however,
legs Eachinverter,
of the of these
that succeeds
and regions is than
adequately
in describing
smaller modeled,
the full
those performance
produced but
in thethe of only way
the topology
optimal currentto
identify
throughout the
control (Figure operation
its continuous region
2a); these results the
conductionconverter
in lower mode that
switching is working
using alosses. is
singleInsetby means
thisofpaper, of
equations a trial-and-error
[25,33].mode
the control procedure.
This model
used sets cana
This
be is not
used
switching forpractical tothat
large-signal,
frequency carry out a fullthat
small-signal
guarantees analysis
and of the converter,
thesteady-state
inverter analysis.
is working mainly
inFocusing because
the centered on the the latter,
current adequate
mode. set of
a simple
equations
equivalenttocircuit be usedcan is not
be known
used toatrepresent
the beginning of the calculation.
steady-state performance (Figure 3); reference [32]
2.2. Large-Signal
Therethe
provides is one Model
detailsmodel, and
on how Steady-State
however,
to obtain Condition
that suchsucceeds in describing
an equivalent the full
circuit. Thisperformance
steady-state of the topology
model is better
throughout
suitedNot than its
allthose continuous
defining
the models conduction
different the
describing mode
operation using
performance regions, a single
offor set of equations
it results in
a PRC-LCC with a set [25,33].
of equations
capacitive This
output model cancan
thatfilter be
are
be
usedused
equally for
for easy large-signal,
the wholeto work range withsmall-signal
of operation
[32]. In some and
(at steadysteady-state
cases,state); different analysis.
theseoperation Focusing
equationsregions on
can also the latter,
arebeidentified
adapted to a simple
inany
the
equivalent
control
performancemode. circuit
of thecan be used
topology. Eachtoofrepresent
these regions steady-state
is adequately performance
modeled, but (Figure
the only3); reference
way to identify [32]
provides
the operationthe
Any practical details
region on how
application to
the converter obtain
provides such
that is the an equivalent
specification
working circuit.
of the input
is by means This steady-state
DC voltage, Vprocedure.
of a trial-and-error model
IN, the output is better
ThisDC is
suited
voltage, than
V ,those
and defining
the output different
power, operation
P . On the regions,
other for
side, it results
after
not practical to carry out a full analysis of the converter, mainly because the adequate set of equations
O O in a
assembling set of equations
the power that
supply, can be
the
used
to befor
values the
for
used iswhole
all the known
not rangecomponents
circuit atofthe
operation
beginning (r,(at Ssteady
Lof , Cthe
S, C P,state);
and R)
calculation. these equations
are known can also
[25,33]. The be adapted load
equivalent to any of
control mode.
the converter,
There is one R, ismodel,
derivedhowever,
from thethat output voltage
succeeds inand output power
describing the fullspecifications,
performance of and theitstopology
value is
Any
typically practical
considered application
to be provides
constant. the specification of
throughout its continuous conduction mode using a single set of equations [25,33]. This model can be the input DC voltage, V IN, the output DC

voltage,
usedAn forV O, and the analyzer
impedance
large-signal, output power,
small-signal mayand POsteady-state
. On the
measure the other
other side, after assembling
parameters
analysis. Focusing of onthethe the power
topology:
latter, r is the
a simple supply, the
parasitic
equivalent
values
resistancefor
circuit canof all
bethethe
used circuit
circuit; components
CS is a steady-state
to represent (r, L
serial capacitor;S , C S , C , and R)
LS and C(Figure
P
performance are known
P are, respectively,[25,33].
3); referencethe The equivalent
[32]parasitic
providesinductance load
the details of
the
on converter,
and capacitance
how to obtain R, of
issuch
derived
the an from
step-up
equivalent the circuit.
output This
transformer. voltage
All those and output
parameters
steady-state model power specifications,
areisreferred
better to primary
suited than and by
thoseitsusing
value the
defining is
typically
transformer considered
different operation turns ratio. to be
regions, constant.
Withforthese data,in
it results the a setmathematical
of equationsmodel that can provides
be used a for
method
the wholeto calculate
range of a
An
suitable impedance
value for theanalyzer
control may measure
parameters. the other
operation (at steady state); these equations can also be adapted to any control mode. parameters of the topology: r is the parasitic
resistance of the circuit; CS is a serial capacitor; LS and CP are, respectively, the parasitic inductance
and capacitance of the step-up transformer. All those parameters are referred to primary by using the
CS L
transformer iturns L rratio. With these Sdata, the mathematical model provides a method to calculate a
suitable value for the control parameters.

π · CP
i4L· vINr CS CLXS= μ
sin(π · d)
1+cos(ψ) R vO
π 2
vO=vP π
· iL
sin (ψ)
RX = π π· C· C· ω
CX = μ P P
4 · vIN
sin(π · d)
1+cos(ψ) R vO
π Resonant tank 2
vO=vP Output
π
· iL
filter
sin (ψ)
πthe RX =
Figure 3.
Figure Equivalentcircuit
3. Equivalent circuitofofthe P · ω according
·topology
Ctopology accordingto to [25,33].
[25,33]. Waveforms
Waveforms are are expressed
expressed as
as amplitudes.
amplitudes.
Resonant tank Output filter

Figure 3. Equivalent circuit of the topology according to [25,33]. Waveforms are expressed as
amplitudes.
Energies 2017, 10, 2150 5 of 24

Any practical application provides the specification of the input DC voltage, VIN , the output DC
voltage, VO , and the output power, PO . On the other side, after assembling the power supply, the
values for all the circuit components (r, LS , CS , CP , and R) are known [25,33]. The equivalent load of
the converter, R, is derived from the output voltage and output power specifications, and its value is
typically considered to be constant.
An impedance analyzer may measure the other parameters of the topology: r is the parasitic
resistance of the circuit; CS is a serial capacitor; LS and CP are, respectively, the parasitic inductance
and capacitance of the step-up transformer. All those parameters are referred to primary by using the
transformer turns ratio. With these data, the mathematical model provides a method to calculate a
suitable value for the control parameters.
In Figure 3, CX and RX depend on µ, which is simply a function of the clamping angle Ψ (1) used
for the sake of compactness. The clamping angle, Ψ, varies between 0 and π radians and has a physical
meaning: it represents the part of the period where none of the output rectifying diodes is on (see
Figure 4). During this period, CP provides all of the resonant current, iL , while experiencing a voltage
variation from –VO to +VO (or vice versa). These conditions provide the way to calculate Ψ (2) [31].
Since R and CP are previously known, only ω S needs to be obtained in order to derive the value of the
clamping angle:
µ = ψ − sin(ψ) · cos(ψ) (1)
π − 2· R · CP · ω S
cos(ψ) = (2)
π + 2· R · CP · ω S
Figure 3 shows two differentiated circuits. The one on the left represents the topology resonant
tank, where several components are connected in series whose impedance is:

ZREAL = r + R X (3)

CS + CX
Z I MAG = ω · LS − (4)
ω ·CS ·CX
q
Z= 2
ZREAL + Z2I MAG (5)

The control method must maintain the sinusoidal current centered with respect to the inverter
voltage. This means that the first harmonic term of the voltage and the resonant current must be in
phase, φ = 0 (Figure 4). This condition is met if the imaginary part of the resonant network is null
(ZIMAG = 0) for the switching frequency, fS . Since ZIMAG is defined in (5), it can be solved for fS as
shown in (6). However, it must be noted that fS depends on CX , and, thus, on Ψ:
s
ωS 1 CS + CX
fS = = · (6)
2·π 2·π LS · CS · CX

The procedure described so far has resulted in two equations, (2) and (6), with only two unknown
variables, Ψ and ω S . There are different ways to calculate the value of these unknowns. One possibility
is using a look-up table. Other possibility consists in applying recursive methods. When using the
latter option, a value for Ψ is inserted in (6) so as to obtain ω S ; then (2) is used to check whether the
value thus obtained is correct and, after some iteration, the solution is found.
Now that fS and Ψ are known, the impedance of the resonant network is obtained through (3),
since:
| Z | = ZREAL = r + R X (7)

In the resonant tank of Figure 3, it makes sense to consider the energy balance in the circuit.
Most of the power is transferred from the power source to resistor RX . This power on RX ideally
equals the output power, PO . Hence, (8) provides an expression for the amplitude of the resonant
current, i LMax .
Energies 2017, 10, 2150 6 of 24

!2
v2 i LMax
PO = O = R X · √ (8)
R 2
Now, Kirchhoff’s law is applied to obtain the required input voltage (9).

v Max
i LMax = AB
(9)
|Z|

Finally, the duty cycle is calculated from the relationship between the DC input voltage, VIN ,
defined in Figure 1, and the first harmonic term of the output voltage of the converter, VAB , as in (10):

4 · vIN
v Max
AB = · sin(π · d) (10)
π
By following this procedure, the control parameters (duty cycle and frequency) can be obtained
for any 2017,
Energies required operation point.
10, 2150 6 of 24

Figure 4.4. Main


Figure Main waveforms
waveforms of ofthe
thetopology.
topology.VVAB isis the
the input
input voltage
voltage ofofthe
theresonant
resonanttank.
tank.i iLP is
is the
the
AB LP
current of the resonant tank. V S is the voltage of the series inductance. VP is the voltage of the parallel
current of the resonant tank. VS is the voltage of the series inductance. VP is the voltage of the parallel
capacitor C
capacitor CP.. iiD isisthe
thecurrent
currentthrough
throughthe theoutput
output diodes.
diodes. ϕ is thethe
φ is delay between
delay input
between voltage
input VABVand
voltage
P D AB
resonant current i
and resonant current iLP .LP.

Now that fS andOperating


2.3. Centered-Current Ψ are known,
Point the impedance of the resonant network is obtained through (3),
since:
Overall losses have been estimated on real prototypes considering two different types of switches:
= Z REAL = r + R X
IGBT (FF300R12KS4) and SiC MOSFET Z(CAS300M12BM2). (7)
The working conditions in the prototypes tested were:
In the resonant tank of Figure 3, it makes sense to consider the energy balance in the circuit. Most
of the power is transferred from the power source to resistor RX. This power on RX ideally equals the
Max
output power, PO. Hence, (8) provides an expression for the amplitude of the resonant current, iL .
2
vO2  iLMax 
By following this procedure, the control parameters (duty cycle and frequency) can be obtained
for any required operation point.

2.3. Centered-Current Operating Point


Overall
Energies losses
have been estimated on real prototypes considering two different types7 ofof24
2017, 10, 2150
switches: IGBT (FF300R12KS4) and SiC MOSFET (CAS300M12BM2).
The working conditions in the prototypes tested were:
- VIN = 800 V, VO = 80 kV (1000 V in the primary side) and PO = 80 kW (R = 12.5 Ω in the
- primary side).
VIN = 800 V, VO = 80 kV (1000 V in the primary side) and PO = 80 kW (R = 12.5 Ω in the primary
- side).
Transformer parameters: n1 /n2 = 1/80, LS = 62.7 µH, CP = 219 nF (see Figure 5). A series capacitor
- Transformer
CS = 408 nF parameters: n1/n
completes the 2 = 1/80, LS = 62.7 µH, CP = 219 nF (see Figure 5). A series capacitor
topology.
CS = 408 nF completes the topology.

(a) (b)

Figure 5. High-voltage transformer (b) and simplified equivalent circuit (a) of the step-up
Figure 5. High-voltage transformer (b) and simplified equivalent circuit (a) of the step-up transformer.
transformer.

Oncethe
Once the switching
switching frequency
frequency has been
has been decided decided
and the and the converter
converter is working is on
working on the
the centered-
centered-current mode, the duty cycle (d) is used to regulate the output
current mode, the duty cycle (d) is used to regulate the output voltage (VO). This control voltage (V O ). This control
scheme is
scheme is referred to as centered-current control. By using this control mode,
referred to as centered-current control. By using this control mode, each of the legs of the inverter each of the legs ofhas
the
inverter has a different switching pattern. One
a different switching pattern. One of them, Q1–Q2, experiencesof them, Q 1 –Q , experiences hard-switching
2 hard-switching (Figure 6), whereas (Figure 6),
whereas
the other the
one,other
Q3–Q one, Q3 –Q
4, goes 4 , goes through
through zero voltage
zero voltage switchingswitching (ZVS) thanks
(ZVS) thanks to the to the conduction
conduction of theof
the diodes in parallel (Figure
diodes in parallel (Figure 7). 7).
InInorder
ordertotocalculate
calculateswitching
switchinglosses,
losses,ititisisnecessary
necessarytotoknowknowthe thevalue
valueofofthe
theactual
actualswitching
switching
currentthrough
current throughthe semiconductors,ISI,S ,the
thesemiconductors, theswitching frequency,fSfS, ,the
switchingfrequency, theinput voltage,VVININ
inputvoltage, , ,and
andthe
the
switching energies in the semiconductors when operating at nominal voltage and current (VN = 600V
switching energies in the semiconductors when operating at nominal voltage and current (V N = 600
andININ==300
Vand 300A Ain
inthis
thiscase).
case).
Since this paper considers
Since this paper considers two twodifferent
differenttypestypesofofsemiconductors,
semiconductors,the theenergies
energiestotouse useininthe
the
calculation of the switching losses
calculation of the switching losses are: are:

•• IGBT:
IGBT: EON(IGBT) , E, OFF(IGBT)
EON(IGBT) EOFF(IGBT)
•• IGBTdiode:
IGBT diode: EREC(DIGBT)
EREC(DIGBT)
•• MOSFET
MOSFETSiC:
SiC: EON(MOS)
EON(MOS) , E, OFF(MOS)
EOFF(MOS)
•• MOSFET
MOSFETSiCSiCdiode:
diode: EREC(DMOS)
EREC(DMOS)
As
Asindicated
indicatedininFigure
Figure6,6,switch
switchQQ4 4turns
turnsononwith
withno
nolosses,
losses,but
butthere
thereare
areswitching
switchinglosses
lossesin inQQ3 3
when it is turned off. Leg Q 1–Q2 performs differently (Figure 7): Q1 turns OFF with no losses, because
when it is turned off. Leg Q1 –Q2 performs differently (Figure 7): Q1 turns OFF with no losses, because
the
thediode
diodeininparallel,
parallel,DD1,1 ,isisON;
ON;switching
switchinglosses
lossesappear
appearwhen
whenQQ2 2turns
turnsONONand
anddiode
diodeDD1 1isisforced
forced
OFF. The formula to estimate these losses is given
OFF. The formula to estimate these losses is given by (11): by (11):
V I
P = E ON , EOFF or EREC · INV·I NS · IfSS (11)
PSWSW= EON,EOFF or EREC V ·N I N · · f S (11)
VN IN
Conduction losses can be calculated by applying Equation (12). The magnitudes included in this
Conduction losses can be calculated by applying Equation (12). The magnitudes included in this
expression are:
expression are:

1. The average, IAVG , and RMS, IRMS , values of the current circulating through the switches.
2. The forward voltage drop, VD , or the ON resistance, RCD , of the semiconductor:
Energies2017,
Energies 2017,10,
10,2150
2150 8ofof2424
Energies 2017, 10, 2150 88 of 24

(1)
(1) Theaverage,
The average,IAVG
IAVG, ,and
andRMS,
RMS,IRMS
IRMS, ,values
valuesofofthe thecurrent
currentcirculating
circulatingthrough
throughthe
theswitches.
switches.
(2)
(2) The forward
• forward
The voltage drop,
IGBT: voltage drop, VD, or V D , or the ON
VCESAT(IGBT) resistance, R
, RCESAT(IGBT)
the ON resistance, CD , of the semiconductor:
RCD, of the semiconductor:
• IGBT
IGBT:diode: VF(IGBT), ,RRCESAT(IGBT)
•• IGBT: VVCESAT(IGBT)
CESAT(IGBT) D(IGBT)
, RCESAT(IGBT)
•• IGBT
• SiC MOSFET:
IGBTdiode:
diode: R
VVF(IGBT) , ,RRD(IGBT)
DS(MOS)
F(IGBT) D(IGBT)

•• SiC MOSFET:
SiC MOSFET: R DS(MOS)
RDS(MOS) 2
PC = RCD2 · IRMS + VD · I AVG (12)
PPC C ==RRCDCD·I·IRMS
2
RMS ++VV D· I· I AVG
D AVG
(12)
(12)
Oneimportant
One importantmatter
mattertotoconsider
matter considerisisthetheimportance
importanceofofthethediodes.
diodes.When
Whenusing
usingIGBTs,
IGBTs,the
thediodes
diodes
ininanti-parallel
anti-parallelareareON
ONduring
duringaasizeable
sizeablepart
partofofthetheswitching
switchingperiod,
period,whereas
whereaswith
withSiC
SiCMOSFETs
MOSFETs
theyare
they areonly
onlyON ONduring
ON duringthe
during thedead
the deadtimes
dead timesof
times ofofthe
thelegs,
the legs,when
legs, whenno
when noswitch
no switchis
switch isisON.
ON.
ON.
InInthe
thetheoretical
the theoreticalanalysis,
theoretical analysis,the
the current
thecurrent
current and
and and voltage
voltage
voltage levelsininthe
levels
levels theinverter
in inverter
the have
inverter
have beenbeen
have
been obtained from
obtained
obtained from
the
from topology
the topology
the topology steady-state model.
steady-state
steady-state model.model. Later,
Later,
Later, the
the the theoretical values
theoretical
theoretical values
values will
will
will be proven
bebeproven to be similar toto
similar
proventotobe similar
experimentalones.
experimental ones.

Figure6.6.(a)
Figure (a)Initially
(a) InitiallyQ
Initially Q111isis
Q isON
ONand
ON and
andQQQ 2 is
2 is
2 is
OFF.
OFF.InIn
OFF. In this
this
this case,QQ1Q1is1isON
case,
case, isON
ON but
butbutcurrent
current
current flows
flows
flows through DD1;1D
through
through ;(b)
(b)
1;
during
(b)
during switching,
during switching,
switching, QQ1 1switches
Qswitches
1 switches OFF
OFFOFF before
before QQ
before
2
2Qswitches
switches
2
ON.
switches
ON. ON.C C 1
1Cand
and1 CC
and
2
2Ccontinue
continue
continue
2
to
to have
to
have 0
have
0 VV0 and
V
and and
V VIN
IN

Vrespectively
respectively
respectively
IN across their
across their terminals.
terminals.When
When QQ2 isisturned
turned ON,
ON, diode
diode D
D
across their terminals. When Q2 is2 turned ON, diode D1 1will be forced OFF, 111 will
will be
be forced
forced OFF,
OFF, CC will
1will bebe
chargedup
charged upto
totoVVIN andC
INand
IN and CC222will
willbe
will befully
be fullydischarged.
fully discharged.
discharged.

Figure7.7.This
Figure Thisfigure
figureshows
showsthe
theswitching
switchingprocess
processfor
forleg
legQQ3–Q
3–Q4. (a) Initially Q3 is ON and Q4 is OFF;
Figure 7. This figure shows the switching process for leg Q3 –Q44.. (a)
(a) Initially
Initially QQ3 is ON and Q4 is OFF;
3 is ON and Q4 is OFF;
Inthis
In thiscase
case(b), switchesON
(b),QQ4 4switches ONwith
withzero
zerovoltage,
voltage,because
becausethe
thediode
diodeininparallel
parallelDD4 4isisconducting.
conducting.
In this case (b), Q4 switches ON with zero voltage, because the diode in parallel D4 is conducting. Thus,
Thus,
Thus, no turn-on
no turn-on losses are expected in Q 4. However, they appear during the OFF transition of Q3.
no turn-on losses losses are expected
are expected in Q . in Q4. However,
However,
4
they appear
they appear duringduring
the OFF thetransition
OFF transition
of Q . of Q3. 3

Theoperating
The operatingpoint
pointhas
hasbeen
beencalculated
calculatedusing
usingEquations
Equations(1)–(10)
(1)–(10)atatnominal
nominalconditions:
conditions:
The operating point has been calculated using Equations (1)–(10) at nominal conditions:
•• VVININ==800
800V,
V,VVOO==80
80kV
kV(1000
(1000VVininthe
theprimary
primaryside)
side)and
andPPOO==80
80kW
kW(R (R==12.5
12.5ΩΩininthe
theprimary
primary
side).
side).
Energies 2017, 10, 2150 9 of 24

• VIN = 800 V, VO = 80 kV (1000 V in the primary side) and PO = 80 kW (R = 12.5 Ω in the


primary side).

The values obtained for the experimental operating point are as follows:

• Amplitude of the resonant current iPL = 171 A, switching current for leg Q1 –Q2 IS = 52.5 A,
switching current for leg Q3 –Q4 IS = 78.7 A, switching frequency fS = 37.7 kHz and duty cycle
d = 0.388.

The losses in the switches haven been obtained through calculation, using Equations (11) and
(12), the values previously obtained for the nominal operating point and the parameters provided by
the manufacturers in their datasheets.

• IGBT: EON(IGBT) = 36 mJ, EOFF(IGBT) = 18 mJ


• IGBT diode: EREC(DIGBT) = 13 mJ
• MOSFET SiC: EON(MOS) = 8.75 mJ, EOFF(MOS) = 5.95 mJ
• MOSFET SiC diode: EREC(MOS) = 1.92 mJ
• IGBT: VCESAT(IGBT) = 1.2 V, RCESAT(IGBT) = 5.75 mΩ
• IGBT diode: VF(IGBT) = 1.5 V, RD(IGBT) = 1.6 mΩ
• SiC MOSFET: RDS(MOS) = 5 mΩ

The estimated total losses for a full bridge, Table 1, made with IGBTs are 2.54 kW in total:
1.71 kW associated to leg Q1 –Q2 and 836 W coming from leg Q3 –Q4 . This level of losses requires
that two inverters be parallelized in order to share them. If SiC MOSFETs are used instead, losses
in the inverter are reduced to 740 W, with PQ1–Q2 = 503 W and PQ3–Q4 = 237 W, below 1% the total
delivered power.

Table 1. Power Dissipation in a Full Bridge at nominal conditions. POUT = 80 kW, VIN = 800 V,
VO = 1000 V.

POUT = 80 kW VIN = 800 V VO = 1000 V


Power Q1 –Q2 Q3 –Q4 Total ηFB
IGBT 1.71 kW 836 W 2.547 kW 96.9%
MOSFET 503 W 237 W 740 W 99%

2.4. Small Signal Model


The Bode diagram of the inverter expresses the dynamic relationship between the controlled
variable, the output voltage, and the control parameter, the duty cycle (13)

G (s) = V
e0 /de (13)

Transfer function, G(s), has been obtained by modifying the small-signal model of the topology
presented in [25] so as to include the control strategy in the mathematical equations. This strategy sets
a constant switching frequency so that the resonant current is centered with respect to the inverter
voltage, Figure 8. The duty cycle, d, controls the output voltage VO .
The mathematical model was implemented using MATLAB (R2015b, MathWorks, Boston, MA,
USA) Equation (14), which allowed the theoretical Bode diagram of the converter to be plotted
(blue line in Figure 9).

(s + 137 × 103 ) (s2 − s × 58.7 × 103 + 61.8 × 109 )


G (s) = 201.2 × 109 × × (14)
(s + 1.3 × 103 ) × (s + 44.8 × 103 ) × (s + 118.8 × 103 ) (s2 + s × 46 × 103 + 209.4 × 109 )
Energies 2017, 10, 2150 10 of 24
Energies 2017, 10, 2150 10 of 24

T
d
VIN VAB
MAX
iLP iL
t

Switchings
Q1-Q2 Q3-Q4
(a)

(b)

Figure
Figure8.8. (a)
(a) Theoretical
Theoretical waveforms
waveforms of of V
VAB (red) and iPL (blue); (b) Experimental waveforms of VAB
AB (red) and iPL (blue); (b) Experimental waveforms of VAB
(yellow) and i PL (green) scaled to VIN = 80 V, VO = 100 V and PO = 800 W.
(yellow) and iPL (green) scaled to VIN = 80 V, VO = 100 V and PO = 800 W.

A scaled prototype, Figure 10, was assembled to validate the theoretical Bode plot. It is a 10:1
A scaled prototype, Figure 10, was assembled to validate the theoretical Bode plot. It is a 10:1
version, in voltage and current, of the final power supply: VIN = 80 V, VO = 100 V, fS = 38 kHz, R = 12.5
version, in voltage and current, of the final power supply: VIN = 80 V, VO = 100 V, fS = 38 kHz,
Ω, CO = 96 µF and PO = 800 W. All the variables have been transferred to the primary of the
R = 12.5 Ω, CO = 96 µF and PO = 800 W. All the variables have been transferred to the primary of the
transformer. Transformer parasitics, LS and CP, have been implemented using discrete components.
transformer. Transformer parasitics, LS and CP , have been implemented using discrete components.
In this case, an analogue circuit implements the phase-shifted control. This gain must be considered
In this case, an analogue circuit implements the phase-shifted control. This gain must be considered
when comparing experimental measurement and theoretical prediction.
when comparing experimental measurement and theoretical prediction.
Figure 9 also shows the experimental small signal behavior of the prototype (in orange). Data
Figure 9 also shows the experimental small signal behavior of the prototype (in orange). Data are
are captured by means of a differential probe and a data acquisition card as explained in [34]. The
captured by means of a differential probe and a data acquisition card as explained in [34]. The difference
difference between the mathematical calculation and the experimental measurement is not
between the mathematical calculation and the experimental measurement is not significant. It is
significant. It is important to remember that any theoretical small signal model should be valid up to
important to remember that any theoretical small signal model should be valid up to one tenth of the
one tenth of the switching frequency, i.e., up to 4 kHz in this case.
switching frequency, i.e., up to 4 kHz in this case.
The authors in a previous work [33] performed the control of the converter with an analog control,
C(jω). In this work, the design of the digital feedback loop [35,36] is based on classical control theory
and small signal analysis (Figure 11). Other techniques based in digitally controlled power converter
based on DSP [10] could be used always. All the transfer functions used have been discretized
using the ZOH approximation with TS = 1/fS . Since the output voltage, VO in Figure 10, is floating,
a differential amplifier is used to feedback the output voltage, H(z). The Bode diagram of the inverter
is G(z). Its differential gain is 31.25 × 10−6 and it presents a high-frequency pole at 4 kHz to eliminate
noise. The regulator, C(z), introduces a proportional integral action, PI, (15). The pole at the origin
(a)
A scaled prototype, Figure 10, was assembled to validate the theoretical Bode plot. It is a 10:1
version, in voltage and current, of the final power supply: VIN = 80 V, VO = 100 V, fS = 38 kHz, R = 12.5
Ω, CO = 96 µF and PO = 800 W. All the variables have been transferred to the primary of the
transformer. Transformer parasitics, LS and CP, have been implemented using discrete components.
Energies 2017, 10, 2150 11 of 24
In this case, an analogue circuit implements the phase-shifted control. This gain must be considered
when comparing experimental measurement and theoretical prediction.
guarantees
Figure 9 also the absence
shows of a position
the error. The
experimental regulator’s
small signal gain is set to
behavior ofprovide enough phase
the prototype margin, Data
(in orange).
64.5 degrees, and a bandwidth of 502 Hz. Altogether, this decision avoids dangerous oscillations in the
are captured by means of a differential probe and a data acquisition card as explained in [34]. The
output voltage (Figure 12):
difference between the mathematical calculation(z and the
− 0.926 ) experimental measurement is not
significant. It is important to remember C (zthat
) = any
0.8873 ·
theoretical small (15)up to
signal model should be valid
z−1
one tenth of the switching frequency, i.e., up to 4 kHz in this case.

Energies 2017, 10, 2150 11 of 24


(a)

Energies 2017, 10, 2150 11 of 24

(b)
(b)
Figure 9. Experimental
Experimental(orange) and theoretical (blue) Bodeplots
plotsforfor
thethe power source operating on
Figure 9. 9.
Figure Experimental(orange)
(orange)and
andtheoretical
theoretical (blue) Bode
(blue) Bode plots for the power
power source
source operating
operating onon
scaled output
scaled voltage
output and
voltage power
and powerusing
using centered-current
centered-current control.
control. (a)
(a) Magnitude
Magnitude in in
(dB)(dB)
and and
(b)
scaled output voltage and power using centered-current control. (a) Magnitude in (dB) and (b) phase (b)
phasephase
in degrees.
in in
degrees.
degrees.

iD iDiO iO
Q1 Q1 D1 D1 Q DD3 3
Q3 3 C LS DA DC
r CSS
iLPiLP r LS DA DC

VIN VAB CP V1 CO R
VO CO R
VIN VAB CP V1 VO
Q2 D2 D4
Q4
Q2 D2 D4 DB DD
Q4
B D D D
Figure 10. Experimental converter used to obtain the Bode diagram and the corresponding
Figure 10. Experimental converter used to obtain the Bode diagram and the corresponding waveforms.
waveforms. The transformer has been replaced by discrete LS and CP parts.
The transformer has been replaced by discrete LS and CP parts.
Figure 10. Experimental converter used to obtain the Bode diagram and the corresponding
The authors
waveforms. in a previous
The transformer workreplaced
has been [33] performed the control
by discrete LS and CofP parts.
the converter with an analog
control, C(jω). In this work, the design of the digital feedback loop [35,36] is based on classical control
theory and small signal analysis (Figure 11). Other techniques based in digitally controlled power
The authors in a previous work [33] performed the control of the converter with an analog
converter based on DSP [10] could be used always. All the transfer functions used have been
control, C(jω). In this work, the design of the digital feedback loop [35,36] is based on classical control
discretized using the ZOH approximation with TS = 1/fS. Since the output voltage, VO in Figure 10, is
theory floating,
and small signal analysis
a differential amplifier(Figure
is used to11). Otherthetechniques
feedback based
output voltage, H(z).inThe
digitally controlled
Bode diagram of the power
converter based
inverter on Its
is G(z). DSP [10] could
differential gain be used always.
is 31.25·10 All thea transfer
−6 and it presents functions
high-frequency pole atused
4 kHzhave
to been
discretized using
eliminate theThe
noise. ZOH approximation
regulator, withaTproportional
C(z), introduces S = 1/fS. Since the output
integral voltage,
action, PI, VOpole
(15). The in Figure
at the 10, is
origin
floating, guarantees amplifier
a differential the absenceisofused
a position error. The
to feedback regulator’s
the gain is setH(z).
output voltage, to provide
The Bodeenough phase of the
diagram
margin, 64.5 degrees, and a bandwidth of 502 Hz. Altogether, this decision avoids
inverter is G(z). Its differential gain is 31.25·10 and it presents a high-frequency pole at 4 kHz to
−6 dangerous
oscillations in the output voltage (Figure 12):
Energies 2017, 10, 2150 12 of 24
Energies 2017, 10, 2150 12 of 24
Energies 2017, 10, 2150 12 of 24

Control Power
Controller Control Power
Circuit Stage
Controller Circuit Stage
PWM
Vref PWM Vo
Vref + C(z) Phase G(z) Vo
+- C(z) Phase G(z)
- Shift
Shift
TMS320F28027
TMS320F28027
Feedback
H(z) Feedback
H(z)

Figure 11. Digital Feedback system block diagram.


Figure 11. Digital
Figure 11. Digital Feedback
Feedback system
system block
block diagram.
diagram.

Figure 12. Experimental waveforms. VAB (yellow), iPL (green), VO (magenta). Bottom: Zoom of the top
Figure 12. Experimental waveforms. VAB (yellow), iPL (green), VO (magenta). Bottom: Zoom of the top
waveform.
Figure 12. Experimental waveforms. VAB (yellow), iPL (green), VO (magenta). Bottom: Zoom of the
waveform.
top waveform.
3. Experimental Results
3. Experimental Results
3. Experimental
The converter Results
has been tested experimentally as shown in Figure 12. Actual waveforms and their
The converter has been tested experimentally as shown in Figure 12. Actual waveforms and their
values match theoretical
The converter has been ones.tested
Figure 13 shows a picture
experimentally of theintest
as shown bench.
Figure 12.AActual
TMS320F28027
waveforms digital
and
values match theoretical ones. Figure 13 shows a picture of the test bench. A TMS320F28027 digital
microcontroller
their values match (Copyright © ones.
theoretical 2010, Texas
FigureInstruments Incorporated,
13 shows a picture Dallas,
of the test TX,AUSA)
bench. is used to
TMS320F28027
microcontroller (Copyright © 2010, Texas Instruments Incorporated, Dallas, TX, USA) is used to
implement the phase-shift
digital microcontroller control©and
(Copyright theTexas
2010, digital regulator C(z).
Instruments Incorporated, Dallas, TX, USA) is used to
implement the phase-shift control and the digital regulator C(z).
It must be noted that the power switches,
implement the phase-shift control and the digital regulator the output rectifier,
C(z). DA–DD, and a three-phase input
It must be noted that the power switches, the output rectifier, DA–DD, and a three-phase input
rectifier havebebeen
It must notedinstalled
that theon the heatsink
power switches, shown in therectifier,
the output figure (the three-phase
DA –D rectifier together
D , and a three-phase input
rectifier have been installed on the heatsink shown in the figure (the three-phase rectifier together
with a filter capacitor allows voltage V to be obtained from the three-phase mains). The
rectifier have been installed on the heatsink shown in the figure (the three-phase rectifier together with
IN temperature
with a filter capacitor allows voltage VIN to be obtained from the three-phase mains). The temperature
of the capacitor
a filter heatsink will increase
allows voltagedue
VIN to
to the losses infrom
be obtained the the
switches and inmains).
three-phase both rectifiers. The nominal
The temperature of the
of the heatsink will increase due to the losses in the switches and in both rectifiers. The nominal
conditions are:
heatsink will increase due to the losses in the switches and in both rectifiers. The nominal conditions
conditions are:
•are: VIN = 800 V, VO = 1000 V and PO = 80 kW (R = 12.5 Ω on the primary side and CO = 96 µF). Resonant
• VIN = 800 V, VO = 1000 V and PO = 80 kW (R = 12.5 Ω on the primary side and CO = 96 µF). Resonant
• current
V amplitude
V, VO = ii1000
PL = 171 A, duty cycle d = 0.358, switching frequency fS = 37.8 kHz.
V and PO =cycle Ω on the CO = 96 µF).
IN = 800
current amplitude PL = 171 A, duty
80 kW
d = (R = 12.5
0.358, switching primaryfSside
frequency and
= 37.8 kHz.
Resonant current amplitude iPL = 171 A, duty cycle d = 0.358, switching frequency fS = 37.8 kHz.
Energies 2017, 10, 2150 13 of 24

In a first batch of tests, the 800 V–80 kW VIN input source was implemented by means of an
electrolytic capacitor bank of 84 mF. The capacitor discharges from a maximum value (VIN = 825 V) to a
minimum value (VIN = 720 V) as seen in Figure 12. The regulation works perfectly without appreciable
overvoltage at2150
Energies 2017, 10, the start-up. 13 of 24

Power Stage

TMS320F28027
Texas Instruments
Microcontroller

Figure
Figure 13. Converter Test
13. Converter Test Bench
Bench with
with digital
digital control.
control.

3.1. Thermal Analisys


In a first batch of tests, the 800 V–80 kW VIN input source was implemented by means of an
electrolytic
The losses in thebank
capacitor of 84 mF. prototype
experimental The capacitor
are discharges fromcompared
evaluated and a maximum value
with (VIN = 825
theoretical V) to
values.
a minimum value (V IN = 720 V) as seen in Figure 12. The regulation works perfectly without
Measurements are taken on the case of the switches and on the heatsink near them. Additionally, the
appreciable overvoltage
temperature profile, usingat both
the start-up.
types of semiconductors, is analyzed with a thermal camera [37,38].
In this case, the mains are used as input voltage.
3.1. Thermal Analisys
3.1.1.The
Thermal
lossesAnalysis for PO = 5 kW
in the experimental prototype are evaluated and compared with theoretical values.
Measurements are taken on the case of the switches
Thermal measurements of the converter for POand
= 5onkW
thehave
heatsink
beennear
madethem. Additionally,
under the
the following
temperature profile, using both types of semiconductors, is analyzed with a thermal camera [37,38].
conditions:
In this case, the mains are used as input voltage.
• VIN = 300 V, VO = 255 V, PO = 5 kW.
•3.1.1.Si-IGBTs
Thermaland SiC-MOSFETs
Analysis as switches. Non-forced ventilation. Reference of the heatsink
for PO = 5 kW
(Rthha = 0.063 ◦ K/W) RG40160N87/500AFR.
Thermal measurements of the converter for PO = 5 kW have been made under the following
The
conditions:operating point of the converter, Figure 14, is in this case:
•• Amplitude
VIN = 300 V, of
VOthe resonant
= 255 5 kW. iPL = 43.8 A, switching current for leg (Q1 –Q2 ) IS = 28.7 A,
V, PO = current
• switching current for leg
Si-IGBTs and SiC-MOSFETs3as(Q 4 ) IS = 38.7
–Qswitches. A, switching
Non-forced fS = 37.7 of
frequencyReference
ventilation. kHztheand duty cycle
heatsink (Rthha
d= = 0.22.°K/W) RG40160N87/500AFR.
0.063
Figures 15 and point
The operating 16 show the converter,
of the temperature increment
Figure vs.this
14, is in time. In these figures, AR01 represents the
case:
measurement area considered for leg Q3 –Q4 , AR02 is that associated to leg Q1 –Q2 , and AR03 is the
• Amplitude of the resonant current iPL = 43.8 A, switching current for leg (Q1–Q2) IS = 28.7 A,
heatsink. The temperatures measured after 15 min are shown in Table 2. It can be clearly observed
switching current for leg (Q3–Q4) IS = 38.7 A, switching frequency fS = 37.7 kHz and duty cycle d
how the temperature in the SiC MOSFETs is lower than that in the Si IGBTs.
= 0.22.
Energies 2017, 10, 2150 14 of 24

Energies 2017, 10, 2150 14 of 24


Energies 2017, 10, 2150 14 of 24

Figure 14. Experimental waveforms for VAB (yellow) and iPL (green), with Vin = 300 V, VO = 250 V and
PO = 5 kW.

Figures 15 and 16 show the temperature increment vs. time. In these figures, AR01 represents
theFigure 14. Experimental
measurement waveforms
area considered for for
leg V (yellow)
QAB3–Q 4, AR02and iPL (green),
is that withtoVleg
associated in = 300
Q1–QV,2,Vand
O = 250 V and
AR03 is the
Figure
P = 5 14. Experimental waveforms for VAB (yellow) and iPL (green), with Vin = 300 V, VO = 250 V and
kW.
heatsink. The temperatures measured after 15 min are shown in Table 2. It can be clearly observed
O
PO = 5 kW.
how the temperature in the SiC MOSFETs is lower than that in the Si IGBTs.
Figures 15 and 16 show the temperature increment vs. time. In these figures, AR01 represents
the measurement area considered for leg Q3–Q4, AR02 is that associated to leg Q1–Q2, and AR03 is the
heatsink. The temperatures measured after 15 min are shown in Table 2. It can be clearly observed
how the temperature in the SiC MOSFETs is lower than that in the Si IGBTs.

Figure 15. Temperature Measurement (5 kW) of each leg using IGBTs FF300R12KS4. (a) Infrared
Figure 15. Temperature Measurement (5 kW) of each leg using IGBTs FF300R12KS4. (a) Infrared
image of power stage; (b) Maximum, minimum and difference values measured in each AR0x zone;
image of power stage; (b) Maximum, minimum and difference values measured in each AR0x zone;
(c) Temperature evolution in each leg and heatsink; blue: AR02 (Q1–Q2); red: AR01 (Q3–Q4); green:
(c) Temperature evolution in each leg and heatsink; blue: AR02 (Q1 –Q2 ); red: AR01 (Q3 –Q4 ); green:
AR03 (heatsink).
AR03 (heatsink).

Figure 15. Temperature Measurement (5 kW) of each leg using IGBTs FF300R12KS4. (a) Infrared
image of power stage; (b) Maximum, minimum and difference values measured in each AR0x zone;
(c) Temperature evolution in each leg and heatsink; blue: AR02 (Q1–Q2); red: AR01 (Q3–Q4); green:
AR03 (heatsink).
Energies 2017, 10, 2150 15 of 24
Energies 2017, 10, 2150 15 of 24

Figure 16.16.
Figure Temperature
Temperature Measurement
Measurement (5(5kW)
kW)ofof each
each leg using
using MOSFETs
MOSFETsCAS300M12BM2.
CAS300M12BM2.(a) (a)Infrared
Infrared image of power stage; (b) Maximum, minimum and difference values measured
image of power stage; (b) Maximum, minimum and difference values measured in each AR0x zone; in each
AR0x zone; (c) Temperature
(c) Temperature evolution
evolution in each in
legeach
andleg and heatsink;
heatsink; blue: AR02
blue: AR02 (Q1 –Q(Q 1–Q2); red: AR01 (Q3–
2 ); red: AR01 (Q3 –Q4 ); green:
Q4);AR03
green: AR03 (heatsink).
(heatsink).

It can also be observed that leg Q1–Q2, which experiences hard switching, is hotter than leg Q3–
It can also be observed that leg Q –Q , which experiences hard switching, is hotter than leg
Q4, where ZVS takes place. As expected, it1was2 not possible to complete the full power test with
Q3 –Q4 , where ZVS takes place. As expected, it was not possible to complete the full power test with
IGBTs: thermal problems made advisable not to go beyond 5 kW.
IGBTs: thermal problems made advisable not to go beyond 5 kW.
Table 2. Temperature Measurements for PO = 5 kW in SiC MOSFET and Si IGBT after 15 min.
Table 2. Temperature Measurements for PO = 5 kW in SiC MOSFET and Si IGBT after 15 min.
PO = 5 kW VIN = 300 V VO = 250 V
Temperature PO = 5 kW VIN = 300 V TVQ3–Q4
T Q1–Q2 THeatsink
O = 250 V
IGBT 54.6 °C 45.3 °C 36.2 °C
Temperature T Q1–Q2 T Q3–Q4 T
MOSFET 34 °C 31.8 °C 30.6Heatsink
°C
IGBT 54.6 C◦ ◦
45.3 C 36.2 ◦ C
MOSFET
3.1.2. Thermal Analysis for PO = 20 kW 34 ◦ C 31.8 ◦ C 30.6 ◦ C

The thermal measurement of the converter for PO = 20 kW has been made under the following
3.1.2. Thermal Analysis for PO = 20 kW
conditions:
The thermal measurement of the converter for PO = 20 kW has been made under the
• VIN = 400 V, VO = 500 V, PO = 20 kW
• following conditions:
SiC-MOSFETs. Non-forced ventilation. Reference of the heatsink (Rthha = 0.063 °K/W)
• RG40160N87/500AFR.
VIN = 400 V, VO = 500 V, PO = 20 kW
• The
SiC-MOSFETs. Non-forced ventilation. ◦
operating point of the converter, Figure 17, inReference
this case is:of the heatsink (Rthha = 0.063 K/W)
RG40160N87/500AFR.
• Amplitude of the resonant current iPL = 84 A, switching current for leg Q1–Q2 IS = 23 A, switching
The operating
current point
for leg Q3–Q of34the
4 IS = A, converter, Figure 17, fin
switching frequency S = this
37.7 case
kHz is:
and duty cycle d = 0.385.

• Amplitude of the resonant current iPL = 84 A, switching current for leg Q1 –Q2 IS = 23 A, switching
current for leg Q3 –Q4 IS = 34 A, switching frequency fS = 37.7 kHz and duty cycle d = 0.385.
Figure 18 shows the temperature increment vs. time when the converter is assembled with SiC
MOSFETs. AR01 represents the measurement area considered for leg Q3 –Q4 , AR02 is that associated
to leg Q1 –Q2 , and AR03 is the heatsink. The temperatures measured after 15 min are shown in Table 3.
Energies 2017, 10, 2150 16 of 24

Energies 2017, 10, 2150 16 of 24


Energies 2017, 10, 2150 16 of 24

Figure 17. Experimental waveforms for VAB (yellow) and iPL (green), with Vin = 400 V, VO = 500 V and
PO = 20 kW.

Figure 18 shows the temperature increment vs. time when the converter is assembled with SiC
MOSFETs.
Figure 17.AR01 represents
Experimental the measurement
waveforms area considered
for VAB (yellow) for leg
and iPL (green), Q3–Q
with Vin 4=, AR02
400 V, is
VOthat associated
= 500 V and
Figure 17. Experimental waveforms for VAB (yellow) and iPL (green), with Vin = 400 V, VO = 500 V and
to P
leg Q –Q
O = 20 kW.
1 2, and AR03 is the heatsink. The temperatures measured after 15 min are shown in Table
PO = 20 kW.
3.
Figure 18 shows the temperature increment vs. time when the converter is assembled with SiC
MOSFETs. AR01 represents the measurement area considered for leg Q3–Q4, AR02 is that associated
to leg Q1–Q2, and AR03 is the heatsink. The temperatures measured after 15 min are shown in Table
3.

Figure 18. Temperature Measurement (20 kW) of each leg using MOSFETs CAS300M12BM2. (a)
Figure 18. Temperature Measurement (20 kW) of each leg using MOSFETs CAS300M12BM2. (a)
Infrared image of power stage; (b) Maximum, minimum and difference values measured in each
Infrared image of power stage; (b) Maximum, minimum and difference values measured in each AR0x
zone; (c) Temperature evolution in each leg and heatsink; blue: AR02 (Q1 –Q2 ); red: AR01 (Q3 –Q4 );
green: AR03 (heatsink).

Figure 18. Temperature Measurement (20 kW) of each leg using MOSFETs CAS300M12BM2. (a)
Infrared image of power stage; (b) Maximum, minimum and difference values measured in each
Energies 2017, 10, 2150 17 of 24

Table 3. Temperature Measurements for PO = 20 kW in SiC MOSFET after 15 min.

PO = 20 kW VIN = 400 V VO = 500 V


Temperature T Q1–Q2 T Q3–Q4 T Heatsink
MOSFET 39.9 ◦C 35.3 ◦C 34.3 ◦ C

Table 4 shows that the temperature increment in the switches has been moderate. In fact, the
dissipation in the semiconductors is mostly due to switching losses: they depend on the input voltage
and the current value at the time of switching. Notice that, at 20 kW, the supply voltage is higher than
the one corresponding to PO = 5 kW, whereas the switching current is lower; thus, overall increment of
losses is far from being proportional to the delivered power.

Table 4. Temperature Measurements for SiC MOSFET and Si IGBT after 15 min for 5 kW and 20 kW.

POUT = 20 kW VIN = 400 V VO = 500 V


Temperature T Q1–Q2 T Q3–Q4 T Heatsink
MOSFET 39.9 ◦ C 35.3 ◦ C 34.3 ◦ C
POUT = 5 kW VIN = 300 V VO = 250 V
IGBT 54.6 ◦ C 45.3 ◦ C 36.2 ◦ C
MOSFET 34 ◦ C 31.8 ◦ C 30.6 ◦ C
Summary of the temperatures reached by the switches and heatsinks for the indicated operating points after 15 min
and for the switches used.

3.1.3. Thermal Analysis to Estimate the Steady-State Temperature


Temperature variation in the converter has been measured using SiC MOSFET switches for a time
interval of 3 h, so that it is possible to estimate the steady-state temperature value.
Thermal measurements of the converter for PO = 20 kW have been made under the
following conditions:

• VIN = 400 V, VO = 500 V, PO = 20 kW


• SiC-MOSFETs. Non-forced ventilation. Reference of the heatsink (Rthha = 0.063 ◦ K/W)
RG40160N87/500AFR.

The operating point of the converter, Figure 17, in this case is:

• Amplitude of the resonant current iPL = 84 A, switching current for leg Q1 –Q2 IS = 23 A, switching
current for leg Q3 –Q4 IS = 34 A, switching frequency fS = 37.7 kHz and duty cycle d = 0.385.

An exponential approximation has been used in order to estimate the temperature in the inverter’s
steady state, since this state has not been reached during the measurement process (Figure 19).
The maximum temperature for the semiconductors and the heatsink in steady state are: TQ1–Q2 = 65 ◦ C,
TQ3–Q4 = 60 ◦ C and Th = 56 ◦ C. In the case of the heatsink, the temperature rise is the result of the losses
of the three-phase rectifier, the output rectifier and the inverter switches.
The temperature that would have reached the hottest element within each leg, Tj , has been
calculated using Equations (16)–(18) and compared to that measured in the experimental results.
The following values have been obtained: Tj(Q1,Q2) = 61.7 ◦ C, Tj(Q3,Q4) = 58.9 ◦ C and Th = 56.8 ◦ C.
These calculations are consistent with the experiments.
Tj(Q1,Q2) or Tj(Q3,Q4) are the temperatures at the junction of the switch, TH is the heatsink
temperature and TA is the ambient temperature (all of them expressed in degrees Celsius). Rth
values have been obtained from the datasheets, the power dissipated in one leg is PQ1–Q2 ; the one
dissipated in one switch is P(Q1,Q2) that dissipated in the three-phase rectifier, PRecT ; and the power
loss in the output rectifier, PRecO . The expressions used for the calculations are (16)–(18):
Energies 2017, 10, 2150 18 of 24

Tj(Q1,Q2) = Th + Rthch · PQ1–Q2 + Rthjc(Q1,Q2) · P(Q1 ,Q2) (16)

Tj(Q3, Q4) = Th + Rthch · PQ3–Q4 + Rthjc(Q3,Q4) · P(Q3,Q4) (17)

Th = Rthha · ( PQ1–Q2 + PQ3–Q4 + PRecT + PRecO ) + TA (18)

The use of IGBTs is not recommended, since the temperatures reached by leg Q1 –Q2 exceed 50 ◦ C
in only 15 min at 5 kW. On the other hand, temperature reaches only 40 ◦ C at 20 kW with SIC MOSFET.
Energies 2017, 10, 2150 18 of 24

Figure 19. Measurement of temperature in °C (20 kW) for each leg and for the heatsink using MOSFET
Figure 19. Measurement of temperature in ◦ C (20 kW) for each leg and for the heatsink using MOSFET
CAS300M12BM2 for a time interval of 3 h (dots). Exponential approximations are also included for
CAS300M12BM2 for a time interval of 3 h (dots). Exponential approximations are also included for the
the temperature (a) in Q3–Q4 (blue), (b) Q1–Q2 (red) and (c) heatsink (green).
temperature (a) in Q3 –Q4 (blue), (b) Q1 –Q2 (red) and (c) heatsink (green).
Tj(Q1,Q2) or Tj(Q3,Q4) are the temperatures at the junction of the switch, TH is the heatsink temperature
and TA is the ambient temperature (all of them expressed in degrees Celsius). Rth values have been
obtained from the datasheets, the power dissipated in one leg is PQ1–Q2; the one dissipated in one
switch is P(Q1,Q2) that dissipated in the three-phase rectifier, PRecT; and the power loss in the output
rectifier, PRecO. The expressions used for the calculations are (16)–(18):
Energies 2017, 10, 2150 19 of 24

3.1.4. Power Loss Comparison


Table 5 shows a summary of the estimated power losses in the complete bridge for three different
output powers, PO : 80 kW, 20 kW and 5 kW. In all the cases, efficiency close to 99% is achieved when
using SiC MOSFET as switches.

Table 5. Theoretical Power Dissipation in Full Bridge topology.

POUT = 80 kW VIN = 800 V VO = 1000 V


Power Q1 –Q2 Q3 –Q4 Total ηFB
IGBT 1.71 kW 836 W 2.547 kW 96.9%
MOSFET 503 W 237 W 740 W 99%
POUT = 20 kW VIN = 400 V VO = 500 V
IGBT 515 W 239 W 755 W 96.3%
MOSFET 107 W 47 W 154 W 99.2%
POUT = 5 kW VIN = 300 V VO = 250 V
IGBT 407 W 166 W 573 W 89.7%
MOSFET 70 W 28 W 98 W 98%

3.2. High-Voltage Test


The authors tested in a previous work the inverter operating at low output voltage, without
including the high-voltage transformer, and using analog control circuitry [33]. In the present work,
the converter has been experimentally tested including the high-voltage transformer too [39–41],
Figure 5. The results obtained allow a good operation of the converter to be verified, as shown in
Figure 20. The original analog control circuitry has been replaced by a digital control circuit based on
the TMS320F28027 microcontroller.
Energies 2017, 10, 2150 20 of 24

Figure 20. Experimental waveforms for VAB (yellow) and iPL (green), with VIN = 385 V (red), VO = 40 kV
Figure 20. Experimental
(magenta) waveforms for VAB (yellow) and iPL (green), with VIN = 385 V (red),
and PO = 22 kW.
VO = 40 kV (magenta) and PO = 22 kW.
4. Discussion
The operating
The study point of the converter
demonstrates in of
that the use Figure 20 is:
SiC MOSFETs is an important improvement in high-
power, high-voltage DC/DC converters for electrostatic precipitators. Lower switching losses (as
• V IN = 385 to
compared VO =IGBT-counterpart)
V,their 40.55 kV (1:10,000leadratio)
to an and PO = in22.11
efficiency kW. Resonant
the prototype that iscurrent amplitude
several points
ihigher,
PL = 94both
A, duty cycle
at high d =low
and 0.43, switching
output powerfrequency fS = 37.8
levels. Moreover, kHz.
the switching characteristics of the
MOSFETs influence the control strategy of the whole converter. With IGBTs, it was very important
to ensure that the antiparallel diode was always ON before turning the main switch ON. However,
with the new MOSFETs, preserving zero voltage switching is no longer so important. The
mathematical models and the experimental measurements demonstrate that hard switching at 40
kHz is a good option. This gives rise to a new concept of “good behavior” in the inverter. The best
way to reduce losses and current amplitude is to center the resonant current in the switching period,
Energies 2017, 10, 2150 20 of 24

4. Discussion
The study demonstrates that the use of SiC MOSFETs is an important improvement in high-power,
high-voltage DC/DC converters for electrostatic precipitators. Lower switching losses (as compared to
their IGBT-counterpart) lead to an efficiency in the prototype that is several points higher, both
at high and low output power levels. Moreover, the switching characteristics of the MOSFETs
influence the control strategy of the whole converter. With IGBTs, it was very important to ensure
that the antiparallel diode was always ON before turning the main switch ON. However, with the
new MOSFETs, preserving zero voltage switching is no longer so important. The mathematical
models and the experimental measurements demonstrate that hard switching at 40 kHz is a good
option. This gives rise to a new concept of “good behavior” in the inverter. The best way to reduce
losses and current amplitude is to center the resonant current in the switching period, i.e., to make
the phase between the current and the first harmonic of the inverter voltage zero. Instantaneous
waveforms, thermal measurement and power balance in a full-scale prototype support the study with
experimental evidence.
The control method has some limitations:
The converter is designed to operate at a constant frequency, therefore, it will be necessary to
implement a variable frequency control to keep it in phase with the voltage when the load changes,
controlling the mode centered in the current. The converter does not should to work with low duty
cycles, since both legs would be switching with higher current values and thus will be increased the
losses in the switches. This can occur for a constant load with low output voltages. A decrease in
the load will produce an increase in the switching frequency to maintain the current in phase and,
therefore, an increase in losses.
On the other hand, the architecture of the control has been digitally implemented. The small
signal model of the topology is a good basis to support the design. A simple linear structure for the
feedback is demonstrated to be valid. The transient response is fast enough, avoiding any overvoltage
at the output. This is quite relevant, since, otherwise, the isolation in the step-up transformer could be
under risk. Again, the experiments in the prototype verify the theoretical study, supporting the whole
control scheme.

5. Conclusions
In this paper, a new centered-current control that allows reactive energy and, therefore, the current
in the resonant tank to be minimized, thus reducing conduction losses, is proposed. Likewise, by
means of this control mode, it is possible to reduce switching losses, since switching operations take
place at low current. To improve the commutations, SiC MOSFETs have been used instead of Si IGBTs,
which resulted in an efficiency of 98% in the power stage. A dynamic model has been proposed that
allows a digital regulator to be calculated for a bandwidth of 500 Hz, typically enough for this type
of application. This converter has been tested experimentally at nominal values and at high output
voltage, with no appreciable over voltages having been observed with the selected regulator.
In order to complete the design of this converter it will be necessary to enhance the following
goals in the future:

• Allow the digital control of the converter to adjust its frequency taking into account that the load
R will be modified due to the conditions of the contaminated gases. Up to now, the constant R
load has been considered.
• Implement a regulator that allows the rapid recovery of the output voltage in case of short-circuits,
due to the effect of the back corona.
• Perform tests in the production plant where we have agreements with companies. In our case
Arcelor-Mittal, a company dedicated to steel production in Asturias, Spain.
Energies 2017, 10, 2150 21 of 24

Acknowledgments: This work has been co-funded by the Plan of Science, Technology and Innovation of
the Principality of Asturias through Project FC-15-GRUPIN14-122, and by the Spanish Government with the
action TEC2014-53324-R.
Author Contributions: This paper is part of a research carried out by Pedro J. Villegas, and Juan A. Martín-Ramos,
Juan Díaz and Juan Á. Martínez, whereas Miguel J. Prieto and Alberto M. Pernía assisted with thermal
measurements and prototype development.
Conflicts of Interest: The authors declare no conflict of interest.

Abbreviations
AR01 Thermal measurement surface for Q3 , Q3 leg
AR02 Thermal measurement surface for Q1 , Q2 leg
AR03 Thermal measurement surface for heatsink
CP Parasitic capacitance of the transformer
CS Serial Capacitance of the topology
CX Equivalent capacitor in large signal model
C(z) Control (z) transference function
d duty cycle
DA –DD Output diodes
D1 –D4 Diodes in anti-parallel of switches
EOFF Turn OFF Energy
EON Turn ON energy
EREC Diode Recovery Energy
ESP Electrostatic Precipitators
G(s) Power stage (s) transference function
G(z) Power stage (z) transference function
fS Switching frequency
H(z) Feedback (z) transference function
HF-SMPS High Frequency Switching Mode Power Supply
iD Current through the output diodes
IGBT Insulated Gate Bipolar Transistor
iPL Current of the resonant tank
IAVG Average current of the semiconductors
IN Nominal Current of the switches (300 A on the datasheets)
IRMS RMS current of the semiconductors
IS Switching current
LS Parasitic Inductance of the transformer
MOSFETs Metal Oxide Semiconductor Field Effect Transistors
n1 and n2 Numbers of turns in the primary, n1 , and secondary, n2 , of transformer
PO Output power of the converter
P(Qx,Qy) Power dissipated in each semiconductor
PQx–Qy Power dissipated in one leg
PRecT Power dissipated in tri-phase main power supply rectifier
PRecO Power dissipated in output rectifier
PRC-LCC Series-Parallel Resonant Converter with an inductive output filter
Q1 –Q4 Switches in the converter
R Equivalent load of the converter
RCD Conduction resistance of IGBT
RCESAT Collector-Emitter saturation resistor
RD Diode resistance
RDS Drain-Source resistance
Rthch Thermal resistance between case and heatsink
Rthha Thermal resistance between heatsink and ambient
Rthjc Thermal resistance between junction and case
Energies 2017, 10, 2150 22 of 24

RX Equivalent resistor in large-signal model


r Equivalent resistance of the circuit
t Time
Si Silicon
SiC Silicon Carbide
T Period
Tj Junction Temperature
Th Heatsink Temperature
TA Ambient Temperature
VCESAT Collector-Emitter saturation voltage
VD Voltage drop in the semiconductors
VIN Input DC voltage of the converter
VN Nominal voltage of the switches (600 V on the datasheets)
VO Output DC voltage of the converter
VAB Input voltage of the resonant tank
VS Voltage across the series inductance
VP Voltage across the parallel capacitor, CP
ZCS Zero-current switching
ZVS Zero-voltage switching
ZOH First order z conversion
φ Delay between input voltage, VAB , and resonant current, iLP
Ψ Output diodes clamping angle
ωs Pulsating frequency

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