Supervised by
We accept the work contain in this report as a confirming to the required standard for
the partial fulfillment of degree BE in the subject of Industrial Electronic Engineering.
Date ________
We dedicate this effort to our parents, with love.
First and foremost we would like to thank Almighty ALLAH, who gave us enough strength
to complete this project. We would also like to express our deep appreciation to our parents.
The success of this project would have not been possible without the support from our
parents.
Acknowledgement is extended to our project supervisor Engr. Salman Jaffery for his help,
motivation, encouragement and guidance throughout the project.
We owe a word of special thanks to Mr. Javaid Nizam who helped us in the construction of
iron core transformer.
We also want to thank our class-mates, particularly those who regularly offered new ideas
and helping hand.
The UPS is the alternate energy technique, which is widely used by the people of Pakistan.
But there is a problem regarding the local manufacturing of the UPS. There is no battery
protection available in the UPS which increases the cost of the battery which is the most
expensive part of the UPS. Another problem is that there is no proper technical support,
which give the information to the non-technical customer about the handling of UPS when
there is a fault has been occur in the UPS. There is a lack of efficiency in the transformer,
which decreases the efficiency of the UPS.
To over come this problem gives the complete battery protection from the over charging and
from the deep discharging by giving the online monitoring system, which have been done by
using a microcontroller with ADC and the LCD which is used to give the user friendly
massages to the user or customer. This technique help the user to understand that what they
will do when there is a problem has been occur in the UPS.
To overcome the losses of the transformer the manufacturer should select a pure copper wire
with precise wire guage selection, the proper iron core (mostly the EI type), there is no
rough edges at the corner of the cores of transformer because it will generate an air gap
which creates heavy losses in the transformer, buy a precise and standard winding machine
in order to done a proper winding of the transformer.
Chapter 1: INRODUCTION TO UPS
REFERENCES……………………………………………………………………..
For example(
Figure 1: Block Diagram of Digital Communication……………………………6
Figure 2: Transmitter……………………………………………………………10
)
Uninterruptible power supply
(UPS)
Uninterruptible power supply (UPS) is an electronic device that
continues to supply electric power to the load for a certain period of
time during a loss of utility power or when the line voltage varies
outside normal limits.
UPS types:
A variety of design approaches are used to implement UPS systems,
each with distinct performance Characteristics. The most common
design approaches are as follows:
• Standby
• Line Interactive
• Standby-Ferro
• Double Conversion On-Line
• Delta Conversion On-Line
Our major goal in this project was to make a cost-effective as well as a user-friendly UPS. In this
regard the table above helped us in deciding the best suited topology for our UPS. As you can
see that the Standby UPS is the most cost-effective UPS in all of the topologies. From here our
journey began of how to make a Standby UPS with the user-friendly as well as more cost-
effective characteristic.
First we will discuss about the Standby UPS then we will talk on those points which can
improve its efficiency which will make it cost effective and the points which can make it user
friendly.
The above mentioned details are in general for the Standby UPS. In
our project there will be a Filter part but there won’t be a surge
suppresser. Our main focus will be on reducing the size, weight and
cost of the UPS and increasing its efficiency through reducing the
loses in the transformer which will be used to step up the voltage
level from a 12V supply.
This 12V supply will be converted into AC through an inverter (DC to
AC converter).
As you can see in the block diagram, there are three major parts of
a UPS system. But further minor parts could be added in addition to
improve its efficiency and reliability. Main parts of a UPS system are
listed below:
• Filter
• Microcontroller
• LCD
• Alarms
Transformer
Basic Principles
The transformer is based on two principles: firstly, that an electric
current can produce a magnetic field (electromagnetism) and secondly
that a changing magnetic field within a coil of wire induces a voltage
across the ends of the coil (electromagnetic induction). Changing the
current in the primary coil changes the magnitude of the applied
magnetic field. The changing magnetic flux extends to the secondary
coil where a voltage is induced across its ends.
A simplified transformer design is shown to the left. A current passing
through the primary coil creates a magnetic field. The primary and
secondary coils are wrapped around a core of very high magnetic
permeability, such as iron ; this ensures that most of the magnetic field
lines produced by the primary current are within the iron and pass
through the secondary coil as well as the primary coil.
Induction Law
The voltage induced across the secondary coil may
be calculated from Faraday's law of induction, which
states that:
Practical Considerations
Leakage flux
The ideal transformer model assumes that all flux
generated by the primary winding links all the turns
of every winding, including itself. In practice, some
flux traverses paths that take it outside the
windings. Such flux is termed leakage flux, and
results in leakage inductance in series with the
mutually coupled transformer windings. Leakage
results in energy being alternately stored in and
discharged from the magnetic fields with each cycle
of the power supply. It is not directly a power loss
(see "Stray losses" below), but results in
inferior voltage regulation, causing the secondary
voltage to fail to be directly proportional to the
primary, particularly under heavy load. Transformers
are therefore normally designed to have very
low leakage inductance.
Effect of frequency
The time-derivative term in Faraday's Law shows
that the flux in the core is the integral of the applied
voltage. Hypothetically an ideal transformer would
work with direct-current excitation, with the core
flux increasing linearly with time. In practice, the
flux would rise to the point where magnetic
saturation of the core occurred, causing a huge
increase in the magnetizing current and overheating
the transformer. All practical transformers must
therefore operate with alternating (or pulsed)
current.
Energy losses
An ideal transformer would have no energy losses,
and would be 100% efficient. In practical
transformers energy is dissipated in the windings,
core, and surrounding structures. Larger
transformers are generally more efficient, and those
rated for electricity distribution usually perform
better than 98%.
Experimental transformers
using superconducting windings achieving
efficiencies of 99.85%,While the increase in
efficiency is small, when
Winding resistance
Current flowing through the windings
causes resistive heating of the conductors. At higher
frequencies, skin effect and proximity effectcreate
additional winding resistance and losses.
Hysteresis losses
Each time the magnetic field is reversed, a small
amount of energy is lost due to hysteresis within the
core. For a given core material, the loss is
proportional to the frequency, and is a function of
the peak flux density to which it is subjected.
Eddy currents
Ferromagnetic materials are also good conductors,
and a solid core made from such a material also
constitutes a single short-circuited turn throughout
its entire length. Eddy currents therefore circulate
within the core in a plane normal to the flux, and are
responsible forresistive heating of the core material.
The eddy current loss is a complex function of the
square of supply frequency and inverse square of the
material thickness.
Magnetostriction
Magnetic flux in a ferromagnetic material, such as
the core, causes it to physically expand and contract
slightly with each cycle of the magnetic field, an
effect known as magnetostriction. This produces the
buzzing sound commonly associated with
transformers, and in turn causes losses due to
frictional heating in susceptible cores.
Mechanical losses
In addition to magnetostriction, the alternating
magnetic field causes fluctuating electromagnetic
forces between the primary and secondary windings.
These incite vibrations within nearby metalwork,
adding to the buzzing noise, and consuming a small
amount of power.
Stray losses
Leakage inductance is by itself lossless, since energy
supplied to its magnetic fields is returned to the
supply with the next half-cycle. However, any
leakage flux that intercepts nearby conductive
materials such as the transformer's support
structure will give rise to eddy currents and be
converted to heat.
Application
A major application of transformers is to increase
voltage before transmitting electrical energy over
long distances through wires. Wires have
resistance and so dissipate electrical energy at a
rate proportional to the square of the current
through the wire. By transforming electrical power to
a high-voltage (and therefore low-current) form for
transmission and back again afterwards,
transformers enable economic transmission of
power over long distances. Consequently,
transformers have shaped the electricity supply
industry, permitting generation to be located
remotely from points of demand. All but a tiny
fraction of the world's electrical power has passed
through a series of transformers by the time it
reaches the consumer.
Gauge selection:-
By using formula P=VI
Primary side 70.56 watt/280v=.252A
Secondary side (70.56 watt/30)=2.352A
Gauge selection:-
By using formula P=VI
Primary side225.66 watt/280v =. 805A
Secondary side225.66 watt/30 =7.52A
MICOPROCESSOR Vs MICROCONTROLLER
I/O PORTS
Port 0
Is a dual-purpose port on pins 32-39 of the 80511 C. For
larger designs with external memory, it becomes a
multiplexed addressed and data bus.
Port l
Port 2
strobe
P 3 .7 RD B7H External data memory read
strobe
CONTROL PINS
PSEN is an output signal on pin 29. It is a control signal that enables external code
m em ory. It usually connects to an EPROM 's OE pin to perm it reading of program
bytes.
The PSEN signal pulses low during the fetch stage of an instruction.
A LE (Address Latch Enable)
ALE is an output signal on pin 30. The 8051 use ALE for dem ultiplexing the address
and data bus. W hen port 0 is used in its alternate m ode-as the data bus and the
low-byte of the address bus-ALE is the signal that latches the address into an
external register during the first half of a m em ory cycle. This done, the port 0 lines
are clocked from a 12 M H z crystal, the ALE signal oscillates a 2 M H z. The only
The EA input on pin 3 1 is generally tied high (+ 5V) or low (ground). If high, the
805 1 I executes prog ram s from internal RO M w hen executing in the low er
4K of m em ory. If low
from
, external memory only (and PSEN pulses low
accordingly).
RST (Reset)
The RST input on pin 9 is the m aster reset for the 8051. W hen this signal is
brought high for at least tw o m achine cycles, the 8051 internal registers are
M EM ORY ORGANIZATIO N
M icrocontrollers are rarely used as the CPU in "com puter system s".
Instead, they are em ployed as the central com ponent in control-oriented
designs. There is lim ited m em ory, and there is no disk drive or operating
system . The control program m ust reside in RO M .
For this reason, the 8051 im plem ent a separate m em ory space for
program s (code) and data. In 8051 both the code and data m ay be
internal; how ever, both expand using external
com ponents to a m axim um
of 64K code m em ory and 64K data m em ory.
Tw o notable features are: (a) the registers and input/output ports are
m em ory m apped and accessible like any other m em ory location, and (b)
the task resides within the internal RAM
rather
, than in external RAM as
typical of m icroprocessors.
Figure 4.4 gives the details of the on-chip data m em ory. As show n, the
internal m em ory space is divided betw een register banks (OOH-1FH), bit-
B IT A D R E S S A B L E R A M
The 8051 contain 210 bit-addressable locations, of which 128 are at byte
addresses 20H through 2FH, and the rest are in the special function registers.
Bits can be set, cleared, ANDed, Ored, etc., with a single instruction. The 8051
on the instruction.
R E G IS T E R B A N K S
The bottom 32 locations of internal memory contain the register banks. The
8051 instruction
set supports 8 registers, RO through R7, and by default these registers are at
addresses OOH-
07H.
The active register bank m ay be altered by changing the register bank select
The idea of "register banks" perm its fast and effective "context switching,"
whereby separate
sections of software use a private, set of registers independent
The 805 1 internal registers are configured as part of the on-chip RAM ; therefore,
each register also has an address. This is reasonab le for the 8051, since it has so
m any registers. As w ell as R0 toR7, there are 21 special function registers (SFRs) at
the top of internal RAM , from address 80H to FFH . M ost of the 1 28 addresses from
A SSEM BLY LA N G U A G E PR O G RA M M
: IN G
In t r o d u c t io n :
that allow the linker to combine it with other partial segments, if required,
and to correctly locate the segment. An absolute segment has no name and
has a name assigned by the user. The module definitions determine the
There are many assembler programs and other support programs available
to facilitate the
Development of applications for the 8051 micro controller. Intel's original
MCS51™ family
ASM 51 is a pow erful assem bler w ith all the bells and whistles. It is available on
intel
developm ent system s and on the IB M PC fam ily of m icrocom puters. An 8051
source program
m ay be written on the host com puter and m ay assem bled to an object file and
th e program m ay not be executed. Since the host system 's CPU chip is not an
understand the binary instructions in the object file. Execution on the host
either hardware em ulation or softw are sim ulation of the target CPU. A third
im ple m ented today w ith only a handful of com ponents, includ ing a
S p e e d T r a d e o ff:
microcontrollers.
is inconsequential.
A D D R E S S IN G M O D E S :
Ad dressing m odes are an integral part of each com p uter's instruction set. They
• Register
• Direct
• Indirect
• Immediate
• Relative
• Absolute
• Long Indexed
R EG IS TE R A D D R ESS IN G :
The 8051 has accessed to 8 working registers, numbered RO to R7. Instructions using
register addressing are encoded using the three least significant bits of the instruction
Some instructions are specific to a certain register such as the accumulator, data pointer,
etc, so address bits are not needed. The opcodes its serf indicates the register. These
"register specific" instructions referred to the accumulator "A", the data pointer as "DPTR",
the program counter as "PC", the carry flag as "C", and the accumulator B register pair as
"AB".
D IR E C T A D D R E S S IN G :
Direct addressing can access any on -chip variable or hard ware register. An additional
IN D IR EC T A D D R ES S IN G :
Indirect addressing is essential when stepping through sequential memory location. The
8051 assembly language represents the indirect addressing by a commercial "at:" sign
(@) preceding RO or Rl. RO may operate as pointer registers, their contents indicating an
The least significant bit of the instruction opcode determ ines w hich register (R O or R l) is
as the pointer.
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IM M E D IA T E A D D R E S S IN G
W hen a source operand is a constant rather than a variable (i.e the instruction uses a val
know n at the assem ble tim e), then the constant can be incorporated into the instruction
In assem bly language, im m ediate operands are preceded by a num ber sign (# ). The ope
m ay either be a num eric constant, a sym bolic variable or an arithm etic expression using
constant sym bols and operators. The assem bler com putes the value and substitutes the
R ELATIVE AD D RESSING .
Relative addressing is used only with certain jump instructions. A relative address (or
offset) is an 8birt sign value, which is added to the program counter to form the address of
the next instruction executed. Since an 8bit signed offset is used, the range for jumping is
-128 to +127 locations. The relative offset is appended to the instruction as an additional
byte.
A B S O L U T E A D D R E S S IN G .
Absolute addressing is used only with the AC ALL and AJMP instructions. These two bytes
instructions allow branching within the current 2K page of code memory by providing the
three least significant bits of the destination address in the opcode (A 10— A B ) and the by
47
The upper 5bits of the destination address are the current upper 5 bits in the program co
so the instruction follow ing the b ranch instruction and the destination for the branch instr
The absolu te addressin g has thew advantage of short, (2 byte) instruction but also has th
disadvantage of lim iting th e range for destination and providing position-depende nt code
L O N G A D D R E S S IN G
In stru ctio ns inclu de s a full 16b it destin ation ad dre ss as bytes 2 an d 3 of the instructio
IN D E X A D D R E S S IN G
Index addressing uses a base register (either the program counter or the data
pointer) and an offset (the accumulator) in forming the effective address for a IMP or MOVC
instructions.
48
49
INTRODUCTION
A liquid crystal display (LCD) is an electronically-modulated optical
device shaped into a thin, flat panel made up of any number of color or
monochrome pixels filled with liquid crystals and arrayed in front of a
light source (backlight) or reflector. It is often utilized in battery-
powered electronic devices because it uses very small amounts of
electric power.
The surface of the electrodes that are in contact with the liquid crystal
material are treated so as to align the liquid crystal molecules in a
particular direction. This treatment typically consists of a thin polymer
layer that is unidirectionally rubbed using, for example, a cloth. The
direction of the liquid crystal alignment is then defined by the direction
of rubbing. Electrodes are made of a transparent conductor called
Indium Tin Oxide (ITO).
50
other, and so the molecules arrange themselves in a helical structure, or
twist. This reduces the rotation of the polarization of the incident light,
and the device appears grey. If the applied voltage is large enough, the
liquid crystal molecules in the center of the layer are almost completely
untwisted and the polarization of the incident light is not rotated as it
passes through the liquid crystal layer. This light will then be mainly
polarized perpendicular to the second filter, and thus be blocked and the
pixel will appear black. By controlling the voltage applied across the
liquid crystal layer in each pixel, light can be allowed to pass through in
varying amounts thus constituting different levels of gray.
LCD with top polarizer removed from device and placed on top, such
that the top and bottom polarizers are parallel.
Both the liquid crystal material and the alignment layer material contain
ionic compounds. If an electric field of one particular polarity is applied
for a long period of time, this ionic material is attracted to the surfaces
and degrades the device performance. This is avoided either by
applying an alternating current or by reversing the polarity of the
electric field as the device is addressed (the response of the liquid
crystal layer is identical, regardless of the polarity of the applied field).
51
then turns on sinks in sequence, and drives sources for the pixels of
each sink.
FEATURES
• 5 x 8 dots with cursor
• Built-in controller (KS 0066 or Equivalent)
• + 5V power supply (Also available for + 3V)
• 1/16 duty cycle
• B/L to be driven by pin 1, pin 2 or pin 15, pin 16 or A.K (LED)
• N.V. optional for + 3V power supply
SPECIFICATION
Important factors to consider when evaluating an LCD monitor:
52
video-gaming,[1] and the difference between response times below
10ms becomes imperceptible due to limitations of the human eye.
[2][3]
• Refresh rate: The number of times per second in which the monitor
draws the data it is being given. Since activated LCD pixels do not
flash on/off between frames, LCD monitors exhibit no refresh-
induced flicker, no matter how low the refresh rate.[4] Many high-
end LCD televisions now have a 120 or 240 Hz (current and former
NTSC countries) or 100 or 200 Hz (PAL/SECAM countries) refresh
rate. The rate of 120 was chosen as the least common multiple of
24 frame/s (cinema) and 30 frame/s (NTSC TV), and allows for less
distortion when movies are viewed due to the elimination of
telecine (3:2 pulldown). For PAL at 25 frame/s, 100 or 200 Hz is
used as a fractional compromise of the least common multiple of
600 (24 x 25). Until a 600 Hz refresh rate becomes available, PAL
video will speed up cinema by a small percentage (currently 1 to 4
percent). These higher refresh rates are most effective from a 24p-
source video output (e.g. Blu-ray Disc), and/or scenes of fast
motion.
• Matrix type: Active TFT or Passive.
• Viewing angle: (coll., more specifically known as viewing direction).
• Color support: How many types of colors are supported (coll., more
specifically known as color gamut).
• Brightness: The amount of light emitted from the display (coll.,
more specifically known as luminance).
• Contrast ratio: The ratio of the intensity of the brightest bright to
the darkest dark.
• Aspect ratio: The ratio of the width to the height (for example, 4:3,
5:4, 16:9 or 16:10).
• Input ports (e.g., DVI, VGA, LVDS, DisplayPort, or even S-Video and
HDMI).
• Gamma correction
53
54
55
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General Description
The ADC0808, ADC0809 data acquisition component is a monolithic CMOS device with an 8-bit analog-to-digital converter, 8-
channel multiplexer and microprocessor compatible control logic. The 8-bit A/D converter uses successive approximation as the
conversion technique. The converter features a high impedance chopper stabilized comparator, a 256R voltage divider with
analog switch tree and a successive approximation register. The 8-channel multiplexer can directly access any of 8-single-ended
analog signals.
The device eliminates the need for external zero and full-scale adjustments. Easy interfacing to microprocessors is provided by
the latched and decoded multiplexer address inputs and latched TTL TRI-STATE® outputs.
The design of the ADC0808, ADC0809 has been optimized by incorporating the most desirable aspects of several A/D
conversion techniques. The ADC0808, ADC0809 offers high speed, high accuracy, minimal temperature dependence, excellent
long-term accuracy and repeatability, and consumes minimal power. These features make this device ideally suited to
applications from process and machine control to consumer and automotive applications.
Features
• Easy interface to all microprocessors
• Operates ratiometrically or with 5 VDC or analog span adjusted voltage reference
• No zero or full-scale adjust required
• 8-channel multiplexer with address logic
• 0V to 5V input range with single 5V power supply
• Outputs meet TTL voltage level specifications
• Standard hermetic or molded 28-pin DIP package
• 28-pin molded chip carrier package
• ADC0808 equivalent to MM74C949
• ADC0809 equivalent to MM74C949-1
Key Specifications
• Resolution 8 Bits
• Total Unadjusted Error ±1⁄2 LSB and ±1 LSB
• Single Supply 5 VDC
• Low Power 15 mW
• Conversion Time 100 μs
57
Absolute Maximum Ratings
Supply Voltage (VCC) 6.5V
Voltage at Any Pin −0.3V to (VCC+0.3V)
Except Control Inputs
Voltage at Control Inputs −0.3V to +15V
58
59
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC
electrical specifications do not apply when operating the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to GND, unless othewise specified.
Note 3: A zener diode exists, internally, from VCC to GND and has a typical breakdown voltage of 7 VDC.
Note 4: Two on-chip diodes are tied to each analog input which will forward conduct for analog input voltages one
diode drop below ground or one diode drop greater than the VCCn supply. The spec allows 100 mV forward bias of
60
either diode. This means that as long as the analog VIN does not exceed the supply voltage by more than 100 mV,
the output code will be correct. To achieve an absolute 0VDC to 5VDC input voltage range will therefore require a
minimum supply voltage of 4.900 VDC over temperature variations, initial tolerance and loading.
Note 5: Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors. See Figure 3. None of
these A/Ds requires a zero or full-scale adjust. However, if an all zero code is desired for an analog input other than
0.0V, or if a narrow full-scale span exists (for example: 0.5V to 4.5V full-scale) the reference voltages can be
adjusted to achieve this. See Figure 13.
Note 6: Comparator input current is a bias current into or out of the chopper stabilized comparator. The bias current
varies directly with clock frequency and has little temperature dependence (Figure 6). See paragraph 4.0.
Note 7: The outputs of the data register are updated one clock cycle before the rising edge of EOC.
Functional Description
Multiplexer. The device contains an 8-channel single-ended analog signal multiplexer. A particular input
channel is selected by using the address decoder. Table 1 shows the input states for the address lines to
select any channel. The address is latched into the decoder on the low-to-high transition of the address
latch enable signal.
CONVERTER CHARACTERISTICS
The Converter
The heart of this single chip data acquisition system is its 8-bit analog-to-digital converter. The converter
is designed to give fast, accurate, and repeatable conversions over a wide range of temperatures. The
converter is partitioned into 3 major sections: the 256R ladder network, the successive approximation
register, and the comparator. The converter’s digital outputs are positive true.
The 256R ladder network approach (Figure 1) was chosen over the conventional R/2R ladder because of
its inherent monotonicity, which guarantees no missing digital codes. Monotonicity is particularly
important in closed loop feedback control systems. A non-monotonic relationship can cause oscillations
61
that will be catastrophic for the system. Additionally, the 256R network does not cause load variations on
the reference voltage.
The bottom resistor and the top resistor of the ladder network in Figure 1 are not the same value as the
remainder of the network. The difference in these resistors causes the output characteristic to be
symmetrical with the zero and full-scale points of the transfer curve. The first output transition occurs
when the analog signal has reached +1⁄2 LSB and succeeding output transitions occur every 1 LSB later
up to full-scale.
The successive approximation register (SAR) performs 8 iterations to approximate the input voltage. For
any SAR type converter, n-iterations are required for an n-bit converter.
Figure 2 shows a typical example of a 3-bit converter. In the
ADC0808, ADC0809, the approximation technique is extended to 8 bits using the 256R network.
The A/D converter’s successive approximation registers (SAR) is reset on the positive edge of the start
conversion (SC) pulse. The conversion is begun on the falling edge of the start conversion pulse. A
conversion in process will be interrupted by receipt of a new start conversion pulse. Continuous
conversion may be accomplished by tying the end-of-conversion (EOC) output to the SC input. If used in
this mode, an external start conversion pulse should be applied after power up. End-of-conversion will go
low between 0 and 8 clock pulses after the rising edge of start conversion.
The most important section of the A/D converter is the comparator.
It is this section which is responsible for the ultimate accuracy of the entire converter. It is also the
comparator drift which has the greatest influence on the repeatability of the device. A chopper-stabilized
comparator provides the most effective method of satisfying all the converter requirements.
The chopper-stabilized comparator converts the DC input signal into an AC signal. This signal is then fed
through a high gain AC amplifier and has the DC level restored. This technique limits the drift component
of the amplifier since the drift is a DC component which is not passed by the AC amplifier.
This makes the entire A/D converter extremely insensitive to temperature, long term drift and input offset
errors.
Figure 4 shows a typical error curve for the ADC0808 as measured using the procedures outlined in AN-
179.
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63
64
Applications Information
OPERATION
1.0 RATIOMETRIC CONVERSION
The ADC0808, ADC0809 is designed as a complete Data Acquisition System (DAS) for ratiometric conversion
systems.
65
In ratiometric systems, the physical variable being measured is expressed as a percentage of full-scale which is not
necessarily related to an absolute standard. The voltage input to the ADC0808 is expressed by the equation (1)
Vfs=Full-scale voltage
VZ=Zero voltage
A good example of a ratiometric transducer is a potentiometer used as a position sensor. The position of the wiper
is directly proportional to the output voltage which is a ratio of the full-scale voltage across it. Since the data is
represented as a proportion of full-scale, reference requirements are greatly reduced, eliminating a large source of
error and cost for many applications. A major advantage of the ADC0808, ADC0809 is that the input voltage range
is equal to the supply range so the transducers can be connected directly across the supply and their outputs
connected directly into the multiplexer inputs, (Figure 9).
Ratiometric transducers such as potentiometers, strain gauges, thermistor bridges, pressure transducers, etc., are
suitable for measuring proportional relationships; however, many types of measurements must be referred to an
absolute standard such as voltage or current. This means a system reference must be used which relates the full-
scale voltage to the standard volt. For example, if VCC=VREF=5.12V, then the full-scale range is divided into 256
standard steps.
The smallest standard step is 1 LSB which is then 20 mV.
The voltages from the resistor ladder are compared to the selected into 8 times in a conversion. These voltages are
coupled to the comparator via an analog switch tree which is referenced to the supply. The voltages at the top,
center and bottom of the ladder must be controlled to maintain proper operation.
66
The top of the ladder, Ref(+), should not be more positive than the supply, and the bottom of the ladder,
Ref(−), should not be more negative than ground. The center of the ladder voltage must also be near the
center of the supply because the analog switch tree changes from N-channel switches to
P-channel switches. These limitations are automatically satisfied in ratiometric systems and can be easily
met in ground referenced systems.
Figure 10 shows a ground referenced system with a separate supply and reference. In this system, the
supply must be trimmed to match the reference voltage. For instance, if a
5.12V is used; the supply should be adjusted to the same voltage within 0.1V.
The ADC0808 needs less than a milliamp of supply current so developing the supply from the reference
is readily accomplished.
In Figure 11 a ground referenced system is shown which generates the supply from the reference. The
buffer shown can be an op amp of sufficient drive to supply the milliamp of supply current and the desired
bus drive, or if a capacitive bus is driven by the outputs a large capacitor will supply the transient supply
current as seen in Figure 12. The
LM301 is overcompensated to insure stability when loaded by the 10 μF output capacitor.
The top and bottom ladder voltages cannot exceed VCC and ground, respectively, but they can be
symmetrically less than VCC and greater than ground. The center of the ladder voltage should always be
near the center of the supply. The sensitivity of the converter can be increased, (i.e., size of the
LSB steps decreased) by using a symmetrical reference system.
In Figure 13, a 2.5V reference is symmetrically centered about VCC/2 since the same current flows in
identical resistors. This system with a 2.5V reference allows the LSB bit to be half the size of a 5V
reference system.
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3.0 CONVERTER EQUATIONS
The transition between adjacent codes N and N+1 is given by:
The output code N for an arbitrary input are the integers within the range:
Where:
VIN=Voltage at comparator input
VREF(+)=Voltage at Ref(+)
VREF(−)=Voltage at Ref(−)
VTUE=Total unadjusted error voltage (typically
VREF(+)÷512)
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4.0 ANALOG COMPARATOR INPUTS
The dynamic comparator input current is caused by the periodic switching of on-chip stray capacitances.
These are connected alternately to the output of the resistor ladder/ switch tree network and to the
comparator input as part of the operation of the chopper stabilized comparator.
The average value of the comparator input current varies directly with clock frequency and with V IN as
shown in
Figure 6.
If no filter capacitors are used at the analog inputs and the signal source impedances are low, the
comparator input current should not introduce converter errors, as the transient created by the
capacitance discharge will die out before the comparator output is strobed.
If input filter capacitors are desired for noise reduction and signal conditioning they will tend to average
out the dynamic comparator input current. It will then take on the characteristics of a DC bias current
whose effect can be predicted conventionally.
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General Description
These Schottky-clamped circuits are designed to be used in high-
performance memory-decoding or data-routing applications, requiring
very short propagation delay times. In high-performance memory
systems these decoders can be used to minimize the effects of system
decoding. When used with high-speed memories, the delay times of
these decoders are usually less than the typical access time of the
memory. This means that the effective system delay introduced by the
decoder is negligible.
The LS138 decodes one-of-eight lines, based upon the conditions at the
three binary select inputs and the three enable inputs. Two active-low
and one active-high enable inputs reduce the need for external gates or
inverters when expanding.
A 24-line decoder can be implemented with no external inverters, and a
32-line decoder requires only one inverter. An enable input can be used
as a data input for
demultiplexing applications.
The LS139 comprises two separate two-line-to-four-line decoders in a
single package. The active-low enable input can be used as a data line
in demultiplexing applications. All of these decoders/demultiplexers
feature fully buffered inputs, presenting only one normalized load to its
driving circuit. All inputs are clamped with high-performance
Schottky diodes to suppress line-ringing and simplify system design.
Features
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Absolute Maximum Ratings
Supply Voltage 7V
Input Voltage 7V
Note: The ``Absolute Maximum Ratings'' are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the
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``Electrical Characteristics'' table are not guaranteed at the absolute
maximum ratings. The ``Recommended Operating Conditions'' table will
define the conditions for actual device operation.
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Description:
The NTE3041 is an optoisolator in a 6–Lead DIP type package consisting of a gallium arsenide
infrared emitting diode optically coupled to a monolithic silicon phototransistor detector.
Features:
• High Current Transfer Ratio: 100% Min @ Spec Conditions
• Guaranteed Switching Speeds
Applications:
• General Purpose Switching Circuits
• Interfacing and Coupling Systems of Different Potentials and Impedances
• Regulation Feedback Circuits
• Monitor & Detection Circuits
• Solid State Relays
Output Transistor
Collector–Emitter Voltage, VCEO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Emitter–Base Voltage, VEBO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Collector–Base Voltage, VCBO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70V
Continuous Collector Current, IC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150mA
Detector Power Dissipation (With Negligible Power in Output Detector), PD . . . . . . . . . 150mW
Derate Above 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.76mW/°C
Total Device
Isolation Source Voltage (Peak AC Voltage, 60Hz, 1sec Duration, Note 1), VISO . . . . . . 7500V
Total Device Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250mW
Derate Above 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.94mW/°C
Operating Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to+100°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +150°C
Lead Temperature (During Soldering, 1/16” from case, 10sec), TL . . . . . . . . . . . . . . . . . .+260°C
Note 1. Isolation Surge Voltage is an internal device dielectric breakdown rating. For this test,
Pin1 and Pin2 are common, and Pin4, Pin5, and Pin6 are common.
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General Description
The CD4047B is capable of operating in either the monostable or astable mode. It requires an external
capacitor (between pins 1 and 3) and an external resistor (between pins 2 and 3) to determine the output
pulse width in the monostable mode, and the output frequency in the astable mode.
Astable operation is enabled by a high level on the astable input or low level on the astable input. The
output frequency (at 50% duty cycle) at Q and Q outputs is determined by the timing components. A
frequency twice that of Q is available at the Oscillator Output; a 50% duty cycle is not guaranteed.
Monostable operation is obtained when the device is triggered by LOW-to-HIGH transition at + trigger
input or HIGH-to-LOW transition at − trigger input. The device can be retriggered by applying a
simultaneous LOW-to-HIGH transition to both the + trigger and retrigger inputs.
A high level on Reset input resets the outputs Q to LOW, Q to HIGH.
Features
• Wide supply voltage range: 3.0V to 15V
• High noise immunity: 0.45 VDD (typ.)
• Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS
SPECIAL FEATURES
• Low power consumption: special CMOS oscillator configuration
• Monostable (one-shot) or astable (free-running) operation
• True and complemented buffered outputs
• Only one external R and C required
Applications
• Frequency discriminators
• Timing circuits
• Time-delay applications
• Envelope detection
• Frequency multiplication
• Frequency division
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Absolute Maximum Ratings
DC Supply Voltage (VDD) −0.5V to +18VDC
Dual-In-Line 700 mW
Note 2: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be
guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of
“Recommended
Operating Conditions” and “Electrical Characteristics” provides conditions for actual device operation.
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INTRODUCTION
Separate classes of inverters are the line commutated inverters for multi
megawatt power ratings that use thyristors (also called silicon controlled
rectifiers, SCRs). SCRs can only be turned “on” on command. After being
turned on, the current in the device must approach zero in order to turn
the device off. All other inverters are self-commutated, meaning that
the power control devices can be turned on and off. Line commutated
inverters need the presence of a stable utility voltage to function. They
are used for DC-links between utilities, ultra long distance energy
transport, and very large motor drives
Besides IGBTs, power MOSFETs are also used especially for lower
voltages, power ratings, and applications that require high efficiency
and high switching frequency. In recent years, IGBTs, MOSFETs, and
their control and protection circuitry have made remarkable progress.
IGBTs are now available with voltage ratings of up to 3300 V and current
ratings up to 1200 A. MOSFETs have achieved on-state resistances
approaching a few milliohms.
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Inverters fall in the class of power electronics circuits. The most widely
accepted definition of a power electronics circuit is that the circuit is
actually processing electric energy rather than information. The actual
power level is not very important for the classification of a circuit as a
power electronics circuit.
On-state losses are due to the fact that the voltage across the switch in
the on state is not zero, but typically in the range of 1 to 2 V for IGBTs.
For power MOSFETs, the on-state voltage is often in the same range, but
it can be substantially below 0.5 V due to the fact that these devices
have a purely resistive conduction channel and no fixed minimum
saturation voltage like bipolar junction devices (IGBTs). The switching
losses are the second major loss mechanism and are due to the fact
that, during the turn-on and turn-off transition, current is flowing while
voltage is present across the device. In order to minimize the switching
losses, the individual transitions have to be rapid (tens to hundreds of
nanoseconds) and the maximum switching frequency needs to be
carefully considered.
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Topology of a single-phase, full-bridge
inverter.
Single-Phase Inverters
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switch, i.e., turn the upper switch on and the lower switch off, and vice
versa. The driver circuit will typically add some additional blanking time
(typically 500 to 1000 ns) during the switch transitions to avoid any
overlap in the conduction intervals.
The controller will hereby control the duty cycle of the conduction phase
of the switches. The average potential of the center-point of each leg
will be given by the DC bus voltage multiplied by the duty cycle of the
upper switch, if the negative side of the DC bus is used as a reference. If
this duty cycle is modulated with a sinusoidal signal with a frequency
that is much smaller than the switching frequency, the short term
average of the center-point potential will follow the modulation signal.
“Short-term” in this context means a small fraction of the period of the
fundamental output frequency to be produced by the inverter.
For the single phase inverter, the modulation of the two legs is inverse
of each other such that if the left leg has a large duty cycle for the
upper switch, the right leg has a small one, etc. The output voltage is
then given by Eq. (5.1) in which ma is the modulation factor. The
boundaries for ma are for linear modulation. Values greater than 1
cause overmodulation and a noticeable increase in output voltage
distortion.
This voltage can be filtered using a LC low-pass filter. The voltage on the
output of the filter will closely resemble the shape and frequency of the
modulation signal. This means that the frequency, wave-shape, and
amplitude of the inverter output voltage can all be controlled as long as
the switching frequency is at least 25 to 100 times higher than the
fundamental output frequency of the inverter. The actual generation of
the PWM signals is mostly done using microcontrollers and digital signal
processors (DSPs).
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• Electronic Devices by Floyd
• The Atmel Microcontroller By Mazidi
• The 89c51 Microcontroller By Mackenzi
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• The Practical Transformer Wing.
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