Department of Electrical Engineering

National Institute of Technology, Srinagar

Major Examination
Advanced Power Electronics (ELE 702)

Date: 02-12-2017

Max. Time: 2 hours Max. Marks: 60

Attempt any four questions.

Q1:)Answer the following questions very briefly [15]

(a) Find the percentage deviation of the peak output voltage from the average output voltage of a
3-φ diode bridge rectifier. Compare it with that of a 1-φ rectifier. What do you infer? (4)
(b) If a buck-boost converter fed from a 50V supply is operating in DCM, such that the inductor
releases energy in half the time that it takes to store energy. Find the actual output voltage, if the
expected output voltage was 100V. (3)
(c)A 3-φ Voltage source inverter has 6 switches. Each switch can either be ON or OFF, hence
giving rise to 26 possible switching combinations. Out of these 64, only eight possible states can be
actually switched. What do you think is the reason that the other states are discarded? (3)
(d)Why is CCM preferred in most AC-DC or DC-DC converters? What is the exceptional case
where DCM is preferred and why? (3)
(e)A buck converter is designed with an IGBT (without anti-parellel diode) as its main switch. The
IGBT is a single-quadrant switch. If you accidently give an AC supply to the buck converter, what
do you expect to happen and why? (2)

Q2:)A 3-φ VSI is fed from a 400 V DC supply. It feeds a Y-connected RL load of 5Ω and 5mH in
each phase. It is operating in 180o mode of conduction to generate a 50 Hz voltage. [15]

(a)Draw the complete power circuit diagram. Also draw pulses for all six switches, line voltage
waveforms (at least two), and hence the phase voltage waveform (at least one) (5)

(b) Using fourier analysis find the THD of phase voltage? (5)
(c) Find the approximated THD of line current. You can ignore harmonics above the 13th har-
monic (4)
(d)Why is the THD of current lower than that of voltage? (1)

Q3:)A boost converter having a resistive load of 10Ω is fed from a 1-φ diode bridge rectifier which
is in turn fed from a 230 V, 50 Hz AC supply via a 230/23 transfomer. [15]

(a) Draw the complete power circuit. (3)

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(b) It is desired to achieve a constant DC of magnitude 46 2V at the output, although the input to
the boost converter is highly rippled. Plot the input of the boost converter with respect to time.
Further, plot the variations in duty ratio (D) with respect to time so as to get a constant voltage at
the output. What is the range within which ‘D ’ varies? (6)

1
(c)Derive the boundary condition for CCM operation. For a switching frequency of 5kHz, design the
inductor so that CCM is ensured as D is varied all over the range found in part (b). (6)

Q4a:)A 3-φ VSI is operated in sine PWM mode. The fundamental (50 Hz) RMS output line
voltage is seen to be 415 V. The load is Y connected with R=10Ω and L=5mH in each phase. The
DC side current is 10 A. [9]

(a)Find the fundamental output line current. (2)

(b)Find the DC link voltage. (4)

(c)Find the modulation index at which the converter is being operated. (3)

4b:) For the circuit shown in Fig.1, assume the main switch and D2 to be ON during energy
storage and, D1 and D3 to be ON during energy release interval. Using Equivalent circuits and
Volt-sec balance find the expression for the output voltage of this converter. [6]

Fig. 1

Q5:)A Forward converter is designed to achieve regulated +12V DC from a 120 V DC supply. The
load resistance is 15Ω and the inductance of the output filter is 2mH. The switching frequency is
5kHz. [15]

(a) Draw the power circuit diagram (2)

(b) If the turns ratio N1:N2:N3 is 2:1:2, find D (2)

(c) Determine whether the filter inductor is in CCM or DCM. Also find the peak value of inductor
current. (6)

(d)Design the capacitance to ensure that load voltage ripple does not exceed 5%. (5)