From Nand to Tetris in 12 Steps

Here’s a constant
and an operator.
Now go build a computer

How?

Nand
F al
se

One step
at a time

The Elements of Computing Systems:

Building a Modern Computer From First Principles
Noam Nisan and Shimon Schocken, MIT Press, 2005

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 1
The Computer Science Curriculum

Math
Systems
CS theory

Various

Programming

Some Open Issues:

z Lack of integration
z Lack of comprehension

Our Solution:
z A new, integrative caspstone course
z Textbook: The Elements of Computing Systems
Nisan and Schocken, MIT Press 2005.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 2
Course Contents

„ Hardware: Logic gates, Boolean arithmetic, multiplexors, flip-flops,

registers, RAM units, counters, Hardware Description Language, chip
simulation and testing.
Hardware
„ Architecture: ALU/CPU design and implementation, machine code, assembly
language programming, addressing modes, memory-mapped input-output
(I/O).

„ Data structures and algorithms: Stacks, hash tables, lists, recursion,

Algorithms
arithmetic algorithms, geometric algorithms, running time considerations.

„ Programming Languages: Object-based design and programming, abstract

data types, scoping rules, syntax and semantics, references, OS libraries.

„ Compilers: Lexical analysis, top-down parsing, symbol tables, virtual stack-

based machine, code generation, implementation of arrays and objects.
Systems
„ Software Engineering: Modular design, the interface/implementation
paradigm, API design and documentation, proactive test planning, quality
assurance, programming at the large.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 3
The Course Theme: Let’s Build a Computer

Course Goals
„ Explicit: Let’s build a computer!
„ Implicit: Understand ...
z Key hardware & software abstractions
z Key interfaces: compilation, VM, O/S
„ Appreciate: Science history and method
„ Plus: Have fun.
Course
Course Methodology
„ Constructive: do-it-yourself
„ Self-contained: only requirement is programming
„ Guided: all "plans" are given Nand

„ Focused: no optimization, F al
se
no exceptions,
no advanced features.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 4
Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 5
Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 6
Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 7
Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 8
Course map

hardware platform Software hierarchy

machine language P4 operating system P12 prog. language P9

computer architecture P5 compiler P10,11

ALU / CPU memory units stack machine

P2 P3

various combinational chips various sequential chips virtual machine P7,8

assembly
essential theory
P1 (Boolean algebra and gate logic)

assembler P6
„ P = Instructional unit
(chapter/lecture/project/week)
Each unit is self-contained
machine language
„

„ Each unit provides the building blocks

with which we build the unit above it.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 9
Hardware projects

hardware platform
Hardware projects:
machine language P4
„ P1: Elementary logic gates

computer architecture P5 „ P2: Combinational gates (ALU)

ALU / CPU memory units

„ P3: Sequential gates (memory)
P2 P3
„ P4: Machine language
various combinational chips various sequential chips
„ P5: Computer architecture
essential theory
P1 (Boolean algebra and gate logic) Tools:

„ HDL (Hard. Descr. Language)

„ Test Description Language

„ Hardware simulator.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 10
Project 1: Elementary logic gates

Given: Nand(a,b), false aa

00
bb
00
Nand(a,b)
Nand(a,b)
11
00 11 11
11 00 11
„ Not(a) = Nand(a,a) 11 11 00

„ true = Not(false)

„ And(a,b) = Not(Nand(a,b))

„ Or(a,b) = Not(And(Not(a),Not(b)))

„ Mux(s,a,b) = Or(And(s,a),And(Not(s),b))

„ Etc. - 12 gates altogether.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 11
Building an And gate

Contract:
And.cmp
aa bb out
out When running your
a 00 00 00 .hdl on our .tst,
And out 00
11
11 00
00 00 your .out should
b 11 11 11 be the same as
our .cmp.

And.hdl And.tst

CHIP
CHIP And
And load
load And.hdl,
And.hdl,
{{ IN IN a,a, b;
b; output-file
output-file And.out,
And.out,
OUT out;
OUT out; compare-to
compare-to And.cmp,
And.cmp,
// output-list
output-list aa bb out;
// implementation
implementation missing
missing out;
}} set
set aa 0,set
0,set bb 0,eval,output;
0,eval,output;
set a 0,set b 1,eval,output;
set a 0,set b 1,eval,output;
set
set aa 1,set
1,set bb 0,eval,output;
0,eval,output;
set
set aa 1,
1, set
set bb 1,
1, eval,
eval, output;
output;

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 12
Building an And gate

Interface: And(a,b) = 1 exactly when a=b=1

a
And out
b

And.hdl

CHIP
CHIP And
And
{{ IN IN a,a, b;
b;
OUT out;
OUT out;
//
// implementation
implementation missing
missing
}}

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 13
Building an And gate

Implementation: And(a,b) = Not(Nand(a,b))

a
out
b

And.hdl

CHIP
CHIP And
And
{{ IN IN a,a, b;
b;
OUT out;
OUT out;
//
// implementation
implementation missing
missing
}}

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 14
Building an And gate

Implementation: And(a,b) = Not(Nand(a,b))

a
a out in out
Nand x Not out
b
b

And.hdl

CHIP
CHIP And
And
{{ IN IN a,a, b;
b;
OUT out;
OUT out;
//
// implementation
implementation missing
missing
}}

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 15
Building an And gate

Implementation: And(a,b) = Not(Nand(a,b))

a
a out in out
NAND x NOT out
b
b

And.hdl

CHIP
CHIP And
And
{{ IN IN a,
a, b;b;
OUT out;
OUT out;
Nand(a
Nand(a == a,
a,
bb == b,
b,
out
out = x);
= x);
Not(in
Not(in == x,
x, out
out == out)
out)
}}

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 16
Hardware simulator

test
HDL
script
program

a
And

gate Or out
diagram
And
b

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 17
Hardware simulator

HDL
program

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 18
Hardware simulator

HDL
program

output
file

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 19
Chip anatomy

CHIP
CHIP Add16
Add16 {{
IN
IN a[16],
a[16], b[16];
b[16];
CHIP FullAdder {{ George Boole
CHIP
OUT FullAdder
out[16];
OUT out[16]; 1815-1864
PARTS: IN
IN a,
a, b,
b, c;
c;
PARTS:CHIP HalfAdder {
CHIP
OUT
OUT HalfAdder {
sum,
sum,
FullAdder(a=a[0],b=b[0],c=0,
FullAdder(a=a[0],b=b[0],c=0, sum=out[1],carry=c0);
sum=out[1],carry=c0);
IN
IN
carry;a,
a, b;
b;
carry;
FullAdder(a=a[1],b=b[1],c=c0,sum=out[1],carry=c1);
CHIP Xor {{
FullAdder(a=a[1],b=b[1],c=c0,sum=out[1],carry=c1);
CHIP
OUT
OUT Xor
sum,
sum,
PARTS:
PARTS: IN a, b;
FullAdder(a=a[2],b=b[2],c=c1,sum=out[2],carry=c2);
FullAdder(a=a[2],b=b[2],c=c1,sum=out[2],carry=c2);
IN a, b;
carry;
carry;
HalfAdder(a=a,b=b,sum=sum1,carry=carry1);
CHIP And {{
HalfAdder(a=a,b=b,sum=sum1,carry=carry1);
...
... CHIP
OUT And
out;
OUT
PARTS: out;
PARTS:IN a, b;
HalfAdder(a=c,b=sum1,sum=sum,carry=carry2);
HalfAdder(a=c,b=sum1,sum=sum,carry=carry2);
FullAdder(a=a[15],b=b[15],c=c14,sum=out[15]);
PARTS:IN a, b;
FullAdder(a=a[15],b=b[15],c=c14,sum=out[15]);
PARTS:
Xor(a=a,b=b,out=sum);
CHIP Not
}} OUT Not {{
Xor(a=a,b=b,out=sum);
HalfAdder(a=carry1,b=carry2,sum=carry);
CHIP
OUT out;
HalfAdder(a=carry1,b=carry2,sum=carry);
out;
Nand(a=a,b=b,out=AnandB);
Nand(a=a,b=b,out=AnandB);
And(a=a,b=b,out=carry);
}} PARTS: IN
IN in;
And(a=a,b=b,out=carry);
in;
PARTS:
Or(a=a,b=b,out=AorB);
CHIP Nand
Or(a=a,b=b,out=AorB); {{
}} CHIP
OUT Nand
out;
OUT out;
Not(in=x,out=out);
Not(in=x,out=out);
And(a=AnandB,b=AorB,out=out);
IN
IN a,
PARTS:
PARTS: a, b;
And(a=AnandB,b=AorB,out=out);
b;
}} Nand(a=a,b=b,out=x);
Nand(a=a,b=b,out=x);
OUT
OUT out;
out;
Nand(a=in,b=in,out=out);
}} Nand(a=in,b=in,out=out);
}} PARTS:
PARTS:
BUILTIN
BUILTIN Nand;
Nand; //
// Implemented
Implemented by
by Nand.java
Nand.java
}}

Claude Shannon, 1916-2001

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 20
Chip anatomy

RAM8.hdl Simulator logic:

z Top-down expansion

z Nand is primitive (built-in)

Register.hdl DMux8way.hdl Mux8way16.hdl
z No Chip.hdl? Chip.java kicks in

z Instructors/architects can supply

Bit.hdl Not.hdl And.hdl Mux16.hdl built-in versions of any chip.

Benefits:
Mux.hdl DFD.hdl Mux.hdl
z Behavioral simulation

z Chip GUI

z Order-free implementation

z Partial implementation is OK
Nand.java, Nand.java, Nand.java, ... Nand.java
z All HW projects are decoupled.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 21
Hardware projects
hardware platform
Hardware projects:
machine language

computer architecture
3 „ P1: Elementary logic gates

P5 „ P2: Combinational gates (ALU)

ALU / CPU memory units „ P3: Sequential gates (memory)

P2 P3
various combinational chips various sequential chips
„ P4: Machine language

„ P5: Computer architecture

essential theory
P1 (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 22
Project 2: Combinational chips

a 16
a s um s um a 16
h alf 1 6 -b it
b fu ll o ut
ad d er ad d er
16 ad d e r
b c arry c arry b
c

zx nx zy ny f no
out(x, y, control bits) =
x+y, x-y, y–x,
x 0, 1, -1,
16 bits
ALU 16 bits
out x, y, -x, -y,
y
16 bits x!, y!,
x+1, y+1, x-1, y-1,

zr ng
x&y, x|y

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 23
ALU logic

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 24
A glimpse ahead:

c1,c2,…,c6

D
D

a
out

ALU
A
A
A/M

Mux
M

RAM

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 25
Hardware projects
hardware platform
Hardware projects:
machine language

3 „ P1: Elementary logic gates

3
computer architecture
P5 „ P2: Combinational gates (ALU)

ALU / CPU memory units „ P3: Sequential chips (memory)

P2 P3
various combinational chips various sequential chips
„ P4: Machine language

„ P5: Computer architecture

essential theory
P1 (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 26
Project 3: Sequential chips

RAM 64

RAM8

.
RAM 8 .. 8

register
..
. 8 RAM8
Register
register

Bit Bit ... Bit register

...

„ DFF > Bit > Register > RAM8 > RAM64 > ... > RAM32K

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 27
Hardware projects
hardware platform
Hardware projects:
machine language

3 „ P1: Elementary logic gates

3
computer architecture
P5 „ P2: Combinational gates (ALU)

P2
ALU / CPU memory units

P3
3 „ P3: Sequential gates (memory)

various combinational chips various sequential chips

„ P4: Machine language

„ P5: Computer architecture

essential theory
P1 (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 28
Machine Language: A-instruction

@value
@value //
// AA register
register == value
value

Symbolic: @value // Where value is either a non-negative decimal number

// or a symbol referring to such number.

value (v = 0 or 1)

Binary: 0 v v v v v v v v v v v v v v v

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 29
Machine Language: C-instruction

dest
dest == comp
comp ;; jump
jump //
// If
If dest
dest is
is null,
null, the
the “=“
“=“ is
is ommitted
ommitted
//
// If
If jump
jump is
is null,
null, the
the “;“
“;“ is
is ommitted
ommitted

comp is one of:

0,1,-1,D,A,!D,!A,-D,-A,D+1,A+1,D-1,A-1,D+A,D-A,A-D,D&A,D|A,
0,1,-1,D,A,!D,!A,-D,-A,D+1,A+1,D-1,A-1,D+A,D-A,A-D,D&A,D|A,
M,
M, !M,
!M, -M,
-M, M+1,
M+1, M-1,D+M,D-M,M-D,D&M,D|M
M-1,D+M,D-M,M-D,D&M,D|M

c1,c2,…,c6
dest is one of:
D
Null,
Null, M,
M, D,
D, MD,
MD, A,
A, AM,
AM, AD,
AD, AMD
AMD D

a
out

ALU
A
A
jump is one of: A/M

Mux
M
Null,
Null, JGT,
JGT, JEQ,
JEQ, JGE,JLT,
JGE,JLT, JNE,
JNE, JLE,JMP
JLE,JMP
RAM

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 30
Machine Language: C-instruction (cont.)
Symbolic: dest=comp;jump // Either the dest or jump fields may be empty.
// If dest is empty, the "=" is ommitted;
// If jump is empty, the ";" is omitted.

comp dest jump

Binary: 1 1 1 a c1 c2 c3 c4 c5 c6 d1 d2 d3 j1 j2 j3

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 31
Hardware projects
hardware platform
Hardware projects:
machine language

3 „ P1: Elementary logic gates

3
computer architecture
P5 „ P2: Combinational gates (ALU)

ALU / CPU memory units

3 „ P3: Sequential gates (memory)

3
P2 P3
various combinational chips various sequential chips
„ P4: Machine language

„ P5: Computer architecture

essential theory
P1 (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 32
Project 5: CPU

ALU output

C C
C

D
D
C C
decode
outM

ALU
C
A
Mux
A C
instruction A/M

Mux
M
inM
C writeM
A
reset reset addressM
reset C

A
PC pc

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 33
Project 5: Computer
„ Many other
computer models
can be built.
inM

writeM
Instruction outM Data
instruction

CPU
Memory Memory
addressM
(ROM32K) (Memory)
pc

J. Von Neumann
(1903-1957)

reset

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 34
Input / Output Devices

load

Data Memory
0x0000
in

16 RAM
(16K) out

0X3FFF 16
0x4000
address screen
memory map
15
0x5FFF (8K)
screen
keyboard
0x6000
memory map
Keyboard

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 35
Recap: the Hack chip-set and hardware platform
Elementary logic gates Combinational chips Sequential chips Computer Architecture
(Project 1): (Project 2): (Project 3): (Project 5):
„ Nand (primitive) ƒ HalfAdder ƒ DFF (primitive) ƒ Memory

„ Not
ƒ FullAdder ƒ Bit ƒ CPU
ƒ Add16 ƒ Register ƒ Computer
„ And
ƒ Inc16 ƒ RAM8
„ Or
ƒ ALU ƒ RAM64
„ Xor
ƒ RAM512
„ Mux
ƒ RAM4K
„ Dmux
ƒ RAM16K
„ Not16
ƒ PC
„ And16

„ Or16

„ Mux16

„ Or8Way

„ Mux4Way16

„ Mux8Way16

„ DMux4Way

„ DMux8Way

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 36
Course map

hardware platform Software hierarchy

machine language operating system prog. language

computer architecture compiler

ALU / CPU

various combinational chips

3 memory units

various sequential chips

stack machine

virtual machine

assembly
essential theory
(Boolean algebra and gate logic)

assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 37
Software projects
Software hierarchy

operating system P12 prog. language P9

compiler P10, 11

stack machine

virtual machine P7, 8

assembly

assembler P6

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 38
Project 6: Assembler

Sum.asm Sum.bin
0000000000010000
//
// Computes sum=1+2+ …
Computes sum=1+2+ …+100.
+100. 0000000000010000
@i // i=1 1110111111001000
1110111111001000
@i // i=1
M=1 0000000000010001
0000000000010001
M=1
@sum
@sum //
// sum=0
sum=0 Assembler 1110101010001000
1110101010001000
M=0 0000000000010000
0000000000010000
M=0
(LOOP) 1111110000010000
1111110000010000
(LOOP)
@i // 0000000001100100
@i // if
if i-100>0
i-100>0 goto
goto END
END 0000000001100100
D=M 1110010011010000
1110010011010000
D=M
@100 0000000000010010
0000000000010010
@100
D=D-A 1110001100000001
1110001100000001
D=D-A
@END 0000000000010000
0000000000010000
@END
D;jgt 1111110000010000
1111110000010000
D;jgt
@i // 0000000000010001
@i // sum+=i
sum+=i 0000000000010001
D=M 1111000010001000
1111000010001000
D=M
@sum 0000000000010000
0000000000010000
@sum
M=D+M 1111110111001000
1111110111001000
M=D+M
@i // 0000000000000100
@i // i++
i++ 0000000000000100
M=M+1 1110101010000111
1110101010000111
M=M+1
@LOOP
@LOOP //// goto
goto LOOP
LOOP
0;jmp
0;jmp
(END) Ada Lovelace
(END)
@END
@END (1815-1852)
0;JMP
0;JMP

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 39
Assembler in action

Project 6:

Build an
assembler

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 40
CPU Emulator

instruction 256 by 512

memory pixels
simulated
data screen
memory

keyboard Data register

enabler

program counter address register ALU

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 41
Software projects
Software hierarchy

operating system P12 prog. language P9

compiler P10, 11

stack machine

virtual machine P7, 8

assembly

3 assembler P6

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 42
The Big Picture
Some
language
... Some Other
language
... Jack
language
Proj. 9: building an app.
Proj. 12: building the OS

Some Jack
Some Other
compiler
compiler compiler Projects
10-11

VM language

VM
implementation VM imp. VM imp.
VM over the Hack Projects
over CISC over RISC emulator
platforms platforms platform 7-8

CISC RISC written in Hack

machine
language
machine
language
... a high-level
language
machine
language

Projects
... ... 1-6

CISC RISC other digital platforms, each equipped Any Hack

machine machine with its VM implementation computer computer

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 43
The VM language

Arithmetic
Arithmeticcommands
commands Memory
Memoryaccess
accesscommands
commands
add
add pop segment
pop segment i i
sub
sub push segment
push segment i i
neg
neg Program
Programflow
flowcommands
commands
eq
eq label symbol
label symbol
gt
gt goto symbol
goto symbol
lt
lt if-goto symbol
if-goto symbol
and
and Function
Functioncalling
callingcommands
commands
or
or
function funcationName
function funcationNamenLocals
nLocals
not
not call
call functionName
functionNamenArgs
nArgs
return
return

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 44
The VM abstraction: a Stack Machine
High-level code Stack machine code VM code
function function
function mult(x,y)
mult(x,y) function
function mult
mult 22
function mult(x,y)
mult(x,y) {{
int push
push 00 push
push constant
constant 00
int result,
result, j;
j;
result=0; pop
pop result
result pop
pop local
local 00
result=0;
j=y; push
push yy push
push argument
argument 11
j=y;
while pop
pop jj pop
pop local
local 11
while ~(j=0)
~(j=0) {{
label
label loop
loop label
label loop
loop
result=result+x;
result=result+x; push
push jj push
push local
local 11
j=j-1;
j=j-1; push
push 00 push
push constant
constant 00
}} eq eq
eq eq
return
return result;
result; if-goto
if-goto end
end if-goto
if-goto end
end
}} push result push local
push result push local 00
push
push xx push
push argument
argument 00
add
add add
add
pop
pop result
result pop
pop local
local 00
push
push jj push
push local
local 11
push
push 11 push
push constant
constant 11
sub
sub sub
sub
pop
pop jj pop
pop local
local 11
goto
goto loop
loop goto
goto loop
loop
label end
label end label
label end
end
push
push result
result push
push local
local 00
return
return return
return

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 45
 VM Emulator

virtual default
memory test script
segments

global stack host RAM

VM code

working
stack (the RAM is
not part of
the VM)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 46
Projects 7,8: Implement the VM over the Hack platform
Mult.vm Mult.asm
function
function mult
mult 22 //// 22 local
local variables
variables ...
push constant 0 // result=0 ...
push constant 0 // result=0 A=M-1
A=M-1
pop
pop local
local 00 M=0
M=0
push argument 11 //// j=y
push argument j=y @5
@5
pop local
pop local 11 D=A
label D=A
label loop
loop @LCL
@LCL
push constant 00 //// if
push constant if j==0
j==0 goto
goto end
end A=M-D
A=M-D
push local
push local 11 D=M
eq D=M
eq @R6
@R6
if-goto
if-goto end
end M=D
push //// result=result+x M=D
push local 00
local result=result+x @SP
@SP
push argument
push argument 00 AM=M-1
add AM=M-1
add D=M
D=M
pop
pop local
local 00 VM Translator @ARG
@ARG
push local
push local 11 // j=j-1
// j=j-1 A=M
push constant 1 A=M
push constant 1 M=D
M=D
sub
sub D=A
pop D=A
pop local
local 11 @SP
@SP
goto
goto loop
loop M=D+1
label end M=D+1
label end @LCL
@LCL
push
push local
local 00 //// return
return result
result D=M
return D=M
return ...
...

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 47
Software projects
Software hierarchy

operating system prog. language

compiler

stack machine

3 virtual machine

assembly

3 assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 48
Jack Language
class
class Math
Math {{

/**
/** Returns
Returns n!n! */
*/
function
function int factorial(int n){
int factorial(int n){
if (n = 0)
if (n = 0) {{
return
return 1;1;
}}
else
else {{
return
return nn ** Math.factorial(n
Math.factorial(n -- 1);
1);
}}
}}

/**
/** Returns
Returns e=sigma(1/n!)
e=sigma(1/n!) where
where nn goes
goes from
from 00 to
to infinity
infinity */
*/
function Fraction e (int
function Fraction e (int n){ n){
var
var int
int i;i;
let i =
let i = 0;0;
let
let ee == Fraction.new(0,1);
Fraction.new(0,1); // // start
start with
with e=0
e=0
// approximate up
// approximate up to n to n
while
while (i(i << n)
n) {{
let
let ee == e.plus(Fraction.new(1,
e.plus(Fraction.new(1, Math.factorial(i)));
Math.factorial(i)));
let i = i +
let i = i + 1; 1;
}}
return
return e; e;
}}
...
...
}} //
// end
end Math
Math

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 49
Project 9: Write a Jack program

Demo Pong

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 50
Software projects
Software hierarchy

operating system prog. language

3
compiler

stack machine

3 virtual machine

assembly

3 assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 51
Compiler project I: Syntax Analysis

Jack
Prog.jack Grammar
-
Syntax
(5+y)*2 –– sqrt(x*4)
(5+y)*2 sqrt(x*4)
Analyzer sqrt
*
+ 2 *
Prog.xml Prog.vm
5 y x 4
<expression>
<expression>
<term>
<term>
<symbol>
<symbol> (( </symbol>
</symbol>
<expression>
<expression>
<term>
<term>
<integerConstant>
<integerConstant> 55 </integerConstant>
</integerConstant>
</term>
</term>
<symbol>
<symbol> ++ </symbol>
</symbol>
<term>
<term>
<identifier>
<identifier> yy </identifier
</identifier >>
</term>
</term>
...
...
</expression>
</expression>

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 52
Compiler project II: Code Generation
Prog.jack

(5+y)*2 –– sqrt(x*4)
(5+y)*2 sqrt(x*4)

Syntax Project 9
analyzer
Prog.vm

push
push 55
push
push yy
- add
Project 10 add
push
push 22
sqrt
* Code
call
call mult
mult
generator push
push xx
+ 2 * push
push 44
Prog.vm call
call mult
mult
5 y x 4
call
call sqrt
sqrt
sub
sub

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 53
Software projects
Software hierarchy

operating system prog. language

3
compiler
3
stack machine

3 virtual machine

assembly

3 assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 54
Typical Jack code

/**
/** Computes
Computes thethe average
average of
of aa sequence
sequence of
of integers.
integers. */
*/
class Main
class Main { {
function
function void
void main()
main() {{
var
var Array
Array a;a;
var int length;
var int length;
var
var int
int i,i, sum;
sum;

let
let length
length == Keyboard.readInt(”How
Keyboard.readInt(”How many
many numbers?
numbers? ”);
”);
let
let aa == Array.new(length);
Array.new(length); //
// Constructs
Constructs the
the array
array
let i =
let i = 0;0;

while
while (i(i << length)
length) {{
let
let a[i]
a[i] == Keyboard.readInt(”Enter
Keyboard.readInt(”Enter the
the next
next number:
number: ”);
”);
let sum = sum + a[i];
let sum = sum + a[i];
let
let ii == ii ++ 1;
1;
}}

do
do Output.printString(”The
Output.printString(”The average
average is:
is: ”);
”);
do Output.printInt(sum / length);
do Output.printInt(sum / length);
do
do Output.println();
Output.println();
return;
return;
}}
}}

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 55
OS Libraries

„ Math: Provides basic mathematical operations;

„ String: Implements the String type and string-related operations;

„ Array: Implements the Array type and array-related operations;

„ Output: Handles text output to the screen;

„ Screen: Handles graphic output to the screen;

„ Keyboard: Handles user input from the keyboard;

„ Memory: Handles memory operations;

„ Sys: Provides some execution-related services.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 56
OS API
Project 12:
class
class Math
Math {{
function
function void
void init()
init() Build it.
Class
Class String
function String
int {{
function int abs(int
abs(int x) x)
constructor
constructor
function int String
String new(int
multiply(int new(int
x, maxLength)
maxLength)
function
Class int
Arraymultiply(int
{ x, int
int y)
y)
Class
method
method Array
void
void {dispose()
dispose()
function
function int
int divide(int
divide(int x,x, int
int y) y)
method
method
function int
function
intint length()
Array new(int
length() size)
function int min(int
function
class Array
min(int
Output
x,new(int
{{x,
int
int y)y) size)
methodclass
method char
char Output
charAt(int
charAt(int j)
j)
function
function int
int max(int
max(int x,
x, int
int y)
y)
methodfunction
method
method void void
function
void void
dispose()
void moveCursor(int
dispose()moveCursor(int
setCharAt(int j, char i,
i, int
c) int j)j)
method
function int
function int void
sqrt(int
Class
sqrt(intsetCharAt(int
x)
Screenx) { j, char c)
Class Screen
function
function void {
void printChar(char
printChar(char c)
c)
}} method
method
} String
String appendChar(char
appendChar(char c)
c)
} function
functionfunction
void void
void clearScreen()
clearScreen()
printString(String s)
method function
method void
void void printString(String
eraseLastChar()
class Memory
eraseLastChar() {{ s)
class
function
function Memory
void
void setColor(boolean
setColor(boolean b)
b)
method function
function
int void
void
intValue() printInt(int
printInt(int i)
i)
method int function intValue()
void drawPixel(int x,
function
function function
function
void
function
void void int
println()
int
println() peek(int
drawPixel(int
peek(int x, int
address)int y)
address) y)
method void
method voidfunction setInt(int
Class
setInt(int j)
Keyboard
j) {
Class
function voidKeyboard
void {
drawLine(int
drawLine(int x1,
x1, int
int y1,
y1,
function function
function
char void
void
backSpace()backSpace()
backSpace()
function
function char backSpace()
function void
void poke(intint
poke(int x2,
int x2, int
address, y2)
int
int y2)
address, int value)
value)
}} function
function char
char keyPressed()
keyPressed()
function char doubleQuote()
Class Sys
function char function
function
function
void
doubleQuote()
Class
void Sys {
drawRectangle(int
Array {
drawRectangle(int
alloc(int
x1,
x1, int
size) int y1,
y1,
function char function
newLine()
function Array
char alloc(int int
readChar() x2,
size) int
int x2, int y2) y2)
function char newLine() function charvoidreadChar()
function void function
drawCircle(int halt():
x,
}} function
function voidfunction
drawCircle(int
void deAlloc(Array x, int
void halt(): int y,
o) y, int
int r)
r)
function
function void deAlloc(Array
String o)
readLine(String message)
}} function
functionStringvoid readLine(String
error(int message)
errorCode)
}} function void error(int errorCode)
function
function int
int readInt(String
readInt(String message)
message)
function void wait(int
function void wait(int duration) duration)
}}
}}

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 57
Recap

ALU output

C C
C

D
D
C C
decode
outM

ALU
C

HW
A

SW

Mux
A C

Nand
instruction A/M

Mux
M
inM
C writeM
A

F al reset reset addressM

se A
reset C

PC pc

application (e.g. Pong) 15 obj-oriented bat / ball operations

high-level language / OS 250 lines of Jack code
virtual machine 1000 lines of VM code
assembly 4,000 lines of Assembly
machine language 30,000 lines of Hack code
architecture 500,000 bits
chip-set 2,000,000 logic gates
logic 1 God

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 58
 God gave us 0 and Nand

Nand
F al
se

Everything else was done by humans.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 59
Why the approach works
Take home
„ Initial goal: Acquire enough hands-on
knowledge for building a computer system
„ Final lesson: This includes some of the
most beautiful topics in applied CS

Occam razor
„ No optimization
„ No advanced features
„ No exceptions

Highly-Managed
„ Detailed API’s are given
„ Hundreds of test files and programs
„ Modular projects, unit-testing.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 60
Abstraction–Implementation Paradigm

Abstract design
Human abstract interface Software
Thought Compiler
P9, P12 H.L. Language hierarchy
abstract interface
& P10, P11
Operating Sys. VM Translator
Virtual abstract interface
Machine P7, P8
Assembly
Language

Assembler

P6
abstract interface
Computer Hardware
Architecture
Machine abstract interface platform
Language P4, P5
Hardware Gate Logic
Platform abstract interface
P1, P2, P3 Electrical
Chips & Engineering
Physics
Logic Gates

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 61
Course / book site

www.idc.ac.il/tecs

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 62