Triple-Play Translation HD Interactive STB Solution
Key Specifications CPU z Full-hardware anti-aliasing and anti-flicker z High-performance ARM Cortex A9 processor Display Processing z Hardware Java acceleration z 3-layer OSDs z Floating-point coprocessor z 16-bit or 32-bit color depth Memory Control Interfaces z Two video layers z 1920-pixel width for each layer z 128/256 MB embedded 16-bit DDR3 z Image enhancement z SPI NOR flash interface z NAND flash interface Audio/Video Interfaces z SPI NAND flash interface z PAL and NTSC standard output, and forcible standard HiVXE Video Decoding Engine conversion z Aspect ratio of 4:3 or 16:9, forcible aspect ratio conversion, z H.264 MP, HP@L4.1 and free scaling z AVS baseline@L6.0 z 1080p50(60)/1080i/720p/576p/576i/480p/480i outputs z AVS+ z SD and HD signal reception z MPEG1 z HD and SD outputs from the same source z MPEG2 MP@HL z xvYCC (IEC 61966-2-4) standard for color gamut z MPEG4 SP@L0−3, ASP@L0−5 z HDMI 1.4b with HDCP 1.2 z VC-1 AP@L3 z Analog video interfaces z VP6 and VP8 z 1080p@30 fps real-time decoding − One CVBS interface z Video post-processing such as denoising and deblocking − One YPrPb interface − One S-Video interface Image Decoding − Four embedded VDACs z JPEG decoding, maximum 64 megapixels − Configurable output interfaces Audio Decoding z Audio interfaces z MPEG L1/L2, MP3 audio decoding − Audio-left and audio-right channels: RCA, z WAV, AAC, and HE-AAC audio decoding low-impedance, and unbalanced output interfaces z Dolby Digital and Dolby Digital Plus decoding, and Dolby − S/PDIF interface Digital Plus transcoding z Dolby Digital transparent transmission − One embedded ADAC z DRA − Embedded audio amplifier z Downmixing Peripheral Interfaces z Resampling z One USB 2.0 host port and one USB 2.0 host/device z 2-channel audio mixing (integrated with the PHY) z Intelligent volume control z One 10/100 Mbit/s adaptive Ethernet ports (embedded 100 TS Demultiplexing Mbit/s PHY) z One DVB-C IF input and two standard serial TS input; or z One UART interface four two-line serial inputs; or one standard serial input and z Two smart card interfaces, supporting T0, T1, and T14 one standard serial output protocols z Maximum 96 hardware PID filters z One IR receiver z DVB-CSA2, AES, and DES descrambling algorithms z One LED and keypad control interface z Two I2C interfaces Channel Decoding z Five groups of GPIO interfaces z One embedded QAM, compliant with the ITU J83-A/C standards Low-power Consumption z passive standby, less than 0.8 W standby power Security Processing consumption of the STB z Advanced security CA z Less than 5 W typical working power consumption of the z Downloadable CA STB z OTP and chip ID z AES, DES, and 3DES data encryption Others z Content protection for USB devices z Fast startup z Data protection for DDR SDRAMs z Boot program download and execution over a serial port z QFP package Graphics Processing z 2-layer PCB z Enhanced full-hardware TDE
Manufacture Center of Huawei Electrical, Huawei Base, Bantian, Longgang District, Shenzhen, P. R. China Postal Code: 518129 www.hisilicon.com Issue: 00B05 1 Date: 2015-12-03 Hi3716M V330 Triple-Play Translation HD Interactive STB Solution
Functional Block Diagram
Dolby, mentioned in this document, is a registered trademark of Dolby Laboratories, Inc. Any parties intending to use the trademark must obtain the permission from Dolby Laboratories, Inc.
Manufacture Center of Huawei Electrical, Huawei Base, Bantian, Longgang District, Shenzhen, P. R. China Postal Code: 518129 www.hisilicon.com Issue: 00B05 3 Date: 2015-12-03