EC-101/102 : BASIC ELECTRONICS

Mr.SRINIVAS RAMAVATH

School of Electronics Engineering, KIIT Bhubaneswar

Nov, 2012

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

TRANSISTORS

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

4th Chapter :Field effect transistor.

Operations of JFETs
n-channel
P-channel
And it’s characteristics

Operations of MOSFETs
Enhancement MOSFET
n-channel
P-channel
Depletion MOSFET
n-channel
P-channel
And it’s characteristics

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Construction of JFET

Source: The terminal allowed the majority carriers enter the

bas is known as the “source”.
Drain: The terminal leave the majority carriers enter the bas
is known as the “drain”.
Gate: The region on the two sides of the bar heavily doped
with impurities opposite to that of the bar, are called the gate.
Channel: It is the space between two gates through which
majority carriers pass from source to drain when VDS is
applied.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Construction of JFET

FET can be fabricated with either an n-channel or p-channel.

For an n-channel, first a narrow bar of N-type semiconductor
material is taken and then two sides of the bar are heavily
doped with P-type material.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Idea of JFET
Water analogy for the JFET control mechanism.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Construction of JFET

These junctions form gates and the area between these gates
is called n-channel.

On other hand, if the bar is P-type, the device is termed a

p-channel.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

JFET n-channel
JFET n-channel symbol: The arrowhead on the gate
terminal indicates the direction of the gate current when
gate-source junction is forward biased.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

JFET p-channel

JFET p-channel symbol

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Construction of JFET

By applying a voltage VDS between the two ends of the bars,

The electrons is allowed from source to drain and a current
flow from drain to source.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Operation of JFET

Gate are always reversed biased. Hence, gate current IG is

practically zero.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Operation of JFET

The source terminal is always connected to that end of the

drain supply which is provides the necessary charge carriers.
In an n-channel JFET, source terminal S is connected to the
negative end of the drain voltage supply.

In an p-channel JFET, source terminal S is connected to the

positive end of the drain voltage supply.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

JFET Biasing voltage

VGS and VDS

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

JFET working when either VGS or VDS or both are changed

When VGS = 0 and VDS = 0 .

When VGS = 0 and VDS is increased from zero.

When VGS is decreased from zero and VDS = 0 .

When VGS is negative and VDS is increased from zero.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

JFET working when either VGS or VDS or both are changed

When VGS = 0 and VDS = 0.

In this case, drain current ID = 0, because VDS = 0.

The depletion regions around the P-N junctions are of equal

thickness and symmetrical.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

JFET working when either VGS or VDS or both are changed

When VGS is decreased from zero and VDS = 0.

In this case, as VGS is made more and more negative, the gate
reverse bias increase which increases the thickness of the
depletion regions.

As negative value of VGS is increased, a stage comes when the

two depletion region touch each other. The channel is said to
be cut-off(VGS(off ) = VP )

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

JFET working when either VGS or VDS or both are changed
When VGS = 0 and VDS is increased from zero.

The JFET is connected to the VDS supply, the electrons are

flow from S to D where as conventional current drain current
ID flows from D to S.

As VDS is gradually increased from zero, ID increases

proportionally as per Ohm’s law.

The ohmic relation between VDS and ID continues till VDS

reaches a certain value called “ pinch-off voltage(VP )”.

When the drain current becomes constant at its maximum

value called IDSS .

Under pinch-off conditions, separation between the depletion

regions near the drain end reaches a minimum value.
Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS
JFET working when either VGS or VDS or both are changed

When VGS is negative and VDS is increased from zero.

As VGS is made more and more negative, values of VP as well

as breakdown voltage are decreased.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Transfer characteristic of JFET

The relation between ID and VGS is given by “Shockley’s

equation”.

 VGS
2
ID = IDSS 1
VP

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Transfer characteristic of JFET

The input characteristic gives relation between ID and VGS

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

The output characteristic gives relation between ID and VDS

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

The VGS is increasing

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

The Drain characteristic region can be sub-divided into

four types

Ohmic region

Saturation (pinch-off) region

cut-off region

Breakdown region

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

Ohmic region:

This part of the characteristic is linear indicating for low values

of VDS .

The current varies directly with voltage following Ohm’s Law.

A JFET behave as a resistor in ohmic region.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

Saturation region:

VDS is increasing beyond pinch-off (VP ), ID does not change in

saturation region.

Here JFET operates as a constant current device because ID is

relatively independent of VDS .

Remember that pinch-off does not mean current-off.

a constant current source in saturation region.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

cut-off region:

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of JFET

Breakdown region:

If VDS is increasing beyond its value corresponding breakdown

voltage, JFET enter into breakdown region where ID increases
to an excessive value.

This happens because the VGS junction undergoes avalanche

breakdown when small change in VDS produce large change in
ID .

A constant voltage source in breakdown region.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

 Next MOSFET

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Basic Construction of MOSFET

MOSFET can be fabricated with either an n-channel or

p-channel.

MOSFETs come in four different types. They may be

enhancement or depletion mode, and they may be n-channel
or p-channel.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

MOSFET

Enhancement MOSFET : A negative voltage is applied to the

gate terminal.

Depletion MOSFET : A positive voltage is applied to the gate

terminal.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

Both depletion width are equal.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

Both depletion width are unequal.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

Source and Drain terminals are connected with polarities.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

The electrons of the substrate below the gate oxide layer are
repelled.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

The holes of the substrate below the gate oxide layer are
attracted.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

These holes are confined in a thin region, called the channel.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

Holes are moving from source to drain and current direction

also same.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Enhancement MOSFET

in Pinch-off condition

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

MOSFET

n-channel MOSFET

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Depletion MOSFET
n-channel Depletion MOSFET

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Depletion and Enhancement MOSFET symbol

Modify n-Type MOSFET from Depletion to Enhancement

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Depletion and Enhancement MOSFET symbol

Modify p-Type MOSFET from Depletion to Enhancement

Opposite arrowhead at previous diagram.

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Drain characteristic of MOSFET
Drain characteristic of MOSFET in both mode

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

Transfer characteristic of MOSFET
Transfer characteristic of MOSFET in both mode

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS

 Thank You

Mr.SRINIVAS RAMAVATH EC-101/102 : BASIC ELECTRONICS